MC74HC4511DD [MOTOROLA]

Seven Segment Decoder/Driver, HC/UH Series, True Output, CMOS, PDSO16, SOIC-16;
MC74HC4511DD
型号: MC74HC4511DD
厂家: MOTOROLA    MOTOROLA
描述:

Seven Segment Decoder/Driver, HC/UH Series, True Output, CMOS, PDSO16, SOIC-16

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SEMICONDUCTOR TECHNICAL DATA  
High–Performance Silicon–Gate CMOS  
N SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
16  
The MC74HC4511 is identical in pinout to the MC14511 metal–gate  
CMOS decoder/driver. The device inputs are compatible with standard  
CMOS outputs; with pullup resistors, they are compatible with LSTTL  
outputs.  
1
D SUFFIX  
SOIC PACKAGE  
CASE 751B–05  
The HC4511 provides the functions of a 4–bit storage latch, a BCD–to–  
seven–segment decoder, and a display driver. It can be used either directly  
or indirectly with seven–segment light–emitting diode (LED), incandescent,  
fluorescent, gas discharge, or liquid–crystal readouts. Lamp test (LT),  
blanking (BI), and latch enable (LE) inputs are used to test the display, to turn  
off or pulse modulate the brightness of the display, and to store a BCD code,  
respectively.  
16  
1
ORDERING INFORMATION  
MC74HCXXXXN  
MC74HCXXXXD  
Plastic  
SOIC  
Latch Storage of BCD Inputs  
Blanking Input  
Lamp Test Input  
Output Drive Capability: 10 LSTTL Loads  
Outputs Directly Interface to CMOS, NMOS, and TTL  
Operating Voltage Range: 2 to 6 V  
Low Input Current: 1 µA  
High Noise Immunity Characteristic of CMOS Devices  
In Compliance with the Requirements Defined by JEDEC Standard  
No. 7A  
PIN ASSIGNMENT  
B
C
1
2
16  
15  
V
f
CC  
LT  
BI  
3
4
5
6
7
8
14  
13  
12  
11  
10  
9
g
a
b
c
d
e
LE  
D
Chip Complexity: 264 FETs or 66 Equivalent Gates  
A
GND  
LOGIC DIAGRAM  
7
1
2
6
13  
12  
11  
10  
9
A (LSB)  
a
b
c
d
e
f
a
f
g
B
C
b
c
BCD  
INPUTS  
e
DECODER  
AND  
OUTPUT  
CONTROL  
SEVEN–  
4–BIT  
TRANSPARENT  
LATCH  
d
SEGMENT  
DISPLAY–  
DRIVER  
D (MSB)  
DISPLAY  
OUTPUTS  
15  
14  
g
5
4
3
LE  
CONTROL  
INPUTS  
BI  
LT  
PIN 16 = V  
CC  
PIN 8 = GND  
10/95  
Motorola, Inc. 1995  
REV 6  
MC74HC4511  
MAXIMUM RATINGS*  
Symbol  
Parameter  
Value  
Unit  
V
This device contains protection  
circuitry to guard against damage  
due to high static voltages or electric  
fields. However, precautions must  
be taken to avoid applications of any  
voltage higher than maximum rated  
voltages to this high–impedance cir-  
V
DC Supply Voltage (Referenced to GND)  
DC Input Voltage (Referenced to GND)  
DC Output Voltage (Referenced to GND)  
DC Input Current, per Pin  
– 0.5 to + 7.0  
CC  
V
– 1.5 to V  
+ 1.5  
V
in  
CC  
V
out  
– 0.5 to V  
+ 0.5  
V
CC  
I
± 20  
mA  
mA  
mA  
mW  
in  
cuit. For proper operation, V and  
in  
I
I
DC Output Current, per Pin  
± 25  
± 70  
out  
V
should be constrained to the  
out  
range GND (V or V  
)
V
CC  
.
DC Supply Current, V  
CC  
and GND Pins  
in out  
CC  
Unused inputs must always be  
tied to an appropriate logic voltage  
P
D
Power Dissipation in Still Air  
Plastic DIP†  
SOIC Package†  
750  
500  
level (e.g., either GND or V ).  
CC  
Unused outputs must be left open.  
T
stg  
Storage Temperature  
– 65 to + 150  
C
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds  
(Plastic DIP or SOIC Package)  
260  
* Maximum Ratings are those values beyond which damage to the device may occur.  
Functional operation should be restricted to the Recommended Operating Conditions.  
†Derating — Plastic DIP: – 10 mW/ C from 65 to 125 C  
SOIC Package: – 7 mW/ C from 65 to 125 C  
For high frequency or heavy load considerations, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
RECOMMENDED OPERATING CONDITIONS  
Symbol  
Parameter  
Min  
2.0  
0
Max  
Unit  
V
V
CC  
DC Supply Voltage (Referenced to GND)  
DC Input Voltage, Output Voltage (Referenced to GND)  
Operating Temperature, All Package Types  
6.0  
V , V  
in out  
V
CC  
V
T
A
– 55 + 125  
C
t , t  
r f  
Input Rise and Fall Time  
(Figure 3)  
V
CC  
V
CC  
V
CC  
= 2.0 V  
= 4.5 V  
= 6.0 V  
0
0
0
1000  
500  
400  
ns  
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)  
Guaranteed Limit  
– 55 to  
V
CC  
V
25 C  
Symbol  
Parameter  
Test Conditions  
Unit  
85 C  
125 C  
V
IH  
Minimum High–Level Input  
Voltage  
V
= 0.1 V or V  
– 0.1 V  
2.0  
4.5  
6.0  
1.5  
3.15  
4.2  
1.5  
3.15  
4.2  
1.5  
3.15  
4.2  
V
out  
CC  
|I  
|
20 µA  
out  
V
Maximum Low–Level Input  
Voltage  
V
= 0.1 V or V  
– 0.1 V  
2.0  
4.5  
6.0  
0.3  
0.9  
1.2  
0.3  
0.9  
1.2  
0.3  
0.9  
1.2  
V
V
IL  
out  
CC  
|I  
|
20 µA  
out  
V
OH  
Minimum High–Level Output  
Voltage  
V
= V or V  
IH IL  
2.0  
4.5  
6.0  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
1.9  
4.4  
5.9  
in  
|I  
|
20 µA  
out  
V
in  
= V or V  
|I  
|I  
|
|
6.0 mA  
7.8 mA  
4.5  
6.0  
3.98  
5.48  
3.84  
5.34  
3.70  
5.20  
IH IL out  
out  
V
OL  
Maximum Low–Level Output  
Voltage  
V
= V or V  
IH IL  
2.0  
4.5  
6.0  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
0.1  
V
in  
|I  
|
20 µA  
out  
V
= V or V  
|I  
|I  
|
|
4.0 mA  
5.2 mA  
4.5  
6.0  
0.26  
0.26  
0.33  
0.33  
0.40  
0.40  
in  
in  
IH IL out  
out  
I
Maximum Input Leakage Current  
V
V
= V  
= V  
or GND  
6.0  
6.0  
± 0.1  
± 1.0  
± 1.0  
µA  
µA  
in  
CC  
I
Maximum Quiescent Supply  
Current (per Package)  
or GND  
8
80  
160  
CC  
in  
CC  
I
= 0 µA  
out  
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
MOTOROLA  
2
MC74HC4511  
AC ELECTRICAL CHARACTERISTICS (C = 50 pF, Input t = t = 6 ns)  
L
r
f
Guaranteed Limit  
– 55 to  
V
CC  
V
25 C  
Symbol  
Parameter  
Unit  
85 C  
125 C  
t
t
t
t
t
,
Maximum Propagation Delay, Input A, B, C, or D to Output  
(Figures 1 and 6)  
2.0  
4.5  
6.0  
600  
120  
102  
750  
150  
129  
900  
180  
153  
ns  
PLH  
t
PHL  
,
Maximum Propagation Delay, Latch Enable to Output  
(Figures 2 and 6)  
2.0  
4.5  
6.0  
600  
120  
102  
750  
150  
129  
900  
180  
153  
ns  
ns  
ns  
ns  
pF  
PLH  
t
PHL  
,
Maximum Propagation Delay, Blanking Input to Output  
(Figures 3 and 6)  
2.0  
4.5  
6.0  
600  
120  
102  
750  
150  
129  
900  
180  
153  
PLH  
t
PHL  
,
Maximum Propagation Delay, Lamp Test to Output  
(Figures 4 and 6)  
2.0  
4.5  
6.0  
600  
120  
102  
750  
150  
129  
900  
180  
153  
PLH  
t
PHL  
,
Maximum Output Transition Time, Any Output  
(Figures 3 and 6)  
2.0  
4.5  
6.0  
75  
15  
13  
95  
19  
16  
110  
22  
19  
TLH  
t
THL  
C
Maximum Input Capacitance  
10  
10  
10  
in  
NOTES:  
1. For propagation delays with loads other than 50 pF, see Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
2. Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
Typical @ 25°C, V  
= 5.0 V  
CC  
C
Power Dissipation Capacitance (Per Package)*  
pF  
70  
PD  
2
* Used to determine the no–load dynamic power consumption: P = C  
D
Motorola High–Speed CMOS Data Book (DL129/D).  
V
f + I  
V
. For load considerations, see Chapter 2 of the  
PD CC  
CC CC  
TIMING REQUIREMENTS (Input t = t = 6 ns)  
r
f
Guaranteed Limit  
– 55 to  
V
CC  
V
25 C  
Symbol  
Parameter  
Unit  
85 C  
125 C  
t
su  
Minimum Setup Time, Input A, B, C, or D to Latch Enable  
(Figure 5)  
2.0  
4.5  
6.0  
100  
20  
17  
125  
25  
21  
150  
30  
26  
ns  
t
Minimum Hold Time, Latch Enable to Input A, B, C, or D  
(Figure 5)  
2.0  
4.5  
6.0  
0
0
0
0
0
0
0
0
0
ns  
ns  
ns  
h
t
w
Minimum Pulse Width, Latch Enable  
(Figure 2)  
2.0  
4.5  
6.0  
80  
16  
14  
100  
20  
17  
120  
24  
20  
t , t  
r
Maximum Input Rise and Fall Times  
(Figure 3)  
2.0  
4.5  
6.0  
1000  
500  
400  
1000  
500  
400  
1000  
500  
400  
f
NOTE: Information on typical parametric values can be found in Chapter 2 of the Motorola High–Speed CMOS Data Book (DL129/D).  
3
MOTOROLA  
MC74HC4511  
SWITCHING WAVEFORMS  
t
VALID  
50%  
VALID  
w
V
CC  
V
CC  
INPUT  
A, B, C, OR D  
INPUT LE  
50%  
50%  
50%  
GND  
GND  
t
t
PHL  
t
t
PLH  
PLH  
PHL  
ANY  
OPUTPUT  
ANY  
OPUTPUT  
50%  
Figure 1.  
Figure 2.  
t
t
r
f
t
t
f
r
V
CC  
V
90%  
50%  
10%  
CC  
90%  
INPUT BI  
INPUT LT  
50%  
10%  
GND  
GND  
t
t
PLH  
PHL  
t
t
PHL  
PLH  
90%  
50%  
10%  
90%  
50%  
10%  
ANY  
OPUTPUT  
ANY  
OPUTPUT  
t
t
TLH  
THL  
t
t
TLH  
THL  
Figure 3.  
Figure 4.  
TEST POINT  
VALID  
50%  
OUTPUT  
V
CC  
INPUT  
A, B, C, OR D  
DEVICE  
UNDER  
TEST  
GND  
C *  
L
t
t
h
su  
V
CC  
50%  
INPUT LE  
GND  
* Includes all probe and jig capacitance  
Figure 5.  
Figure 6. Test Circuit  
MOTOROLA  
4
MC74HC4511  
FUNCTION TABLE  
Inputs  
Outputs  
LE  
X
BI  
X
LT  
L
D
X
X
C
X
X
B
X
X
A
X
X
a
H
L
b
H
L
c
H
L
d
H
L
e
H
L
f
g
H
L
Display  
8
H
L
X
L
H
Blank  
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
L
L
L
L
L
L
H
H
L
H
L
H
L
H
H
H
H
H
H
H
H
L
H
L
H
H
H
L
H
L
H
L
L
L
L
L
H
H
0
1
2
3
H
H
L
L
L
L
H
H
H
H
H
H
H
H
L
L
L
L
H
H
H
H
L
L
H
H
L
H
L
L
H
L
H
L
L
H
H
H
H
L
H
H
L
L
L
H
L
H
H
H
L
H
H
H
L
4
5
6
7
H
H
H
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
L
L
L
L
L
L
H
H
L
H
L
H
H
L
H
H
L
H
H
L
H
L
L
L
H
L
L
L
H
H
L
H
H
L
8
9
Blank  
Blank  
H
L
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
H
H
H
H
H
H
H
X
H
H
H
H
X
L
L
H
H
X
L
H
L
H
X
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
*
L
L
L
L
L
L
L
L
L
L
L
L
Blank  
Blank  
Blank  
Blank  
*
* = Depends upon the BCD code previously applied while LE was at a low level.  
PIN DESCRIPTIONS  
INPUTS  
CONTROL INPUTS  
BI (Pin 4)  
A, B, C, D (Pins 7, 1, 2, 6)  
Active–low display blanking input. A low level on this input  
will cause all outputs to be held low, thereby blanking the dis-  
play. LT is the only input that overrides the BI input.  
BCD inputs. A (pin 7) is the least significant bit and D (pin  
6) is the most significant bit. Hexadecimal code A–F at these  
inputs causes the outputs to assume a low level, offering an  
alternate method of blanking the display.  
LT (Pin 3)  
Active–low lamp test. A low level on this input causes all  
outputs to assume a high level. This input allows the user to  
test all segments of a display with a single control input. This  
input is independent of all other inputs.  
OUTPUTS  
a, b, c, d, e, f, g (Pins 13, 12, 11, 10, 9, 15, 14)  
LE (Pin 5)  
Decoded, buffered seven–segment display–driver out-  
puts. These outputs, unlike the MC14511, have CMOS driv-  
ers, which produce typical CMOS output voltage levels.  
These outputs are connected to various displays as shown in  
Figure 7.  
Latch enable input. This input controls the 4–bit transpar-  
ent latch. A high level on this input latches the code present  
at the A, B, C and D inputs, a low level allows the code to be  
transmitted through the latch to the decoder.  
5
MOTOROLA  
MC74HC4511  
OUTPUT CHARACTERISTIC CURVES (V  
= 5 V)  
CC  
SOURCE CURRENT  
SINK CURRENT  
25  
25  
20  
15  
10  
5
T
= 25  
°
C
C
A
TYPICAL  
= 25°C  
T
A
20  
15  
10  
–5  
TYPICAL  
= 25°C  
T
= 85  
°
A
T
A
T
= 25  
°
C
C
A
T
= 125°C  
A
T
= 85  
°
A
T
= 125°C  
A
EXPECTED MINIMUM*  
EXPECTED MINIMUM*  
0
0
5
4
3
2
1
0
0
1
2
3
4
5
V
, OUTPUT VOLTAGE (VOLTS)  
V , OUTPUT VOLTAGE (VOLTS)  
O
O
* The expectedminimum curves are not guarantees, but are design aids.  
MOTOROLA  
6
MC74HC4511  
EXPANDED LOGIC DIAGRAM  
BI  
4
LI  
3
5
LE  
13  
a
7
A
DATA  
LE  
A
A
12  
b
11  
c
1
DATA  
LE  
B
B
B
10  
d
9
e
2
DATA  
LE  
C
C
C
15  
f
14  
g
6
DATA  
LE  
D
D
D
7
MOTOROLA  
MC74HC4511  
Liquid–Crystal Display (LCD) Readout  
Incandescent Readout  
HC86  
ONE OF SEVEN  
SEGMENTS  
OUTPUT  
TYPICAL VALUES  
HC4511  
R
R
C
= 1 MΩ  
S
T
T
APPROPRIATE  
VOLTAGE  
= 100 kΩ  
= 0.01  
µ
F
R
R
C
T
S
T
HCU04  
HCU04  
COMMON  
BACKPLANE  
OUTPUT  
HC4511  
LED Readout  
COMMON  
CATHODE LED  
HC4511  
OUTPUT  
Gas Discharge Readout  
APPROPRIATE  
VOLTAGE  
V
CC  
OUTPUT  
HC4511  
COMMON  
ANODE LED  
HC4511  
OUTPUT  
HC04  
Figure 7. Connections to Various Display Readouts  
MOTOROLA  
8
MC74HC4511  
OUTLINE DIMENSIONS  
N SUFFIX  
PLASTIC PACKAGE  
CASE 648–08  
ISSUE R  
NOTES:  
–A  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: INCH.  
3. DIMENSION L TO CENTER OF LEADS WHEN  
FORMED PARALLEL.  
16  
1
9
8
B
4. DIMENSION B DOES NOT INCLUDE MOLD FLASH.  
5. ROUNDED CORNERS OPTIONAL.  
INCHES  
MILLIMETERS  
DIM  
A
B
C
D
F
G
H
J
K
L
MIN  
MAX  
0.770  
0.270  
0.175  
0.021  
MIN  
18.80  
6.35  
3.69  
0.39  
1.02  
MAX  
19.55  
6.85  
4.44  
0.53  
F
C
L
0.740  
0.250  
0.145  
0.015  
0.040  
S
0.070  
1.77  
SEATING  
–T  
PLANE  
0.100 BSC  
0.050 BSC  
0.015  
0.130  
0.305  
2.54 BSC  
1.27 BSC  
0.38  
3.30  
7.74  
M
K
0.008  
0.110  
0.295  
0.21  
2.80  
7.50  
H
J
G
D 16 PL  
M
S
0°  
10°  
0°  
10°  
M
M
0.25 (0.010)  
T
A
0.020  
0.040  
0.51  
1.01  
D SUFFIX  
PLASTIC SOIC PACKAGE  
CASE 751B–05  
ISSUE J  
–A  
NOTES:  
1. DIMENSIONING AND TOLERANCING PER ANSI  
Y14.5M, 1982.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSIONS A AND B DO NOT INCLUDE  
MOLD PROTRUSION.  
16  
1
9
8
–B  
P 8 PL  
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)  
PER SIDE.  
M
M
0.25 (0.010)  
B
5. DIMENSION D DOES NOT INCLUDE DAMBAR  
PROTRUSION. ALLOWABLE DAMBAR  
PROTRUSION SHALL BE 0.127 (0.005) TOTAL  
IN EXCESS OF THE D DIMENSION AT  
MAXIMUM MATERIAL CONDITION.  
G
MILLIMETERS  
INCHES  
DIM  
A
B
C
D
F
G
J
MIN  
9.80  
3.80  
1.35  
0.35  
0.40  
MAX  
10.00  
4.00  
1.75  
0.49  
MIN  
MAX  
0.393  
0.157  
0.068  
0.019  
0.049  
0.386  
0.150  
0.054  
0.014  
0.016  
F
K
R X 45°  
C
1.25  
1.27 BSC  
0.050 BSC  
–T  
0.19  
0.10  
0.25  
0.25  
0.008  
0.004  
0.009  
0.009  
J
SEAT  
ING  
M
K
PLANE  
D 16 PL  
M
P
R
0
5.80  
0.25  
°
7
6.20  
0.50  
°
0
°
7°  
0.244  
0.019  
0.229  
0.010  
M
S
S
0.25 (0.010)  
T
B
A
Motorolareserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representationorguaranteeregarding  
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,  
andspecifically disclaims any and all liability, includingwithoutlimitationconsequentialorincidentaldamages. “Typical” parameters can and do vary in different  
applications. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does  
not convey any license under its patent rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in  
systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of  
the Motorola product could create a situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such  
unintendedor unauthorized application, Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless  
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death  
associated with such unintended or unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part.  
Motorola and  
are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.  
How to reach us:  
USA/EUROPE: Motorola Literature Distribution;  
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, Toshikatsu Otsuki,  
P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447  
6F Seibu–Butsuryu–Center, 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–3521–8315  
MFAX: RMFAX0@email.sps.mot.com –TOUCHTONE (602) 244–6609  
INTERNET: http://Design–NET.com  
HONG KONG: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,  
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298  
CODELINE  
MC74HC4511/D  

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