MC14544BCP [MOTOROLA]
BCD-to-Seven Segment Latch/Decoder/Driver for Liquid Crystals; BCD至七段锁存器/解码器/驱动器，用于液晶
| 型号： | MC14544BCP |
| 厂家： | 
MOTOROLA |
| 描述： | BCD-to-Seven Segment Latch/Decoder/Driver for Liquid Crystals |
| 文件： | 总7页 (文件大小：266K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SEMICONDUCTOR TECHNICAL DATA
L SUFFIX
CERAMIC
CASE 726
CMOS MSI (Low–Power Complementary MOS)
The MC14544B BCD–to–seven segment latch/decoder/driver is designed
for use with liquid crystal readouts, and is constructed with complementary
MOS (CMOS) enhancement mode devices. The circuit provides the
functions of a 4–bit storage latch and an 8421 BCD–to–seven segment
decoder and driver. The device has the capability to invert the logic levels of
the output combination. The phase (Ph), blanking (BI), and latch disable (LD)
inputs are used to reverse the truth table phase, blank the display, and store
a BCD code, respectively. For liquid crystal (LC) readouts, a square wave is
applied to the Ph input of the circuit and the electrically common backplane
of the display. The outputs of the circuit are connected directly to the
segments of the LC readout. The Ripple Blanking Input (RBI) and the Ripple
Blanking Output (RBO) can be used to suppress either leading or trailing
zeroes.
P SUFFIX
PLASTIC
CASE 707
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
Plastic
Ceramic
T
A
= – 55° to 125°C for all packages.
For other types of readouts, such as light–emitting diode (LED),
incandescent, gas discharge, and fluorescent readouts, connection dia-
grams are given on this data sheet.
PIN ASSIGNMENT
Applications include instrument (e.g., counter, DVM etc.) display driver,
computer/calculator display driver, cockpit display driver, and various clock,
watch, and timer uses.
LD
C
1
2
3
4
5
6
7
8
9
18
17
16
15
14
13
12
11
10
V
f
DD
a
B
g
e
d
c
b
a
•
•
•
•
•
•
•
Latch Storage of Code
Blanking Input
f
g
b
D
e
c
Readout Blanking on All Illegal Input Combinations
Direct LED (Common Anode or Cathode) Driving Capability
Supply Voltage Range = 3.0 V to 18 V
Capability for Suppression of Non–significant zero
Capable of Driving Two Low–power TTL Loads, One Low–power
Schottky TTL Load or Two HTL Loads Over the Rated Temperature
Range
A
d
PH
BI
RBO
V
RBI
SS
MAXIMUM RATINGS* (Voltages referenced to V
)
SS
DISPLAY
Rating
DC Supply Voltage
Symbol
Value
Unit
V
V
DD
– 0.5 to + 18
0
1
2
3
4
5
6
7
8
9
Input Voltage, All Inputs
V
– 0.5 to V
DD
+ 0.5
V
in
in
DC Input Current per Pin
I
± 10
mAdc
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
Operating Temperature Range
Power Dissipation, per Package†
Storage Temperature Range
T
– 55 to + 125
500
C
mW
C
A
P
D
T
stg
– 65 to + 150
10
Maximum Continuous Output Drive
Current (Source or Sink) per Output
I
I
mAdc
OHmax
OLmax
operation, V and V
to the range V
SS
Unused inputs must always be tied to an
should be constrained
in
out
(V or V
)
V
DD
.
Maximum Continuous Output Power*
(Source or Sink) per Output
P
P
70
mW
in out
OHmax
OLmax
appropriate logic voltage level (e.g., either V
SS
or V ). Unused outputs must be left open.
* P
= I
(V
– V ) and P
DD OLmax OL OL
= I (V
– V )
SS
OHmax OH OH
DD
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/ C From 65 C To 125 C
Ceramic “L” Packages: – 12 mW/ C From 100 C To 125 C
REV 3
1/94
Motorola, Inc. 1995
ELECTRICAL CHARACTERISTICS (Voltages Referenced to V
)
SS
– 55 C
25 C
125 C
V
DD
Vdc
Characteristic
Output Voltage
Symbol
Unit
Min
Max
Min
Typ #
Max
Min
Max
“0” Level
“1” Level
“0” Level
V
OL
5.0
10
15
—
—
—
0.05
0.05
0.05
—
—
—
0
0
0
0.05
0.05
0.05
—
—
—
0.05
0.05
0.05
Vdc
V
in
= V
DD
or 0
V
OH
5.0
10
15
4.95
9.95
14.95
—
—
—
4.95
9.95
14.95
5.0
10
15
—
—
—
4.95
9.95
14.95
—
—
—
Vdc
Vdc
V
in
= 0 or V
DD
Input Voltage #
(V = 4.5 or 0.5 Vdc)
V
IL
5.0
10
15
—
—
—
1.5
3.0
4.0
—
—
—
2.25
4.50
6.75
1.5
3.0
4.0
—
—
—
1.5
3.0
4.0
O
(V = 9.0 or 1.0 Vdc)
O
(V = 13.5 or 1.5 Vdc)
O
“1” Level
Source
Sink
V
Vdc
IH
(V = 0.5 or 4.5 Vdc)
5.0
10
15
3.5
7.0
11
—
—
—
3.5
7.0
11
2.75
5.50
8.25
—
—
—
3.5
7.0
11
—
—
—
O
(V = 1.0 or 9.0 Vdc)
O
(V = 1.5 or 13.5 Vdc)
O
Output Drive Current
I
mAdc
OH
(V
OH
(V
OH
(V
OH
(V
OH
(V
OH
= 2.5 Vdc)
= 4.6 Vdc)
= 0.5 Vdc)
= 9.5 Vdc)
= 13.5 Vdc)
5.0
5.0
10
10
15
– 3.0
– 0.64
—
– 1.6
– 4.2
—
—
—
—
—
– 2.4
– 0.51
—
– 1.3
– 3.4
– 4.2
– 0.88
– 10.1
– 2.25
– 8.8
—
—
—
—
—
– 1.7
– 0.36
—
– 0.9
– 2.4
—
—
—
—
(V
OL
(V
OL
(V
OL
(V
OL
= 0.4 Vdc)
= 0.5 Vdc)
= 9.5 Vdc)
= 1.5 Vdc)
I
5.0
10
10
15
0.64
1.6
—
—
—
—
—
0.51
1.3
—
0.88
2.25
10.1
8.8
—
—
—
—
0.36
0.9
—
—
—
—
mAdc
OL
4.2
3.4
2.4
Input Current
I
15
—
—
—
±0.1
—
—
±0.00001
±0.1
—
—
±1.0
µAdc
pF
in
Input Capacitance
Quiescent Current
C
—
5.0
7.5
—
in
I
5.0
10
15
—
—
—
5.0
10
20
—
—
—
0.005
0.010
0.015
5.0
10
20
—
—
—
150
300
600
µAdc
DD
(Per Package) V = 0 or V
in DD
,
I
= 0 µA
out
Total Supply Current**†
(Dynamic plus Quiescent,
Per Package)
I
T
5.0
10
15
I
T
I
T
I
T
= (1.6 µA/kHz) f + I
= (3.1 µA/kHz) f + I
= (4.7 µA/kHz )f + I
µAdc
DD
DD
DD
(C = 50 pF on all outputs, all
L
buffers switching)
#Noise immunity specified for worst–case input combination.
Noise Margin for both “1” and “0” level = 1.0 V min @ V
= 2.0 V min @ V
= 5.0 V
= 10 V
= 15 V
DD
DD
DD
= 2.5 V min @ V
†To calculate total supply current at loads other than 50 pF:
–3
I (C ) = I (50 pF) + 3.5 x 10 (C – 50) V
DD
f
T
L
T
L
where: I is in µA (per package), C in pF, V
DD
in V, and f in kHz is input frequency.
T
L
* The formulas given are for the typical characteristics only at 25 C.
MC14544B
2
MOTOROLA CMOS LOGIC DATA
SWITCHING CHARACTERISTICS* (C = 50 pF, T = 25 C)
L
A
Characteristic
Symbol
V
DD
Min
Typ
Max
Unit
Output Rise Time
t
ns
TLH
THL
PLH
PHL
t
t
t
= (3.0 ns/pF) C + 30 ns
= (1.5 ns/pF) C + 15 ns
= (1.1 ns/pF) C + 10 ns
5.0
10
15
—
—
—
100
50
40
200
100
80
TLH
TLH
TLH
L
L
L
Output Fall Time
t
ns
ns
ns
t
t
t
= (1.5 ns/pF) C + 25 ns
= (0.75 ns/pF) C + 12.5 ns
= (0.55 ns/pF) C + 12.5 ns
5.0
10
15
—
—
—
100
50
40
200
100
80
THL
THL
THL
L
L
L
Turn–Off Delay Time
t
t
t
t
t
= (1.7 ns/pF) C + 520 ns
= (0.66 ns/pF) C + 217 ns
= (0.5 ns/pF) C + 160 ns
5.0
10
15
—
—
—
605
250
185
1210
500
370
PLH
PLH
PLH
L
L
L
Turn–On Delay Time
t
t
t
= (1.7 ns/pF) C + 420 ns
= (0.66 ns/pF) C + 172 ns
= (0.5 ns/pF) C + 130 ns
5.0
10
15
—
—
—
505
205
155
1650
660
495
PHL
PHL
PHL
L
L
L
Setup Time
t
5.0
10
15
0
0
0
– 40
– 15
– 10
—
—
—
ns
ns
ns
su
Hold Time
t
5.0
10
15
80
30
20
40
15
10
—
—
—
h
Latch Disable Pulse Width (Strobing Data)
t
5.0
10
15
250
100
80
125
50
40
—
—
—
WH
* The formulas given are for the typical characteristics only.
LOGIC DIAGRAM
BI 7
V
V
= PIN 18
= PIN 9
DD
SS
11 a
A 5
B 3
C 2
12 b
13 c
14 d
15 e
17 f
16 g
D 4
LD 1
6
PHASE
8 RBO
RBI 10
MOTOROLA CMOS LOGIC DATA
MC14544B
3
CONNECTIONS TO VARIOUS DISPLAY READOUTS
LIQUID CRYSTAL (LC) READOUT
INCANDESCENT READOUT
APPROPRIATE
VOLTAGE
MC14544B
ONE OF SEVEN SEGMENTS
OUTPUT
Ph
COMMON
BACKPLANE
MC14544B
SQUARE WAVE
OUTPUT
Ph
(V
SS
TO V
)
DD
V
SS
LIGHT EMITTING DIODE (LED) READOUT
GAS DISCHARGE READOUT
APPROPRIATE
VOLTAGE
V
DD
COMMON
COMMON
CATHODE LED
ANODE LED
MC14544B
OUTPUT
Ph
MC14544B
OUTPUT
Ph
MC14544B
OUTPUT
Ph
V
SS
V
DD
NOTE: Bipolar transistors may be added for gain (for V
10 V or I
≥ 10 mA).
out
DD
V
SS
TRUTH TABLE
X = Don’t Care
Inputs
Ph*
0
Outputs
†Above Combinations
RBI LD BI
D
C
B
A
RBO
a
b
c
d
e
f
g
Display
*For liquid crystal readouts, apply a square wave
to Ph. For common cathode LED readouts, select
Ph = 0. For common anode LED readouts, select
Ph = 1.
X
X
1
X
X
X
X
#
0
0
0
0
0
0
0
Blank
1
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
0
Blank
0
**Depends upon the BCD Code previously applied
when LD = 1.
X
X
X
X
X
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
0
1
1
0
0
1
0
1
0
1
0
0
0
0
0
0
1
1
0
1
1
1
1
1
0
1
0
1
1
1
0
1
1
0
1
0
1
0
0
0
0
0
0
1
1
0
1
1
1
1
1
2
3
4
5
# RBO = RBI (A B C D)
X
X
X
X
X
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
1
1
0
0
1
0
1
0
1
0
0
0
0
0
0
1
1
1
1
0
0
1
1
1
0
1
0
1
1
0
1
0
1
1
0
1
0
1
0
0
1
0
1
1
0
1
0
1
1
0
6
7
8
9
Blank
X
X
X
X
X
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
1
1
1
1
1
0
0
1
1
1
0
1
0
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Blank
Blank
Blank
Blank
Blank
X
†
0
†
0
†
0
1
X
X
X
X
#
†
**
**
†
Inverse of Output
Display
Combinations Above
as above
MC14544B
4
MOTOROLA CMOS LOGIC DATA
0
–6.0
–12
24
18
12
V = 15 Vdc
DD
V
= 5.0 Vdc
DD
P
= 70 mWdc
OHmax
V
= 10 Vdc
DD
V
= 10 Vdc
DD
–18
–24
6.0
0
P = 70 mWdc
OLmax
V
= 15 Vdc
V
= 5.0 Vdc
DD
DD
V
SS
= 0 Vdc
V
= 0 Vdc
12
SS
–16
–12
–8.0
–4.0
0
0
4.0
8.0
16
(V
OH
– V ), SOURCE DEVICE VOLTAGE (Vdc)
(V
– V ), SINK DEVICE VOLTAGE (Vdc)
SS
DD
OL
Figure 1. Typical Output Source
Characteristics
Figure 2. Typical Output Sink
Characteristics
(a) Inputs D, Ph, and BI low, and Inputs A, B, and LD high.
20 ns
20 ns
V
V
V
V
DD
SS
OH
OL
90%
10%
C
g
50%
t
t
PLH
PHL
90%
50%
10%
t
TLH
t
THL
(b) Inputs D, Ph, and BI low, and Inputs A and B high.
20 ns
90%
V
DD
LD
C
50%
10%
V
V
V
V
V
SS
DD
SS
OH
OL
t
su
t
h
Inputs BI and Ph low, and Inputs D and LD high.
f in respect to a system clock.
50%
50%
All outputs connected to respective C loads.
L
g
20 ns
50%
20 ns
A, B, AND C
V
V
DD
90%
1
2f
10%
SS
(c) Data DCBA strobed into latches
50% DUTY CYCLE
V
V
DD
50%
WH
LD
V
V
OH
ANY OUTPUT
SS
t
OL
Figure 3. Dynamic Power Dissipation
Signal Waveforms
Figure 4. Dynamic Signal Waveforms
MOTOROLA CMOS LOGIC DATA
MC14544B
5
TYPICAL APPLICATIONS FOR RIPPLE BLANKING
LEADING EDGE ZERO SUPPRESSION
DISPLAYS
a – – – – – g
RBI RBO
a – – – – – g
RBI RBO
a – – – – – g
a – – – – – g
RBI RBO
a – – – – – g
a – – – – – g
RBI RBO
CONNECT TO
(1)
RBI
RBO
A
RBI
RBO
A
V
D
C
B
A
1
D
C
B
A
1
D
C
B
0
D
C
B
A
0
D
C
B
0
D
C
B
A
0
DD
MC14544B
MC14544B
MC14544B
MC14544B
MC14544B
MC14544B
INPUT
CODE
0
0
0
0
0
0
0
(0)
0
0
1
0
(5)
1
0
0
0
0
0
0
0
1
0
0
1
(3)
1
(0)
(0)
(1)
TRAILING EDGE ZERO SUPPRESSION
DISPLAYS
a – – – – – g
RBI RBO
a – – – – – g
RBI RBO
a – – – – – g
a – – – – – g
RBI RBO
a – – – – – g
a – – – – – g
RBI RBO
CONNECT TO
0
RBI
RBO
A
RBI
RBO
A
V
(1)
D
C
B
A
0
D
C
B
A
0
D
C
B
0
D
C
B
A
1
D
C
B
1
D
C
B
A
DD
MC14544B
MC14544B
MC14544B
MC14544B
MC14544B
MC14544B
INPUT
CODE
0
1
0
1
0
0
0
(0)
0
0
0
0
(1)
1
0
0
1
1
0
0
0
0
0
0
0
(0)
0
INPUT
CODE
(5)
(3)
(0)
MC14544B
6
MOTOROLA CMOS LOGIC DATA
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 726–04
ISSUE G
NOTES:
1. DIMENSIONING AND TOLERANCING PER
–A–
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F FOR FULL LEADS. HALF
LEADS OPTIONAL AT LEAD POSITIONS 1, 9,
10, AND 18.
18
1
10
9
–B–
OPTIONAL LEAD
CONFIGURATION (1, 9, 10, 18)
INCHES
MILLIMETERS
DIM
A
B
C
D
MIN
MAX
0.910
0.295
0.200
0.021
0.070
MIN
22.35
6.10
–––
0.38
1.40
MAX
23.11
7.49
5.08
0.53
1.78
0.880
0.240
–––
0.015
0.055
L
C
N
F
G
J
K
L
M
N
0.100 BSC
2.54 BSC
0.008
0.125
0.012
0.170
0.20
3.18
0.30
4.32
–T–
SEATING
PLANE
K
0.300 BSC
7.62 BSC
M
F
G
0
15
0
15
0.020
0.040
0.51
1.02
J 18 PL
D 18 PL
M
S
0.25 (0.010)
T B
M
S
0.25 (0.010)
T
A
P SUFFIX
PLASTIC DIP PACKAGE
CASE 707–02
NOTES:
1. POSITIONAL TOLERANCE OF LEADS (D),
ISSUE C
SHALL BE WITHIN 0.25 (0.010) AT MAXIMUM
MATERIAL CONDITION, IN RELATION TO
SEATING PLANE AND EACH OTHER.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
18
10
9
B
1
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
A
MILLIMETERS
INCHES
DIM
A
B
C
D
F
MIN
22.22
6.10
3.56
0.36
1.27
MAX
23.24
6.60
4.57
0.56
1.78
MIN
MAX
0.915
0.260
0.180
0.022
0.070
L
0.875
0.240
0.140
0.014
0.050
C
K
G
H
J
K
L
2.54 BSC
0.100 BSC
N
1.02
0.20
2.92
1.52
0.30
3.43
0.040
0.008
0.115
0.060
0.012
0.135
J
M
F
D
SEATING
PLANE
H
G
7.62 BSC
0.300 BSC
M
N
0
0.51
15
1.02
0
15
0.040
0.020
Motorolareserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representationorguaranteeregarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided
in Motorola data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters,
including “Typicals” must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent
rights nor the rights of others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant
into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a
situation where personal injury or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application,
Buyer shall indemnify and hold Motorola and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or
unauthorized use, even if such claim alleges that Motorola was negligent regarding the design or manufacture of the part. Motorola and
trademarks of Motorola, Inc. Motorola, Inc. is an Equal Opportunity/Affirmative Action Employer.
are registered
How to reach us:
USA/EUROPE/Locations Not Listed: Motorola Literature Distribution;
JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,
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3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315
MFAX: RMFAX0@email.sps.mot.com – TOUCHTONE 602–244–6609
INTERNET: http://Design–NET.com
ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park,
51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298
MC14544B/D
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