M64283FP [MITSUBISHI]
Image Sensor (Artificial Retina Chip); 图像传感器（人造视网膜芯片）
| 型号： | M64283FP |
| 厂家： | 
Mitsubishi Group |
| 描述： | Image Sensor (Artificial Retina Chip) |
| 文件： | 总36页 (文件大小：320K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
1. Overview
Pin Layout (Top view)
M64283FP is a CMOS image sensor of 128 ´
128 pixels, which supports an image-
processing function and an analog signal
calibration, a device that allows information
compression and parallel processing like
human retina. M64283FP can achieve high
performance, a compact system and low
power consumption for an image-processing
apparatus.
AGND
STAR
STRB
AVDD
VOUT
SIN
DVDD
DGND
PVDD
PGND
TADD
LOAD
XRST
READ
XCK
RESET
Outline: 16C9-B
2. Features
u Single 5.0 V supply voltage
u Low power consumption (Typically 15 mw)
u Positive/Negative image output modes
u Edge enhancement and edge extraction output modes
u Vertical/Horizontal projection modes
u Random access mode
u Gain level adjustment mode
3. Application
Image capture devices, game machine interface devices, PC peripherals and any other consumer
electronics devices
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Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
4. Block Diagram
AGND2
AVDD2
16
15
Dark pixel unit
START
STRB
SIN
1
2
1
Level
control
AVOUT
14
Pixel array
128 X 128
3
4
Control
logic
DVDD
Gain
control
AVDD1
13
1
1
DGND
5
6
Pixel scan direction
3
12 AGND1
11 TADD
LOAD
XRST
XCK
Edge
control
Horizontal control circuit
7
8
10 READ
RESET
9
Figure 1. Block Diagram
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Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
5. PINOUT
1
16
8
9
Pin No. Name
Pin function
Description
1
START Start
Digital Input Image capture start signal Pulled down
internally by 50 kW
2
3
STRB Strobe
Digital Output Strobe signal for data output
SIN
Data input
Digital Input Register data input Pulled down internally by
50 kW
4
5
6
DVDD Digital power supply
DGND Digital ground
LOAD Data set
Power supply for control logic unit 5 V
Ground for control logic unit
Digital Input Validate register data input Pulled down
internally by 50 kW
7
XRST Logic reset
Digital Input Reset of control logic unit Pull up by 50 kW
Low active
8
9
XCK
System clock
Digital Input System clock Pulled down internally by 50 kW
RESET Register reset
Digital Input Register reset Pulled up internally by 50 kW
Low active
10
11
READ Data output timing
Digital Output Indicate data output timing
TADD Test Enable
/Register address
Digital Input Test mode enable and Register address MSB
Pulled up internally by 50 kW
12
13
14
15
16
AGND1 Analog ground
AVDD1 Analog power supply
VOUT Data output
Analog ground of pixel analog unit
Analog power supply of pixel analog unit 5 V
Analog Output Image signal data output
AVDD2 Amplifier power supply Analog power supply of analog unit 5 V
AGND2 Amplifier ground Analog ground of analog unit
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Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
6. Image Format
Parameter
Optical size
Specifications
1/4 "
Number of valid pixels
Number of total pixels
Image area
128(H) ´ 128(V)
130(H) ´ 132(V)
3.07 mm ´ 3.07 mm
24 mm ´ 24 mm
Pixel size
Optical black
Horizontal (H) - 1 pixel at the back.
Vertical (V) - 3 pixels at the front and 1 pixel at the back
7. Absolute Maximum Rating
Symbol
DVDD
AVDD1
AVDD2
VI
Parameter
Value
Unit
V
Digital power supply
Analog power supply for pixel unit
Analog power supply for amplifier
Logic input voltage*
7
7
V
7
V
-0.3 to VDD
-10 to +55
-20 to +80
V
Topt
Ambient operating temperature
Storage temperature
°C
°C
Tstg
* The digital input pins are START, SIN, LOAD, XRST, XCK, RESET and TADD.
8. Recommended Operating Conditions
Symbol
Topt
Parameter
Minimum
Typical
25
Maximum
45
Unit
°C
V
Ambient operating temperature
Digital Power supply
0
DVDD
AVDD1
AVDD2
VIH
4.5
4.5
4.5
2.2
0
5.0
5.5
Analog power supply for pixel unit
Analog power supply for amplifier
"H" logic input voltage*
"L" logic input voltage*
5.0
5.5
V
5.0
5.5
V
DVDD
0.8
V
VIL
V
fxck
System clock
50
500
1000
kHz
* The digital input pins are START, SIN, LOAD, XRST, XCK, RESET and TADD.
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Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
9. D.C. Electrical Characteristics
Symbol
VOH
Parameter
Minimum Typical
Maximum
DVDD
0.5
Unit
V
"H" digital output voltage*
"L" digital output voltage*
Analog output current rating**
Analog output resistance**
Digital circuit current
4.5
0
VOL
V
Iout
-100
100
0.5
100
mA
W
Ro
DIDD
AIDD
mA
mA
mA
Front view image
2.5
3
Analog circuit
current
Two-dimensional
edge (50%)
Vertical/Horizontal
projection
4
mA
* The digital output pins are READ and STRB
** The analog output pin is VOUT
10. Electro-optical Characteristics(Ta = 25°C)
Symbol
Parameter
Condition
Minimum
Typical
Maximum
5000
Unit
Image capture illumination
(at image capture face)
1
16 m
1
lx
Variable range of
exposure time
1
sec
Frame rate*
Sensitivity
30
fps
S
Vsat
Condition 1
10
mV/lx msec
Saturation power voltage
Average Typical power
Dark signal
1000
mV
mV
mV
%
Vo
(TBD)
(TBD)
(TBD)
(TBD)
(TBD)
Vdrk
SHVo
SHVdrk
Smr
Light shading
Dark shading
%
Smear
%
Condition 1. Halogen light source is used. Infrared filter is not used. Gain setting is 04H (ten times).
* 1fps is for exposure time up to 1 sec. 30fps is for exposure time 1msec or less.
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Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
11. A.C. Electrical Characteristics
Symbol
Parameter
Target value
Unit
Minimum
2
Typical
Maximum
tcr
tWHX
tWLX
tr
XCK cycle time
XCK pulse width ("H" level)
XCK pulse width ("L" level)
XCK rise time
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
msec
msec
msec
msec
msec
msec
msec
msec
msec
msec
msec
msec
msec
msec
0.8
0.8
-
-
-
0.2
tf
XCK fall time
-
0.2
tSS
SIN setup time
0.4
0.4
0.4
0.4
0.8
0.4
0.4
0.4
0.4
-
tHS
tSL
SIN hold time
-
LOAD setup time
LOAD hold time
-
tHL
tWLX-0.4
tWHL
tSXR
tHXR
tSR
tHR
LOAD pulse width ("H" level)
XRST setup time
XRST hold time
-
-
-
-
-
RESET setup time
RESET hold time
(A) XCK/SIN timing
tcr
75%
Xck
25%
tf
tr
tWLX
tWHX
SIN
tHS
tSS
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Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
(B) XCK/LOAD timing
Xck
tWHL
LOAD
tSL
tHL
(C) XCK/XRST/RESET timing
Xck
Xrst
tSXR
tHXR
RESET
tSR
tHR
(D) XCK/START timing
Xck
START
tSST
tHST
7/35
Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
12. Description of Function
12.1. Image Capture Procedure
Reset
Set exposure time
Set an image
capture mode
Set parameters
Start image
capture
Image
capture
End
Figure 2. Operation Flow Chart
Image capture is executed according to the procedure in Fig. 2. First, reset all the registers of the chip,
and then program the registers. To reset the chip, set both XRST and RESET to "L". There are10 sets of
registers, each 8 bit. Input data format is supposed to be 11 bits (x 10 sets), the first 3 bits are for address
and the last 8 bits are for data. Each input data bit is fetched on the rising edge of XCK. The contents of a
register, address from 0 to 7, become valid on the falling edge of XCK when both LOAD and TADD are
8/35
Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
"H", and those, address 8 and 9, become valid on the same edge when LOAD is "H" and TADD is "L".
After all the registers have been written, image capture starts when START is input on the rising edge of
XCK. Two modes are available for image capture, i.e., one is an accumulation mode, which accumulates
the input image signal (optical signal), and an image output mode which converts the optical signal into
electrical signal and output the results. When the exposure time specified by the registers C0 and C1 has
passed, an analog image signal is output in serial. READ becomes "H" when analog image signal is
output. At this moment, all the registers can be rewritten because the exposure time and the image
capture mode are stored in the internal control registers of the chip.
When image capture has started, the image signal is supposed to be output until the chip is reset.
12.2. The programming model
Parameter and Function
Symbol
Number of
bits
Description
Image capture mode
P,M,X
4bit×3
Allows to select positive, negative, and edge image
capture modes manually
Exposure time
Gain
C0,C1
G
8bit×2
5bit
Program exposure time
Program gain of output amplifier.
Program bias voltage of output pin.
Output pin voltage (Vref)
V
3bit
Enable edge
enhancement/extraction mode
N
1bit
Enable the edge enhancement/extraction mode
forcibly "H" active
Vertical/Horizontal edge
extraction
VH
2bit
Allows to select vertical edge and horizontal edge
modes
Edge enhancement mode
Output inversion mode
E
I
4bit
1bit
1bit
Set the degree of edge enhancement
Allows to select an inversion mode "H" active
Enable automatic
black level* calibration
AZ
Enable automatic black level calibration with
unfixed bias voltage "H" active.
Enable black level calibration
Enable dark pixel line output
Z
2bit
1bit
Black level calibration with fixed bias voltage.
OB
Enable to output optical black level of dark pixel
line "L" active
Offset voltage
O
6bit
Allows to change offset voltage of output signal
with positive/negative bias
Enable clamp circuit
Enable sample hold circuit
Enable projection
CL
SH
1bit
1bit
2bit
Enable clamp circuit operation "L" active
Enable sample & hold circuit operation "L" active
PX,PY
Enable Vertical/Horizontal projection mode "H"
active
Projection output control
Random access
start address
MV
ST
5bit
Allows to adjust projection signal amplitude
Specify random access start address by (x, y)
4bit×2
Random access
stop address
END
4bit×2
Specify random access stop address by (x', y')
* Black level shall be defined as output voltage from pixel in shading condition.
9/35
Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
12.3. Register Mapping
Register No. TADD
Address
7
Z1
6
Z0
5
O5
4
3
O3
2
O2
1
O1
0
O0
0
1
2
3
4
5
6
7
8
9
1
1
1
1
1
1
1
1
0
0
000
001
010
011
100
101
110
111
001
010
O4
G4
C14
C04
N
VH1
C16
C06
AZ
VH0
C15
G3
G2
G1
G0
C17
C07
SH
PX
MV3
E3
C13
C03
P3
C12
C02
P2
C11
C01
P1
C10
C00
P0
C05
CL
PY
MV4
MV1
E1
OB
MV0
E0
M3
X3
M2
M1
M0
MV2
E2
X2
X1
X0
I
V2
V1
V0
ST7
END7
ST6
END6
ST5
END5
ST4
END4
ST3
END3
ST2
END2
ST1
END1
ST0
END0
* Note. If TADD is "0", any address except 001 or 010 is prohibited.
12.4. Image Capture Mode Register
12.4.1. Image Capture mode
Image capture modes set by P, M, and X registers are as follows:
(a) Positive image mode
(b) Negative image mode
(c) Edge image
Set with the P register
Set with the M register
Set with the P and M registers
12.4.2. Image Capture Mode Register
Users can select the sensing mode from positive, negative, and vertical edge image (one-dimensional
direction) capture modes by modifying P, M, and X registers manually. Each image capture mode is set
by lower 4 bits of the P, M and X registers. However, for the X register, only one mode, X0 = 1 and X1 =
X2 = X3 = 0, is effective. 4 ´ 1 filter can be configured by combination of either P or M register bits and X
register. Figure 3 shows some configurations of P, M and X registers and filters provided by the registers.
As shown in Figure 3, these filters can scan the entire screen with P, M, and X registers. The P and M
registers perform vertical setting of filter and the X register performs the horizontal setting. The P and M
registers allow an output image signal to have the positive and negative polarities. A line selected by the P
register multiplies an image signal by a coefficient of +1 and a line selected by the M register multiplies an
image signal by a coefficient of -1. Various image processing, positive, negative, and edge images, can
be achieved by the combinations of P, M, and X registers.
10/35
Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
P scanner
M scanner
Pixel area
4 x 1 filter
Scanning direction
X scanner
Pixel origin
X register
X0~X3
Figure 3. Filter Configuration with P, M and X registers
Figure 4 shows an example of filter setting. To output a positive image from an origin of an image area, set 1
to the least significant bit P0 of the P register as shown in Figure 4 (a). To output an edge image, set 1 to the
least significant bit M0 of the M register as shown Figure 4 (b). Figure 5 (a), (b) and (c) show the examples of
setting P, M, and X registers to output an edge image.
0
0
0
+1
0
0
0
1
Filter
X register
X 0~X3
(a) Positive Image
0
0
0
-1
1
0
0 0
Filter
X register
X 0~X3
(b) Negative Image
Figure 4. Example of Positive and Negative Image
11/35
Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
0
0
+1
-1
1
0 0 0
X register
X 0~X3
(a) Edge Image 1
1
1
-1
-1
1
0
0 0
X 0~X3
X register
(b) Edge Image 2
-1
1
1
-1
1
0
0 0
X 0~X3
X register
(c) Edge Image 3
Figure 5. Examples of Edge Image
12/35
Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
XCK
Output of image with black level calibration and offset adjustment
Saturation voltage
READ
Output of image after black
Vref
Voffset
VSAT
level calibration
VOUT
Output of image without calibration
Light (Saturated)
Dark
Image output
No image output
Figure 6. Waveform Chart of Analog Image Signal VOUT (Positive Image Output)
12.5. Analog Image Signal Control
The analog image signal VOUT is output on the rising edge of the system clock XCK. READ becomes "H"
when VOUT is output. Figure 6 shows the waveforms of READ, XCK and VOUT. The output level of
VOUT is controlled by output pin voltage specified by V register, automatic black level calibration register
AZ (or black level calibration register Z), and offset adjustment register O.
12.5.1. Output Pin Voltage - V Register (3 bits)
This register sets the output pin voltage Vref. The output pin voltage is the voltage value measured on the
VOUT pin when an analog image signal is not output. The table shown below mentions the output pin
voltage Vref set by the V register. Note: V2 = V1 = V0 = 0 is not allowed.
Register setting
Vref Voltage (V)
V2
V1
0
V0
0
0
0
1
1
1
1
1
0
1
0
1
0
1
0.5
1.0
1.5
2.0
2.5
3.0
3.5
1
1
0
0
1
1
13/35
Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
12.5.2. Automatic Black Level Calibration Register - AZ (1 bit)
As shown in Figure 6, the output voltage VOUT (amplitude) becomes minimum (maximum) in the dark
state: the incident light is 0lx (black level). On the other hand, the output voltage VOUT becomes the same
as Vref in the light state: the incident light is very strong and the pixels are saturated (saturation level). The
black level is calibrated so that the output amplitude is in proportion to the incident light intensity (the
output amplitude becomes large as the incident light increases). As shown in Figure 6, the output voltage
VOUT, in which black level has been calibrated by biasing the saturation voltage Vsat, becomes Vref in the
dark state, and its amplitude becomes maximum in the light state. Figure 7 shows a scheme of automatic
black level calibration. In this scheme, the difference voltage between the effective pixel and the dark pixel
is put out. By using this circuit, shift of the saturation voltage Vsat attributed to exposure time can be
calibrated automatically. The automatic black level calibration is enabled in any image capture mode and
works when the AZ register is "H" (an initial value of AZ: L).
Dark pixel
column
128 ´ 128 pixel array
IOB
-
+
IP
-
+
Vout
IP- IOB
AZ
READ
Horizontal control circuit
Vref
Figure 7. Structure of Automatic Black Level calibration Circuit
Automatic black level control
Parameter
A Z
0
Disable
Enable
1
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Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
12.5.3. Black Level Calibration Register - Z (2 bits)
The black level calibration enabled by the Z register achieves the effect equivalent to the automatic black
level calibration. However, the calibration bias voltage is the saturation voltage Vsat at the minimum
exposure time of the positive image mode. Therefore, the black level is slightly shifted when the exposure
time or image capture mode has changed. Nothing can be set when the AZ register is "H" and when the
automatic black level control is being executed.
Parameter
Zero point calibration
Z 1
Z 0
0
0
1
0
No adjustment
0
Positive image reading calibration
Negative image reading calibration
1
12.5.4. Automatic Black Level Calibration Register - CL (Clamp Circuit)
As shown in Figure 6, the black level of the output voltage VOUT in the dark state does not equal to the
Vref value, even after automatic black level calibration. This is caused by offset voltage of an output
amplifier, non-uniformity in the internal arithmetic circuit, etc. A value of Voffset varies depending on an
image capture mode and setting of amplifier gain. However, by using the circuit shown in Figure 8, the
offset value Voffset of black level can be kept to a certain fixed value. The automatic black level
calibration using the clamp circuit is enabled at every image capture mode (except the random access
projection output) and it works when the CL register is "L" (initial value of CL: L). To activate the clamp
circuit, use both SH register (sample hold circuit) and OB register (black level output) by setting "L"
simultaneously.
15/35
Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
Olx
VREF
Time
XCK
128 x 128 pixel array
READ
VOUT
VOUT
VREF
Black level before
Voffset
Dark pixel column
After
Exposure time
-
+
Vout
Horizontal control circuit
+
-
CCL
Vref
CL
Figure 8. Automatic Black Level calibration Circuit with Clamp Circuit
Parameter
Automatic black level control
OB
A Z
0
SH
0
0
1
Enable
Disable
1
1
12.5.5. Offset Adjustment O Register (6 bits)
This register calibrates Voffset, the offset voltage from the output pin voltage Vref. The most significant bit
O5 is a sign bit. It can be adjusted in the positive direction and the negative direction if the most significant
bit is set to "H" and "L" respectively. A maximum value shall be 0.5 V. The amplitude is controlled by 5-bit
resolution.
O5
Register setting
range
Offset voltage (V)
Step (mV)
Number of steps
H
L
H 20 to H 3F
H 00 to H 1F
0 to 0.5
0 to -0.5
16
16
32
32
12.5.6. Dark Pixel Line Output OB (1 bit)
When an image is output with the OB register being "L", the first line of the image frame becomes the
output signal from 128 dark pixels. Adjust the O register so that this dark pixel output (optical black) level
16/35
Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
becomes the Vref value.
(Origin)
Black level 128 ´ 1
Black level 128 ´ 1
Number of valid pixels
Number of valid pixels
Number of valid pixels
Number of valid pixels
128 ´ 128
128 ´ 125
128 ´ 127
128 ´ 126
Invalid pixel 128 ´ 2
Invalid pixel 128 ´ 2
128
128
128
128
Black level enabled
Black level enabled
(Positive image, horizontal
edge enhancement)
(Vertical edge enhancement, two-dimensional
edge enhancement)
Figure 9. Relation between Number of Valid Pixels and Dark Pixel Line
Execution of dark pixel output
Parameter
O B
0
Enable
Disable
1
12.6. Output Inversion Register - I (1 bit)
This register selects an inversion mode when "H" is selected and a non-inversion mode when "L" is
selected.
12.7. Exposure time Setting Registers - C0 and C1 (8 bits ´ 2)
This register sets exposure time. Total of exposure time set by both C0 and C1 register is the actual
exposure time.
C0 register (8 bits)
Register setting
range
Exposure time (msec)
0 to 4.08
Number of steps
256
Step (msec)
H 00 to H FF
16
C1 register (8 bits)
Register setting
range
Exposure time (msec)
0 to 1044.5
Step (msec)
4.096
Number of steps
256
H 00 to H FF
17/35
Specifications and information in this document are subject to change without notice.
Ver. 2. 2. 3
Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
Available exposure time
Image capture mode
Minimum exposure time
Maximum exposure time
(sec)
(msec)
Positive image/Negative image
16 (C0=01,C0=00)
16 (C0=01,C0=00)
1 (C0=FF,C0=FF)
1 (C0=FF,C0=FF)
Horizontal edge/
Horizontal edge enhancement
Vertical edge/
Vertical edge enhancement
528 (C0=11,C0=00)
528 (C0=11,C0=00)
1 (C0=FF,C0=FF)
1 (C0=FF,C0=FF)
Two-dimensional edge/
Two-dimensional edge enhancement
Note. When C1 = 00h and C0 = 00h are set, reading image pixels is done (read-only mode) without resetting
every image capture mode. In this case, the clamp circuit cannot be used.
12.8. Edge and Edge Enhancement Image Capture Mode
12.8.1. Image Capture Mode
In addition to setting P, M and X registers individually, an edge image and edge enhancement image can
be output according to N, VH and E registers. The edge enhancement image is an image that adds an
original image and an edge image multiplied by a certain coefficient. Horizontal edge, horizontal edge
enhancement, vertical edge, vertical edge enhancement, two-dimensional edge, and two-dimensional
edge enhancement modes are available.
N VH1 VH0 E3
N VH1 VH0 E3
0 0 1 0
0 0
1
1
0 0
-1 2 -1
0 0
0
0 0
-1 3 -1
0
MN
P
0
0
MW
ME
0
0
0 0
MS
0
0
(a) Horizontal edge
(b) Horizontal edge enhancement
Figure 10. Example of Edge Enhancement 1 (Horizontal edge: Original image is the same as Figure 4)
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Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
N VH1 VH0 E3
1 1 0 1
N VH1 VH0 E3
1 1 0 0
0 -1 0
0 -1 0
3 0
0 -1 0
0
2 0
0
0 -1 0
(a) Vertical edge
(b) Vertical edge enhancement
Figure 11. Example of Edge Enhancement 2 (Vertical edge)
N VH1 VH0 E3
1 1 1 1
N VH1 VH0 E3
1 1 1 0
0 -1 0
-1 4 -1
0 -1 0
0 -1 0
-1 5 -1
0 -1 0
(a) Two-dimensional edge
(b) Two-dimensional edge enhancement
Figure 12. Example of Edge Enhancement 3 (Two-dimensional edge)
Using N, VH and E registers, a convolution of 3 x 3 size can be achieved as shown in Figure 10, Figure 11
and Figure 12. An edge image can be obtained by taking the difference between the center pixel P and
the neighbor Mn, Ms, Mw and Me.
Edge mode
Output signal
{(P-MN)+ (P-MS)} ´ a
Number of
output pixels
Number of
valid pixels
128(H)×128(V)
128(H)×128(V)
128(H)×128(V)
128(H)×126(V)
128(H)×128(V)
128(H)×126(V)
Vertical edge image
Horizontal edge image
{(P-Mw)+(P-ME)} ´ a
Two-dimensional edge
image
{(P-MN)+(P-MS)+(P-ME)+(P-MW)} ´ a
128(H)×128(V)
128(H)×126(V)
Vertical edge
P +{(P-MN)+(P-MS)} ´ a
enhancement image
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Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
128(H)×128(V)
128(H)×128(V)
128(H)×128(V)
128(H)×126(V)
Horizontal edge
enhancement image
P +{(P-Mw)+(P-ME)} ´ a
Two-dimensional edge
enhancement image
P+{(P-MN)+(P-MS)+(P-ME)+(P-MW)} ´ a
a : Edge enhancement ratio
In the above-mentioned table, both P and M shows the intensity of output signal from the pixel. The
relation between the output pixel and valid pixel is shown below:
(Origin)
128
128
128
Number of
valid pixels -
128 x 126
Number of
valid pixels -
128 x 128
Number of
valid pixels -
128 x 126
Invalid pixel
Invalid pixel
(Vertical edge/Vertical
edge enhancement)
(Horizontal edge/Horizontal
edge enhancement)
(Two-dimensional/Two-dimensional
edge enhancements)
Figure 13. Relation between Number of Output Pixels and Number of Valid Pixels
12.8.2. N Register (1 bit)
If this register is set, the P and M registers are set for the vertical edge enhancement mode. When "H" is
written, the P and M register are set automatically to "H02" and "H05" respectively. In this case, writing to
both P and M registers is disabled.
12.8.3. VH Register (2 bit)
Using this register, users can select the image capture mode from the vertical edge, horizontal edge, or
two-dimensional edge modes. The edge enhancement mode uses the same edge configuration modes.
Parameter
Edge mode
N
0
0
1
1
V H 1
V H 0
0
0
1
1
0
1
0
1
No edge output
Horizontal edge mode
Vertical edge mode
Two-dimensional edge mode
12.8.4. E Register (4 bits)
This register sets the ratio of edge enhancement ( in the table above). The most significant bit E3
switches between the edge enhancement and edge mode. "H" selects the edge mode and "L" selects the
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Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
edge enhancement mode. However, "L" should be set for the output of positive and negative image. E
register sets the ratio of edge enhancement as follows:
Parameter
Ratio of edge enhancement
E2
0
0
0
0
1
1
1
1
E1
0
0
1
1
0
0
1
1
E0
0
1
0
1
0
1
0
1
0%
12.5%
25.0%
37.5%
50.0%
62.5%
75.0%
87.5%
12.9. Projection Setting
12.9.1. Projection Function
The artificial retina chip can execute the projection of input image. The projection executes addition of all
pixels along either vertical or horizontal direction. As shown in Figure 14, size and center position of an
input image can be obtained by projecting the input image vertically and horizontally. Figure 15 shows the
circuit diagram of the artificial retina chip to achieve the projection. In the case of the horizontal projection,
the P scanner becomes active simultaneously, and X scanner reads out the result. In the case of the
vertical projection, the role of P scanner and that of the X scanner are exchanged. When projection mode
is active, make the automatic black level calibration register AZ "H".
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Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
Pixel area
Vertical
projection
Horizontal
projection
Figure 14. Principle of Projection Function
128 x 128 Pixel array
Dark pixel column
VP
-
+
-
+
Vout
VX
AZ
READ
Horizontal control circuit
Vref
Figure 15. Diagram of Horizontal Projection Circuit
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Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
VP
128 x 128 pixel array
-
+
-
+
Vout
Vx
Horizontal control circuit
Vref
AZ
READ
Figure 16. Diagram of Vertical Projection Circuit
12.9.2. Projection Registers - PX/PY
Parameter
Projection mode
P X
P Y
0
0
1
0
No projection
0
Execution of horizontal projection
Execution of vertical projection
1
12.9.3. Projection Output Offset Register - MV (5 bits)
Output voltage amplitude of the projection can be modified. The output voltage amplitude can be modified
+/- 50% by adjusting the offset voltage by +/- 0.11 V/8 mV.
Specifying MV4 as sign binary digit, users can modify the amplitude in a positive and negative direction
when MV4 is "H" and "L" respectively.
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Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
MV4
Register setting
range
Offset voltage (V)
Step (mV)
Number of steps
H
L
H 0 to H F
H 0 to H F
0 to 0.12
0 to -0.12
8
8
16
16
12.9.4. G Register (5 bits)
This register set output amplifier gain. When the most significant bit G4 is "H", the gain increases 6 dB.
Parameter
G2 G1
Total gain (dB)
G4
G3
G0
0
1
0
0
0
0
0
0
0
0
1
1
1
0
0
0
1
0
1
0
1
0
1
0
1
0
14.0
15.5
17.0
18.5
20.0
21.5
23.0
24.5
26.0
29.0
32.0
20.0
21.5
23.0
24.5
26.0
27.5
29.0
30.5
32.0
35.0
38.0
0
0
0
1
1
1
1
0
0
0
0
1
1
0
0
1
1
0
0
1
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M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
12.10. Random Access Function
12.10.1. Random Access
The whole image is divided into 16 x 16 block areas in which minimum block consists of 8 x 8 pixels, a
start block position (x, y) can be specified by the ST register (8 bits) and an end block position (x', y') by the
END register (8 bits). The access area is specified when coordinate data has been set to both ST and
END registers. To execute the random access, users can choose either positive image or projection
mode. Although the automatic black level calibration is available, clamp circuit is not available in this
mode. Therefore, the CL register must be set to "H". When the random access is executed, both READ
and STRB are also output.
12.10.2. Block Diagram
Figure 17 shows the block diagram of the chip. The lower 4 bits of the ST register indicate the x
coordinate of a start block, and the higher 4 bits indicate the y coordinate of the start block (x = ST [3:0], y =
ST [7:4]). Similarly, the lower 4 bits of the END register indicate the x coordinate of an end block, and the
higher 4 bits indicate the y coordinate of the end block (x' = END [3:0], y' = END [7:4]). An initial value of
ST and END register is 00Hex when the random access starts. In this case, all the pixels are accessed
((x, y) = (0, 0), (x', y') = (16, 16)). The end block coordinate must be greater than the start block coordinate
(x'>x or y'>y). If this condition is not satisfied, the end block coordinate becomes 16.
x =ST[3:0],x’=END[3:0]
y=ST[7:4],y’=END[7:4]
Horizontal control
y=ST[7:4],y’=END[7:4]
x
x’
(0,0)
Access area
(x,y)
y
y
y’
y’
(x’,y’)
(16,16)
Horizontal control circuit for reading
Output signal
x
x’
x=ST[3:0],x’=END[3:0]
X-scanner
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Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
Figure 17. Random Access Diagram
12.10.3. Examples of Area Setting
Accessed area is specified according to parameters for the random access mode. The start point pixel
coordinate set by the ST register is (8*x, 8*y) and the end point pixel coordinate is (8*x'-1, 8*y'-1). The
table below shows the image area corresponding to various register settings:
Parameter
Start block
(x,y)
End block
(x’,y’)
Start pixel
coordinate
End pixel
coordinate
ST
END
(X,Y)
(X’,Y’)
X=8*x,Y=8*y
X=8*x-1,Y=8*y-1
00h
00h
00h
00h
10h
00h
11h
10h
01h
20h
(0,0)
(0,0)
(0,0)
(0,0)
(0,1)
(16,16)
(1,1)
(0,0)
(0,0)
(0,0)
(0,0)
(0,8)
(127,127)
(7,7)
(16,1)
(1,16)
(16,2)
(127,7)
(7,127)
(127,15)
01h
F0h
0Fh
55h
02h
00h
00h
66H
(1,0)
(0,15)
(15,0)
(5,5)
(2,16)
(16,16)
(16,16)
(6,6)
(8,0)
(15,127)
(127,127)
(127,127)
(47,47)
(0,120)
(120,0)
(40,40)
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M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
13. Examples of Image Capture Modes
Image capture mode
000
80h
001
04h
010
011
100
01h
101
00h
110
01h
111
03h
Positive image
0001h to FFFFh
(with dark pixel output)
(Exposure time C1C0)
Positive image
(without dark pixel output)
80h
80h
80h
80h
80h
80h
80h
80h
80h
80h
80h
80h
04h
24h
24h
24h
24h
C4h
C4h
C4h
C4h
E4h
E4h
E4h
0001h to FFFFh
0001h to FFFFh
0001h to FFFFh
0001h to FFFFh
0001h to FFFFh
0021h to FFFFh
0021h to FFFFh
0021h to FFFFh
0021h to FFFFh
0021h to FFFFh
0021h to FFFFh
0021h to FFFFh
A1h
41h
E1h
01h
A1h
41h
E1h
01h
A1h
41h
E1h
01h
10h
00h
10h
00h
10h
00h
10h
00h
10h
00h
10h
00h
01h
01h
01h
01h
01h
01h
01h
01h
01h
01h
01h
01h
03h
C3h
C3h
43h
43h
C3h
C3h
43h
43h
43h
43h
43h
Horizontal edge
(with dark pixel output)
Horizontal edge
(without dark pixel output)
Horizontal edge enhancement
(with dark pixel output)
Horizontal edge enhancement
(without dark pixel output)
Vertical edge
(with dark pixel output)
Vertical edge
(without dark pixel output)
Vertical edge enhancement
(with dark pixel output)
Vertical edge enhancement
(without dark pixel output)
Two-dimensional edge
(with dark pixel output)
Two-dimensional edge
(without dark pixel output)
Two-dimensional
edge enhancement
(with dark pixel output)
Two-dimensional
edge enhancement
80h
E4h
0021h to FFFFh
A1h
10h
01h
43h
(without dark pixel output)
X projection
00h
00h
04h
04h
0001h to FFFFh
0001h to FFFFh
A1h
A1h
90h
40h
01h
01h
03h
03h
Y projection
(with dark pixel output)
Y projection
(without dark pixel output)
00h
80h
80h
04h
04h
04h
0001h to FFFFh
0000h
A1h
01h
A1h
50h
00h
10h
01h
01h
01h
03h
03h
03h
Read-only
(with dark pixel output)
Read-only
0000h
(without dark pixel output)
Gain 10 times. Pin voltage Vref set to 1.5 V. Edge enhancement ratio 50%.
Exposure time set by both C1 and C0 shall be set according to lighting condition.
The read-only mode is for only data output without reset.
If dark pixel output is not used, a clamp circuit shall be turned off.
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Semiconductor Technical Data
M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
14. Operation Timing
The operation timing of this chip below is described in the subsequent pages.
(1) Chip reset
Shows the timing of initial reset of logic controller. Reset is executed on the rising edge of clock XCK.
(2) Data input
Exposure time of image capture, initial values of scanners, Vref value, and gain parameters are fetched
into the register. The data (8 bits x 10) are fetched on the rising edge of system clock XCK and become
valid on the falling edge of XCK when LOAD is "H".
(3) Timing of image reading
Operation timing of reading an image out is shown. Either P or M scanner selects the line. Pixel data are
output in serial from the column selected by the X scanner.
(4) Timing of projection reading
Timing of reading horizontal and vertical projection results is shown.
(5) Timing for read-only mode
Reading is executed without setting exposure time.
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Image Sensor (Artificial Retina Chip)
MITSUBISHI
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Image Sensor (Artificial Retina Chip)
MITSUBISHI
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M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
X-scanner output
P-scanner output
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M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
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Image Sensor (Artificial Retina Chip)
MITSUBISHI
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Image Sensor (Artificial Retina Chip)
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Image Sensor (Artificial Retina Chip)
MITSUBISHI
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M64283FP
Image Sensor (Artificial Retina Chip)
MITSUBISHI
Details of revision
07/22/1998
Place of
revision
Details of revision
Table at page 5
Typical value
changed.
AIDD circuit current
Positive image mode 2 mA ® 3 mA
Two-dimensional edge enhancement 50% mode
3 mA ® 3.5 mA
Projection mode 3 mA ® 4 mA
7th line
at page 8
Document corrected.
Document added.
Register (´ 8) ® Register (´ 10)
Description after
7th line
If TADD is "H" ... If TADD is "L"
at page 8
Table at page 9
Document corrected.
Document corrected.
Description modified.
Automatic black level calibration, "L" active ® Automatic
black level calibration, "H" active
11th line
at page 14
When the AZ register is "L"® When the AZ register is "H"
Table at page
14
Enable ® Disable Disable ® Enable
Figure 7
at page 14
Logical symbol
modified.
AZ input Negative logic ® Positive logic
5th line
at page 15
Document corrected.
Document added.
Document added.
The AZ register is "L" and ® The AZ register is "H" and
In this case, a clamp circuit cannot be used.
27th line
at page 17
32th line
at page 20
Upon executing the projection, the automatic black level
calibration AZ register ...
Figure 15
at page 21
Logical symbol
modified.
AZ input Negative logic ® Positive logic
AZ input Negative logic ® Positive logic
DZ AZ
Figure 16
at page 22
Logical symbol
modified.
Figure 16
Description modified.
at page 22
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