MH89626C-04 [MITEL]

OPS/DID SLIC Preliminary Information; OPS / DID SLIC初步信息
MH89626C-04
型号: MH89626C-04
厂家: MITEL NETWORKS CORPORATION    MITEL NETWORKS CORPORATION
描述:

OPS/DID SLIC Preliminary Information
OPS / DID SLIC初步信息

文件: 总12页 (文件大小:118K)
中文:  中文翻译
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MH89626C  
OPS/DID SLIC  
Preliminary Information  
ISSUE 3  
May 1995  
Features  
Ordering Information  
Transformerless 2-4 wire conversion  
MH89626C-02  
MH89626C-04  
38 Pin SIL Package  
38 Pin SIL Package  
Constant current with constant voltage fallback  
for long loops  
Long length capability (RLoop > 1850)  
Input impedance  
0°C to 70°C  
200+ 560// 0.1µF (MH89626C-02)  
200+ 680// 0.1µF (MH89626C-04)  
Ring trip filter with auto ring trip  
Three relay drivers  
Description  
The MH89626C SLIC provides all of the functions  
required to interface 2-wire off premise subscriber  
loops to a serial TDM, PCM, switching network of a  
modern PBX. The MH89626C is manufactured  
using thick film hybrid technology which offers high  
voltage capability, reliability and high density  
resulting in significant printed circuit board area  
saving of the line cards. A complete line card can  
Built-in Tip/Ring reversal capability on the  
hybrid  
Serial control interface  
External or software programmable receive  
gain, -3.5 or -7.0dB  
be  
implemented  
with  
very  
few external  
Applications  
components.  
Off-Premise PBX Line Cards  
DID (Direct Inward Dial) Line Cards  
Central Office Line Cards  
The SLIC has a simple serial control interface to  
control the receive gain setting, relay drivers for  
ringing, and Tip/Ring reversal for DID operation.  
LGND VDD  
VEE  
LCA  
AGND  
RGND  
VREF  
F1i  
C2i  
TF  
Tip  
TIP  
Drive  
MT8967  
A-Law  
Filter/Codec  
Do  
Di  
2W/4W  
Conversion  
Constant  
Current  
& Voltage  
Sensing  
GS  
Current &  
Voltage  
Control  
Gain  
Adjust  
8-Bit  
Shift  
SD2  
CS  
Register  
SD3  
Tip/Ring  
Reversed  
RING  
RF2  
Ring  
Drive  
SDi  
SD0  
SD1  
SD4  
RF  
VBat  
Auto Ring  
Relay  
Driver 3  
Relay  
Driver 2  
Line  
Supervision  
Relay  
Drive 1  
Trip Filter  
LED  
SHK  
VAC VRLY  
RD1  
RD2  
RD3 SD5 SD6 SD7  
Figure 1 - Functional Block Diagram  
2-285  
MH89626C  
Preliminary Information  
TIP  
RING  
RF  
VREF  
D1  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
1
2
3
4
5
6
7
8
C2i  
Do  
F1i  
IC  
IC  
IC  
GS  
IC  
TF  
LPND  
VBat  
RF1  
RF2  
VEE  
AGND  
VDD  
IC  
VAC  
IC  
CS  
SHK  
LED  
LCA  
SD1  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
SD7  
SD6  
SD5  
IC  
VRLY  
RGND  
RD2  
RD3  
RD1  
Figure 2 - Pin Connections  
Pin Description  
Pin #  
Name  
Description  
1
2
3
4
5
TIP  
RING  
RF  
Tip Lead: Connects to the TIP lead of the telephone line.  
Ring Lead: Connects to the Ring lead of the telephone line.  
Ring Feed.  
TF  
Tip Feed.  
LGND Loop Ground: Return path for the battery (VBat) supply voltage. Connects to System  
Ground.  
6
7
VBat  
RF1  
RF2  
VEE  
Battery Supply Voltage: Normally -48V.  
Ring Feed 1: Ringing input.  
8
Ring Feed 2: Ringing output.  
Negative Supply Voltage. (-5V).  
9
10  
11  
12  
13  
AGND Analog Ground: Analog and Digital Ground. Connects to system ground.  
V
Positive Supply Voltage. (+5V).  
DD  
IC  
Internal Connection.  
VAC  
Battery AC Component (input). AC noise present in the VBat supply isolated from the DC  
components, can be applied to this pin to reduce longitudinal noise on TIP and RING. To  
implement this feature, connect a 0.1µF 100V capacitor from VBat to VAC, and 1kresistor  
from VAC to AGND. This pin must be tied to AGND when not used.  
14  
15  
IC  
Internal Connection.  
CS  
Chip Select (Input): A TTL compatible digital input to enable the SDi to control all the  
functions of the driver.  
16  
17  
SHK  
LED  
Switch Hook Detect (Output): A logic low indicates an off-hook condition.  
LED Drive (Output).: Drives an LED directly through an internal 2.2kresistor. A logic low  
indicates an off-hook condition.  
18  
LCA  
Loop Current Adjust (input): If this pin is left open, the constant current will be set at  
23mA. The loop current can be adjusted by connecting a resistor to VEE  
.
2-286  
Preliminary Information  
MH89626C  
Pin Description (Continued)  
Pin #  
Name  
Description  
19  
SDi  
Serial Data in (input): A TTL compatible digital input. The 8-bit serial input enables the  
drivers. See Table 1 and Figure 3b.  
20  
21  
VRef  
Di  
Voltage Reference (Input) +2.5V for the internal codec.  
Data in (Input). A TTL compatible digital input which accepts the 8-bit PCM word from the  
incoming PCM bus.  
22  
23  
C2i  
Do  
Clock input (input). A TTl compatible digital input which accepts the 2048 kHz clock.  
Data Out (Output) A three state TTL compatible digital output which drives the 8-bit PCM  
word to the outgoing PCM bus.  
24  
F1i  
Synchronization input (Input). A TTL compatible, active low digital output input enabling  
the PCM input, PCM output and digital control input. It is internally sampled on every  
positive edge of the clock, C2i and provides frame and channel synchronization. See fig  
3a.  
25-27  
28  
IC  
Internal Connection.  
GS  
Gain setting (Input). A logic ‘0’ at this input will set the receiving gain to -7.0dB and a logic  
‘1’ will set the receiving gain to -3.5dB. If this pin is left open, the receiving gain can be set  
by SDi, bit 2.  
29  
30  
31  
32  
33  
34  
IC  
Internal Connection.  
SD7  
SD6  
SD5  
IC  
Serial Data (Output). A TTL compatible output coming from the SDi, bit 7. Bit inverted.  
Serial Data (Output). A TTL compatible output coming from the SDi, bit 6. Bit inverted.  
Serial Data (Output). A TTL compatible output coming from the SDi, bit 5. Bit inverted.  
Internal Connection.  
VRLY  
Relay Positive Supply Voltage. Normally +5V. Connects to the relay coil and the relay  
supply voltage.  
35  
36  
RGND Relay Ground. Return path for relay supply voltage.  
RD2  
RD3  
RD1  
Relay Driver 2 (Output). Connects to a user provided external relay coil. A logic ‘0’  
from the SDi, bit 1 will activate this driver. This relay driver is typically used for system  
in-test.  
37  
38  
Relay Driver 3 (Output). Connects to a user provided external relay coil. A logic ‘0’  
from the SDi, bit 4 will activate this driver. This relay driver is typically used for system  
in-test.  
Relay Driver 1 (Output). Connects to a user provided external relay coil. A logic ‘0’ from  
the SDi, bit 0 will activate this driver. This relay driver is typically used for ringing.  
2-287  
MH89626C  
Preliminary Information  
Absolute Maximum Ratings*- All voltages are with respect to AGND unless otherwise specified.  
Parameter  
Symbol  
Min  
Max  
Units  
1
DC Supply Voltage  
VDD  
VEE  
-0.3  
0.3  
7
-7  
V
V
2
3
4
5
6
DC Battery Voltages ➀  
DC Ring Relay Voltage  
DC Reference Voltage  
AC Ring Generator Voltage  
DC Digital Input Voltage  
VBat  
VRLY  
VREF  
0.3  
-0.3  
-0.3  
-65  
7
V
V
VDD  
150  
VDD  
V
VRMS  
V
GS,SDi,Di,  
C2i,F1i  
-0.3  
-40  
7
Storage Temperature  
TS  
+125  
°C  
* Exceeding these values may cause permanent damage. Functional operation under these conditions is not implied.  
Recommended Operating Conditions  
Parameter  
DC Supply Voltage  
Symbol  
Min  
TYP*  
Max  
Units  
Comments  
1
VDD  
VEE  
4.75  
-4.75  
5.0  
-5.0  
5.25  
-5.25  
V
V
2
3
4
5
DC Battery Voltage ➀  
DC Ring Relay Voltage  
DC Reference Voltage ②  
VBat  
VRLY  
VREF  
-39.8  
-48  
5.0  
-60  
7.0  
V
V
V
2.488  
22  
2.500  
2.512  
AC Ring Generator Voltage  
Ringing Generator Frequency  
90  
25  
130  
28  
VRMS  
Hz  
6
Operating Temperature  
TOP  
0
25  
70  
°C  
LGND is connected to AGND  
Temperature coefficient of V  
should be better than 100ppm/C  
REF  
2-288  
Preliminary Information  
MH89626C  
DC Electrical Characteristics*  
Characteristics  
Sym  
Min  
Typ  
Max  
Units  
Test Comments  
1
2
Supply and Battery Current  
IDD  
IEE  
IBat  
5
5
12.5  
11.7  
23.5  
15  
15  
28  
mA  
mA  
mA  
Short Loop  
RLoop = 0, LCA =Open  
RLoop = Open  
Open Loop  
IBat  
PC  
0
1.5  
2
mA  
Power Consumption  
On Hook (VBat  
Powerdown (VDD and VEE  
Off-Hook (VDD, VEE, VBat  
)
)
)
100  
150  
1500  
mW  
mW  
mW  
RLoop = Open  
RLoop = 0Ω  
3
4
5
VRef  
DC Reference Voltage  
Mean Current  
2
µA  
SHK Low Level Output Voltage  
High Level Output Voltage  
VOL  
VOH  
-0.3  
3.7  
0
5
0.5  
5.25  
V
V
IOL = 2mA  
IOH = 2mA  
LED Low Level Output Voltage  
High Level Output Voltage  
VOL  
VOH  
3.0  
V
V
IOL = 1.1mA  
2.0  
IOH = 0.7mA  
VOL = 1.0V  
6
7
RD1 Sink Current, Relay to VDD  
RD2 Clamp Diode Current  
RD3  
IOL  
ICD  
65  
100  
mA  
mA  
Low Level Input Voltage  
High Level Input Voltage  
VIL  
VIH  
0.8  
V
V
2.0  
GS  
8
Low Level Input Current  
High Level Input Current  
IIL  
IIH  
1
1
µA  
µA  
VIL = 0V  
VIH = 5.0V  
9
SDi  
RD  
Low Level Input Current  
Intermediate Input Current  
High Level Input Current  
IIL  
IIM  
IIH  
10  
10  
10  
µA  
µA  
VIL = 5.0V  
VIM = 0.5V  
VIH = 5.0V  
10  
Do  
Low Level Output Voltage  
High Level Output Voltage  
Tri-State Leakage Current  
VOL  
VOH  
IOZ  
0.4  
V
V
mA  
IOL = 1.6mA  
IOH = 0.1mA  
4.0  
2.4  
0.1  
11  
12  
SDi  
Di  
C2i  
F1i  
Low Level Input Current  
High Level Input Voltage  
VIL  
VIH  
0.8  
V
V
Low Level Input Current  
High Level Input Current  
IIL  
IIH  
10  
10  
µA  
µA  
VIL = 0V  
VIH = 5.0V  
* DC Electrical Characteristics are over Recommended Operating Conditions with V  
† Typical figures are at 25°C with nominal + 5V supplies and are for design aid only.  
at + 5.0V + 5% unless otherwise stated.  
DD  
Supply current and power consumption characteristics are over Recommended Operating Conditions with V  
at 5.0V, V  
at -5.0V  
EE  
DD  
and V  
at -48.0V.  
Bat  
The LED output consists of a 2.2K resistor in series with the SHK HCT output.  
2-289  
MH89626C  
Preliminary Information  
Loop Electrical Characteristics*  
Characteristics  
Sym  
Min  
Typ  
Max  
Units  
Test Comments  
1
Maximum AC Ringing ➀  
33  
mA  
25Hz, VBat = -48V  
Current Rejection  
2
3
Ring Trip Detect Time ②  
100  
125  
ms  
Hook Switch Detect Time:  
Off-Hook to On-Hook  
On-Hook to Off-Hook  
20  
20  
ms  
ms  
4
5
Operating Loop Current  
IIP  
18  
22  
10  
50  
mA  
LCA = Adjustable  
Operating Loop Resistance  
RIP  
0
0
1900  
2300  
VBat = -39.8V  
VBat = -48V  
6
Loop Current at Off-Hook ③  
Ish  
7
13  
mA  
Detect Threshold  
* Loop Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.  
† Typical figures are at 25°C with nominal + 5V supplies and are for design aid only.  
The SLIC can be loaded with an AC impedance as low as 4000without generating a false SHK output. Since each REN represents  
8k, the SLIC can drive a REN of 2 without generating a false SHK output.  
This parameter is over Recommended Operating Conditions as well as the specified Operating Loop Resistance.  
Off-Hook Detect (SHK) will be detected for loop lengths of 2900or less.  
AC Electrical Characteristics*  
Characteristics  
Sym  
Min  
Typ  
Max  
Units  
Test Comments  
1
2
2- Wire input  
(200+ 560Ω // 0.1µF) −2  
Variant  
(200+ 680Ω // 0.1µF) −4  
Variant  
Zin  
720  
813  
1020 Hz  
1020 Hz  
Return Loss at 2-Wire  
14  
18  
14  
51  
40  
32  
dB  
dB  
dB  
300 Hz  
500-2000 Hz  
3400 Hz  
3
4
Longitudinal to Metallic Balance  
Transhybrid Loss  
40  
46  
65  
65  
dB  
dB  
300-600 Hz  
600-3400 Hz  
16  
20  
16  
36  
24  
24  
dB  
dB  
dB  
300 Hz  
500-2500 Hz  
3400 Hz  
5
Power Supply Rejection Ratio  
at 2-wire and Do:  
PSRR  
Ripple 50mV  
1020 Hz  
VDD  
VEE  
VBat  
20  
20  
20  
40  
30  
40  
dB  
dB  
dB  
* AC Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.  
† Typical figures are at 25°C with nominal +5V supplies and are for design aid only.  
2-290  
Preliminary Information  
MH89626C  
AC Electrical Characteristics* - Transmit (A/D path)  
Characteristics  
Sym  
Min  
Typ  
Max  
Units  
Test Comments  
1
Absolute Gain  
-0.5  
0
0.5  
dB  
Input -6dB  
Default (codec odB)  
Transmit Gain  
1020 Hz  
2
3
0
dB  
Loss Distortion with frequency  
(relative to level at 1020Hz with  
codec at 0dB)  
0.0  
-0.3  
-0.3  
-0.3  
-0.3  
-0.3  
-0.3  
-
-
dB  
dB  
dB  
dB  
dB  
dB  
dB  
0-200 Hz  
200-300 Hz  
300-400 Hz  
400-600 Hz  
600-2400 Hz  
2400-3000 Hz  
3000-3400 Hz  
0.39  
0.22  
1.0  
0.75  
0.35  
0.55  
1.5  
4
Gain variation with Input Level  
(relative to gain at 1020Hz with  
-6dBm input)  
Input 1020 Hz  
0 to +3dBm  
-40 to 0dBm  
-50 to -40dBm  
-55 to -50dBm  
-0.25  
-0.25  
-0.5  
0.25  
0.25  
0.5  
dB  
dB  
dB  
dB  
-1.5  
1.5  
5%  
THD <  
Input 1020Hz  
5
6
Signal Input Overload Level at  
2-Wire  
3.14  
dBm  
Signal Output Overload Level at Do  
3.14  
dBm0  
THD < 5%  
Input 1020Hz  
7
Signal to Total Distortion Ratio at Do  
Input at 2-Wire  
0 to -10dB  
-20dBm  
-30dBm  
-40dBm  
35  
dB  
dB  
dB  
dB  
dB  
33.8  
28.8  
19.5  
14.5  
-50dBm  
8
9
Out-of-Band Discrimination at Do:  
Signals in 4.6 -72 kHz band  
Signals in 300-3400 Hz band  
other than 1020 Hz  
Input at 2-wire  
-25dBm, 4.6 -72kHz  
0dbm, 1020Hz  
-50  
-40  
dBm0  
dBm0  
Signals in 4.6 -72 kHz band  
-25  
-41  
dBm0  
dB  
0dBm, 300 -3400 Hz  
Harmonic Distortion  
(2nd or 3rd Harmonic) at DSTo  
10 Idle Channel Noise at Do  
-70  
-64  
dBm0p  
† Typical figures are at 25°C with nominal +5V supplies and are for design aid only.  
* AC Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.  
2-291  
MH89626C  
Preliminary Information  
AC Electrical* - Receive (D/A) path  
Characteristics  
Sym  
Min  
Typ  
Max  
Units  
Test Comments  
Input -10dBm0  
1
2
Absolute Gain  
-0.5  
0.0  
0.5  
dB  
(Codec 0dB, GS = 5V)  
1020 Hz  
Gain programmable Range  
GS = 5V  
GS = 0V  
Input - 10dBm0  
1020 Hz  
1020 Hz  
-3.5  
-7.0  
dB  
dB  
3
Loss Distortion with Frequency  
(relative to level at 1020 Hz with  
codec at 0dB and GS = 5V)  
Input -10dBm0  
0-200 Hz  
-0.3  
-0.3  
-0.3  
-0.3  
-0.3  
-0.3  
-0.3  
-
-
dB  
dB  
dB  
dB  
dB  
dB  
dB  
200-300 Hz  
300-400 Hz  
400-600 Hz  
600-2400 Hz  
2400-3000 Hz  
3000-3400 Hz  
-0.09  
-0.08  
1.0  
0.75  
0.35  
0.55  
1.5  
4
Gain Variation with Input Level  
(relative to gain to 1020Hz with  
-10dBm0 input)  
Input 1020 Hz  
0 to +3dBm  
-40 to 0dBm  
-50 to -40dBm  
-55 to -55dBm  
-0.25  
-0.25  
-0.5  
0.25  
0.25  
0.5  
dB  
dB  
dB  
dB  
-1.5  
1.5  
5%  
5
6
Signal Input Overload Level at Di  
3.14  
dBm  
THD <  
Input 1020Hz  
Signal Output Overload Level at  
2-wire  
3.14  
dBm0 THD < 5%  
Input 1020Hz  
7
8
Signal Output to Total  
Distortion Ratio at 2-Wire  
Input at 2-Wire  
35  
dB  
dB  
dB  
dB  
0 to -20dB  
-30dBm  
-40dBm  
-50dBm  
32.9  
24.9  
19.9  
Out-of-Band Discrimination at  
2-Wire:  
Input at Di  
Signals in 4.6 -72 kHz band  
Signals in 300-3400 Hz band  
other than 1020 Hz  
-50  
-40  
dBm  
dBm  
-25dBm0, 4.6 -72kHz  
0dBm0, 1020 Hz  
Signals in 4.6 -72 kHz band  
-25  
-41  
dBm  
dB  
0dBm0, 300-3400 Hz  
9
Harmonic Distortion  
(2nd or 3rd Harmonic) at 2-Wire  
10 Idle Channel Noise at  
2-Wire  
Gain Setting  
dBmp -3.5dB  
dBmp -7dB  
-73  
-73  
-67  
-67  
* AC Electrical Characteristics are over Recommended Operating Conditions unless otherwise stated.  
† Typical figures are at 25°C with nominal +5V supplies and are for design aid only.  
2-292  
Preliminary Information  
MH89626C  
Loop Electrical Characteristics  
Characteristics  
Sym  
Min  
Typ*  
Max  
Units  
Test Comments  
1
2
3
4
5
6
7
Clock Frequency  
Clock Rise Time  
C2i  
C2i  
C2i  
C2i  
F1i  
F1i  
Do  
f
2.046  
2.048  
2.05  
50  
MHz  
ns  
C
tCR  
tCF  
D
I
G
I
T
A
L
Clock Fall Time  
50  
ns  
Clock Duty Cycle  
Chip Enable Rise Time  
Chip Enable Fall Time  
40  
50  
60  
%
tER  
tEF  
tPZL  
tPZH  
100  
100  
ns  
ns  
PropagationDelayClock  
to Output Enable  
122  
122  
ns  
ns  
RL = 10kto VCC  
CL = 100pF  
8
9
Input Setup Time  
Input Hold Time  
Di  
Di  
tISH  
tISL  
25  
0
ns  
ns  
tIH  
60  
ns  
* Typical figures are at 25°C with nominal +5V supplies. For design aid only: not guaranteed and not subject to production testing.  
Bit  
Name  
Description  
0
1
2
SD0  
SD1  
SD2  
When Logic ‘0’ activates relay driver 1 to apply ringing to the line  
When logic ‘0’ activates relay driver 2. Normally used for in-test  
When logic ‘0’ it will set the receive gain to -7.0dB  
When logic ‘1’ it will set the receive gain to -3.5dB  
3
4
5
6
7
SD3  
SD4  
SD5  
SD6  
SD7  
When logic ‘0’ reverses the TIP and RING.  
When logic ‘0’ activates relay driver 3. Normally used for out-test  
The output of the serial data stream SDi, bit 5. Bit inverted  
The output of the serial data stream SDi, bit 6. Bit inverted  
The output of the serial data stream SDi, bit 7. Bit inverted  
Table 1 - Control of SLIC Functions through SD  
2-293  
MH89626C  
Preliminary Information  
Functional Description  
TIP/RING Reversal  
The MITEL MH89626C OPS SLIC (Off-Premise  
For a Direct Inward Dialling (DID) operation, the  
MH89626C provides a TIP and RING reversal  
function on the hybrid. This built-in line polarity  
reversal capability will eliminate the use of an  
external bulky mechanical relay and provides fast  
and reliable Tip and Ring reversed function. The  
serial control stream, SDi, bit 3 at logic low will  
reverse the polarity of the Tip and Ring. Refer to  
Table 1 for control of the SLIC functions.  
Subscriber Line Interface Circuit) provides  
a
complete interface between an off-premise  
telephone line and a digital switching system. All  
BORSCHT functions are provided requiring only a  
few external components. The input impedance  
conforms with Chinese standard requirements.  
Overvoltage Protection  
Ringing  
The MH89626C is protected from short term (20ms)  
transients (+250V) between TIP and RING, TIp and  
Ground, and RING and Ground. However, if the  
MH89626C is used in conjunction with MH80626C,  
protection sip, it will meet all CCITT K.20  
requirements. The applications circuit is shown in  
Figure 2.  
The ringing insertion circuitry has the capability to  
provide ringing voltage to a telephone set by simply  
adding an external relay, ring generator. The serial  
control stream, SDi, bit 0 at logic low will activate the  
Refer to Table 1 for the control of SLIC functions.  
The MH80626C has two battery feed resistors (50  
ohms) and one ringing feed resistor (560 ohms), that  
are required to be used with the MH89626C as a  
complete line interface. All resistors on the hybrid  
are specially designed to withstand high power. The  
two battery feed resistors are accurately trimmed to  
achieve good longitudinal balance. Two fuses and  
current limited resistors (5 ohms) are provided on the  
hybrid for lightning and high voltage surge  
protection.  
Supervision  
The loop detection circuit determines whether a low  
enough impedance is across Tip and Ring to be  
recognized as an off-hook condition. When an  
off-hook condition occurs, the SHK and the LED  
outputs toggle to a low level. These outputs also  
toggle with incoming dial pulses.  
During applied ringing, the loop detection circuit  
engages a ringing filter. This filter prevents a false  
off-hook detection due to the current associated with  
the AC ringing voltage as well as current transients  
that occur when the ringing voltage is switched in  
and out. The Ring trip detection circuitry deactivates  
the ring driver after an off-hook condition is detected.  
Battery Feed  
The MH89626C powers the telephone set with  
constant DC loop current for short lines and  
automatically reverts to constant voltage for long  
lines. If the LCA pin is left open, the constant current  
is set at 23 mA. The Constant current can also be  
set by adding a resistor connected fro the LCA pin to  
Transmit and Receive Gain  
The Transmit Gain (Tip-Ring to Do) is fixed at 0dB.  
The Receive Gain (Di to Tip-Ring) is programmable  
in -3.5 or -7.0dB, either using software (SDi, bit 2) or  
external hardware (GS pin).  
V
EE. The resistance (R) can be calculated as:  
147.2 - ILoop  
R=  
(0.0001176 X ILoop) - 0.002586  
Where ILoop is the desired constant loop current in  
mA, and R is the resistance from pin LCA to pin VEE  
in ohms.  
R(k)  
348K 200K 80K  
25.0 27.1 34.0  
50K  
40.2  
30K  
49.7  
ILoop  
(mA)  
2-294  
Preliminary Information  
MH89626C  
MH89626C  
MH80626C  
K1A  
5
6
D1  
D3  
24  
TOUT  
F1i  
1
TIP  
20  
T
Test  
In  
Test  
Out  
VRef  
22  
4
14  
TF  
RF  
TF  
C2i  
12  
7
3
RF  
R
1
23  
2
Do  
RING  
21  
D4  
D2  
Tip  
TIN  
RIN  
Di  
28  
K3A  
K2A  
8
GS  
R1  
R2  
C1  
ROUT  
Q1  
19  
to other  
circuit  
SDi  
Heat sink 9oC/W  
8
K1B  
-48V  
20  
18  
16  
15  
RF2  
RF1  
RF2  
RF1  
CS  
Ring  
K2B  
K3B  
7
17  
LED  
30  
31  
32  
16  
SD7  
SD6  
SD5  
SHK  
VAC  
13  
38  
5
RD1  
RD2  
K1 RELAY  
K2 RELAY  
K3 RELAY  
LGND  
+5V  
36  
90VRMS 25Hz  
6
-48V  
VBat  
LCA  
371  
PTC  
-48V  
RD3  
18  
34  
VRLY  
Components  
D1,D2,D3,D4 IN4004  
VDD VEE  
31  
AGND RGND  
30 18  
9
Q1 = FET BUZ 22 or equivalent  
1
R1 = 10k +5% / W  
290V  
TISP  
4
1
R2 = 1k + 5% / W  
4
C1 = 0.01µF + 10% 100V  
PTC = 55, 50mA  
+5V  
-5V  
Figure 3 - Application Circuit  
C2i  
F1i  
tPHZ  
tES  
tES  
Do  
tPZH  
tPZL  
tPLH  
tPHL  
Di  
tISH  
tISL  
tIH  
Figure 4a - Control Timing Diagram  
2-295  
MH89626C  
Preliminary Information  
C2i  
CS  
b0  
SD1  
b7  
b5  
b1  
b2  
b6  
Figure 4b -Control Timing Diagram  
0.12 Max  
(3.0 Max)  
3.80 + 0.015  
(9.652 + 1.4)  
Side View  
0.58+0.02  
(14.7+0.5)  
1 2 3 4  
37 38  
0.010 + 0.002  
(0.25 + 0.05)  
0.27 Max  
(6.9 Max)  
*
0.05 + 0.01  
(1.3 + 0.5)  
0.18 + 0.02  
(4.6 + 0.5)  
*
*
*
Notes:  
1) Not to scale  
2) Dimensions in inches).  
3) (Dimensions in millimetres).  
*Dimensions to centre of pin &  
tolerance non accumulative.  
0.25 + 0.02  
(6.4 + 0.05)  
0.100 + 0.010  
(2.54 + 0.26)  
0.020 + 0.005  
(0.51 + 0.13)  
Figure 5 - Mechanical Data  
2-296  

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