DAT-15575-PN+PR [MINI]
Variable Attenuator, 0MHz Min, 2000MHz Max, 2.1dB Insertion Loss-Max, CMOS, 4 X 4 MM, ROHS COMPLIANT, DG983-1, 20 PIN;型号: | DAT-15575-PN+PR |
厂家: | MINI-CIRCUITS |
描述: | Variable Attenuator, 0MHz Min, 2000MHz Max, 2.1dB Insertion Loss-Max, CMOS, 4 X 4 MM, ROHS COMPLIANT, DG983-1, 20 PIN 衰减器 |
文件: | 总12页 (文件大小:442K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Digital Step Attenuator
75Ω DC-2000 MHz
15.5 dB, 0.5 dB Step
5 Bit, Parallel Control Interface, Dual Supply Voltage
Product Features
• Dual supply voltage: VDD=+3V, VSS=-3V
• Immune to latch up
• Excellent accuracy, 0.1 dB Typ
• Parallel control interface
• Fast switching control frequency, 1MHz Typ
• Low Insertion Loss
• High IP3, +52 dBm typ
• Very low DC power consumption
• Excellent return loss, 20 dB Typ
• Small size 4.0 x 4.0 mm
DAT-15575-PN+
DAT-15575-PN
+ RoHS compliant in accordance
with EU Directive (2002/95/EC)
The +Suffix identifies RoHS Compliance. See our web site
for RoHS Compliance methodologies and qualifications.
Typical Applications
• Base Station Infrastructure
• Portable Wireless
• CATV & DBS
• MMDS & Wireless LAN
• Wireless Local Loop
• UNII & Hiper LAN
• Power amplifier distortion canceling loops
General Description
The DAT-15575-PN is a 75Ω RF digital step attenuator that offers an attenuation range up to 15.5 dB in
0.5 dB steps. The control is a 5-bit parallel interface, operating on dual supply voltage: VDD=+3V, VSS=-3V.
The DAT-15575-PN is produced using a unique CMOS process on silicon, offering the performance of
GaAs, with the advantages of conventional CMOS devices.
Simplified Schematic
RF Input
RF Out
8dB
4dB
2dB
1dB
0.5dB
Parallel Control
Latch Enable
Control Logic Interface
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REV. C
M112685
DAT-15575-PN
071025
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DAT-15575-PN+
DAT-15575-PN
Digital Step Attenuator
RF Electrical Specifications, DC-2000 MHz, TAMB=25°C, VDD=+3V, VSS=-3V
Freq. Range
Parameter
Min.
Typ.
Max.
Units
(GHz)
DC-1.2
1.2-2.0
DC-1.2
1.2-2.0
DC-1.2
1.2-2.0
DC-1.2
1.2-2.0
DC-1.2
1.2-2.0
DC-1.2
1.2-2.0
DC-2.0
—
—
—
—
—
—
—
—
—
—
—
—
—
0.03
0.17
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
dBm
Accuracy @ 0.5 dB Attenuation Setting
0.05
0.03
0.1
0.18
0.19
0.2
Accuracy @ 1 dB Attenuation Setting
Accuracy @ 2 dB Attenuation Setting
Accuracy @ 4 dB Attenuation Setting
Accuracy @ 8 dB Attenuation Setting
0.07
0.15
0.05
0.15
0.1
0.23
0.25
0.25
0.35
0.25
0.55
1.8
0.24
1.2
Insertion Loss(note1) @ all attenuator set to 0dB
Input IP3(note 2) (at Min. and Max. Attenuation)
1.6
2.1
+52
+24
—
—
Input Power @ 0.2dB Compression*
(at Min. and Max. Attenuation)
DC-2.0
—
dBm
DC-1.2
1.2-2.0
—
—
1.6
1.7
2.0
2.0
—
—
VSWR
Notes:
1. I. Loss values are de-embedded from test board Loss (test board’s Insertion Loss: 0.10dB @100MHz, 0.40dB @1200MHz,
0.55dB @2000MHz, 0.75dB @4000MHz)
2. Input IP3 and 1dB compression degrades below 1 MHz
DC Electrical Specifications
Parameter
Min.
2.7
Typ.
3
Max.
3.3
Units
V
V
DD, Supply Voltage
SS, Supply Voltage
V
-3.3
—
-3
-2.7
100
0.3xVDD
—
V
IDD (ISS), Supply Current
—
—
—
—
μA
V
Control Input Low
Control Input High
Control Current
—
0.7xVDD
—
V
1
μA
Switching Specifications
Parameter
Min.
—
Typ.
1.0
Max.
—
Units
Switching Speed, 50% Control to 0.5dB
of Attenuation Value
μ
Sec
Switching Control Frequency
—
1.0
—
MHz
Absolute Maximum Ratings
Parameter
Ratings
-40°C to 85°C
-55°C to 100°C
-0.3V Min., 4V Max.
-4V Min., 0.3V Max.
-0.3V Min., VDD+0.3V Max.
500V
Operating Temperature
Storage Temperature
VDD
VSS
Voltage on any input
ESD, HBM
ESD, MM
100V
Input Power
+24dBm
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DAT-15575-PN+
DAT-15575-PN
Digital Step Attenuator
Pin Description
Pin Configuration (Top View)
Pin
Number
Function
Description
N/C
RF in
N/C
1
2
Not connected (Note 3)
RF in port (Note 1)
3
Not connected (Note 3)
Ground connection
GND
LE
4
1
2
3
4
5
15
14
13
12
11
N/C
RFin
N/C
GND
LE
C8
5
Latch Enable Input (Note 2)
Positive Supply Voltage
Not connected
2x2mm
Paddle
ground
RFout
GND
VSS
GND
VDD
6
N/C
7
PUP2
VDD
8
Power up selection bit
Positive Supply Voltage
Ground connection
9
GND
GND
VSS
10
11
12
13
14
15
16
17
18
19
20
Paddle
Ground connection
Negative supply voltage
Ground connection
GND
RF out
C8
RF out port (Note 1)
Control for attenuation bit, 8 dB
Control for attenuation bit, 4 dB
Control for attenuation bit, 2 dB
Ground Connection
C4
C2
GND
C1
Control for attenuation bit, 1 dB
Control for attenuation bit, 0.5 dB
Paddle ground (Note 4)
C0.5
GND
Notes:
1. Both RF ports must be held at 0VDC or DC blocked with an external series capacitor.
2. Latch Enable (LE) has an internal 100KΩ resistor to VDD
3. Place a shunt 10KΩ resistor to GND.
.
4. The exposed solder pad on the bottom of the package (See Pin Configuration) must
be grounded for proper device operation.
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page 3 of 12
DAT-15575-PN+
DAT-15575-PN
Digital Step Attenuator
Typical Performance Curves
ATTENUATION (0.5dB) @ +25°C,+85°C,-45°C
INSERTION LOSS (Ref) @ +25°C, +85°C, -45°C
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
7
6
5
4
3
2
1
0
-45°C
+25°C
+85°C
+85°C
+25°C
-45°C
0
500
1000
1500
2000
2500
3000
0
500
1000
1500
2000
2500
3000
Frequency (MHz)
Frequency (MHz)
ATTENUATION (1dB) @ +25°C,+85°C,-45°C
ATTENUATION (2dB) @ +25°C,+85°C,-45°C
1.5
1.4
1.3
1.2
1.1
1
3
2.8
2.6
2.4
2.2
2
-45°C
+25°C
+85°C
-45°C
+25°C
+85°C
0.9
0.8
0.7
0.6
0.5
1.8
1.6
1.4
1.2
1
0
500
1000
1500
2000
2500
3000
0
500
1000
1500
2000
2500
3000
Frequency (MHz)
Frequency (MHz)
ATTENUATION (4dB) @ +25°C,+85°C,-45°C
ATTENUATION (8dB) @ +25°C,+85°C,-45°C
5
4.8
4.6
4.4
4.2
4
8.8
8.6
8.4
8.2
8
-45°C
+25°C
+85°C
-45°C
+25°C
+85°C
7.8
7.6
7.4
7.2
7
3.8
3.6
3.4
3.2
3
6.8
6.6
0
500
1000
1500
2000
2500
3000
0
500
1000
1500
2000
2500
3000
Frequency (MHz)
Frequency (MHz)
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ꢓꢔꢕꢖꢔꢃꢗꢖꢘꢓꢙꢚꢛꢜꢉꢃꢘꢙꢗꢝꢙꢞꢉꢞꢀꢋ
DAT-15575-PN+
DAT-15575-PN
Digital Step Attenuator
Typical Performance Curves
ATTENUATION (15.5dB) @ +25°C,+85°C,-45°C
18
17
16
15
14
13
12
-45°C
+25°C
+85°C
0
500
1000
1500
2000
2500
3000
Frequency (MHz)
RETURN LOSS IN S11 (Ref) @ +25°C,+85°C,-45°C
RETURN LOSS OUT S22 (Ref) @ +25°C,+85°C,-45°C
50
40
30
20
10
0
50
40
30
20
10
0
-45°C
+25°C
+85°C
-45°C
+25°C
+85°C
0
500
1000
1500
2000
2500
3000
0
500
1000
1500
2000
2500
3000
Frequency (MHz)
Frequency (MHz)
RETURN LOSS OUT S22 (Major Attenuation Steps) @ +25°C
RETURN LOSS IN S11 (Major Attenuation Steps) @ +25°C
50
40
30
20
10
0
50
40
30
20
10
0
ATT=0dB
ATT=1dB
ATT=4dB
ATT=15.5dB
ATT=0.5dB
ATT=2dB
ATT=8dB
ATT=0dB
ATT=1dB
ATT=4dB
ATT=15.5dB
ATT=0.5dB
ATT=2dB
ATT=8dB
0
500
1000
1500
2000
2500
3000
0
500
1000
1500
Frequency (MHz)
2000
2500
3000
Frequency (MHz)
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ꢀꢁꢂꢃꢄꢅꢅꢆꢃꢃꢀꢁꢂꢃꢆꢇꢅꢅꢆ ꢀꢁꢂꢃꢄꢅꢄꢁꢆ
ꢀꢁꢂꢁꢃꢄ'.ꢃꢅꢆꢇꢈꢉꢉꢊꢃꢄ)''#$/&ꢊꢃꢋꢌ-ꢃꢍ')#ꢃꢈꢈꢎꢅꢆꢏꢇꢇꢇꢅꢃꢐꢑꢈꢒꢓꢃꢔꢅꢕꢏꢕꢆꢇꢇꢃꢃꢖꢗ.ꢃꢐꢑꢈꢒꢓꢃꢅꢅꢎꢏꢕꢉꢉꢈꢃꢖ')ꢃꢘꢌ+ꢗ"$ꢌꢘꢃ(ꢌ)ꢙ')%ꢗ&ꢚꢌꢃ*(ꢌꢚ*ꢃꢛꢃ*!'(("& ꢃ'&$"&ꢌꢃ*ꢌꢌꢃꢜ"&"ꢏꢝ")ꢚ,"+*ꢃ-ꢌꢞꢃ*"+ꢌ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇꢈꢃꢉꢈꢇꢆꢈꢂꢂꢊꢅꢃꢋꢂꢌꢊꢍꢁꢃꢉꢈꢇꢆꢈꢂꢃꢃꢀꢁꢂꢃꢄꢅꢆꢇꢈꢉꢊꢋꢌꢉꢍꢈꢎꢏꢐꢏꢈꢑꢒꢇꢐꢏꢒꢐꢓꢔꢈꢕꢁꢂꢖꢈꢗꢑꢘꢑꢙꢊꢑꢚꢊꢌꢑꢋꢛ ꢉꢐꢜꢃ ꢎꢏꢆꢈꢆꢍꢆꢊꢍꢐꢆꢑꢅꢎꢍꢒꢏ
Page 5 of 12
ꢓꢔꢕꢖꢔꢃꢗꢖꢘꢓꢙꢚꢛꢜꢉꢃꢘꢙꢗꢝꢙꢞꢉꢞꢀꢋ
DAT-15575-PN+
DAT-15575-PN
Digital Step Attenuator
Typical Performance Curves
IP-3 INPUT (Major Attenuation Steps) @ +85°C
IP-3 INPUT (Major Attenuation Steps) @ +25°C
70
60
50
40
30
20
10
0
70
60
50
40
30
20
10
0
ATT=0dB
ATT=0.5dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=15.5dB
ATT=0dB
ATT=0.5dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=15.5dB
0
200
400
600
800
1000 1200 1400 1600 1800 2000
0
0
0
200
400
600
800
1000 1200 1400 1600 1800 2000
Frequency (MHz)
Frequency (MHz)
IP-3 INPUT (Major Attenuation Steps) @ -45°C
COMPRESSION @INPUT POWER=+24dBm (+25°C)
0.2
0
70
60
50
40
30
20
10
0
-0.2
-0.4
-0.6
-0.8
ATT=0dB
ATT=0.5dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=15.5dB
ATT=0dB
ATT=0.5dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=15.5dB
200
400
600
800
1000 1200 1400 1600 1800 2000
0
200
400
600
800
1000 1200 1400 1600 1800 2000
Frequency (MHz)
Frequency (MHz)
COMPRESSION @INPUT POWER=+24dBm (+85°C)
COMPRESSION @INPUT POWER=+24dBm (-45°C)
0.2
0
0.2
0
-0.2
-0.4
-0.6
-0.8
-0.2
-0.4
-0.6
-0.8
ATT=0dB
ATT=0.5dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=15.5dB
ATT=0dB
ATT=0.5dB
ATT=1dB
ATT=2dB
ATT=4dB
ATT=8dB
ATT=15.5dB
0
200
400
600
800
1000 1200 1400 1600 1800 2000
200
400
600
800
1000 1200 1400 1600 1800 2000
Frequency (MHz)
Frequency (MHz)
ꢂꢃꢄꢅ
ꢀꢁꢁ
ꢀ
ꢊꢋꢁꢂꢁꢆꢁꢅꢆꢇꢁꢈꢉꢌꢆꢍꢋ
ꢀꢁꢂꢁꢃꢄꢁꢅꢆꢇꢁꢈꢉ
ꢀꢁꢂꢃꢄꢅꢅꢆꢃꢃꢀꢁꢂꢃꢆꢇꢅꢅꢆ ꢀꢁꢂꢃꢄꢅꢄꢁꢆ
ꢀꢁꢂꢁꢃꢄ'.ꢃꢅꢆꢇꢈꢉꢉꢊꢃꢄ)''#$/&ꢊꢃꢋꢌ-ꢃꢍ')#ꢃꢈꢈꢎꢅꢆꢏꢇꢇꢇꢅꢃꢐꢑꢈꢒꢓꢃꢔꢅꢕꢏꢕꢆꢇꢇꢃꢃꢖꢗ.ꢃꢐꢑꢈꢒꢓꢃꢅꢅꢎꢏꢕꢉꢉꢈꢃꢖ')ꢃꢘꢌ+ꢗ"$ꢌꢘꢃ(ꢌ)ꢙ')%ꢗ&ꢚꢌꢃ*(ꢌꢚ*ꢃꢛꢃ*!'(("& ꢃ'&$"&ꢌꢃ*ꢌꢌꢃꢜ"&"ꢏꢝ")ꢚ,"+*ꢃ-ꢌꢞꢃ*"+ꢌ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇꢈꢃꢉꢈꢇꢆꢈꢂꢂꢊꢅꢃꢋꢂꢌꢊꢍꢁꢃꢉꢈꢇꢆꢈꢂꢃꢃꢀꢁꢂꢃꢄꢅꢆꢇꢈꢉꢊꢋꢌꢉꢍꢈꢎꢏꢐꢏꢈꢑꢒꢇꢐꢏꢒꢐꢓꢔꢈꢕꢁꢂꢖꢈꢗꢑꢘꢑꢙꢊꢑꢚꢊꢌꢑꢋꢛ ꢉꢐꢜꢃ ꢎꢏꢆꢈꢆꢍꢆꢊꢍꢐꢆꢑꢅꢎꢍꢒꢏ
Page 6 of 12
ꢓꢔꢕꢖꢔꢃꢗꢖꢘꢓꢙꢚꢛꢜꢉꢃꢘꢙꢗꢝꢙꢞꢉꢞꢀꢋ
DAT-15575-PN+
DAT-15575-PN
Digital Step Attenuator
Outline Drawing (DG983-1)
PCB Land Pattern
Suggested Layout,
Tolerance to be within .002
Device Marking
ꢉꢊꢋ ꢌ
ꢍꢋꢈꢆꢎ
ꢀꢁꢂ
15575
ꢃꢄꢅꢆ
ꢁꢇꢈꢆ
inch
Outline Dimensions (
)
mm
E
WT.
GRAMS
A
B
C
D
F
G
H
J
K
L
M
N
P
Q
R
.157
.157
.035 .008 .081 .081 .010
—
.022
.020
.166
.166
.070
.012
.026
.070
.04
4.00
4.00
0.90 0.20 2.06 2.06 0.25
—
0.56
0.50
4.22
4.22
1.78
0.31
0.66
1.78
ꢂꢃꢄꢅ
ꢀ
ꢀꢁꢁ
ꢊꢋꢁꢂꢁꢆꢁꢅꢆꢇꢁꢈꢉꢌꢆꢍꢋ
ꢀꢁꢂꢁꢃꢄꢁꢅꢆꢇꢁꢈꢉ
ꢀꢁꢂꢃꢄꢅꢅꢆꢃꢃꢀꢁꢂꢃꢆꢇꢅꢅꢆ ꢀꢁꢂꢃꢄꢅꢄꢁꢆ
ꢀꢁꢂꢁꢃꢄ'.ꢃꢅꢆꢇꢈꢉꢉꢊꢃꢄ)''#$/&ꢊꢃꢋꢌ-ꢃꢍ')#ꢃꢈꢈꢎꢅꢆꢏꢇꢇꢇꢅꢃꢐꢑꢈꢒꢓꢃꢔꢅꢕꢏꢕꢆꢇꢇꢃꢃꢖꢗ.ꢃꢐꢑꢈꢒꢓꢃꢅꢅꢎꢏꢕꢉꢉꢈꢃꢖ')ꢃꢘꢌ+ꢗ"$ꢌꢘꢃ(ꢌ)ꢙ')%ꢗ&ꢚꢌꢃ*(ꢌꢚ*ꢃꢛꢃ*!'(("& ꢃ'&$"&ꢌꢃ*ꢌꢌꢃꢜ"&"ꢏꢝ")ꢚ,"+*ꢃ-ꢌꢞꢃ*"+ꢌ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇꢈꢃꢉꢈꢇꢆꢈꢂꢂꢊꢅꢃꢋꢂꢌꢊꢍꢁꢃꢉꢈꢇꢆꢈꢂꢃꢃꢀꢁꢂꢃꢄꢅꢆꢇꢈꢉꢊꢋꢌꢉꢍꢈꢎꢏꢐꢏꢈꢑꢒꢇꢐꢏꢒꢐꢓꢔꢈꢕꢁꢂꢖꢈꢗꢑꢘꢑꢙꢊꢑꢚꢊꢌꢑꢋꢛ ꢉꢐꢜꢃ ꢎꢏꢆꢈꢆꢍꢆꢊꢍꢐꢆꢑꢅꢎꢍꢒꢏ
ꢓꢔꢕꢖꢔꢃꢗꢖꢘꢓꢙꢚꢛꢜꢉꢃꢘꢙꢗꢝꢙꢞꢉꢞꢀꢋ
page 7 of 12
DAT-15575-PN+
DAT-15575-PN
Digital Step Attenuator
Suggested Layout for PCB Design (PL-200)
The suggested Layout shows only the footprint area of the DAT, and the components located near this area
(i.e.: R1, R7). For the complete Layout, see photo and schematic diagram on page 11 of 12.
NOTES:
1. TRACE WIDTH IS SHOWN FOR FR4 WITH DIELECTRIC THICKNESS.
.025” .002”. COPPER: 1/2 Oꢀ. EACH SIDE.
FOR OTHER MATERIALS TRACE WIDTH MAY NEED TO BE MODIFIED.
2. 0603, 0402 SIꢀE CHIP FOOT PRINTS SHOWN FOR REFERENCE,
VALUES OF RESISTORS WILL VARY BASED ON APPLICATION.
3. BOTTOM SIDE OF THE PCB IS CONTINUOUS GROUND PLANE.
DENOTES PCB COPPER LAYOUT WITH SMOBC
(SOLDER MASK OVER BARE COPPER)
DENOTES COPPER LAND PATTERN FREE OF SOLDERMASK
ꢂꢃꢄꢅ
ꢀ
ꢀꢁꢁ
ꢊꢋꢁꢂꢁꢆꢁꢅꢆꢇꢁꢈꢉꢌꢆꢍꢋ
ꢀꢁꢂꢁꢃꢄꢁꢅꢆꢇꢁꢈꢉ
ꢀꢁꢂꢃꢄꢅꢅꢆꢃꢃꢀꢁꢂꢃꢆꢇꢅꢅꢆ ꢀꢁꢂꢃꢄꢅꢄꢁꢆ
ꢀꢁꢂꢁꢃꢄ'.ꢃꢅꢆꢇꢈꢉꢉꢊꢃꢄ)''#$/&ꢊꢃꢋꢌ-ꢃꢍ')#ꢃꢈꢈꢎꢅꢆꢏꢇꢇꢇꢅꢃꢐꢑꢈꢒꢓꢃꢔꢅꢕꢏꢕꢆꢇꢇꢃꢃꢖꢗ.ꢃꢐꢑꢈꢒꢓꢃꢅꢅꢎꢏꢕꢉꢉꢈꢃꢖ')ꢃꢘꢌ+ꢗ"$ꢌꢘꢃ(ꢌ)ꢙ')%ꢗ&ꢚꢌꢃ*(ꢌꢚ*ꢃꢛꢃ*!'(("& ꢃ'&$"&ꢌꢃ*ꢌꢌꢃꢜ"&"ꢏꢝ")ꢚ,"+*ꢃ-ꢌꢞꢃ*"+ꢌ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇꢈꢃꢉꢈꢇꢆꢈꢂꢂꢊꢅꢃꢋꢂꢌꢊꢍꢁꢃꢉꢈꢇꢆꢈꢂꢃꢃꢀꢁꢂꢃꢄꢅꢆꢇꢈꢉꢊꢋꢌꢉꢍꢈꢎꢏꢐꢏꢈꢑꢒꢇꢐꢏꢒꢐꢓꢔꢈꢕꢁꢂꢖꢈꢗꢑꢘꢑꢙꢊꢑꢚꢊꢌꢑꢋꢛ ꢉꢐꢜꢃ ꢎꢏꢆꢈꢆꢍꢆꢊꢍꢐꢆꢑꢅꢎꢍꢒꢏ
Page 8 of 12
ꢓꢔꢕꢖꢔꢃꢗꢖꢘꢓꢙꢚꢛꢜꢉꢃꢘꢙꢗꢝꢙꢞꢉꢞꢀꢋ
DAT-15575-PN+
DAT-15575-PN
Digital Step Attenuator
Simplified Schematic
RF Input
RF Out
8dB
4dB
2dB
1dB
0.5dB
Parallel Control
Latch Enable
Control Logic Interface
The DAT-15575-PN parallel interface consists of 5 control bits that select the desired attenuation state, as
shown in Table 1: Truth Table
Table 1. Truth Table
Attenuation
C8
C4
C2
C1
C0.5
State
Reference
0.5 (dB)
1 (dB)
0
0
0
0
0
1
1
0
0
0
0
1
0
1
0
0
0
1
0
0
1
0
0
1
0
0
0
1
0
1
0
0
0
0
1
2 (dB)
4 (dB)
8 (dB)
15.5 (dB)
Note: Not all 32 possible combinations of C0.5 - C8 are shown
in table
The parallel interface timing requirements are defined by Figure 1 (Parallel Interface Timing Diagram) and
Table 2 (Parallel Interface AC Characteristics), and switching speed.
For latched parallel programming the Latch Enable (LE) should be held LOW while changing attenunation
state control values, then pulse LE HIGH to LOW (per Figure 1) to latch new attenuation state into device.
For direct parallel programming, the Latch Enable (LE) line should be pulled HIGH. Changing attenuation
state control values will change device state to new attenuation. Direct mode is ideal for manual control of
the device (using hardwire, switches, or jumpers).
Figure 1: Parallel Interface Timing Diagram
Table 2. Parallel Interface AC Characteristics
Symbol
Parameter
Min.
30
Max.
Units
ns
LE
LE minimum pulse
width
tLEPW
tPDSUP
tPDHLD
data set-up time before
clock rising edge of LE
10
ns
data hold time after
clock falling edge of LE
Parallel Data
C8:C0.5
10
ns
tLEPW
tPDSUP
tPDHLD
ꢂꢃꢄꢅ
ꢀ
ꢀꢁꢁ
ꢊꢋꢁꢂꢁꢆꢁꢅꢆꢇꢁꢈꢉꢌꢆꢍꢋ
ꢀꢁꢂꢁꢃꢄꢁꢅꢆꢇꢁꢈꢉ
ꢀꢁꢂꢃꢄꢅꢅꢆꢃꢃꢀꢁꢂꢃꢆꢇꢅꢅꢆ ꢀꢁꢂꢃꢄꢅꢄꢁꢆ
ꢀꢁꢂꢁꢃꢄ'.ꢃꢅꢆꢇꢈꢉꢉꢊꢃꢄ)''#$/&ꢊꢃꢋꢌ-ꢃꢍ')#ꢃꢈꢈꢎꢅꢆꢏꢇꢇꢇꢅꢃꢐꢑꢈꢒꢓꢃꢔꢅꢕꢏꢕꢆꢇꢇꢃꢃꢖꢗ.ꢃꢐꢑꢈꢒꢓꢃꢅꢅꢎꢏꢕꢉꢉꢈꢃꢖ')ꢃꢘꢌ+ꢗ"$ꢌꢘꢃ(ꢌ)ꢙ')%ꢗ&ꢚꢌꢃ*(ꢌꢚ*ꢃꢛꢃ*!'(("& ꢃ'&$"&ꢌꢃ*ꢌꢌꢃꢜ"&"ꢏꢝ")ꢚ,"+*ꢃ-ꢌꢞꢃ*"+ꢌ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇꢈꢃꢉꢈꢇꢆꢈꢂꢂꢊꢅꢃꢋꢂꢌꢊꢍꢁꢃꢉꢈꢇꢆꢈꢂꢃꢃꢀꢁꢂꢃꢄꢅꢆꢇꢈꢉꢊꢋꢌꢉꢍꢈꢎꢏꢐꢏꢈꢑꢒꢇꢐꢏꢒꢐꢓꢔꢈꢕꢁꢂꢖꢈꢗꢑꢘꢑꢙꢊꢑꢚꢊꢌꢑꢋꢛ ꢉꢐꢜꢃ ꢎꢏꢆꢈꢆꢍꢆꢊꢍꢐꢆꢑꢅꢎꢍꢒꢏ
ꢓꢔꢕꢖꢔꢃꢗꢖꢘꢓꢙꢚꢛꢜꢉꢃꢘꢙꢗꢝꢙꢞꢉꢞꢀꢋ
page 9 of 12
DAT-15575-PN+
DAT-15575-PN
Digital Step Attenuator
Pin 1 must always be low to prevent the attenuator from entering an unknown state.
Power-up Control Settings
The DAT-15575-PN always assumes a specifiable attenuation setting on power-up, allowing a known at-
tenuation state to be established before an initial parallel control word is provided.
When the attenuator powers up with LE=0, the control bits are automatically set to one of two possible
values. These two values are selected by the power-up control bit, PUP2, as shown in Table 3: (Power-Up
Truth Table, Parallel Mode).
Table 3. Power-Up Truth Table, Parallel Mode
Attenuation State
Reference
PUP2
0
LE
0
8 (dB)
1
0
Defined by C0.5-C8
(See Table 1-Truth Table)
X (Note 1)
1
Note 1: PUP2 Connection may be 0, 1, GROUND, or not
connect, without effect on attenuation state.
Power-Up with LE=1 provides normal parallel operation with C0.5-C8, and PUP2 is not active.
ꢂꢃꢄꢅ
ꢀꢁꢁ
ꢀ
ꢊꢋꢁꢂꢁꢆꢁꢅꢆꢇꢁꢈꢉꢌꢆꢍꢋ
ꢀꢁꢂꢁꢃꢄꢁꢅꢆꢇꢁꢈꢉ
ꢀꢁꢂꢃꢄꢅꢅꢆꢃꢃꢀꢁꢂꢃꢆꢇꢅꢅꢆ ꢀꢁꢂꢃꢄꢅꢄꢁꢆ
ꢀꢁꢂꢁꢃꢄ'.ꢃꢅꢆꢇꢈꢉꢉꢊꢃꢄ)''#$/&ꢊꢃꢋꢌ-ꢃꢍ')#ꢃꢈꢈꢎꢅꢆꢏꢇꢇꢇꢅꢃꢐꢑꢈꢒꢓꢃꢔꢅꢕꢏꢕꢆꢇꢇꢃꢃꢖꢗ.ꢃꢐꢑꢈꢒꢓꢃꢅꢅꢎꢏꢕꢉꢉꢈꢃꢖ')ꢃꢘꢌ+ꢗ"$ꢌꢘꢃ(ꢌ)ꢙ')%ꢗ&ꢚꢌꢃ*(ꢌꢚ*ꢃꢛꢃ*!'(("& ꢃ'&$"&ꢌꢃ*ꢌꢌꢃꢜ"&"ꢏꢝ")ꢚ,"+*ꢃ-ꢌꢞꢃ*"+ꢌ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇꢈꢃꢉꢈꢇꢆꢈꢂꢂꢊꢅꢃꢋꢂꢌꢊꢍꢁꢃꢉꢈꢇꢆꢈꢂꢃꢃꢀꢁꢂꢃꢄꢅꢆꢇꢈꢉꢊꢋꢌꢉꢍꢈꢎꢏꢐꢏꢈꢑꢒꢇꢐꢏꢒꢐꢓꢔꢈꢕꢁꢂꢖꢈꢗꢑꢘꢑꢙꢊꢑꢚꢊꢌꢑꢋꢛ ꢉꢐꢜꢃ ꢎꢏꢆꢈꢆꢍꢆꢊꢍꢐꢆꢑꢅꢎꢍꢒꢏ
Page 10 of 12
ꢓꢔꢕꢖꢔꢃꢗꢖꢘꢓꢙꢚꢛꢜꢉꢃꢘꢙꢗꢝꢙꢞꢉꢞꢀꢋ
DAT-15575-PN+
DAT-15575-PN
Digital Step Attenuator
TB-341 Evaluation Board Schematic Diagram
1
2
3
4
5
6
7
8
PARALLEL
CONTROL
J1.1
DC SUPPLY
J2.2
1
2
13
12
11
10
4
9
8
13
12
11
10
4
9
8
14
7
14
7
IC1
IC2
1
2
3
5
6
1
2
3
5
6
+
C1
C2
C4
C5
C6
C7
C8
C3
R4
R5
R6
R2
R1
R3
20
19
18
17
16
15
1
N/C
RFin
N/C
C8
RFin
R9
2
3
4
5
14
13
RFout
GND
RFout
DAT
R7
C12
+
12
11
GND
Vss
1
2
6
7
8
9
10
LE
R8
GND
C9
2
C13
1
6
IC3
C11
R11
R10
1
2
3
4
+
5
DC SUPPLY
J2.1
LE CONTROL
J1.2
C10
Bill of Materials
R1 - R8
R10, R11
R9
Resistor 0603 10 KOhm +/- 1%
Resistor 0603 470 Ohm +/- 1%
Resistor 0402 10 KOhm +/- 1%
C2 - C10 & C13 NPO Capacitor 0603 100pF +/- 5%
C1, C11 & C12 Tantalum Capacitor 100nF +/- 10%
IC1, IC2
IC3
Hex inverting Schmitt trigger MM74HC14
Dual non-inverting Schmitt trigger SN74LVC2G17
TB-341
ꢂꢃꢄꢅ
ꢀ
ꢀꢁꢁ
ꢊꢋꢁꢂꢁꢆꢁꢅꢆꢇꢁꢈꢉꢌꢆꢍꢋ
ꢀꢁꢂꢁꢃꢄꢁꢅꢆꢇꢁꢈꢉ
ꢀꢁꢂꢃꢄꢅꢅꢆꢃꢃꢀꢁꢂꢃꢆꢇꢅꢅꢆ ꢀꢁꢂꢃꢄꢅꢄꢁꢆ
ꢀꢁꢂꢁꢃꢄ'.ꢃꢅꢆꢇꢈꢉꢉꢊꢃꢄ)''#$/&ꢊꢃꢋꢌ-ꢃꢍ')#ꢃꢈꢈꢎꢅꢆꢏꢇꢇꢇꢅꢃꢐꢑꢈꢒꢓꢃꢔꢅꢕꢏꢕꢆꢇꢇꢃꢃꢖꢗ.ꢃꢐꢑꢈꢒꢓꢃꢅꢅꢎꢏꢕꢉꢉꢈꢃꢖ')ꢃꢘꢌ+ꢗ"$ꢌꢘꢃ(ꢌ)ꢙ')%ꢗ&ꢚꢌꢃ*(ꢌꢚ*ꢃꢛꢃ*!'(("& ꢃ'&$"&ꢌꢃ*ꢌꢌꢃꢜ"&"ꢏꢝ")ꢚ,"+*ꢃ-ꢌꢞꢃ*"+ꢌ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇꢈꢃꢉꢈꢇꢆꢈꢂꢂꢊꢅꢃꢋꢂꢌꢊꢍꢁꢃꢉꢈꢇꢆꢈꢂꢃꢃꢀꢁꢂꢃꢄꢅꢆꢇꢈꢉꢊꢋꢌꢉꢍꢈꢎꢏꢐꢏꢈꢑꢒꢇꢐꢏꢒꢐꢓꢔꢈꢕꢁꢂꢖꢈꢗꢑꢘꢑꢙꢊꢑꢚꢊꢌꢑꢋꢛ ꢉꢐꢜꢃ ꢎꢏꢆꢈꢆꢍꢆꢊꢍꢐꢆꢑꢅꢎꢍꢒꢏ
page 11 of 12
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DAT-15575-PN+
DAT-15575-PN
Digital Step Attenuator
Tape and Reel Packaging Information
Table T&R
TR
No.
No. of Devices Designation
Letter
Reel Size
Tape
Width
Pitch
Unit
Orientation
3000
T
13 inch
Tape
Cavity
T-005
12 mm 8 mm
multiples of 10,
less than full
reel of 3K
PR
E
13 inch
Direction of Feed
multiples of 10,
on tape only
not
applicable
Ordering Information
Packaging
Designation Letter
(See Table T&R)
Quantity
Min.
No. of Units
Price
$
Ea.
Model No.
Description
Parallel Interface,
Dual Voltage (Negative
and Positive)
DAT-15575-PN (+)
E
10
1
$3.55
TB-341
Test Board Only
Not Applicable
$79.95
How to Order
Example: 3000 pieces of DAT-15575-PN+
3K
DAT-15575-PN+
T&R=T
Quantity
Model No.
T&R designation letter (see Table T&R)
ꢂꢃꢄꢅ
ꢀ
ꢀꢁꢁ
ꢊꢋꢁꢂꢁꢆꢁꢅꢆꢇꢁꢈꢉꢌꢆꢍꢋ
ꢀꢁꢂꢁꢃꢄꢁꢅꢆꢇꢁꢈꢉ
ꢀꢁꢂꢃꢄꢅꢅꢆꢃꢃꢀꢁꢂꢃꢆꢇꢅꢅꢆ ꢀꢁꢂꢃꢄꢅꢄꢁꢆ
ꢀꢁꢂꢁꢃꢄ'.ꢃꢅꢆꢇꢈꢉꢉꢊꢃꢄ)''#$/&ꢊꢃꢋꢌ-ꢃꢍ')#ꢃꢈꢈꢎꢅꢆꢏꢇꢇꢇꢅꢃꢐꢑꢈꢒꢓꢃꢔꢅꢕꢏꢕꢆꢇꢇꢃꢃꢖꢗ.ꢃꢐꢑꢈꢒꢓꢃꢅꢅꢎꢏꢕꢉꢉꢈꢃꢖ')ꢃꢘꢌ+ꢗ"$ꢌꢘꢃ(ꢌ)ꢙ')%ꢗ&ꢚꢌꢃ*(ꢌꢚ*ꢃꢛꢃ*!'(("& ꢃ'&$"&ꢌꢃ*ꢌꢌꢃꢜ"&"ꢏꢝ")ꢚ,"+*ꢃ-ꢌꢞꢃ*"+ꢌ
ꢀꢁꢂꢃꢄꢂꢅꢆꢇꢈꢃꢉꢈꢇꢆꢈꢂꢂꢊꢅꢃꢋꢂꢌꢊꢍꢁꢃꢉꢈꢇꢆꢈꢂꢃꢃꢀꢁꢂꢃꢄꢅꢆꢇꢈꢉꢊꢋꢌꢉꢍꢈꢎꢏꢐꢏꢈꢑꢒꢇꢐꢏꢒꢐꢓꢔꢈꢕꢁꢂꢖꢈꢗꢑꢘꢑꢙꢊꢑꢚꢊꢌꢑꢋꢛ ꢉꢐꢜꢃ ꢎꢏꢆꢈꢆꢍꢆꢊꢍꢐꢆꢑꢅꢎꢍꢒꢏ
Page 12 of 12
ꢓꢔꢕꢖꢔꢃꢗꢖꢘꢓꢙꢚꢛꢜꢉꢃꢘꢙꢗꢝꢙꢞꢉꢞꢀꢋ
相关型号:
DAT-15575-PNE
Variable Attenuator, 0MHz Min, 2000MHz Max, 2.1dB Insertion Loss-Max, CMOS, 4 X 4 MM, DG983-1, 20 PIN
MINI
DAT-15575-PNE+
Variable Attenuator, 0MHz Min, 2000MHz Max, 2.1dB Insertion Loss-Max, 4 X 4 MM, DG983-1, 20 PIN
MINI
DAT-15575-PNPR
Variable Attenuator, 0MHz Min, 2000MHz Max, 2.1dB Insertion Loss-Max, CMOS, 4 X 4 MM, DG983-1, 20 PIN
MINI
DAT-15575-PP+E
Variable Attenuator, 0MHz Min, 2000MHz Max, 2.1dB Insertion Loss-Max, CMOS, 4 X 4 MM, ROHS COMPLIANT, DG983-1, 20 PIN
MINI
DAT-15575-PP+PR
Variable Attenuator, 0MHz Min, 2000MHz Max, 2.1dB Insertion Loss-Max, CMOS, 4 X 4 MM, ROHS COMPLIANT, DG983-1, 20 PIN
MINI
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