SG3843D-TR [MICROSEMI]
Switching Controller, Current-mode, 1A, 500kHz Switching Freq-Max, BIPolar, PDSO14, ROHS COMPLIANT, PLASTIC, SOIC-14;
| 型号： | SG3843D-TR |
| 厂家： | 
Microsemi |
| 描述： | Switching Controller, Current-mode, 1A, 500kHz Switching Freq-Max, BIPolar, PDSO14, ROHS COMPLIANT, PLASTIC, SOIC-14 开关 光电二极管 |
| 文件： | 总14页 (文件大小：405K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SG1842 / 2842 / 3842
CURRENT
MODE PWM CONTROLLER
P
R O D U C T I O N D A T A S H E E T
T
H E
I
N F I N I T E
P
O W E R O F
I N N O V A T I O N
KEY FEATURES
DESCRIPTION
The SG1842/43 family of control IC's provides all lockout, current limiting circuitry and start-up
the necessary features to implement off-line fixed current of less than 1mA. The totem-pole output
frequency, current-mode switching power supplies is optimized to drive the gate of a power
with a minimum number of external components. MOSFET. The output is low in the off state to
Current-mode architecture demonstrates improved provide direct interface to an N channel device.
line regulation, improved load regulation, pulse- The SG1842/43 is specified for operation over
by-pulse current limiting and inherent protection the full military ambient temperature range of -
of the power supply output switch. The bandgap 55°C to 125°C. The SG2842/43 is specified for
reference is trimmed to ±1% over temperature. the industrial range of -25°C to 85°C, and the
Oscillator discharge current is trimmed to less SG3842/43 is designed for the commercial range
than ±10%. The SG1842/43 has under- voltage of 0°C to 70°C.
OPTIMIZED FOR OFF-LINE
CONTROL
LOW START-UP CURRENT (<1mA)
AUTOMATIC FEED FORWARD
COMPENSATION
TRIMMED OSCILLATOR
DISCHARGE CURRENT
PULSE-BY-PULSE CURRENT
LIMITING
ENHANCED LOAD RESPONSE
CHARACTERISTICS
UNDER-VOLTAGE LOCKOUT
WITH 6V HYSTERESIS (SG1842
only)
DOUBLE-PULSE SUPPRESSION
IMPORTANT: For the most current data, consult MICROSEMI’s website: http://www.microsemi.com
HIGH-CURRENT TOTEM-POLE
OUTPUT (1AMP PEAK)
INTERNALLY TRIMMED BANDGAP
REFERENCE
PRODUCT HIGHLIGHT
500KHZ OPERATION
UNDERVOLTAGE LOCKOUT
SG1842 - 16 volts
R
ST
SG1843 - 8.4 volts
LOW SHOOT-THROUGH
CURRENT <75mA OVER
TEMPERATURE
I
AC
INPUT
ST
VCC
H I G H R E L I A B I L I T Y
F E A T U R E S
SG3842
AVAILABLE TO MIL-STD-883B AND
DESC SMD
SCHEDULED FOR MIL-M38510
QPL LISTING
RADIATION DATA AVAILABLE
LINFINITY LEVEL "S"
PROCESSING AVAILABLE
PACKAGE ORDER INFO
Plastic DIP
8-Pin
Plastic DIP
14-Pin
Plastic SOIC
8-Pin
Plastic SOIC
14-Pin
Ceramic Dip
8-Pin
Ceramic DIP
14-Pin
Cer Flatpack
10-Pin
Ceramic LCC
20-Pin
M
N
DM
D
Y
J
F
L
TA (°C)
RoHS / Pb-free Transition DC: 0503
RoHS / Pb-free Transition DC:0440
SG3842M
SG3843M
SG2842M
SG2843M
SG3842N
SG3843N
SG2842N
SG2843N
SG3842DM
SG3842D
SG3843D
SG2842D
SG2843D
SG3842Y
SG3843Y
SG2842Y
SG2843Y
SG1842Y
SG1843Y
SG3842J
SG3842J
SG2842J
SG2843J
SG1842J
0 to 70
SG3843DM
SG2842DM
SG2843DM
-25 to 85
-55 to
125
SG1842L
SG1842L
SG1843J
MIL-
STD/883
SG1842Y/883B
SG1843Y/883B
SG1842J/883B
SG1843J/883
SG1842L/883B
SG1843L/883B
DESC
SG1842Y/DESC SG1842J/DESC SG1842F/DESC SG1842L/DESC
Note: Available in Tape & Reel. Append the letters “TR” to the part number. (i.e. SG2843DM-TR)
RoHS compliant
Copyright © 2000
Rev. 1.6a,2005-03-09
1
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
PACKAGE PIN OUTS
ABSOLUTE MAXIMUM RATINGS (Notes 1 & 2)
Supply Voltage (ICC < 30mA) ...............................................................Self Limiting
Supply Voltage (Low Impedance Source) ........................................................ 30V
Output Current (Peak) .......................................................................................±1A
Output Current (Continuous) ....................................................................... 350mA
Output Energy (Capacitive Load) ....................................................................... 5µJ
Analog Inputs (Pins 2, 3) ................................................................. -0.3V to +6.3V
Error Amp Output Sink Current ..................................................................... 10mA
Power Dissipation at TA = 25°C (DIL-8) ............................................................ 1W
Operating Junction Temperature
Hermetic (J, Y, F, L Packages) ................................................................... 150°C
Plastic (N, M, D, DM Packages) ................................................................ 150°C
Storage Temperature Range .......................................................... -65°C to +150°C
Lead Temperature (Soldering, 10 Seconds) .................................................. 300°C
Pb-free / RoHS Peak Package Solder Reflow Temp. (40 second max. exposure)........ 260°C (+0, -5)
1
2
3
4
8
7
6
5
COMP
VFB
VREF
VCC
ISENSE
RT/CT
OUTPUT
GND
M & Y PACKAGE
(Top View)
M Package: Pb-free / RoHS 100% Matte Tin Lead Finish
1
2
3
4
8
7
6
5
COMP
VFB
VREF
VCC
ISENSE
RT/CT
OUTPUT
GND
DM PACKAGE
(Top View)
Pb-free / RoHS 100% Matte Tin Lead Finish
Note 1. Exceeding these ratings could cause damage to the device.
Note 2. All voltages are with respect to Pin 5. All currents are positive into the specified
terminal.
1
2
3
4
5
6
7
14
13
12
11
10
9
COMP
N.C.
VFB
VREF
N.C.
VCC
N.C.
ISENSE
N.C.
RT/CT
VC
THERMAL DATA
OUTPUT
GND
PWR GND
M PACKAGE:
8
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
N PACKAGE:
95°C/W
65°C/W
D PACKAGE
(Top View)
Pb-free / RoHS 100% Matte Tin Lead Finish
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
DM PACKAGE:
COMP
N.C.
VFB
1
2
3
4
5
6
7
14
13
12
11
10
9
VREF
N.C.
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
D PACKAGE:
165°C/W
120°C/W
130°C/W
80°C/W
VCC
N.C.
ISENSE
N.C.
RT/CT
VC
OUTPUT
GROUND
POWER GND
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
Y PACKAGE:
8
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
J PACKAGE:
J & N PACKAGE
(Top View)
N Package: Pb-free / RoHS 100% Matte Tin Lead Finish
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
F PACKAGE:
1. COMP
10.VREF
1
2
3
4
5
10
9
8
7
6
2. VFB
9. VCC
3. ISENSE
8. VC
THERMAL RESISTANCE-JUNCTION TO CASE, θJC
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
L PACKAGE:
80°C/W
4. RT/CT
7. OUTPUT
6. GND
5. POWER GND
145°C/W
F PACKAGE
(Top View)
THERMAL RESISTANCE-JUNCTION TO CASE, θJC
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
35°C/W
120°C/W
3
2
1 20 19
1. N.C.
11. N.C.
12. GROUND
13. N.C.
14. N.C.
15. OUTPUT
16. N.C.
17. VCC
Junction Temperature Calculation: TJ = TA + (PD x θJA).
2. COMP
3. N.C.
4. N.C.
5. VFB
The θJA numbers are guidelines for the thermal performance of the device/pc-board
4
18
system. All of the above assume no ambient airflow.
5
6
7
8
17
16
15
14
6. N.C.
7. ISENSE
8. N.C.
9. N.C.
10. RT/CT
18. N.C.
19. N.C.
20. VREF
9
10 11 12 13
L PACKAGE
(Top View)
Copyright © 2000
Rev. 1.6a 10/04
2
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
RECOMMENDED OPERATING CONDITIONS
(Note 3)
Recommended Operating Conditions
Parameter
Symbol
Units
Min.
Typ.
Max.
Supply Voltage Range
Output Current (Peak)
30
1
V
A
Output Current (Continuous)
Analog Inputs (Pin 2, Pin 3)
Error Amp Output Sink Current
Oscillator Frequency Range
Oscillator Timing Resistor
Oscillator Timing Capacitor
Operating Ambient Temperature Range:
SG1842/43
200
mA
V
0
2.6
5
mA
kHz
KΩ
µF
0.1
0.52
0.001
500
150
1.0
RT
CT
-55
-25
0
125
85
°C
°C
°C
SG2842/43
SG3842/43
70
Note 3. Range over which the device is functional.
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, these specifications apply over the operating ambient temperatures for SG1842/SG1843 with -55°C ≤ TA ≤ 125°C, SG2842/
SG2843 with -25°C ≤ TA ≤ 85°C, SG3842/SG3843 with 0°C ≤ TA ≤ 70°C, VCC = 15V (Note 7), RT = 10kΩ, and CT = 3.3nF. Low duty cycle pulse testing
techniques are used which maintains junction and case temperatures equal to the ambient temperature.)
SG1842/43
SG2842/43
SG3842/43
Parameter
Symbol
Test Conditions
Units
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Reference Section
Output Voltage
TJ = 25°C, IO = 1mA
12 ≤ VIN ≤ 25V
1 ≤ IO ≤ 20mA
4.95 5.00 5.05 4.95 5.00 5.05 4.90 5.00 5.10
V
Line Regulation
6
6
20
25
6
6
20
25
6
6
20
25
mV
mV
Load Regulation
0.2 0.4
5.10 4.90
0.2 0.4
5.10 4.82
0.2 0.4 mV/°C
Temperature Stability (Note 4)
Total Output Variation (Note 4)
Output Noise Voltage (Note 4)
Long Term Stability (Note 4)
Output Short Circuit
4.90
5.18
V
Line, Load, Temp.
50
5
50
5
50
5
µV
mV
mA
VN
10Hz ≤ f ≤ 10kHz, TJ = 25°C
TA = 125°C, 1000hrs
25
25
25
-30 -100 -180 -30 -100 -180 -30 -100 -180
Oscillator Section
Initial Accuracy
TJ = 25°C
47
52
0.2
5
57
1
47
52
0.2
5
57
1
47
52
0.2
5
57
1
kHz
%
%
Voltage Stability
12 ≤ VCC ≤ 25V
TMIN ≤ TA ≤ TMAX
VRT/CT (Peak to Peak)
TJ = 25°C
Temperature Stability (Note 4)
Amplitude
1.7
1.7
1.7
V
Discharge Current
7.8 8.3 8.8 7.5 8.4 9.3 7.5 8.4 9.3
7.0 9.0 7.2 9.5 7.2 9.5
mA
mA
TMIN ≤ TA ≤ TMAX
Error Amp Section
Input Voltage
Input Bias Current
Open Loop Gain
Unity Gain Bandwidth (Note 4)
Power Supply Rejection Ratio
Output Sink Current
Output Source Current
VOUT High
VCOMP = 2.5V
2.45 2.50 2.55 2.45 2.50 2.55 2.42 2.50 2.58
V
µA
dB
MHz
dB
mA
mA
V
-0.3 -1
-0.3
90
1
70
6
1
-0.3 -2
AVOL
2 ≤ VO ≤ 4V
TJ = 25°C
65
0.7
60
2
90
1
70
6
65
0.7
60
2
65
0.7
60
2
90
1
70
6
PSRR
12 ≤ VCC ≤ 25V
VVFB = 2.7V, VCOMP = 1.1V
VVFB = 2.3V, VCOMP = 5V
VVFB = 2.3V, RL = 15K to gnd
VVFB = 2.7V, RL = 15K to VREF
-0.5 -0.8
-0.5 -0.8
-0.5 -0.8
5
6
5
6
5
6
0.7 1.1
0.7 1.1
0.7 1.1
V
VOUT Low
(Electrical Characteristics continue next page.)
Copyright © 2000
Rev. 1.6a 10/04
3
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
ELECTRICAL CHARACTERISTICS (Cont'd.)
SG1842/43 SG2842/43
SG3842/43
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Parameter
Symbol
Test Conditions
Units
Current Sense Section
Gain (Notes 5 & 6)
Maximum Input Signal (Note 5)
2.85
0.9
3
1
3.15 2.85
1.1 0.9
3
1
3.15 2.85
1.1 0.9
3
1
3.15
1.1
V/V
V
VCOMP = 5V
Power Supply Rejection Ratio (Note 5) PSRR
Input Bias Current
12 ≤ VCC ≤ 25V
70
-2
70
-2
70
-2
dB
µA
ns
-10
-10
-10
150 300
150 300
150 300
Delay to Output (Note 4)
Output Section
Output Low Level
ISINK = 20mA
0.1 0.4
1.5 2.2
0.1 0.4
1.5 2.2
0.1 0.4
1.5 2.2
V
V
ISINK = 200mA
13 13.5
12 13.5
13 13.5
12 13.5
50 150
50 150
13 13.5
12 13.5
50 150
50 150
V
Output High Level
I
I
SOURCE = 20mA
SOURCE = 200mA
V
ns
ns
50 150
50 150
Rise Time
Fall Time
TJ = 25°C, CL = 1nF
TJ = 25°C, CL = 1nF
Under-Voltage Lockout Section
Start Threshold
1842
1843
1842
1843
15
7.8 8.4 9.0 7.8 8.4 9.0 7.8 8.4 9.0
10 11 10 11 8.5 10 11.5
7.0 7.6 8.3 7.0 7.6 8.2 7.0 7.6 8.2
16
17
15
16
17 14.5 16 17.5
V
V
V
V
9
9
Min. Operation Voltage After Turn-On
PWM Section
Maximum Duty Cycle
Minimum Duty Cycle
93
95 100 90
0
95 100 90
0
95 100
0
%
%
Power Consumption Section
Start-Up Current
Operating Supply Current
VCC Zener Voltage
0.5
11
34
1
17
0.5
11
34
1
17
0.5
11
34
1
17
mA
mA
V
VFB = VISENSE = 0V
ICC = 25mA
∆ VCOMP
Notes: 4. These parameters, although guaranteed, are not 100% tested in
production.
6. Gain defined as: A =
; 0 ≤ V
≤ 0.8V.
ISENSE
∆ V
ISENSE
7. Adjust VCC above the start threshold before setting at 15V.
5. Parameter measured at trip point of latch with VVFB = 0.
Copyright © 2000
Rev. 1.6a 10/04
4
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
BLOCK DIAGRAM
VCC*
34V
UVLO
VREF
5.0V
50mA
5V
S / R
REF
GROUND**
6V (1842)
0.8V (1843)
16V (1842)
8.4V (1843)
INTERNAL
BIAS
2.5V
VREF
GOOD LOGIC
VC*
OSCILLATOR
ERROR AMP
R / CT
T
OUTPUT
S
2R
R
POWER GROUND**
1V
R
PWM
LATCH
VFB
COMP
CURRENT SENSE
COMPARATOR
CURRENT SENSE
- VCC and VC are internally connected for 8 pin packages.
- POWER GROUND and GROUND are internally connected for 8 pin packages.
*
**
Copyright © 2000
Rev. 1.6a 10/04
5
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
GRAPH / CURVE INDEX
FIGURE INDEX
Characteristic Curves
Application Information
FIGURE #
FIGURE #
1. DROPOUT VOLTAGE vs. TEMPERATURE
13. OSCILLATOR TIMING CIRCUIT
2. OSCILLATOR TEMPERATURE STABILITY
14. OSCILLATOR FREQUENCY vs. RT FOR VARIOUS CT
3. CURRENT SENSE TO OUTPUT DELAY vs. TEMPERATURE
4. OUTPUT DUTY CYCLE vs. TEMPERATURE
Typical Applications Section
5. START-UP CURRENT vs. TEMPERATURE
FIGURE #
6. REFERENCE VOLTAGE vs. TEMPERATURE
15. CURRENT SENSE SPIKE SUPPRESSION
16. MOSFET PARASITIC OSCILLATIONS
17. BIPOLAR TRANSISTOR DRIVE
18. ISOLATED MOSFET DRIVE
7. START-UP VOLTAGE THRESHOLD vs. TEMPERATURE
8. START-UP VOLTAGE THRESHOLD vs. TEMPERATURE
9. OSCILLATOR DISCHARGE CURRENT vs. TEMPERATURE
10. OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT AND
19. ADJUSTABLE BUFFERED REDUCTION OF CLAMP LEVEL WITH
TEMPERATURE (SINK TRANSISTOR)
SOFTSTART
11. CURRENT SENSE THRESHOLD vs. ERROR AMPLIFIER OUTPUT
20. EXTERNAL DUTY CYCLE CLAMP AND MULTI-UNIT
12. OUTPUT SATURATION VOLTAGE vs. OUTPUT CURRENT AND
SYNCHRONIZATION
TEMPERATURE (SOURCE TRANSISTOR)
21. OSCILLATOR CONNECTION
22. ERROR AMPLIFIER CONNECTION
23. SLOPE COMPENSATION
24. OPEN LOOP LABORATORY FIXTURE
25. OFF-LINE FLYBACK REGULATOR
Copyright © 2000
Rev. 1.6a 10/04
6
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
CHARACTERISTIC CURVES
FIGURE 1. — DROPOUT VOLTAGE vs. TEMPERATURE
FIGURE 2. — OSCILLATOR TEMPERATURE STABILITY
2
0
V = 15V
IN
10.0
Duty Cycle = 50%
SG1842
-2
-4
-6
9.6
9.2
8.8
-8
8.4
8.0
-10
SG1843
-75
-50
-25
0
25
50
75
100
125
-75
-50
-25
0
25
50
75
100
125
Junction Temperature - (°C)
Junction Temperature - (°C)
FIGURE 3. — CURRENT SENSE TO OUTPUT DELAY vs.
FIGURE 4. — OUTPUT DUTY CYCLE vs. TEMPERATURE
TEMPERATURE
200kHz
50
220
49
200
180
100kHz
50kHz
50kHz
48
47
46
45
44
VPIN3 = 1.1V
160
100kHz
200kHz
140
120
-75
-50
-25
0
25
50
75
100
125
-75
-50
-25
0
25
50
75
100
125
Junction Temperature - (°C)
Junction Temperature - (°C)
Copyright © 2000
Rev. 1.6a 10/04
7
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
CHARACTERISTIC CURVES
FIGURE 5. — START-UP CURRENT vs. TEMPERATURE
FIGURE 6. — REFERENCE VOLTAGE vs. TEMPERATURE
5.02
0.7
5.01
SG1842
VCC = 15V
0.6
5.00
4.99
4.98
0.5
0.4
0.3
SG1843
0.2
-75
-50
-25
0
25
50
75
100
125
-75
-50
-25
0
25
50
75
100
125
Junction Temperature - (°C)
Junction Temperature - (°C)
FIGURE 7. — START-UP VOLTAGE THRESHOLD vs.
FIGURE 8. — START-UP VOLTAGE THRESHOLD vs.
TEMPERATURE
TEMPERATURE
16.08
8.32
SG1843
16.06
8.30
SG1842
8.28
8.26
8.24
8.22
8.20
8.18
16.04
16.02
16.00
15.98
-75
-50
-25
0
25
50
75
100
125
-75
-50
-25
0
25
50
75
100
125
Junction Temperature - (°C)
Junction Temperature - (°C)
Copyright © 2000
Rev. 1.6a 10/04
8
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
CHARACTERISTIC CURVES
FIGURE 9. — OSCILLATOR DISCHARGE CURRENT vs.
FIGURE 10. — OUTPUT SATURATION VOLTAGE vs.
TEMPERATURE
OUTPUT CURRENT & TEMPERATURE
8.2
8.0
7.8
7.6
2.5
2.0
-55°C
+25°C
1.5
+125°C
1.0
V
= 15V
IN
Duty Cycle < 5%
7.4
7.2
0.5
0
-75
-50
-25
0
25
50
75
100
125
100
200
300
400
500
Junction Temperature - (°C)
Output Current - (mA)
FIGURE 11. — CURRENT SENSE THRESHOLD vs.
FIGURE 12. — OUTPUT SATURATION VOLTAGE vs.
ERROR AMPLIFIER OUTPUT
OUTPUT CURRENT & TEMPERATURE
1.0
0.9
0.8
V
= 15V
IN
4.0
3.0
2.0
Duty Cycle < 5%
C
°
0.7
0.6
0.5
0.4
0.3
0.2
C
°
C
°
125
25
-55
C
°
-55
1.0
0
0.1
0
1.0
2.0
3.0
4.0
5.0
100
200
300
400
500
Error Amp Output Voltage - (V)
Output Current - (mA)
Copyright © 2000
Rev. 1.6a 10/04
9
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
APPLICATION INFORMATION
OSCILLATOR
The oscillator of the 1842/43 family of PWM's is designed such
that many values of RT and CT will give the same oscillator
frequency, but only one combination will yield a specific duty
cycle at a given frequency.
A set of formulas are given to determine the values of RT and
CT for a given frequency and maximum duty cycle. (Note: These
formulas are less accurate for smaller duty cycles or higher
frequencies. This will require trimming of RT or CT to correct for
this error.)
Given: Frequency ≡ f
Example:
Maximum Duty Cycle ≡ Dm
A Flyback power supply requires a maximum of 45% duty
cycle at a switching frequency of 50kHz. What are the values
of RT and CT?
(1.76)1/D -1
m
Calculate: R = 267
(Ω)
Given: f = 50kHz
Dm = 0.45
)/D
(1.76)(1-D
- 1
T
m
m
(1.76)1/.045 -1
(1.76).55/.45 - 1
where .3 < Dm < .95
Calculate: RT = 267
= 674Ω
1.86
D
1.86 0.45
*
m
*
CT =
(µF)
CT =
= .025µF
f
R
50000 674
*
T
*
1000
For Duty-Cycles above 95% use:
VREF
100
R
T
R / CT
T
10
CT
GND
1
.001
.002
.005
.01
.02
.05
0.1
1.86
RTCT
F ≈
where RT ≥ 5kΩ
CT Value - (µF)
FIGURE 14 — OSCILLATOR FREQUENCY vs. RT FOR VARIOUS CT
FIGURE 13 — OSCILLATOR TIMING CIRCUIT
Copyright © 2000
Rev. 1.6a 10/04
10
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
TYPICAL APPLICATION CIRCUITS
Pin numbers referenced are for 8-pin package and pin numbers in parenthesis are for 14-pin package.
VCC
V
V
VCC
IN
IN
7 (12)
7 (12)
7 (11)
7 (11)
Q1
Q1
R
1
6 (10)
5 (8)
SG1842/ 43
SG1842/ 43 6 (10)
I
PK
R
1.0V
3 (5)
I
=
5 (8)
PK(MAX)
R
S
R
C
S
R
S
3 (5)
FIGURE 16. — MOSFET PARASITIC OSCILLATIONS
FIGURE 15. — CURRENT-SENSE SPIKE SUPPRESSION
The RC low pass filter will eliminate the leading edge current spike
caused by parasitics of Power MOSFET.
A resistor (R1) in series with the MOSFET gate reduce overshoot and
ringing caused by the MOSFET input capacitance and any induc-
tance in series with the gate drive. (Note: It is very important to
have a low inductance ground path to insure correct operation of
the I.C. This can be done by making the ground paths as short and
as wide as possible.)
VCC
V
IN
IB
VC
+
_
»
V
R
IN
2
Isolation
7 (12)
Boundary
VC1
R || R
»
7 (11)
Q1
1
2
VC1
C1
6 (10)
Waveforms
VC
+
7 (11)
6 (10)
SG1842/ 43
0
_
R
2
5 (8)
3 (5)
50% DC
25% DC
Q1
SG1842/ 43
+
R
1
R
0
_
R
NS
NP
S
C
5 (8)
3 (5)
NP
NS
V (PIN 1) - 1.4
3RS
R
S
IPK
=
FIGURE 17. — BIPOLAR TRANSISTOR DRIVE
FIGURE 18. — ISOLATED MOSFET DRIVE
The 1842/43 output stage can provide negative base current to
remove base charge of power transistor (Q1) for faster turn off. This
is accomplished by adding a capacitor (C1) in parallel with a resistor
(R1). The resistor (R1) is to limit the base current during turn on.
Current transformers can be used where isolation is required
between PWM and Primary ground. A drive transformer is then
necessary to interface the PWM output with the MOSFET.
Copyright © 2000
Rev. 1.6a 10/04
11
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
TYPICAL APPLICATION CIRCUITS (continued)
VCC
V
IN
8 (14)
7 (12)
8
4
RA
8 (14)
4 (7)
2 (3)
1 (1)
7 (11)
6
2
Q1
I
SG1842/ 43
555
TIMER
3
4 (7)
6 (10)
5 (8)
SG1842/ 43
R
B
R
2
VCS
MPSA63
1
3 (5)
R
R
1
S
C
5 (9)
5 (9)
To other
SGX842/ 43
R1
VCS
2
IPK
=
Where: VCS = 1.67
and VC.S.MAX = 1V (Typ.)
1.44
R +R
RS
1
f =
f =
(RA + 2RB)C
VEAO - 1.3
R1 R2
tSOFTSTART = -ln 1 -
C
RB
RA + 2RB
R1
R1+R2
5
R1+R2
where; VEAO ≡ voltage at the Error Amp Output under
minimum line and maximum load conditions.
FIGURE 19. — ADJUSTABLE BUFFERED REDUCTION OF CLAMP LEVEL
FIGURE 20. — EXTERNAL DUTY CYCLE CLAMP AND
WITH SOFTSTART
MULTI-UNIT SYNCHRONIZATION
Softstart and adjustable peak current can be done with the external
circuitry shown above.
Precision duty cycle limiting as well as synchronizing several 1842/
1843's is possible with the above circuitry.
5V
8 (14)
2.8V
1.1V
2.5V
SG1842/ 43
0.5mA
R
T
4 (7)
2 (3)
CT
SG1842/ 43
R
i
1 (1)
R
F
Discharge
Current
I = 8.2mA
d
R ꢀ 10K
F
FIGURE 21. — OSCILLATOR CONNECTION
FIGURE 22. — ERROR AMPLIFIER CONNECTION
The oscillator is programmed by the values selected for the timing
components RT and CT. Refer to application information for
calculation of the component values.
Error amplifier is capable of sourcing and sinking current up to 0.5mA.
Copyright © 2000
Rev. 1.6a 10/04
12
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
TYPICAL APPLICATION CIRCUITS (continued)
VCC
V
IN
SG1842/43
7(12)
VO
5V
8(14)
5V
UVLO
S
5V
R
REF
R
T
INTERNAL
BIAS
2.5V
2N222A
VREF
GOOD LOGIC
7(11)
6(10)
R
SLOPE
4(7)
CT
Q1
OSCILLATOR
From VO
C.S.
2R
COMP
R
i
2(3)
1V
ERROR
AMP
R
5(8)
3(5)
PWM
LATCH
R
d
CF
R
F
R
1(1)
C
R
S
5(9)
FIGURE 23. — SLOPE COMPENSATION
Due to inherent instability of current mode converters running above 50% duty cycle, a slope compensation should be added to
either current sense pin or the error amplifier. Figure 23 shows a typical slope compensation technique.
VREF
R
T
VCC
A
SG1842/ 43
2N2222
4.7K
1K
COMP
VREF
1
2
3
4
8
7
6
5
100K
VFB
VCC
0.1µF 0.1µF
ERROR AMP
ADJUST
1K
5K
OUTPUT
4.7K
I
OUTPUT
GROUND
SENSE
I
SENSE
ADJUST
R CT
T
GROUND
CT
FIGURE 24. — OPEN LOOP LABORATORY FIXTURE
High-peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be
connected to pin 5 in a single point ground. The transistor and 5k potentiometer are used to sample the oscillator waveform and apply
an adjustable ramp to pin 3.
Copyright © 2000
Rev. 1.6a 10/04
13
P R O D U C T D A T A B O O K 1 9 9 6 / 1 9 9 7
SG1842/SG1843 Series
C
U R R E N T - M O D E P W M C O N T R O L L E R
P R O D U C T I O N D A T A S H E E T
TYPICAL APPLICATION CIRCUITS (continued)
TI
USD735
4.7W 1W
220µF
250V
0.01pF
400V
5V
2-5A
4700µF
673-3
10V
56kW
1W
1N3613
AC
INPUT
1N3613
16V
SG1842
10µF
20V
20kW
820pF
T1: Coilcraft E - 4140 - b
Primary - 97 turns
single AWG 24
0.01µF
VFB
VCC
2.5kW
Secondary - 4 turns
4 parallel AWG 22
Control - 9 turns
27W
150kW
COMP
OUT
3 parallel AWG 28
3.6kW
20kW
100pF
VREF
1kW
470pF
CUR
SEN
10kW
0.85W
R / CT
T
GND
0.01µF
.0047µF
ISOLATION
BOUNDARY
FIGURE 25. — OFF-LINE FLYBACK REGULATOR
SPECIFICATIONS
Input line voltage:
Input frequency:
90VAC to 130VAC
* This circuit uses a low-cost feedback scheme in which the DC
voltage developed from the primary-side control winding is
sensed by the SG1842 error amplifier. Load regulation is
therefore dependent on the coupling between secondary
and control windings, and on transformer leakage
inductance.
50 or 60Hz
40KHz 10%
25W maximum
5V +5%
2 to 5A
0.01%/V
Switching frequency:
Output power:
Output voltage:
Output current:
Line regulation:
Load regulation:
Efficiency @ 25 Watts,
VIN = 90VAC:
8%/A*
70%
65%
VIN = 130VAC:
Output short-circuit current: 2.5Amp average
Copyright © 2000
Rev. 1.6a 10/04
14
相关型号：
SG3843DM-TR
Switching Controller, Current-mode, 1A, 500kHz Switching Freq-Max, BIPolar, PDSO8, ROHS COMPLIANT, PLASTIC, SOIC-8
MICROSEMI
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