LX1673-09CPW [MICROSEMI]
High Frequency PWM Regulator; 高频PWM稳压器
| 型号： | LX1673-09CPW |
| 厂家： | 
Microsemi |
| 描述： | High Frequency PWM Regulator |
| 文件： | 总13页 (文件大小：287K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LX1673
®
TM
High Frequency PWM Regulator
P
RODUCTION DATA SHEET
KEY FEATURES
DESCRIPTION
Two Independently Regulated
Outputs
Outputs As Low As 0.8V
Generated From An Internal 1%
Reference
Integrated High Current MOSFET
Drivers
300KHz, 600KHz, and 900KHz
High Frequency Operation
Minimizes External Component
Requirements
The LX1673 is a highly integrated
With onboard gate drivers, the switching
power supply controller IC featuring one PWM output is capable of sourcing up to
PWM switching regulator stage with an 15A. The LX1673 also features an
additional onboard linear regulator additional Linear Regulator Controller
driver.
output, which when coupled with an
With several switching frequencies inexpensive MOSFET is capable of
available (up to 900kHz) the LX1673 supplying up to an additional 5A for I/O,
can be optimized for both cost and PCB memory, and other supplies surrounding
space.
Utilizing external com- today’s microprocessor designs.
Each regulator output voltage is
pensation, a wide selection of external
Soft-Start and Power Sequencing
Control
Adjustable Linear Regulator Driver
Output
components can be chosen for use in programmed via a simple voltage-divider
any application while maintaining network.
stable operation.
The LX1673 incorporates a fully is implemented utilizing MOSFET RDS(ON)
programmable soft-start and power impedance. This enables the LX1673 to
sequence capabilities. The LDO and monitor maximum current limit conditions
Integrated hiccup mode current limiting
No current-sense resistors
APPLICATIONS/BENEFITS
PWM have independent enable pins.
without the use of expensive current sense
resistors.
Video Card Power Supplies
PC Peripherals
Computer Add-On Cards
3.3V Power Conversion
DDR Memory Termination
IMPORTANT: For the most current data, consult MICROSEMI’s website: http://www.microsemi.com
PRODUCT HIGHLIGHT
+3.3V
+5V
PWRGD
VOUT1
+12V
+3.3V
+5V
20
19
18
17
16
LDVCC PWGD VC1 TDRV PGND
1
15
14
13
12
LDGD
LDFB
BDRV
2
3
4
5
VCCL
VCC
VS
VOUT2
LDDIS
DGND
AGND
LX1673
+5V
11
CS
DIS
SS
EA+ EA- EAO
10
6
7
8
9
LDDIS
DIS
PACKAGE ORDER INFO
Plastic TSSOP
Plastic MLPQ
20-Pin
Switching
PW
LQ
TA (°C)
20-Pin
Frequency (kHz)
RoHS Compliant / Pb-free RoHS Compliant / Pb-free
-40 to 85
-40 to 85
-40 to 85
300
600
900
LX1673-03CPW
LX1673-06CPW
LX1673-09CPW
LX1673-03CLQ
LX1673-06CLQ
LX1673-09CLQ
Note: Available in Tape & Reel. Append the letters “TR” to the part number. (i.e. LX1673-03CPW-TR)
Copyright © 2004
Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division
Page 1
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
LX1673
®
TM
High Frequency PWM Regulator
P
RODUCTION DATA SHEET
ABSOLUTE MAXIMUM RATINGS
PACKAGE PIN OUT
Supply Voltage (VCC) DC................................................................-0.3V to 5.5V
Supply Voltage (VCC) Transient .........................................................-0.3V to 6V
Driver Supply Voltage (VCCL) DC.....................................................-0.3V to 13V
Driver Supply Voltage (VCCL) Transient............................................-0.3V to 16V
Driver Supply Voltage (VC1) DC.......................................................-0.3V to 19V
Input Voltage (SS/DIS) .....................................................................-0.3V to 5.5V
Output Drive Peak Current Source (HO, LO).......................................1A (500ns)
Output Drive Peak Current Sink (HO, LO) ..........................................1A (500ns)
Operating Temperature Range.........................................................-40°C to 85°C
Maximum Operating Junction Temperature ................................................ 150°C
Storage Temperature Range...........................................................-65°C to 150°C
16
LDGD
LDFB
1
BDRV
VCCL
LDDIS
DGND
AGND
VCC
VS
11 CS
6
Lead Temperature (Soldering 180 seconds) ................................................ 235°C
Package Peak Temp. for Solder Reflow (40 Seconds Maximum Exposure).. 260°C(+0, -5)
LQ PACKAGE
(Top View)
N.C. – No Internal Connection
N/U – Not Used
Note: Exceeding these ratings could cause damage to the device. All voltages are with respect to
RSVD – Do Not Use
Ground. Currents are positive into, negative out of specified terminal
.
20
1
VC1
PGOOD
LDOVCC
LDGD
LDFB
LDDIS
DGND
AGND
DIS
TDRV
The limitation on transient time is thermal and is due to zener diodes on the supply
pins, application of maximum voltages will increase current into that pin and
increase package power dissipation.
PGND
BDRV
VCCL
VCC
VS
CS
EAO
EA-
THERMAL DATA
10
11
EA+
SS
Plastic TSSOP 20-Pin
PW
THERMAL RESISTANCE
-
JUNCTION TO
A
A
MBIENT, θJA
90°C/W
PW PACKAGE
(Top View)
Pb-free 100% Matte Tin Lead Finish
Plastic MLPQ 20-Pin
LQ
35°C/W
THERMAL RESISTANCE-JUNCTION TO
MBIENT, θJA
Junction Temperature Calculation: TJ = TA + (PD x θJC).
The θJA numbers are guidelines for the thermal performance of the device/pc-board system.
All of the above assume no airflow.
Copyright © 2004
Rev 1.0, 3/18/2005
Microsemi
Page 2
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
LX1673
®
TM
High Frequency PWM Regulator
P
RODUCTION DATA SHEET
FUNCTIONAL PIN DESCRIPTION
N
AME
DESCRIPTION
Voltage Feedback – Output voltage is connected through a resistor network to this pin for feedback to set the
desired output voltage of the switching PWM output.
EA-
EAO
EA+
Error Amplifier Output – Sets error amplifier gain and external compensation if used.
Voltage Reference – Connect to the SS pin or any other external voltage. Used in conjunction with EA-, and an
external resistor divider, to set the desired output voltage for the PWM output.
VCC
VCCL
LDFB
CS
IC supply voltage (nominal 5V).
Power supply pin for Low side drivers.
Low Dropout Regulator Voltage Feedback – Sets output voltage of external MOSFET via resistor network.
Over-Current Limit Set – Connecting a resistor between CS pin and the source of the high-side MOSFET sets the
current-limit threshold for the PWM output. A minimum of 1KΩ must be in series with this pin.
PWM Soft-start/Hiccup Capacitor Pin – During start-up, the voltage on this pin controls the output voltage of the
switching regulator. An internal 20K
function. The Soft-start function does not initialize until the supply voltage on VCC exceeds the UVLO threshold.
When an over-current condition occurs, this capacitor is used for the timing of hiccup mode protection.
Ω resistor and the external capacitor set the time constant for soft-start
SS
AGND
DGND
LDGD
PGND
TDRV
BDRV
VC1
Analog ground reference.
Digital ground reference.
Low Dropout Regulator Gate Drive – Connect to gate of external N-Channel MOSFET for linear regulator
function.
MOSFET Driver Power Ground. Connects to the source of the bottom N-channel MOSFETS of the switching
regulator.
High Side MOSFET Gate Driver
Low Side MOSFET Gate Driver
High-Side MOSFET Gate Driver Supply – Connect to separate supply or boot strap supply to ensure proper high-
side gate driver supply voltage.
LDO Disable Input – High disables LDO output. This pin has a 100KΩ pull down resistor.
LDDIS
VS
Voltage reference for Short Circuit Current sense. This pin is also the supply pin for the Current Sense
Comparator. This pin cannot be left floating, if current limit is not used connect to VCC.
Power Good Output – Open drain output, goes high at end of Soft Start and no Fault. Pulls low if any Fault
condition occurs.
PWGD
LDVCC
DIS
LDO VCC Supply – Connect to voltage supply greater than supply rail for LDO MOSFET drain.
PWM Disable Input –High disables the PWM output. This pin has a 80KΩ pull down resistor.
Copyright © 2004
Rev 1.0, 3/18/2005
Microsemi
Page 3
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
LX1673
®
TM
High Frequency PWM Regulator
P
RODUCTION DATA SHEET
ELECTRICAL CHARACTERISTICS
Unless otherwise specified, the following specifications apply over the operating ambient temperature 0°C
otherwise noted and the following test conditions: VCC = 5V, VCCL = 5V, VC1=12V, LDVCC = 12V, TDRV = BDRV = 3000pF Load.
≤
TA
≤
70°C except where
LX1673
Typ
Parameter
SWITCHING REGULATORS
Input Voltage
Symbol
Test Conditions
Units
Min
Max
`
VCC
4.5
5.5
16
V
V
CCL,VC1
ICC
ILDVCC
Operation Current
Static and Dynamic
6
1
mA
mA
V
LDO Operating Current
0.792
0.784
-1
0.8V
0.808
0.816
1
TA=25°C
Reference Voltage
VSS
V
0°C ≤ TA ≤ 70°C
Line Regulation Note 1
Load Regulation Note 1
Dead Time
%
-1
1
3000pF Load 2 Volt Level
All Frequencies
160
150
nS
nS
%
Minimum Pulse Width
Maximum Duty Cycle
Maximum Duty Cycle
Maximum Duty Cycle
ERROR AMPLIFIERS
Input Offset Voltage
DC Open Loop Gain
Unity Gain Bandwidth
High Output Voltage
Low Output Voltage
Input Common Mode Voltage Range
Input Bias Current
LX1673-03 Load = 3000pF
LX1673-06 Load = 3000pF
LX1673-09 Load = 3000pF
85
75
70
%
%
`
VOS
Common Mode Voltage = 1V
-6.0
6.0
mV
dB
MHz
V
70
16
UGBW
VOH
I Source = 2mA
3.8
0.1
5.0
VOL
I Sink = 10uA
100
3.5
mV
V
Input Offset Voltage < 20mV
0 and 3.5 V Common Mode Voltage
100
nA
CURRENT SENSE
`
`
Current Sense Bias Current
Trip Threshold
ISET
VTRIP
TCSD
VCS = VVS – 0.3V , VVS = 5V
Referenced to VS , VVS = 5V
45
50
55
µA
mV
nS
260
300
350
340
Current Sense Delay
Current Sense Comparator
Operating Current
ICS
Current into VS pin
2
5
mA
OUTPUT DRIVERS – N-CHANNEL MOSFETS
Low Side Driver Operating Current
High Side Driver Operating Current
Drive Rise Time, Fall Time
High Level Voltage
IVCCL
IVC1
TRF
VDH
VDL
Static
2.5
3
mA
mA
nS
V
Static
CL = 3000pF
50
10
11
ISOURCE = 20mA, VCCL = 12V
ISINK = 20mA, VCCL = 12V
Low Level Voltage
0.15
0.25
V
OSCILLATOR
`
LX1673-03
LX1673-06
LX1673-09
255
510
765
300
600
900
1.25
345
690
PWM Switching Frequency
Ramp Amplitude
FSW
KHz
VPP
1035
VRAMP
Copyright © 2004
Rev 1.0, 3/18/2005
Microsemi
Page 4
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
LX1673
®
TM
High Frequency PWM Regulator
P
RODUCTION DATA SHEET
ELECTRICAL CHARACTERISTICS (CONTINUED)
Unless otherwise specified, the following specifications apply over the operating ambient temperature 0°C
otherwise noted and the following test conditions: VCC = 5V, VCCL = 5V, VC1=12V, LDVCC = 12V, TDRV = BDRV = 3000pF Load.
≤
TA
≤
70°C except where
LX1673
Typ
Parameter
Symbol
Test Condition
Units
Min
Max
UVLO AND SOFT-START (SS)
`
Start-Up Threshold (VC1, VCCL, LDVCC
)
4.0
4.25
0.1
20
V
V
Start-Up Threshold (VCC
Hysteresis VCC
)
4.0
4.5
V
SS Input Resistance
RSS
KΩ
V
SS Shutdown Threshold
Hiccup Mode Duty Cycle
VSHDN
0.1
10
%
CSS = 0.1µF
LINEAR REGULATOR CONTROLLER
Voltage Reference Tolerance
Source Current
`
`
VLDFB = .8V, COUT = 330µF
VOUT = 10V
2
%
IHDRV
ILDRV
30
mA
mA
Sink Current
VOUT = 0.4V
0.2
DISABLE INPUTS
Threshold
1
V
KΩ
V
PWM Disable
LDO Disable
DIS
Internal Pull down Resistance
Threshold
80
2.5
100
LDDIS
Internal Pull down Resistance
KΩ
POWER GOOD
Drain to Source Voltage
Leakage
I = 3mA
0.4
V
0.05
µA
Note 1: System Specification
Note 2: Low duty cycle pulse testing techniques are used which maintain junction and case temperatures equal to the ambient temperature
Note 3: Functionality over the –40 to 85 deg C operating temperature range is assured by design, characterization, and statistical process
control
Copyright © 2004
Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division
Page 5
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
LX1673
®
TM
High Frequency PWM Regulator
P
RODUCTION DATA SHEET
BLOCK DIAGRAM
RSET
ISET
CS
Vin (5V)
CS Comp
-
IRESET
PWM
R
Q
VC1
+
CIN
L1
VS
VTRIP
ISET
S
Q
V out 1
TDRV
ESR
COUT
EAO
BDRV
PGND
+5V
Comp
+
-
VCCL
Hiccup
-
EA-
+
Amplifier/
Compensation
VREF
+5V
20k
UVLO
Ramp
Oscillator
UVLO
EA+
VCC
LDVCC
S
F
FAULT S
R
5.5V
S
TEMP
SS1
SS
DIS
PWGD
CSS
Figure 1 – Block Diagram of PWM Phase
+12V
+V
LDGD
LDVCC
VREF
16V
VOUT 2
-
LDFB
+5V
LDDIS
Figure 2 – LDO Controller Block Diagram
Copyright © 2004
Rev 1.0, 3/18/2005
Microsemi
Page 6
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
LX1673
®
TM
High Frequency PWM Regulator
P
RODUCTION
D
ATA SHEET
APPLICATION SCHEMATIC
+5
+5
PWM
Vout
PWRGD
+3.3
+12
+5
20
19
18
17
16
LDVCC PWGD VC1 TDRV PGND
1
15
LDGD
LDFB
BDRV
LDO
Vout
2
3
4
5
14
13
12
VCCL
VCC
VS
+5
LDDIS
DGND
AGND
LX1673
11
CS
DIS
SS
EA+ EA- EAO
10
6
7
8
9
LDDIS
DIS
Figure 3 – Schematic with Bootstrap Supply for PWM High Side Drive
+5
+5
PWM
Vout
PWRGD
PWM
Vout
+5
20
19
18
17
16
LDVCC PWGD VC1 TDRV PGND
1
15
LDGD
LDFB
BDRV
LDO
Vout
2
3
4
5
14
13
12
VCCL
VCC
VS
+5
LDDIS
DGND
AGND
LX1673
11
CS
DIS
SS
EA+ EA- EAO
10
6
7
8
9
LDDIS
DIS
Figure 4 – Schematic for 5 Volt only Input
Copyright © 2004
Rev 1.0, 3/18/2005
Microsemi
Page 7
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
LX1673
®
TM
High Frequency PWM Regulator
P
RODUCTION DATA SHEET
THEORY OF OPERATION
When the sensed voltage across RDS(ON) plus the set resistor
exceeds the 300mV, VTRIP threshold, the OCP comparator outputs
a signal to reset the PWM latch and to start hiccup mode. The
soft-start capacitor (CSS) is discharged slowly (10 times slower
than when being charged up by RSS). When the voltage on the SS
pin reaches a 0.1V threshold, hiccup finishes and the circuit soft-
starts again. During hiccup both MOSFETs are held off.
G
ENERAL DESCRIPTION
The LX1673 is a voltage-mode pulse-width modulation
controller integrated circuit. The internal oscillator and ramp
generator frequency is fixed to 300KHz, 600KHz, or 900KHz.
The device has external compensation, for more flexibility of
output current magnitude.
U
NDER
V
OLTAGE
L
OCKOUT (UVLO)
Hiccup is disabled during the soft-start interval, allowing the
circuit to start up with maximum current. If the rate of rise of the
output voltage is too fast, the required charging current to the
output capacitor may be higher than the limit-current. In this case,
the peak MOSFET current is regulated to the limit-current by the
current-sense comparator. If the MOSFET current still reaches its
limit after the soft-start finishes, the hiccup is triggered again.
When the output has a short circuit the hiccup circuit ensures that
the average heat generation in both MOSFETs and the average
current is much less than in normal operation,.
At power up, the LX1673 monitors the supply voltage for
VCC, VCCL, LDVCC and VC1 (there is no requirement for
sequencing the supplies). Before all supplies reach their under-
voltage lock-out (UVLO) thresholds, the soft-start (SS) pin is
held low to prevent soft-start from beginning, the oscillator is
disabled and all MOSFETs are held off. There is an internal
delay that will filter out transients less that 1.5µSec.
SOFT-START
Once the supplies are above the UVLO threshold, the soft-start
Over-current protection can also be implemented using a sense
resistor, instead of using the RDS(ON) of the upper MOSFET, for
greater set-point accuracy.
capacitor begins to be charged by the reference through a 20k
Ω
internal resistor. The capacitor voltage at the SS pin rises as a
simple RC circuit. The SS pin is connected to the error
amplifier’s non-inverting input that controls the output voltage.
The output voltage will follow the SS pin voltage if sufficient
charging current is provided to the output capacitor.
O
SCILLATOR FREQUENCY
An internal oscillator sets the switching frequency at 300kHz,
600kHz, or 900kHz.
The simple RC soft-start allows the output to rise faster at the
beginning and slower at the end of the soft-start interval. Thus,
the required charging current into the output capacitor is less at
the end of the soft-start interval. A comparator monitors the SS
pin voltage and indicates the end of soft-start when SS pin
voltage reaches 95% of VREF
.
O
VER-CURRENT PROTECTION (OCP) AND HICCUP
The LX1673 uses the RDS(ON) of the upper MOSFET, together
with a resistor (RSET) to set the actual current limit point. The
current sense comparator senses the MOSFET current 350nS
after the top MOSFET is switched on in order to reduce
inaccuracies due to ringing. A current source supplies a current
(ISET), whose magnitude is 50µA. The set resistor RSET is
selected to set the current limit for the application. RSET and VS
should be connected directly at the upper MOSFET drain and
source to get an accurate measurement across the low resistance
RDS(ON)
.
Copyright © 2004
Rev 1.0, 3/18/2005
Microsemi
Page 8
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
LX1673
®
TM
High Frequency PWM Regulator
P
RODUCTION DATA SHEET
APPLICATION NOTE
supply, the output capacitor is usually selected for ESR instead of
capacitance or RMS current capability. A capacitor that satisfies
the ESR requirements usually has a larger capacitance and current
capability than strictly needed. The allowed ESR can be found by:
O
UTPUT INDUCTOR
The output inductor should be selected to meet the
requirements of the output voltage ripple in steady-state operation
and the inductor current slew-rate during transient. The peak-to-
peak output voltage ripple is:
ESR×
(
IRIPPLE + ∆I < VEX
)
VRIPPLE = ESR× IRIPPLE
Where IRIPPLE is the inductor ripple current, ∆I is the maximum
load current step change, and VEX is the allowed output voltage
excursion in the transient.
where
VIN − VOUT
D
Electrolytic capacitors can be used for the output capacitor, but
are less stable with age than tantalum capacitors. As they age, their
ESR degrades, reducing the system performance and increasing the
risk of failure. It is recommended that multiple parallel capacitors
be used, so that, as ESR increase with age, overall performance
will still meet the processor’s requirements.
∆I =
×
L
f s
∆I is the inductor ripple current, L is the output inductor value
and ESR is the Effective Series Resistance of the output
capacitor.
There is frequently strong pressure to use the least expensive
components possible; however, this could lead to degraded long-
term reliability, especially in the case of filter capacitors.
Microsemi’s demonstration boards use the CDE Polymer AL-EL
(ESRE) filter capacitors, which are aluminum electrolytic, and
have demonstrated reliability. The OS-CON series from Sanyo
generally provides the very best performance in terms of long term
ESR stability and general reliability, but at a substantial cost
penalty. The CDE Polymer AL-EL (ESRE) filter series provides
excellent ESR performance at a reasonable cost. Beware of off-
brand, very low-cost filter capacitors, which have been shown to
degrade in both ESR and general electrolytic characteristics over
time.
∆I should typically be in the range of 20% to 40% of the
maximum output current. Higher inductance results in lower
output voltage ripple, allowing slightly higher ESR to satisfy the
transient specification. Higher inductance also slows the inductor
current slew rate in response to the load-current step change, ∆I,
resulting in more output-capacitor voltage droop. When using
electrolytic capacitors, the capacitor voltage droop is usually
negligible, due to the large capacitance
The inductor-current rise and fall times are:
∆I
TRISE = L×
(
V − VOUT
)
IN
and
INPUT CAPACITOR
The input capacitor and the input inductor, if used, are to filter
∆I
TFALL = L×
the pulsating current generated by the buck converter to reduce
interference to other circuits connected to the same 5V rail. In
addition, the input capacitor provides local de-coupling for the
buck converter. The capacitor should be rated to handle the RMS
current requirements. The RMS current is:
VOUT
.
The inductance value can be calculated by
VIN − VOUT
∆I
D
IRMS = IL d(1− d)
L =
×
f s
Where IL is the inductor current and d is the duty cycle. The
maximum value occurs when d = 50%, then IRMS =0.5IL. For a 5V
input and output voltages in the range of 2 to 3V, the required RMS
current is very close to 0.5IL.
O
UTPUT CAPACITOR
SOFT-START CAPACITOR
The output capacitor is sized to meet ripple and transient
performance specifications. Effective Series Resistance (ESR) is
a critical parameter. When a step load current occurs, the output
voltage will have a step that equals the product of the ESR and
the current step, ∆I. In an advanced microprocessor power
The value of the soft-start capacitor determines how fast the
output voltage rises and how large the inductor current is required
to charge the output capacitor. The output voltage will follow the
voltage at the SS pin if the required inductor current does not
exceed the maximum allowable current for the inductor.
Copyright © 2004
Rev 1.0, 3/18/2005
Microsemi
Page 9
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
LX1673
®
TM
High Frequency PWM Regulator
P
RODUCTION DATA SHEET
APPLICATION NOTE (CONTINUED)
The SS pin voltage can be expressed as:
current limit set point. If the upper MOSFET on time is less than
350nS and a short circuit condition occurs the duty cycle will
increase, since VOUT will be forced low. The current limit circuit
will be enabled when the upper gate drive exceeds 350nS although
the actual peak current limit value will be higher than calculated
with the above equation.
SSCSS
VSS = V ref
1 − e− t/R
Where RSS and CSS are the soft-start resistor and capacitor.
The current required to charge the output capacitor during the soft
start interval is.
Short circuit protection still exists due to the narrow pulse width
even though the magnitude of the current pulses will be higher than
the calculated value.
dVss
Iout = Cout
dt
If OCP is not desired connect both VSX and VCX to VCC. Do not
leave them floating.
Taking the derivative with respect to time results in
VrefCout
RssCss
SSCSS
Iout =
e−t/R
O
UTPUT DISABLE
The LX1673 PWM MOSFET driver outputs are shut off by
pulling the disable (DIS) pin above 1.2V. There is a 80KΩ pull
and at t=0
VrefCout
RssCss
down resistor on this input.
Imax =
The LDO voltage regulator has its own Disable pin (LDDIS) for
control of this output voltage. Pulling this pin above 3 V disables
the LDO. There is a 100KΩ pull down resistor on this input.
The required inductor current for the output capacitor to follow
the soft start voltage equals the required capacitor current plus the
load current. The soft-start capacitor should be selected to
provide the desired power on sequencing and insure that the
overall inductor current does not exceed its maximum allowable
rating.
P
ROGRAMMING THE OUTPUT VOLTAGE
The output Voltage is sensed by the feedback pin (FBX) which is
compared to a 0.8V reference. The output voltage can be set to any
voltage above 0.8V (and lower than the input voltage) by means of
a resistor divider (see Figure 1).
Values of CSS equal to 0.1µf or greater are unlikely to result in
saturation of the output inductor unless very large output
capacitors are used.
VOUT = VREF (1+ R1/R 2 )
O
VER-CURRENT PROTECTION
Note: This equation is simplified and does not account for error
amplifier input current. Keep R1 and R2 close to 1KΩ (order of
magnitude).
Current limiting occurs at current level ICL when the voltage
detected by the current sense comparator is greater than the
current sense comparator threshold, VTRIP (300mV).
DDR VTT TERMINATION VOLTAGE
ICL × RDS(ON) + ISET × RSET = VTRIP
Double Data Rate (DDR) SDRAM requires a termination
voltage (VTT) in addition to the line driver supply voltage (VDDQ)
and receiver supply voltage (VDD).
So,
VTT for DDR memory can be generated with the LX1673 by
using the positive input of the phase 2 error amplifier RF2 as a
reference input from an external reference voltage VREF which is
defined as one half of VDDQ. Using VREF as the reference input
will insure that all voltages are correct and track each other as
specified in the JEDEC (EIA/JESD8-9A) specification. The phase 2
output will then be equal to VREF and track the VDDQ supply as
required.
VTRIP − ICL × RDS(ON)
300 mV− ICL × RDS(ON)
RSET
=
=
ISET
50µA
Example:
For 10A current limit, using FDS6670A MOSFET (10m
Ω
R
DS(ON)):
0.3 −10× 0.010
RSET
=
= 4KΩ
50×10−6
When an external reference is used the connection between the
error amplifier positive input and the Soft Start pin is lost and Soft
Start will not function. It is recommended that the external
reference voltage have an R-C time constant that will be long
enough to allow the output capacitor to charge slowly.
Note: Maximum RSET is 6KΩ . Any resistor 6KΩ or greater will
not allow startup since ICL will equal zero (50µA x 6KΩ =
300mV).
At higher PWM frequencies or low duty cycles where the upper
gate drive is less than 350nS wide the 350nS delay for current
limit enable may result in current pulses exceeding the desired
See Microsemi Application Note 17 for more details
Copyright © 2004
Rev 1.0, 3/18/2005
Microsemi
Page 10
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
LX1673
®
TM
High Frequency PWM Regulator
P
RODUCTION DATA SHEET
APPLICATION NOTE CONSIDERATIONS
1. The minimum RSET resistor value is 1k ohm for the current
limit sensing. If this resistor becomes shorted, it will do
permanent damage to the IC.
4. . If current limit is not used connect the VS and VC pins
together and to VCC. Do not leave them floating. A floating VS
pin will result in operation resembling a hiccup condition.
2. A resistor has been put in series with the gate of the LDO
pass transistor to reduce the output noise level. The resistor
value can be changed to optimize the output transient
response versus output noise.
3. To delay the turn on of the LDO controller output, a
capacitor should be connected between the LDDIS pin and
the +5volts. The LDDIS input has a 100K pull down
resistor, which keeps the LDO active until this pin is pulled
high. During the power up sequence the capacitor connected
to the LDDIS pin will keep the LDO off until this capacitor,
being charge by the 100K pull down resistor, goes through
the low input threshold level.
Copyright © 2004
Rev 1.0, 3/18/2005
Microsemi
Page 11
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
LX1673
®
TM
High Frequency PWM Regulator
P
RODUCTION DATA SHEET
PACKAGE DIMENSIONS
20-Pin Micro Leadframe Package (MLPQ) Package
LQ
M
ILLIMETERS
INCHES
Dim
D
b
MIN
0.80
0
0.25 REF
0.23
MAX
1.00
0.05
MIN
0.031
0
MAX
0.039
0.002
A
A1
A3
b
L
0.010
0.38
0.009
0.015
D2
E
D
5.00 BSC
0.197
D2
1.25
3.25
0.050
0.128
E
E2
e
5.00 BSC
0.197
E2
e
1.25
3.25
0.050
0.128
0.65 BSC
0.026
L
0.35
0.75
0.014
0.030
A1
A
A3
Note: Dimensions do not include mold flash or protrusions; these shall not exceed 0.155mm(0.006”) on any side. Lead dimension shall
not include solder coverage.
20-Pin Thin Small Shrink Outline (TSSOP)
PW
M
MIN
-
0.05
0.80
0.19
0.09
6.40
6.25
4.30
ILLIMETERS
INCHES
Dim
MAX
1.10
0.15
1.05
0.30
0.20
6.60
6.55
4.50
MIN
-
MAX
0.043
0.006
0.041
0.012
0.008
0.260
0.258
0.177
3
2 1
A
A1
A2
b
c
D
E
E1
0.002
0.031
0.007
0.004
0.252
0.246
0.169
e
E
E1
D
1
A2
A
e
L
0.65 BSC
0.026 BSC
L
SEATING PLANE
c
0.45
0°
0.75
8°
0.018
0°
-
0.030
8°
b
A1
Θ1
*LC
-
0.10
0.004
solder coverage.
Copyright © 2004
Rev 1.0, 3/18/2005
Microsemi
Page 12
Integrated Products Division
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
LX1673
®
TM
High Frequency PWM Regulator
P
RODUCTION DATA SHEET
NOTES
PRODUCTION DATA – Information contained in this document is proprietary to
Microsemi and is current as of publication date. This document may not be modified in
any way without the express written consent of Microsemi. Product processing does not
necessarily include testing of all parameters. Microsemi reserves the right to change the
configuration and performance of the product and to discontinue product at any time.
Copyright © 2004
Rev 1.0, 3/18/2005
Microsemi
Integrated Products Division
Page 13
11861 Western Avenue, Garden Grove, CA. 92841, 714-898-8121, Fax: 714-893-2570
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