LE79555-1BVCT [MICROSEMI]
SLIC, PQFP44,;
| 型号： | LE79555-1BVCT |
| 厂家： | 
Microsemi |
| 描述： | SLIC, PQFP44, |
| 文件： | 总25页 (文件大小：651K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
™
Le79555
Subscriber Line Interface Circuit
VE580 Series
APPLICATIONS
DESCRIPTION
The Le79555 device, part of Legerity’s VoiceEdge™ family
VE580 series of devices, was designed for high-density POTS
applications requiring a power saving, small footprint SLIC
device. The new SLIC device fulfills today's requirements for
POTS linecard markets requiring a balance of high-
performance cost-effective silicon components. The Le79555
device delivers economical linecard solutions by offering power
and space savings to linecard designers. The on-chip
switching regulator allows for power dissipation to be
minimized for the entire system. Another benefit is that the
device is offered in a reduced footprint package type, a 44-pin
TQFP. This small footprint saves designers board space, thus
increasing the density or number of lines on the board.
Ideal for high-density, low-power linecard applications
FEATURES
Control states: Active, Reverse Polarity, Tip Open,
Ringing, Standby, and Open Circuit
Low Standby power
–40 to –58 V battery operation
On-hook transmission
Two-wire impedance set by single external impedance
Programmable constant-current feed
Low Off-Hook Active Overhead Voltage
Programmable loop-detect threshold
Ground-start detector
Legerity offers a range of compatible SLAC™ devices
providing a complete line circuit that can be optimized for
varying requirements. The SLIC device is designed to operate
with a range of SLAC devices from low cost, non-
programmable to more advanced, highly programmable
options viable for a range of applications.
Programmable ring-trip detect threshold
No –5 V supply required
Three on-chip relay drivers and relay snubbers, one
ringing and two general purpose
Tip Open state for ground-start lines
On-chip switching regulator for Low power dissipation
Supports 30 mA for Active, Norma,l and Reverse
Polarity operation
RELATED LITERATURE
080125 SLIC Switcher Circuit Application Note
080725 Le79555 Switching Regulator Applications
080753 Le58QL02/021/031 QLSLAC™ Data Sheet
080754 Le58QL061/063 QLSLAC™ Data Sheet
ORDERING INFORMATION
Standard Packages
Device
Performance Grade/Package
Packing2
BLOCK DIAGRAM
Le79555-1VC
Le79555-1QC
52 dB Pol. Rev., 44-pin TQFP
52 dB Pol. Rev., 32-pin QFN
Tray
Ring Relay Driver
Relay Driver
RINGOUT
RYOUT1
RYOUT2
Le79555-2VC
Le79555-2QC
63 dB Pol. Rev., 44-pin TQFP
63 dB Pol. Rev., 32-pin QFN
Tray
Tray
Tray
A(TIP)
Le79555-3VC
Le79555-3QC
52 dB No Pol. Rev., 44-pin TQFP
52 dB No Pol. Rev., 32-pin QFN
Relay Driver
Le79555-4VC
Le79555-4QC
63 dB No Pol. Rev., 44-pin TQFP
63 dB No Pol. Rev., 32-pin QFN
HPA
C1
C2
C3
Green Packages1
D1
D2
Input Decoder
and Control
Device
Le79555-1BVC
Le79555-1FQC 52 dB Pol. Rev., 32-pin QFN
Performance Grade/Package
52 dB Pol. Rev., 44-pin TQFP
Packing2
HPB
DET
Two Wire
Interface
Ground
Detector
Tray
VTX
RSN
Signal
Transmission
Le79555-2BVC
Le79555-2FQC 63 dB Pol. Rev., 32-pin QFN
Le79555-3BVC 52 dB No Pol. Rev., 44-pin TQFP
Le79555-3FQC 52 dB No Pol. Rev., 32-pin QFN
Le79555-4BVC 63 dB No Pol. Rev., 44-pin TQFP
Le79555-4FQC 63 dB No Pol. Rev., 32-pin QFN
63 dB Pol. Rev., 44-pin TQFP
Tray
Tray
Tray
B(RING)
Off-Hook
Detector
RD
RDC
CAS
VDC
Power Feed
Controller
VREG
DA
Ring-Trip
Detector
DB
1. The green package meets RoHS Directive 2002/95/EC of the
European Council to minimize the environmental impact of
electrical equipment.
L
VBAT
BGND
Switching Regulator
2. For delivery using a tape and reel packing system, add a "T" suffix
to the OPN (Ordering Part Number) when placing an order.
Document ID# 080686 Date:
Aug 29, 2005
1
Rev:
E
Version:
Distribution:
Public Document
TABLE OF CONTENTS
Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Related Literature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Product Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Block Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Two-Wire Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Ground Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Signal Transmission . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Power Feed Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Switching Regulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Input Decoder and Control. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Off-Hook Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Ring-Trip Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Ring Relay Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Relay Driver. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Transmission Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Longitudinal Capability. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Idle Channel Noise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
Insertion Loss and Balance Return Signal. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Line Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Power Supply Rejection Ratio . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Supply Currents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
RFI Rejection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Receive Summing Node (RSN). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Logic Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Logic Output DET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Ring-Trip Detector Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Loop Detector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Relay Driver Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
DC Feed Characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Test Circuit Scenarios. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
APPLICATION CIRCUITS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Line card Parts List . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Physical Dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
44-Pin TQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
32-Pin QFN (8x8). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21
Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Revision C1 to C2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Revision C2 to D1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
Revision D1 to E1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23
2
Le79555 VE580 Series Data Sheet
PRODUCT DESCRIPTION
The Le79555 device is designed for short loop and long loop high-density POTS applications requiring a power saving, small
footprint SLIC. The Le79555 device boasts increased power savings over Legerity's other POTS solutions by using an internal
switching regulator for each channel to enhance system power management. The switching regulator eliminates the need for a
second voltage supply, commonly required for SLIC devices in POTS applications. Such elimination passes on board space and
cost savings to the designers. Thus, the smaller footprint and added features of the Le79555 device allows customers to amortize
the cost of common hardware across more channels and increase the line density per board. Additionally, the Le79555 device
gives line card designers a simple control interface that supports six control states: Active, Ringing, Standby, Disconnect, Reverse
Polarity, and Tip Open. The Le79555 device is a low cost, high performance device providing key features required for POTS
markets worldwide, including: low power dissipation and ground key detection, as well as all of the features offered currently by
Legerity's Transformer SLIC family, Le7920/22.
BLOCK DESCRIPTIONS
Two-Wire Interface
The two-wire interface provides DC current and sends voice signals to a telephone apparatus connected to the line card with a
two-wire line. The two-wire interface also receives the returning voice signals from the telephone.
Ground Detector
The ground detector block performs ground start and ground key detection, as well as automatically detects a ring-ground fault.
Therefore, when the longitudinal current is greater than the ground key detector threshold, IGK, in either Active, Standby, or Tip
Open, the DET will go low. Note that when the device is in Active or Standby, DET may be an indication of off-hook, ground fault,
or both.
Signal Transmission
The RSN input current controls the receive current sent to the two-wire interface. The AC line voltage is sensed by differential
amplifiers between the A and HPA leads, and between HPB and B leads. The outputs of these amplifiers are equal to the AC
metallic components of the line voltages. The transmission circuit also contains a longitudinal feedback circuit to shunt
longitudinal signals to a DC bias voltage. The longitudinal feedback does not affect metallic signals.
Power Feed Controller
The power feed controller has three sections: (1) the battery feed circuit, (2) the reverse polarity circuit, and (3) the bias circuit.
The battery feed circuit regulates the amount of DC current and voltage supplied to the telephone over a wide range of loop
resistance. The reverse polarity circuit provides the capability to reverse the loop current for pay telephone key pad disable and
other applications. The bias circuit provides a reference voltage, which is offset from the subscriber line voltage. The reference
voltage controls the switched mode regulator, which minimizes SLIC power consumption by providing the minimum supply
voltage needed by the line drivers for proper operation.
Switching Regulator
A switching regulator function is implemented on the chip with a few external components. The power feed controller generates
a reference voltage which is the minimum voltage required to feed the output line amplifiers. The efficiency of the switching
regulator (>80%) minimizes both the on-chip power dissipation and the system power dissipation. This is particularly important
for short loops operating at high currents which otherwise cause high power dissipation.
Input Decoder and Control
The input decoder and control block provides a means for a microprocessor or SLAC IC to control such system functions as line
activate, on-hook transmission, ringing, and reverse polarity. The input decoder and control block has TTL-compatible inputs,
which set the operating states of the SLIC. It also provides the supervision signal sent back to the controller.
Off-Hook Detector
The most important loop monitoring function is off-hook detection. The two-wire interface produces a current equal in magnitude
to the loop current divided by a constant, and sends it out on the RD pin. An external resistor and capacitor (RD and CD) connect
the RD pin to ground. The value of the voltage across resistor RD is proportional to the current leaving the RD pin times the value
of RD. The DET pin will show a logic Low when this voltage rises above a threshold.
Le79555 VE580 Series Data Sheet
3
Ring-Trip Detector
During the Ringing state, the DA pin is more positive than the DB pin, and the DET pin will show high to indicate the on hook.
When an off hook condition occurs, the DB pin becomes more positive than the DA pin, and the DET pin will go low to indicate
an off-hook.
Ring Relay Driver
The ring relay driver is active only in the Ringing state.
Relay Driver
A relay driver is activated by logic Low at either input pin, D1, or D2. D1 controls relay driver RYOUT1; D2 controls relay driver
RYOUT2.
4
Le79555 VE580 Series Data Sheet
CONNECTION DIAGRAMS
44 43 42 41 40 39 38 37
36 35 34
RYOUT1
RYOUT2
1
2
33
32
31
30
29
28
27
26
25
24
23
DA
N/C
RD
L
3
VBAT
CHS
QBAT
CHCLK
N/C
4
N/C
HPB
N/C
HPA
N/C
VTX
N/C
RSVD
5
44-Pin TQFP
6
7
8
D2
9
D1
10
11
C1
12 13 14 15 16 17 18 19
20 21 22
32 31
1
30 29
28 27
26 25
24
RYOUT2
L
DA
2
23
N/C
3
4
22
21
VBAT
CHS
RD
HPB
32-Pin QFN
5
6
20
19
QBAT
HPA
VTX
CHCLK
18
D2
D1
RSVD
RSN
7
8
17
Exposed Pad
9
10
11 12
13 14
15 16
Note:
1. Pin 1 is marked for orientation.
2. N/C = No Connect
3. RSVD = Reserved
4. There is VBAT potential on the exposed pad. Do not connect to GND pin.
Le79555 VE580 Series Data Sheet
5
PIN DESCRIPTIONS
Pin Name
Type
Description
AGND/
DGND
Ground
Analog and digital ground.
A(TIP)
BGND
B(RING)
C3–C1
CAS
Output
Ground
Output
Input
Capacitor
Input
Output of A(TIP) power amplifier.
Battery (power) ground.
Output of B(RING) power amplifier.
SLIC control pins. C3 is MSB and C1 is LSB.
Anti-Saturation pin for capacitor to filter reference voltage when operating in anti-saturation region.
(Chopper Clock) Input to switching regulator. f = 200 to 600 kHz.
(Chopper Stabilization) Connection for external stabilization components.
CHCLK
CHS
Input
Relay Driver Control. D1 and D2 control the relay drivers RYOUT1 and RYOUT2. Logic Low on D1
activates the RYOUT1 relay driver. Logic Low on D2 activates the RYOUT2 relay driver.
D2–D1
Input
DA
DB
Input
Input
Negative input to ring-trip comparator.
Positive input to ring-trip comparator.
Hook-switch detector. A logic Low indicates that selected condition is detected. The detect condition is
selected by the logic inputs (C3–C1). The output is open-collector with a built-in 15 kΩ pull-up resistor.
DET
Output
HPA
HPB
Capacitor
Capacitor
A (TIP) side of high-pass filter capacitor.
B (RING) side of high-pass filter capacitor.
(Switching Regulator Power Transistor) Connection point for filter inductor and anode of catch diode.
This pin will have up to 60 V of pulse waveform on it, and it must be isolated from sensitive circuits.
Care must be taken to keep the diode connections short because of the high currents and di/dt.
L
Output
N/C
QBAT
RD
—
Battery
Resistor
No Connect. This pin is not internally connected.
(Quiet Battery) Filtered battery supply for the signal-processing circuits.
Detector threshold set and filter pin.
Connection point for the DC feed current programming network. The other end of the network connects
to the receiver summing node (RSN).
Ring Relay Driver. Open-collector driver with emitter internally connected to BGND.
RDC
Resistor
Output
RINGOUT
Receive Summing Node. In the Active, Reverse Polarity, and Tip Open states, the metallic current
(both AC and DC) between A(TIP) and B(RING) is equal to 500 times the current into this pin. The
networks which program receive gain, two-wire impedance, and feed resistance all connect to this
node.
RSN
Input
RYOUT1
RYOUT2
VBAT
Output
Output
Battery
—
Relay/Switch Driver. Open-collector driver with emitter internally connected to BGND.
Relay/Switch Driver. Open-collector driver with emitter internally connected to BGND.
Most negative battery.
RSVD
This is a reserved pin and must always be left open.
Power
Supply
VCC
VDC
+5 V power supply.
Output
Output that is proportional to the line voltage: VDC = KDC • VAB . KDC is the VDC scale factor.
(Regulated Voltage) Provides internal negative power supply and connection point for inductor, filter
capacitor, and chopper stabilization.
VREG
Input
Transmit Audio. This output is a 0.50 gain version of the A(TIP) and B(RING) metallic voltage. VTX also
sources the two-wire input impedance programming network.
This must be connected to the most negative battery on the SLIC device pin side of DVBH shown on
the test and application circuits.
VTX
Output
Battery
Exposed
Pad
6
Le79555 VE580 Series Data Sheet
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings
Stresses greater than those listed under Absolute Maximum Ratings can cause permanent device failure. Functionality at or
above these limits is not implied. Exposure to absolute maximum ratings for extended periods can effect device reliability.
Storage temperature
–55 to +150ºC
–0.4 to +7.0 V
V
with respect to AGND
CC
V
with respect to AGND:
BAT
Continuous
10 ms
BGND with respect to AGND
A (TIP) or B (RING) to BGND:
Continuous
+0.4 to –70 V
+0.4 to –75 V
+3 to –3 V
V
to +1 V
BAT
10 ms (f = 0.1 Hz)
1 µs (f = 0.1 Hz)
250 ns (f = 0.1 Hz)
–70 to +5 V
–80 to +8 V
–90 to +12 V
±150 mA
50 mA
BGND to +7 V
BGND to +10 V
Current from A (TIP) or B (RING)
RINGOUT/RYOUT1,2 current
RINGOUT/RYOUT1,2 voltage
RINGOUT/RYOUT1,2 transient
DA and DB inputs:
Voltage on ring-trip inputs
Current into ring-trip inputs
C3–C1,D2–D1, CHCLK Input voltage
Maximum power dissipation, continuous,
V
to 0 V
BAT
±10 mA
–0.4 to V
+ 0.4 V
CC
T
= 70°C, No heat sink (See note)
In 44-pin TQFP package
In 32-pin QFN package
A
1.4 W
3.0 W
θ
Thermal Data:
JA
In 44-pin TQFP package
52°C/W typ
In 32-pin QFN package
25° C/W typ
ESD Immunity (Human Body Model)
JESD22 Class 1C compliant
Notes:
Thermal limiting circuitry on-chip will shut down the circuit at a junction temperature of about 165° C. Operation above 145° C junction temper-
ature may degrade device reliability.
The thermal performance of a thermally enhanced package is assured through optimized printed circuit board layout. Specified performance re-
quires that the exposed thermal pad be soldered to an equally sized exposed copper surface, which, in turn, conducts heat through multiple vias
to a large internal copper plane.
Package Assembly
The standard (non-green) package devices are assembled with industry-standard mold compounds, and the leads possess a tin/
lead (Sn/Pb) plating. These packages are compatible with conventional SnPb eutectic solder board assembly processes. The
peak soldering temperature should not exceed 225°C during printed circuit board assembly.
The green package devices are assembled with enhanced environmental compatible lead (Pb), halogen, and antimony-free
materials. The leads possess a matte-tin plating which is compatible with conventional board assembly processes or newer lead-
free board assembly processes. The peak soldering temperature should not exceed 245°C during printed circuit board assembly.
Refer to IPC/JEDEC J-Std-020B Table 5-2 for the recommended solder reflow temperature profile.
Operating Ranges
Legerity guarantees the performance of this device over commercial (0 to 70º C) and industrial (-40 to 85ºC) temperature ranges
by conducting electrical characterization over each range and by conducting a production test with single insertion coupled to
periodic sampling. These characterization and test procedures comply with section 4.6.2 of Bellcore GR-357-CORE Component
Reliability Assurance Requirements for Telecommunications Equipment.
Ambient temperature
–40 to +85°C
4.75 to 5.25 V
V
CC
V
–40 to –58 V
0 V
BAT
AGND
BGND with respect to AGND
Load resistance on VTX to ground
–100 to +100 mV
20 kΩ min
Le79555 VE580 Series Data Sheet
7
SPECIFICATIONS
Refer to Figure 9, on page 16 for the Le79555 test circuit specifications.
Transmission Performance
Description
Two-wire return loss
Analog output (VTX) impedance
Analog (VTX) output offset voltage
Overload level, 2-wire
Test Conditions (See Note 1)
200 Hz to 3.4 kHz
Min
26
Typ
Max
Unit
dB
Note
1, 4
4
1
20
+50
Ω
–50
2.5
1.1
mV
Active state
On hook, RLAC = 600 Ω
2a
2b
Vpk
Overload level
0 dBm
+7 dBm
0dBm, RLAC = 600 Ω
–64
–55
–50
–40
–36
THD (Total Harmonic Distortion)
THD, On hook
5
5
dB
Longitudinal Capability
(See Figure 6.)
Test Conditions
(See Note 1)
Perf.
Description
Grade
Min
Typ
Max
Unit
Note
Normal Polarity:
0ºC to +70ºC
-40ºC to +85ºC
0ºC to +70ºC
-40ºC to +85ºC
Reverse Polarity:
-40ºC to +85ºC
0ºC to +70ºC
-40ºC to +85ºC
Normal Polarity:
0ºC to +70ºC
-40ºC to +85ºC
0ºC to +70ºC
-40ºC to +85ºC
Reverse Polarity:
-40ºC to +85ºC
0ºC to +70ºC
-40ºC to +85ºC
200 Hz to 3.4 kHz
Active state
-2,-4
-2,-4
-1,-3
-1,-3
63
58
52
50
4
4
4
4
Longitudinal to metallic L-T, L-4
200 Hz to 1 kHz
-2
-1
-1
54
52
50
dB
-2,-4
-2,-4
-1,-3
-1,-3
58
53
52
50
4
4
4
4
Longitudinal to metallic L-T, L-4
1 kHz to 3.4 kHz
-2
-1
-1
53
52
50
40
17
Longitudinal signal generation 4-L
Longitudinal current per pin (A or B)
Longitudinal impedance at A or B
27
25
mArms
Ω/pin
4, 8
4
0 to 100 Hz
Idle Channel Noise
Description
Test Conditions (See Note 1)
Min
Typ
7
Max
+10
+12
–80
–78
Unit
Note
R
R
R
R
= 600Ω, 0º to +70ºC
L
C-message weighted noise
dBrnC
= 600Ω, –40º to +85ºC
= 600Ω, 0º to +70ºC
= 600Ω, –40º to +85ºC
L
L
L
4
–83
Psophometric weighted noise
dBmp
8
Le79555 VE580 Series Data Sheet
Insertion Loss and Balance Return Signal
(See Figure 4 and Figure 5.)
Description
Test Conditions (See Note 1)
Min
Typ
Max
Unit
Note
3
3, 4
3
0 dBm, 1 kHz
0 dBm, 1 kHz
0 dBm, 1 kHz
0 dBm, 1 kHz
On hook
0º to +70 ºC
−40º to +85 ºC
0º to +70 ºC
–0.10
–0.15
–6.12
–6.17
–0.35
–6.37
+0.10
+0.15
–5.92
–5.87
+0.35
–5.67
Gain accuracy, 4- to 2-wire
0
Gain accuracy
2- to 4-wire, 4- to 4-wire
–6.02
–6.02
−40º to +85 ºC
3, 4
Gain accuracy, 4- to 2-wire
Gain accuracy, 2- to 4-wire, 4- to 4-wire
3,4
On hook
300 to 3.4 kHz
dB
–0.10
–0.15
–0.10
–0.15
+0.10
+0.15
+0.10
+0.15
3
relative to 1 kHz
0º to +70 ºC
−40º to +85 ºC
0º to +70 ºC
Gain accuracy over frequency
300 to 3.4 kHz
relative to 1 kHz
+3 dBm to –55 dBm
relative to 0 dBm
+3 dBm to –55 dBm
relative to 0 dBm
3, 4
3, 4
3, 4
Gain tracking
−40º to +85 ºC
0 dBm to –37 dBm
+3 dBm to 0 dBm
–0.15
–0.35
+0.15
+0.35
Gain tracking On hook
3,4
Line Characteristics
Description
IL, Short Loops, Active state
Test Conditions (See Note 1)
Min
22.5
20
Typ
24.5
22.5
Max
26.5
Unit
Note
R
= 2010 Ω
IL, Long Loops, Active state
IL, Standby state
ILLIM
L
RL = 2010 Ω
TA = 25 ºC
mA
15
RL = 600 Ω (current limit)
18
30
75
Active, A and B to ground
120
V
DC
-----------
K
=
0.052
42.75
0.055
44
0.058
DC
K
DC (VDC Scaling)
V
AB
RL = 300 to 1500 Ω
Active state
RL = 0
VAB, Open Circuit voltage
V
I , Leakage, Tip Open state
100
56
µA
mA
A
I , Current, Tip Open state
B to GND
15
30
–5
B
RA to BAT = 7 kΩ,
RB to GND = 100 Ω
V , Active state
–7.5
V
4
A
Power Supply Rejection Ratio
Description
Test Conditions (See Note 1)
50 Hz to 3.4 kHz
(VRIPPLE = 100 MV RMS)
50 Hz to 3.4 kHz
Off-hook constant current region
(VRIPPLE = 500 MV PP)
Min
Typ
Max
Unit
dB
Note
V
V
CC, ACTIVE STATE
BAT, ACTIVE STATE
30
40
5
4
28
85
50
CAS pin to V
Effective internal resistance
170
255
kΩ
BAT
Le79555 VE580 Series Data Sheet
9
Power Dissipation
Description
On-hook, Standby state
Test Conditions (See Note 1)
RL = Open
Min
Min
Typ
45
Max
70
Unit
Note
Note
RL = Open
On-hook Active State
Off-hook, Standby state
Off-hook Active State
130
860
350
190
1200
400
mW
Supply Currents
Description
Test Conditions (See Note 1)
Standby State
Typ
2.5
Max
3.2
Unit
Active/Polarity Reversed States
Open Circuit, RL = Open
4.55
2.5
6.0
I
,
CC
On-hook V
supply current
CC
Ringing, RL = Open
6.0
0.65
2.3
mA
Standby State
Active/Polarity Reversed States
Open Circuit, RL = Open
0.9
4.0
I
,
BAT
On-hook V
supply current + V
BAT
REG
0.5
supply current
Ringing, RL = Open
1.5
RFI Rejection
Description
Test Conditions (See Note 1)
100 kHz to 30 MHz, (See Figure 8)
Min
Min
Typ
Max
1.0
Unit
mVrms
Note
4
VAB, RMS
Receive Summing Node (RSN)
Description
Test Conditions (See Note 1)
IRSN = 0 mA
Typ
0
Max
Unit
V
Note
RSN DC voltage
4
RSN impedance
200 Hz to 3.4 kHz
10
20
Ω
Logic Inputs
(C3-C1, D2-D1, and CHCLK)
Description
VIH, Input High voltage
Test Conditions (See Note 1)
Min
2.0
Typ
Typ
Max
Unit
Note
Note
V
VIL, Input Low voltage
0.8
40
I
IH, Input High current
–75
µA
IIL, Input Low current
–400
Logic Output DET
Description
Test Conditions (See Note 1)
Min
Max
Unit
I
I
= 0.3 mA
V
V
OL, Output Low voltage
0.40
OUT
V
= –0.1 mA
OH, Output High voltage
2.4
OUT
Ring-Trip Detector Input
(DA, DB)
Description
Bias Current
Offset voltage
Test Conditions (See Note 1)
Min
–500
–50
Typ
–50
0
Max
Unit
nA
mV
Note
Source resistance = 2 MΩ
+50
6
10
Le79555 VE580 Series Data Sheet
Loop Detector
Description
Test Conditions (See Note 1)
= 35.4 kΩ
Min
9.4
8.8
Typ
11.7
10.4
1.3
Max
14.0
12.0
Unit
Note
R
R
R
Off-hook threshold
D
D
D
= 35.4 kΩ
= 35.4 kΩ
On-hook threshold
Hysteresis
mA
RL from BX to GND
Active, Standby, and Tip open
IGK, Ground-key detector threshold
5
9
13
Relay Driver Output
(RINGOUT, RYOUT1, RYOUT2)
Description
Test Conditions (See Note 1)
IOL = 40 mA
Min
Typ
+0.3
Max
+0.7
100
Unit
V
Note
On voltage
V
OH = +5 V
Off leakage
µA
IZ = 100 µA
IZ = 30 mA
Zener breakover
Zener On voltage
6
7.2
8
V
Figure 1. Relay Driver Schematic
RINGOUT,
RYOUT1, RYOUT2
BGND
1. Unless otherwise noted, R = 600 Ω. Also, refer to the Le79555 device test circuit in Figure 9, on page 16.
L
2.
a) Overload level is defined as THD = 1%.
b) Overload level is defined as THD = 1.5%.
3. Balance return signal is the signal generated at V by V . This specification assumes that the two-wire, AC-load impedance matches
TX RX
the programmed impedance.
4. Not tested in production. This parameter is guaranteed by characterization or correlation to other tests.
5. This parameter is tested at 1 kHz in production. Performance at other frequencies is guaranteed by characterization.
6. Tested with 0 Ω source impedance. 2 MΩ is specified for system design only.
7. Group delay can be greatly reduced by using a ZT network such as that shown in Figure 7. The network reduces the group delay to less
than 2 µs and increases 2WRL. The effect of group delay on line card performance also may be compensated for by synthesizing complex
impedance with the QLSLAC™ device.
8. Minimum current level guaranteed not to cause a false loop detect.
Le79555 VE580 Series Data Sheet
11
Table 1. SLIC Device Decoding
State
C3
0
0
0
0
1
1
1
1
C2
0
0
1
1
0
0
1
1
C1
0
1
0
1
0
1
0
1
Two-Wire Status
DET Output
0
1
2
3
4
5
6
7
Reserved
Reserved
X
X
Active Reverse Polarity (-1, 2 devices)
Loop detector
Ring Ground (see note)
Ring trip
Ring trip
Loop detector
Loop detector
Tip Open
Open Circuit
Ringing
Active
Standby
Note:
Ring ground detection in Tip Open is automatic. If longitudinal current is greater than IGK in Active, Standby, or Tip Open, the DET will go low.
Therefore, if in Active or Standby, DET may be an indication of off hook, ground fault, or both.
Table 2. User-Programmable Components
ZT is connected between the VTX and RSN pins. The fuse resistors are
RF, and Z2WIN is the desired 2-wire AC input impedance. When
computing ZT, the internal current amplifier pole and any external stray
capacitance between VTX and RSN must be taken into account.
ZT = 250(Z2WIN – 2RF)
ZL
500ZT
ZRX is connected from VRX to RSN. ZT is defined above, and G42L is the
desired receive gain. ZL = Load Impedance, AD to BD.
------------
----------------------------------------------------
ZRX
=
•
G42L
ZT + 250(ZL + 2RF)
625
RDC1 + RDC2 = ---------------
ILOOP
RDC1, RDC2, and CDC form the network connected to the RDC pin. RDC1
and RDC2 are approximately equal. I
is the desired loop current in
LOOP
RDC1 + RDC2
-----------------------------------
the constant-current region.
CDC = 1.5 ms •
R
DC1 • RDC2
414
RD
368
RD
0.5 ms
RD
R
D and CD form the network connected from RD to AGND/DGND and IT
IT
= ---------,
IT = ---------,
CD = ------------------
OFF
ON
is the threshold current between on-hook and
off-hook.
(IThreshold on to off hook) (IThreshold off to on hook
)
1
CCAS is the regulator filter capacitor and fc is the desired filter cut-off
frequency.
------------------------------------------
=
CCAS
170 kΩ • 2π • fc
VBAT – 3 V
--------------------------------
=
ISTANDBY
Standby loop current (resistive region).
400 Ω + RL
12
Le79555 VE580 Series Data Sheet
DC FEED CHARACTERISTICS
Figure 2. Load Line (Typical)
50
48
46
44
42
40
38
36
34
32
30
28
26
24
22
20
18
16
14
12
10
8
2
1
6
4
2
0
0
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
Loop Current (mA)
Regions:
625
RDC
1. Constant current region:
VAB = ILRL' = ----------- R L' , where RL' = RL + 2RF
RDC = RDC1 + RDC2
2. Battery tracking anti-sat:
V
= |BAT| − V
− 7.2 V − IL(R /210)
Diode DC
AB
Figure 3. Feed Programming
A (TIP)
RSN
IL
RL
SLIC
RDC1
CDC
RDC2
B (RING)
RDC
Le79555 VE580 Series Data Sheet
13
TEST CIRCUIT SCENARIOS
Figure 4. Two-to-Four-Wire Insertion Loss
A (TIP)
VTX
RL
2
SLIC
VAB
RT
VL
AGND
RSN
RL
2
RRX
B (RING)
IL2-4 = 20 log(V TX / VAB
)
Figure 5. Four-to-Two-Wire Insertion Loss and Balance Return Signal
A (TIP)
VTX
SLIC
VAB
RT
RL
AGND
RSN
RRX
B (RING)
VRX
IL4-2 = 20 log(V AB / VRX
)
BRS = 20 log(V TX / VRX
)
Figure 6. Longitudinal Balance
VTX
A (TIP)
1
<<
RL
RL
2
ω
C
SLIC
S1
C
RT
S2
VL
VAB
AGND
RL
2
RRX
B (RING)
RSN
VRX
S2 Open, S1 Closed
S2 Closed, S1Open
L-T Long. Bal. = 20 log(V AB / VL)
L-4 Long. Bal. = 20 log(V TX / VL)
4-L Long. Sig. Gen. = 20 log(V L / VRX)
14
Le79555 VE580 Series Data Sheet
Figure 7. Two-Wire Return Loss
ZD = 600
Ω
A (TIP)
VTX
RT1
75 k
75 k
Ω
Ω
SLIC
R
R
300
Ω
Ω
VM
VS
AGND
RSN
CT1 = 180 pF
RT2
ZIN = 600
Ω
300
B (RING)
ZD: The desired impedance;
eg., the characteristic impedance of the line
RRX = 150 k
Ω
Return loss = –20 log (2V M / VS)
Figure 8. RFI
L1
C1
50
Ω
200
200
Ω
Ω
A (TIP)
RF1
RF2
CAX
33 nF
VAB
B (RING)
50
Ω
HF
GEN
C2
VTX
CBX
33 nF
50
Ω
L2
SLIC device
under test
1.5 Vrms
80% Amplitude
Modulated
100 kHz to 30 MHz
Le79555 VE580 Series Data Sheet
15
Figure 9. Le79555 Engineering Test Circuit
VCC
+5 V
DA
DB
DA
DB
VCC
RD
Le79555
RD
35.4 k
Ω
CAX
VTX
RSN
RDC
VTX
2.2 nF
A (TIP)
A (TIP)
HPA
R
150 kTΩ
RRX
CHP
VRX
220 nF
150 k
Ω
HPB
RDC2
13.02 k
B (RING)
B (RING)
Ω
RDC1
13.02 k
VDC
CBX
2.2 nF
Ω
CDC
220 nF
RINGOUT
VDC
RINGOUT
RYOUT1
RYOUT1
RYOUT2
AGND
RYOUT2
BATTERY
GROUND
D2
D1
C3
C2
C1
D2
BGND
D1
C3
C2
C1
N/C
RSVD
QBAT
DET
ANALOG
GROUND
DET
CAS
CQB
330 nF
CCAS
330 nF
VBAT
CHS
BAT
52 V
DVBH
CV1
-
0.47 µF
IN400x
CHCLK
CHCLK
256 kHz
CCH1
CCH2
15 nF
560 pF
RCH
1.3 k
Ω
VREG
CFIL
0.47 µF
L1
1mH
Low ESR
L
DCHCLK1
MUR120
16
Le79555 VE580 Series Data Sheet
APPLICATION CIRCUITS
RING_SOURCE
RSR
400
RSR3
1.0 M
Ω
Ω
Ω
DA
RSR1
909 k
CSR2
330 nF
RSR4
909 k
Ω
Ω
RSR2
1.0 M
CSR1
330 nF
RS
DB
BGND
+5 VA
DA
DB
DA
DB
VCC
U1
Le79555
RD
35.7 k
CD
15 nF
Ω
RD
VIN #1
CAX
CIN
A (TIP)
F 50
VTX
2.2 nF
100 nF
U2
EDF1DM
A(TIP)
HPA
RTX1
R
Ω
RR
1
2
+
-
-
4
125 k
Ω
CHP
220 nF
-
3
HPB
B(RING)
RF
50
RR
B (RING)
CBX
2.2 nF
U3
Ω
P0640EA70
RRX
VOUT #1
COUT
124 k
Ω
RINGOUT
RSN
RINGOUT
RYOUT1
100 nF
RS
RYOUT1
RYOUT2
RDC1
13 k
RDC2
RYOUT2
Ω
13 k
Ω
RDC
VDC
BATTERY
GROUND
BGND
CDC
VDC
220 nF
N/C
AGND
RSVD
QBAT
ANALOG
GROUND
C7 #1
C6 #1
C5 #1
C4 #1
C3 #1
CD1 #1
D2
D1
C3
C2
C1
CQB
0.33 µF
DVBH
BAT
VBAT
CHS
MUR120
CV1
DET
0.47 µF
CAS
CCH1
15 nF
CCH2
CCAS
330 nF
560 pF
RCH
1.3 k
Ω
VREG
CFIL
0.47 µF
L1
1mH
CHCLK
Clock
CHCLK
L
DCHCLK1
MUR120
Note:
1. Protection circuitry does not need to be battery tracking.
2. For CHCLK operation between 190 kHz and 290 kHz, L1 is recommended to be 2 mH. For CHCLK operation between 290 kHz and 600
kHz, L1 is recommended to be 1 mH.
Le79555 VE580 Series Data Sheet
17
+5VD
U4
RPA
10 k
RPB
10 kΩ
Le58QL063
Ω
VIN #1
VOUT #1
CD1 #1
SPARE
C3 #1
VIN #1
VOUT #1
CD1 #1
CD2 #1
C3 #1
DXA/DU
DRA/DD
TSCA
DXA/DU
DRA/DD
To SLIC #1 (U1)
TSCA
DXB
C4 #1
C5 #1
C4 #1
C5 #1
DXB
C6 #1
C6 #1
C7 #1
C7 #1
DRB
DRB
VIN #2
VOUT #2
CD1 #2
SPARE
C3 #2
C4 #2
C5 #2
C6 #2
C7 #2
VIN #3
VOUT #3
CD1 #3
SPARE
C3 #3
C4 #3
C5 #3
C6 #3
VIN #2
VOUT #2
CD1 #2
CD2 #2
C3 #2
C4 #2
C5 #2
C6 #2
C7 #2
VIN #3
VOUT #3
CD1 #3
CD2 #3
C3 #3
C4 #3
C5 #3
C6 #3
TSCB
TSCB
FS/FSC
FS/FSC
PCLK/DCL
MCLK/E1
DCLK/S0
CS/PG
DIO/S1
INT
To SLIC #2
PCLK/DCL
MCLK/E1
DCLK/S0
CS/PG
DIO/S1
To SLIC #3
INT
C7 #3
C7 #3
RST
RST
VIN #4
VOUT #4
CD1 #4
SPARE
C3 #4
VIN #4
VOUT #4
CD1 #4
CD2 #4
C3 #4
To SLIC #4
C4 #4
C5 #4
C6 #4
C4 #4
C5 #4
C6 #4
DIGITAL
GROUND
C7 #4
C7 #4
+5VD
CHCLK
+5V
CHCLK
ANALOG
GROUND
VCCA
VREF
VCCD
DGND
CREF
0.1 µF
AGND
18
Le79555 VE580 Series Data Sheet
LINE CARD PARTS LIST
The following list defines the parts and part values required to meet target specification limits for one channel.
Item
CCH2
Quantity
Type
Capacitor (COG)
Value
560 pF
Tol.
5%
Rating
50 V
Comments
Note
1
CAX, CBX
CCH1
CHP
CDC
CCAS
CQB
CV1
2
1
1
1
1
1
1
1
1
1
1
Capacitor (X7R)
Capacitor (X7R)
Capacitor (X7R)
Capacitor (X7R)
Capacitor (X7R)
Capacitor (X7R)
Capacitor (X7R)
Capacitor (Low ESR)
Capacitor (X7R)
Resistor Hybrid
AXIAL/SMT
2200 pF
15 nF
220 nF
220 nF
330 nF
330 nF
470 nF
470 nF
15 nF
50
20%
10%
20%
20%
20%
20%
20%
20%
10%
1%
100 V
50 V
100 V
16 V
100 V
100 V
100 V
100 V
16 V
CFIL
CD
RF
RCH
1.3 k
1%
0.1 W
0.1 W
RDC1,
2
SMT
13.0 k
1%
RDC2
RD
RT
RRX
1
1
1
SMT
SMT
SMT
35.7 k
124 k
124 k
1%
1%
1%
0.1 W
0.1 W
0.1 W
DVBH
,
MUR 120 (D0-41)
DIODE
1 A,
100 V
2
DCHCLK1
Coiltronics SD25-102
Inductor
Sidactor P0640EA70
Diode Bridge
EDF1DM
1
1
1
1.0 mH
(20 > R > 5)
100 mA
L1
U3
U2
U1
U4
1
1
Le79555
Le58QL063
C
CREF
IN, COUT
,
3
Capacitor (X7R)
100 nF
20%
16 V
RPA, RPB
RSR2, RSR3
2
2
2
2
1
SMT
10 k
1 M
1%
1%
0.25 W
0.25 W
0.25 W
100 V
SMT
RSR4, RSR1
SMT
909 k
330 nF
400
1%
CSR1, CSR2
RSR
Capacitor (X7R)
Resistor Hybrid
20%
1%
Le79555 VE580 Series Data Sheet
19
PHYSICAL DIMENSIONS
44-Pin TQFP
TQFP 044
Dwg rev. AS; 08/00
TQFP 044
Note:
BSC is an ANSI standard for basic centering. Dimensions are measured in millimeters.
20
Le79555 VE580 Series Data Sheet
32-Pin QFN (8x8)
32 Lead QFN with Chamfer
32 LEAD QFN
NOTES:
Symbol
Min
0.80
Nom
0.90
Max
1.00
1. Dimensioning and tolerancing conform to ASME Y14.5M-1994.
2. All dimensions are in millimeters.
3. N is the total number of terminals.
4. The Terminal #1 identifier and terminal numbering convention
shall conform to JEP 95-1 and SSP-012. Details of the Terminal #1
identifier are optional, but must be located within the zone
indicated. The Terminal #1 identifier may be either a mold or
marked feature.
is in degrees.
0.57 REF
0.23
0.28
5.90
5.90
0.63
0.05
0.18
5.70
5.70
0.43
0.00
8.00
BSC
5.80
8.00 BSC
5.80
0.80 BSC
5. Coplanarity applies to the exposed pad as well as the terminals.
6. Reference Document: JEDEC MO-220.
7. Lead width deviates from the JEDEC MO-220 standard.
0.53
32
0.02
REF
0.20
0.20
0.10
0.10
Le79555 VE580 Series Data Sheet
21
REVISION HISTORY
Revision A to B
•
•
Updated document format.
In the "Features" section, the following changes were made:
–
–
–
Removed "(45 mW)" from Low standby power (since it’s already in the specification).
Changed battery voltage range from −16 V to −58 V to −40 V to −58 V.
Removed "(6.5 V)" from Low Off-Hook Active Overhead Voltage.
•
•
In "Related Literature", added the "Introduction to the SLIC Family" application note.
Added the 32-pin PLCC information to the Ordering Information and Absolute Maximum Ratings sections and added the
connection diagram.
•
•
•
Updated the Connection Diagram.
Updated the Pin Description table to correct inconsistencies; added range for CHCLK.
In the Electrical Characteristics table:
–
–
Updated the information in the Line Characteristics section on the Long Loops row and the VDC Accuracy row.
Deleted the Disconnect state information in the Power Dissipation and Supply Currents sections.
•
In "Specifications", the following changes were made:
–
Added a column for performance grade in the Longitudinal Capability and Insertion Loss and Balance Return Signal
tables.
–
–
–
–
–
Changed test circuit reference in the Longitudinal Capability table
Updated the Insertion Loss and Balance Return Signal table.
In the Line Characteristics table, IL Standby state test conditions, changed the equation to RL = 2.5 k.
In the Line Characteristics table, added spec for Overhead Voltage.
Made changes to test conditions for IL, Long Loops, Active State; KDC (VDC Accuracy); VAB, Open Circuit voltage in
the Line Characteristics table.
–
Added value for CHCLK in Note 1.
•
•
In the "DC Feed Characteristics" section, revised equations in notes and updated DC Feed Characteristics graphic.
Changed the equation for ZRX in the User-Programmables table
•
•
•
Updated Engineering Test Circuit and Application Circuit graphics; added graphic for U4/Am79Q063
Added Linecard Parts List page
The physical dimension (PQT044) was added to the Physical Dimension section.
Revision B to C
•
•
•
•
•
•
•
Removed current gain feature from the "Features" section
Updated "Related Literature" section to include the QLSLAC data sheets
In the "Ordering Information" table, added dashes before performance grades
Removed package graphic from "Ordering Information" section
Added OPNs for the QFN package in "Ordering Information"; added note regarding markings on QFN packages
Edited "Block Descriptions" section
In "Connection Diagrams," added pinout diagram for 32-pin QFN package; added notes regarding exposed pad and RSVD
pin
•
In the "Pin Descriptions" table, the following edits were made:
–
–
–
–
–
–
Updated the Pin Description table to correct inconsistencies
Edited the description of the RSN pin
Added range for CHCLK
Made minor edits to RSVD description
Added a sentence to the description for VDC
Added a row to describe the exposed pad
•
In "Electrical Characteristics", "Absolute Maximum Ratings" table, the following was added:
–
–
Max power dissipation of 3.0 W for 32-pin QFN package
Thermal data for 32-pin QFN package
•
Added a note regarding maximum power dissipation values under the Absolute Maximum Ratings table
22
Le79555 VE580 Series Data Sheet
•
•
In the "Operating Ranges" table, changed the ambient temperature range to −40º to 85º C
In "Specifications," the following changes were made:
–
–
–
–
"Transmission Performance" table, Overload level, edited test conditions; changed Min to 1.1; changed units to Vpk.
"Transmission Performance" table, THD, On-hook, edited test conditions; changed units to dB
"Longitudinal Capability" table, Longitudinal current per pin (A or B), added Note 4 to Note column
"Insertion Loss and Balance Return Signal" table, Gain Accuracy, 2-to-4 and 4-to-4 wire, changed Max from -5.82 to -
5.87
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
"Insertion Loss and Balance Return Signal" table, deleted the Group delay row
"Line Characteristics" table, changed KDC (VDC Accuracy) to KDC (VDC Scaling)
"Line Characterisitcs" table, IL, Long Loops, Active state, edited the test conditions
"Line Characterisitcs" table, KDC (VDC Scaling), edited the test conditions
"Power Dissipation" table, changed the description "On-hook, Active, Polarity Reversal state" to "On-Hook Active state"
"Power Dissipation" table, Changed Max value of Off-hook Active State from 380 mW to 400 mW
"Supply Currents" table, added RL = Open to Open Circuit and Ringing test conditions; deleted references to Note 4
"Power Dissipation" table, On-hook Standby and On-hook Active, added RL = Open to test conditions
Changed "Power Supply Rejection Ratio" to "Power Supply Rejection Ratio at the Two-Wire Interface"
"Power Dissipation" table, On-hook, Standby state, changed Max from 60 to 70
"Logic Inputs" table, added CHCLK as an input
"Logic Inputs" table, edited description of VIH, Input High Voltage
"Logic Inputs" table, deleted row for VIH, C3, CHCLK
"Logic Inputs" table, edited description of VIL
"Logic Output DET" table, edited test conditions
"Loop Detector" table, changed "On threshold" to "Off-hook threshold"
"Loop Detector" table, changed "Off threshold" to "On-hook threshold"
Extensively edited Note 1; removed Figure 2, "AC Input Impedance Programming Network"
•
•
Made minor formatting edits to SLIC Device Decoding table
In "User-Programmable Components", the following changes were made:
–
–
Edited equations for ITON and ITOFF
Edited equation for ZRX and CCAS
.
•
•
In "DC Feed Characteristics", edited Note 2
In "Test Circuit Scenarios", the following changes were made:
–
–
–
–
–
Edited title of graphic "Four-to-Four-Wire Insertion Loss and Balance Return Signal"
Modified Longitudinal Balance graphic
Modified Two-Wire Return Loss graphic (changed CT1 from 120 pF to 180 pF)
Modified RFI graphic
Modified Le79555 test circuit graphic
•
•
•
Modified Application Circuit graphic
Added Note 2 to "Application Circuit" section
Updated Linecard Parts List to reflect the updated application circuit
Revision C1 to C2
•
Formatting updates made
Revision C2 to D1
•
•
Added green package OPNs to Ordering Information, on page 1
Added Package Assembly, on page 7
Revision D1 to E1
•
•
Added "Packing" column and Note 2 to Ordering Information, on page 1
Updated 32QFN drawing in Physical Dimensions, on page 20
Le79555 VE580 Series Data Sheet
23
The contents of this document are provided in connection with Legerity, Inc. products. Legerity makes no representations or warranties with respect to the accuracy
or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No
license, whether express, implied, arising by estoppel or otherwise, to any intellectual property rights is granted by this publication. Except as set forth in Legerity's
Standard Terms and Conditions of Sale, Legerity assumes no liability whatsoever, and disclaims any express or implied warranty, relating to its products including,
but not limited to, the implied warranty of merchantability, fitness for a particular purpose, or infringement of any intellectual property right.
Legerity's products are not designed, intended, authorized or warranted for use as components in systems intended for surgical implant into the body, or in other
applications intended to support or sustain life, or in any other application in which the failure of Legerity's product could create a situation where personal injury,
death, or severe property or environmental damage may occur. Legerity reserves the right to discontinue or make changes to its products at any time without notice.
© 2005 Legerity, Inc.
All rights reserved.
Trademarks
Legerity, the Legerity logo and combinations thereof, SLAC, QLSLAC, WinSLAC, and VoiceEdge are trademarks of Legerity, Inc.
Other product names used in this publication are for identification purposes only and may be trademarks of their respective companies.
24
Le79555 VE580 Series Data Sheet
TM
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