1104B100M00000AA [MICROSEMI]
ACMOS Output Clock Oscillator, 100MHz Nom, FLAT PACK, 20 PIN;
| 型号： | 1104B100M00000AA |
| 厂家： | 
Microsemi |
| 描述： | ACMOS Output Clock Oscillator, 100MHz Nom, FLAT PACK, 20 PIN |
| 文件： | 总35页 (文件大小：950K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
REV
O
DESCRIPTION
DATE
4/2/19
PREP
SM
APPD
LT/DF
CO-29999
EXAMPLES SHOWN IN ACTUAL SIZE
Oscillator Specification, Hybrid Clock
Hi-Rel Standard
MOUNT HOLLY SPRINGS, PA 17065
THE RECORD OF APPROVAL FOR THIS
DOCUMENT IS MAINTAINED ELECTRONICALLY
WITHIN THE ERP SYSTEM
CODE IDENT NO SIZE DWG. NO.
REV
OS-68338
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00136 A
UNSPECIFIED TOLERANCES: N/A
SHEET 1 0F 35
MICROCHIP CONFIDENTIAL
1.
SCOPE
1.1
General. This specification defines the design, assembly and functional evaluation of high
reliability, hybrid clock oscillators produced by Vectron. Devices delivered to this specification
represent the standardized Parts, Materials and Processes (PMP) Program developed,
implemented and certified for advanced applications and extended environments.
1.2
Applications Overview. The designs represented by these products were primarily developed
for the MIL-Aerospace community. The lesser Design Pedigrees and Screening Options
imbedded within OS-68338 bridge the gap between Space and COTS hardware by providing
custom hardware with measures of mechanical, assembly and reliability assurance needed for
Military or Ruggedized COTS environments.
2.
APPLICABLE DOCUMENTS
2.1
Specifications and Standards. The following specifications and standards form a part of this
document to the extent specified herein. The issue currently in effect on the date of quotation
will be the product baseline, unless otherwise specified. In the event of conflict between the
texts of any references cited herein, the text of this document shall take precedence.
Military
MIL-PRF-55310
MIL-PRF-38534
Oscillators, Crystal Controlled, General Specification For
Hybrid Microcircuits, General Specification For
Standards
MIL-STD-202
MIL-STD-883
Test Method Standard, Electronic and Electrical Component Parts
Test Methods and Procedures for Microelectronics
Other
DOC007131
QSP-90100
DOC011627
DOC203982
QSP-91502
Test Specification, OS-68338 Hybrids, Hi-Rel Standard
Quality Systems Manual, Vectron
Identification Common Documents, Materials and Processes, Hi-Rel XO
DPA Specification
Procedure for Electrostatic Discharge Precautions
3.
GENERAL REQUIREMENTS
3.1
Classification. All devices delivered to this specification are of hybrid technology conforming
to Type 1, Class 2 of MIL-PRF-55310. Primarily developed as a Class S equivalent
specification, options are imbedded within it to also produce Class B, Engineering Model and
Ruggedized COTS devices. Devices carry a Class 2 ESDS classification per MIL-PRF-38534.
3.2
Item Identification. External packaging choices are of metal flatpacks, DIP’s and ceramic J-
lead 9x14mm and LCC’s with either TTL or ACMOS logic output. Unique Model Number
Series’ are utilized to identify device package configurations and output logic as listed in Table
1.
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3.3
3.4
Absolute Maximum Ratings.
a. Supply Voltage Range (VCC):
b. Storage Temperature Range (TSTG):
c. Junction Temperature (TJ):
d. Lead Temperature (soldering, 10 seconds):
e. Output Source/Sink Current:
-0.5Vdc to +7.0Vdc
-65°C to +125°C
+175°C
+300°C
70 mA
Design, Parts, Materials and Processes, Assembly, Inspection and Test.
3.4.1 Design. The ruggedized designs implemented for these devices are proven in military and
space applications under extreme environments. All designs (except Model 1157) utilize a 4-
point crystal mount in compliment with Established Reliability (MIL-ER) componentry. The
Model 1157 utilizes a 3-point crystal mount and replaces the Model 1118 which utilized a 2-
point crystal mount. When specified, radiation hardening up to 100krad (Si) (RHA level R) can
be included without altering the device’s internal topography.
3.4.1.1 Design and Configuration Stability. Barring changes to improve performance by reselecting
passive chip component values to offset component tolerances, there will not be fundamental
changes to the design or assembly or parts, materials and processes after first product delivery
of that item without written approval from the procuring activity.
3.4.1.2 Environmental Integrity. Designs have passed the environmental qualification levels of MIL-
PRF-55310. These designs have also passed extended dynamic levels of at least:
a. Sine Vibration: MIL-STD-202, Method 204, Condition G (30g pk.)
b. Random Vibration: MIL-STD-202, Method 214, Condition II-J (43.92g rms, three-
minute duration in each of three mutually perpendicular directions)
c. Mechanical Shock: MIL-STD-202, Method 213, Condition F (1500g, 0.5ms)
3.4.2 Prohibited Parts, Materials and Processes. The items listed are prohibited for use in high
reliability devices produced to this specification.
a. Gold metallization of package elements without a barrier metal.
b. Zinc chromate as a finish.
c. Cadmium, zinc, or pure tin external or internal to the device.
d. Plastic encapsulated semiconductor devices.
e. Ultrasonically cleaned electronic parts.
f. Heterojunction Bipolar Transistor (HBT) technology.
g. ‘getter’ materials
3.4.3 Assembly. Manufacturing utilizes standardized procedures, processes and verification methods
to produce MIL-PRF-55310 Class S / MIL-PRF-38534 Class K equivalent devices. MIL-PRF-
38534 Group B Option 1 in-line inspection is included on radiation hardened part numbers to
further verify lot pedigree. Traceability of all components and production lots are in
accordance with MIL-PRF-38534, as a minimum. Tabulated records are provided as a part of
the deliverable data package. Devices are handled in accordance with Vectron document QSP-
91502 (Procedure for Electrostatic Discharge Precautions).
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3.4.4 Inspection. The inspection requirements of MIL-PRF-55310 apply to all devices delivered to
this document. Inspection conditions and standards are documented in accordance with the
Quality Assurance, ISO-9001 and AS9100 derived, System of QSP-90100.
3.4.5 Test. The Screening test matrix of Table 5 is tailored for selectable-combination testing to
eliminate costs associated with the development/maintenance of device-specific documentation
packages while maintaining performance integrity.
3.4.6 Marking. Device marking shall be in accordance with the requirements of MIL-PRF-55310.
3.4.7 Ruggedized COTS Design Implementation. Design Pedigree “D” devices (see ¶ 5.2) use the
same robust designs found in the other device pedigrees. They do not include the provisions of
traceability or the Class-qualified componentry noted in paragraphs 3.4.3 and 4.1.
4.
DETAIL REQUIREMENTS
Components
4.1
4.1.1 Crystals. Cultured quartz crystal resonators are used to provide the selected frequency for the
devices. The optional use of Premium Q swept quartz can, because of its processing to remove
impurities, be specified to minimize frequency drift when operating in radiation environments.
In accordance with MIL-PRF-55310, the manufacturer has a documented crystal element
evaluation program.
4.1.2 Passive Components. Passive components will have the same pedigree as the die specified in
paragraph 7.1. When required, Established Reliability (ER) failure level R minimum passive
components are used to the maximum extent possible and procured from QPL suppliers. Lot
evaluations are in accordance with MIL-PRF-38534 or Enhanced Element Evaluation as
specified in Table 7. When used, inductors may be open construction and may use up to 47-
gauge wire.
4.1.3 Class S Microcircuits. Microcircuits are procured from wafer lots that have passed MIL-PRF-
38534 Class K Lot Acceptance Tests for Class S/K active devices. The prescribed die carries a
Class 2 ESDS classification in accordance with MIL-PRF-38534. When optionally specified,
further testing in accordance with MIL-PRF-55310 and MIL-PRF-38534 is performed for
radiation hardness assurance and for Enhanced Element Evaluation as specified in Table 6.
Those microcircuits, identified by a unique part number, are certified for 100krad (Si) total
ionizing dose (TID), RHA level R (2X minimum margin). NSC, as the original 54ACT
designer, rates the SEU LET at >40 MeV and SEL at >120MeV for the FACT™ family (AN-
932). Vectron has conducted additional SEE testing in 2008 to verify this performance since
our lot wafer testing does not include these parameters and determinations.
4.1.3.1 Class B Microcircuits. When specified, microcircuits assembled into OS-68338 Design
Pedigree letters “B” and “C” devices (¶ 5.2a) are procured from wafer lots that have passed
MIL-PRF-55310 element evaluations for Class B devices.
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4.1.4 Packages. Packages are procured that meet the construction, lead materials and finishes as
specified in MIL-PRF-55310. All leads are Kovar with gold plating over a nickel underplate
Package lots are upscreened in accordance with the requirements of MIL-PRF-38534 as
applicable. Vectron will not perform Salt Spray testing as part of MIL-PRF-55310 Group
C/Qualification or MIL-PRF-38534 Package Element Evaluation.
.
4.1.5 Traceability and Homogeneity. All design pedigrees except option D have active device lots
that are traceable to the manufacturer’s individual wafer; all other elements and materials are
traceable to their manufacturer and incoming inspection lots. Design pedigrees E, R, V and X
have homogenous material. In addition, swept quartz crystals are traceable to the quartz bar
and the processing details of the autoclave lot, as applicable.
4.1.6 Enhanced Element Evaluation. When Design Pedigree Option “E” is specified, active and
passive devices with Enhanced Element Evaluation as listed in Table 6 and 7 shall be
implemented for the highest reliability preference.
4.2
Mechanical.
4.2.1 Package Outline. Table 1 links each Hi-Rel Standard Model Number of this specification to a
corresponding package style. Mechanical Outline information of each package style is found in
the referenced Figure.
4.2.2 Thermal Characteristics. The worst-case thermal characteristics of each package style are
found in Table 4.
4.3
Electrical.
4.3.1 Input Power. Devices are available with an input voltage of either +5.0 Vdc ( 10%) or +3.3
Vdc ( 10%). Current is measured, no load, at maximum rated operating voltage.
4.3.2 Temperature Range. Operating range is -55°C to +125°C.
4.3.3 Frequency Tolerance. Initial accuracy at +23°C is 15 ppm maximum. Frequency-Temperature
Stability is 50 ppm maximum from +23°C reference. Frequency-Voltage Tolerance is 4 ppm
maximum.
4.3.4 Frequency Aging. Aging limits, and when tested in accordance with MIL-PRF-55310 Group B
inspection, shall not exceed 1.5 ppm the first 30 days, 5 ppm Year 1 and 2 ppm per year
thereafter.
4.3.4.1 Frequency Aging Duration Option. By customer request, the Aging test may be terminated
after 15 days if the measured aging rate is less than half of the specified aging rate. This is a
common method of expediting 30-Day Aging without incurring risk to the hardware and used
quite successfully for numerous customers. It is based on the ‘least squares fit’ determinations
of MIL-PRF-55310 paragraph 4.8.35. The ‘half the time/half the spec’ limit is generally
conservative as roughly 2/3 of a unit’s Aging deviation occurs within that period of time.
Vectron’s automated aging systems take about 6 data points per day, so a lot of data is
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available to do very accurate projections, much more data than what is required by MIL-PRF-
55310. The delivered data would include the Aging plots projected to 30 days. If the units
would not perform within that limit, then they would continue to full 30-Day term. Please
advise by purchase order text if this may be an acceptable option to exercise as it assists in
Production Test planning.
4.3.5 Operating Characteristics. Symmetrical square wave limits are dependent on the device
frequency and are in accordance with Tables 2 and 2A. Waveform measurement points and
logic limits are in accordance with MIL-PRF-55310. Start-up time is 10.0 msec. maximum.
4.3.6 Output Load. Standard TTL (6 or 10) and ACMOS (10kΩ, 15pF) test loads are in accordance
with MIL-PRF-55310.
5.
QUALITY ASSURANCE PROVISIONS AND VERIFICATION
5.1
Verification and Test. Device lots shall be tested prior to delivery in accordance with the
applicable Screening Option letter as stated by the 15th character of the part number. Table 5
tests are conducted in the order shown and annotated on the appropriate process travelers and
data sheets of the governing test procedure. For devices that require Screening Options that
include MIL-PRF-55310 Group A testing, the Post-Burn-In Electrical Test and the Group A
Electrical Test are combined into one operation.
5.1.1 Screening Options. The Screening Options, by letter, are summarized as:
A
B
C
D
E
F
G
S
X
Modified MIL-PRF-38534 Class K Screening
Modified MIL-PRF-55310 Class B Screening & Group A QCI
Modified MIL-PRF-55310 (Rev E) Class S Screening & Group A QCI
Modified MIL-PRF-38534 Class K Screening & 30-day Aging
Modified MIL-PRF-55310 Class B Screening & Groups A & B QCI
Modified MIL-PRF-55310 (Rev E) Class S Screening & Groups A & B QCI
Modified MIL-PRF-55310 Class B Screening & Post BI Nominal Electricals
MIL-PRF-55310 (Rev F) Class S Screening & Groups A & B QCI
Engineering Model (EM)
5.2
Optional Design, Test and Data Parameters. The following is a list of design, assembly,
inspection and test options that can be selected or added by purchase order request.
a. Design Pedigree (choose one as the 5th character in the part number):
(E) Enhanced Element Evaluation, 100krad Class S die, Premium Q Swept Quartz
(R) Hi-Rel design w/ 100krad Class S die, Premium Q Swept Quartz
(V) Hi-Rel design w/ 100krad Class S die, Non-Swept Quartz
(X) Hi-Rel design w/ Non-Swept Quartz, Class S die
(B) Hi-Rel design w/ Swept Quartz, Class B die
(C) Hi-Rel design w/ Non-Swept Quartz, Class B die
(D) Hi-Rel design w/ Non-Swept Quartz and commercial grade components
b. Input Voltage, (A) for 5.0V, (B) for 3.3V as the 14th character
c. Frequency-Temperature Slew Test
d. Radiographic Inspection
e. Group C Inspection: MIL-PRF-55310, Rev E (requires 8 destruct specimens)
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f. Group C Inspection: MIL-PRF-55310, Rev F (requires 8 destruct specimens, includes
Random Vibration, MIL-STD-883, Method 1014 Leak Test and Life Test)
g. Group C Inspection: In accordance with MIL-PRF-38534, Table C-Xc, Condition PI
(requires 8 destruct specimens – 5 pc. Life, 3 pc. RGA). Subgroup 1 fine leak test to be
performed per MIL-STD-202, Method 112, Condition C.
h. Internal Water-Vapor Content (RGA) samples and test performance
i. MTBF Reliability Calculations
j. Worst Case/Derating Analysis: MIL-HDBK-1547 with Tj Max = +105°C;
Derated Maximum Operating Temp = Tj Max - ∆Tj
k. Deliverable Process Identification Documentation (PID)
l. Customer Source Inspection (pre-crystal mount pre-cap, post-crystal mount pre-cap and
final). Due to components being mounted underneath the crystal blank, the following
model numbers should be considered for pre-crystal mount pre-cap inspection: 1103,
1109, 1115, 1116, 1117, 1119 and 1157.
m. Destruct Physical Analysis (DPA): MIL-STD-1580 with exceptions as specified in
Vectron DOC203982. When ordering destruct specimens for DPA performance on
1157, 1167, 1177 or 1187 platforms, you must order separate destruct specimens for
RGA testing and the balance of DPA due to the likelihood of crystal damage during the
puncturing of the 5x7mm enclosure.
n. Qualification: In accordance with MIL-PRF-55310, Rev E, Table IV (requires 11
destruct specimens).
o. Qualification: In accordance with EEE-INST-002, Section C4, Table 3, Level 1 or 2
(requires 11 destruct specimens)
p. High Resolution Digital Pre-Cap Photographs (20 Megapixels minimum for all devices
except 1157, 1167, 1177 and 1187 which will use 10 Megapixels minimum).
q. Hot solder dip of leads with Sn63/Pb37 solder prior to shipping.
5.2.1 NASA EEE-INST-002. A combination of Design Pedigree R, Option S Screening, and
Qualification per EEE-INST-002, Section C4, Table 3, meet the requirements of Level 1
device reliability. A combination of Design Pedigree B, Option S Screening, and Qualification
per EEE-INST-002, Section C4, Table 3, meet the requirements of Level 2 device reliability.
5.3
Test Conditions. Unless otherwise stated herein, inspections are performed in accordance with
those specified in MIL-PRF-55310 and MIL-PRF-38534, in that order. Process travelers
identify the applicable methods, conditions and procedures to be used. Examples of electrical
test procedures that correspond to MIL-PRF-55310 requirements are shown in Table 3.
5.4
Special Test and Description.
5.4.1 Frequency-Temperature Slew. Frequency-Temperature Slew Test has been developed as an
indicator of higher than normal internal water vapor content. The incremental temperature
sweep from +125°C to -55°C and back to +125°C records output frequency fluctuations
emulating the mass loading of moisture deposited on the crystal blank surface. Though not
replacing a customer’s internal water-vapor content (RGA) requirement, confidence is
increased without destructively testing otherwise good devices.
5.5
Deliverable Data. The manufacturer supplies the following data, as a minimum, with each lot
of devices (except devices with Screening Option X):
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a. Completed assembly and screening lot travelers, including rework history and
Certificate of Conformance.
b. Electrical test variables data, identified by unique serial number.
c. Frequency-Temperature Slew plots, Radiographic films, Group C data and RGA data
as required by purchase order.
d. Traceability, component LAT, enclosure LAT and RLAT (if specifically requested on
the purchase order).
5.6
5.7
Discrepant Material. All MRB authority resides with the procuring activity.
Failure Analysis. Any catastrophic failure (no clocking, no current) at Post Burn-In or after
will be evaluated for root cause. The customer will be notified after occurrence and upon
completion of the evaluation.
6.
PREPARATION FOR DELIVERY
6.1
Packaging. Devices will be packaged in a manner that prevents handling and transit damage
during shipping. Devices will be handled in accordance with MIL-STD-1686 for Class 1
devices.
7.
ORDERING INFORMATION
7.1
Ordering Part Number. The ordering part number is made up of an alphanumeric series of
15 characters. Design-affected product options, identified by the parenthetic letter on the
Optional Parameters list (¶ 5.2a and b), are included within the device part number.
The Part Number breakdown is described as:
1104 R 10M00000 A F
Model # (Table 1)
Design Pedigree
Screening Option
per Table 5, 5.1.1
E = Enhanced Element Evaluation,
100krad Class S die, Swept Quartz
Input Voltage
A= +5.0V
B= +3.3V
R = 100krad Class S die, Swept
Quartz
Frequency
V = 100krad Class S die, Non-Swept
Quartz
X = Class S die, Non-Swept Quartz
B = Class B die, Swept Quartz
C = Class B die, Non-Swept Quartz
D = Ruggedized COTS: Commercial
Grade Components, Non-Swept
Quartz
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7.1.1 Model Number. The device model number is the four (4) digit number assigned to a
corresponding package and output combination per Table 1.
7.1.2 Design Pedigree. Class S variants correspond to either letter “E”, “R”, “V” or “X” and are
described in paragraph 5.2a. Class B variants correspond to either letter “B” or “C” and are
described in paragraph 5.2a. Ruggedized COTS, using commercial grade components,
corresponds to letter “D”.
7.1.2.1 Input Voltage. Voltage is the 14th character, letters “A” representing +5.0V and “B” for +3.3V.
7.1.3 Output Frequency. The nominal output frequency is expressed in the format as specified in
MIL-PRF-55310 utilizing eight (8) characters.
7.1.4 Screening Options. The 15th character is the Screening Option (letter A thru G, S or X) selected
from Table 5.
7.2
Optional Design, Test and Data Parameters. Optional test and documentation requirements
shall be specified by separate purchase order line items (as listed in ¶ 5.2c thru q).
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HI-REL
STANDARD
MODEL #
OUTPUT
Square
Wave
,
PIN I/O 1/
MECHANICAL
OUTLINE
PACKAGE
Vcc
Out Gnd/ E/D
Case 2/
FIGURE 1
FIGURE 2
FIGURE 3
FIGURE 5
FIGURE 6
FIGURE 4
FIGURE 7
FIGURE 8
FIGURE 9
FIGURE 10
FIGURE 11
FIGURE 12
FIGURE 13
FIGURE 14
FIGURE 15
FIGURE 1
FIGURE 2
FIGURE 3
FIGURE 5
FIGURE 6
FIGURE 7
1101
1102
12 Lead Flatpack
14 Lead Flatpack
16 Lead Flatpack
20 Lead Flatpack
14 Pin DIP
ACMOS
ACMOS
ACMOS
12
14
8
7
8
6
7
na
na
na
na
na
na
1
1103
10
9
1104
ACMOS 13, 20 11
10
7
1105
ACMOS
ACMOS
ACMOS
ACMOS
ACMOS
14
8
8
5
1115
4 pin ½ DIP
4
1116
J-lead SMT
4
3
2
1157 3/
1119 4/
1120 4/
1121 4/
1122 4/
1167
4 pad 5 x 7mm
16 Lead Flatpack
20 Lead Flatpack
12 Lead Flatpack
14 Lead Flatpack
4
3
2
1
8
10
9
na
na
na
na
1
ACMOS 13, 20 11
10
6
ACMOS
ACMOS
12
14
4
7
8
7
5 x 7mm, Straight Lead ACMOS
5 x 7mm, Inward Lead ACMOS
5 x 7mm, Outward Lead ACMOS
3
2
1177
4
3
2
1
1187
4
3
2
1
1107
12 Lead Flatpack
14 Lead Flatpack
16 Lead Flatpack
20 Lead Flatpack
14 Pin DIP
TTL
TTL
TTL
TTL
TTL
TTL
12
14
8
7
6
na
na
na
na
na
1
1108
8
7
1109
10
9
1110
13, 20 11
10
7
1111
14
4
8
3
1117
J-lead SMT
2
1/. All unassigned pins have no internal connections or ties.
2/. A logic “1” (>+2.0V) or open on pin 1 will enable the output. A logic “0” (<+0.8V) will
disable the output.
3/. Model 1157 replaces previous Model 1118.
4/. Models 1119 through 1122 are lead formed versions of Models 1101 through 1104. See
Appendix A for recommended land patterns.
TABLE 1 - Item Identification and Package Outline
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Frequency Range: 0.35 MHz to 100.0 MHz except Models 1157/1167/1177/1187: 1.50 MHz to 100 MHz 3/
Temperature Range: -55°C to +125°C
Frequency Tolerance, Initial Accuracy @ +23°C: 15 ppm max.
Frequency-Temperature Stability from +23°C ref.: 50 ppm max.
Frequency-Voltage Tolerance: 4 ppm max. (Vcc 10%)
Frequency Aging: 1.5 ppm max. 1st 30 days, 5 ppm max. Year 1, 2 ppm max. Year 2+
Start-up Time: 10.0 ms max.
Frequency
Range
(MHz) 3/
Current (mA)
(max. no load)
Models
Rise / Fall
Times 1/
(ns max.)
Duty Cycle 1/
(%)
Fan-out
(if TTL) 2/
1157 thru 1187 Only
Current (mA)
(max. no load)
+5.5V +3.63V
+5.5V
+3.63V
0.35 - 4.0
4.0 – 12.0
10
15
15
20
35
45
55
6
10
15
6
6
5
5
5
5
3
3
45 to 55
45 to 55
40 to 60
40 to 60
40 to 60
40 to 60
40 to 60
10
10
10
6
8
8
>12.0 – 24.0
>24.0 – 40.0
>40.0 – 65.0
>65.0 – 85.0
>85.0 – 100
10
15
20
25
30
15
20
10
15
25
30
35
40
50
6
6
N/A
6
1/. Waveform measurement points and logic limits are in accordance with MIL-PRF-55310.
2/. For +3.3V TTL option, RL=160ꢀ for 10 TTL loads and RL=270ꢀ for 6 TTL loads.
3/. Exception: Models 1157/1167/1177/1187 lower frequency limit is 1.50 MHz and
maximum frequency limit with +5.0V supply voltage is 85.0 MHz.
TABLE 2 - Electrical Performance Characteristics
OPERATION LISTING
REQUIREMENTS AND
CONDITIONS
@ all Electrical Tests
Input Current (no load)
Initial Accuracy @ Ref. Temp.
Output Logic Voltage Levels
Rise and Fall Times
MIL-PRF-55310, Para 4.8.5.1
MIL-PRF-55310, Para 4.8.6
MIL-PRF-55310, Para 4.8.21.3
MIL-PRF-55310, Para 4.8.22
MIL-PRF-55310, Para 4.8.23
Duty Cycle
@ Post Burn-In Electrical only
Overvoltage Survivability
MIL-PRF-55310, Para 4.8.4
MIL-PRF-55310, Para 4.8.10.1
MIL-PRF-55310, Para 4.8.14
MIL-PRF-55310, Para 4.8.29
Initial Freq. – Temp. Accuracy
Freq. – Voltage Tolerance
Start-up Time (fast/slow start)
TABLE 3 - Electrical Test Parameters
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
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Model #
Typical Thermal
Resistance
Junction to Case
θjc (°C / W)
∆ Junction Temp.
Tj (°C @ max. Icc)
1/
Typical
Weight
(Grams)
1101 / 1107 / 1121
1102 / 1108 / 1122
1103 / 1109 / 1119
1104 / 1110 / 1120
1105 / 1111
17.32
17.32
17.20
16.97
19.57
20.22
17.91
3.77
5.24
5.24
5.20
5.13
5.92
6.12
5.42
1.24
3.0
3.3
1.4
2.9
3.9
2.2
1.2
0.2
1115
1116 / 1117
1157 / 1167 / 1177 / 1187
1/. Maximum operating power from Table 2 is used to calculate ∆ Junction
Temperatures.
TABLE 4 - Typical Thermal Characteristics and Weight
Vcc=+5.0V
Vcc=+3.3V
Phase Jitter
(12kHz to Jitter pk-
Frequency
Period
Jitter 1
sigma
(ps)
Phase Jitter
(12kHz to
20MHz)
(ps)
Period Jitter
pk-pk
(ps)
Period
Jitter 1
sigma
(ps)
Period
20MHz)
(ps)
pk
(ps)
1 MHz
24 MHz
40 MHz
80 MHz
100 MHz
8.5
6
8.0
60
48
40
40
32
20
10
8
11.3
0.33
0.25
0.14
0.14
150
85
70
45
40
0.22
0.16
0.08
0.08
5
5
6
4
5
Note: Period Jitter measured at +23C and Nominal Voltage using Wavecrest Model SIA-3000.
TABLE 4a – Typical Jitter Performance
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
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OPN.
NO.
OPERATION LISTING
REQUIREMENTS AND CONDITIONS
Option
A
Option
B
Option
C
Option
D
Option
E
Option
F
Option
G
Option
S
Option
X
MIL Class Similarity
(MIL-PRF-55310, Class S/B or MIL-PRF-38534, Class K)
K
B-
S-
K+
B
S (Rev E)
S (Rev F)
EM
SCREENING
100%
X
100%
NR
100%
X
100%
X
100%
NR
100%
X
100%
NR
100%
X
100%
NR
1
2
Non-Destruct Bond Pull
Internal Visual
MIL-STD-883, Meth 2023
MIL-STD-883, Meth 2017 Class K,
Meth 2032 Class K
X
X
X
X
X
X
X
X
X
3
4
Stabilization (Vacuum) Bake
Thermal Shock
MIL-STD-883, Meth 1008, Cond C, 150°C
X
48 hrs.
NR
X
24 hrs.
NR
X
48 hrs.
X
X
48 hrs.
NR
X
24 hrs.
NR
X
48 hrs.
X
X
24 hrs.
NR
X
48 hrs.
X
X
24 hrs.
NR
MIL-STD-883, Meth 1011, Cond A
5
Temperature Cycle
MIL-STD-883, Meth 1010, Cond. B (except Option S),
10 cycles min.
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
Cond. C
X
NR
NR
X
6
Constant Acceleration
MIL-STD-883, Meth 2001, Cond A,
Y1 plane only, 5000 g’s
7
Particle Impact Noise Detection MIL-STD-883, Meth 2020, Cond B (except Option S)
NR
X
X
Cond. A
X
8
Electrical Testing, Pre Burn-In
1st Burn-In
Perform tests in Table 3. Nominal Vcc, nominal temperature
MIL-STD-883, Meth 1015, Condition B
X
9
X
160 hrs.
X
X
X
X
160 hrs.
X
X
X
X
X
NR
NR
NR
NR
NR
X
160 hrs.
NR
240 hrs.
NR
160 hrs.
NR
240 hrs.
NR
160 hrs.
NR
240 hrs.
NR
10
11
12
13
14
15
16
Electrical Testing, Intermediate
2nd Burn-In
Perform tests in Table 3. Nominal Vcc, nominal temperature
MIL-STD-883, Meth 1015, Condition B
X
NR
AR
X
NR
AR
X
X
NR
AR
X
NR
AR
X
NR
NR
NR
AR
X
160 hrs.
AR
160 hrs.
AR
Freq-Temp Slew Test
Operating temp. range, frequency plotted at 1.0°C steps
Electrical Testing, Post Burn-In Perform tests in Table 3. Nominal Vcc & extremes, nominal
temperature & extremes
X
X
X
X
X
nom. Vcc
X
(Group A)
Seal: Fine Leak
MIL-STD-202, Meth 112, Cond C (5 x 10-8 atm cc/sec max)
MIL-STD-202, Meth 112, Cond D
X
X
X
X
NR
X
Seal: Gross Leak
Seal: Fine Leak
Seal: Gross Leak
Radiographic Inspection
MIL-STD-883, Meth 1014, Cond A2 or B1
MIL-STD-883, Meth 1014, Cond B2 or B3
MIL-STD-883, Meth 2012
NR
X
NR
AR
NR
AR
NR
X
NR
AR
NR
X
NR
NR
NR
NR
X
17
18
19
Solderability
MIL-STD-883, Meth 2003
MIL-STD-883, Meth 2009
MIL-PRF-55310, para. 4.8.35.1
1/
1/
1/
1/
X 2/
X
1/
1/
X 2/
X
1/
1/
X 2/
X
NR
X 2/
NR
External Visual & Mechanical
Aging, 30 Day 3/
(M55310 Group B)
X 2/
NR
X 2/
NR
X 2/
NR
X 2/
X 2/
NR
13 pcs.
20
Group C Inspection (optional)
See Para 5.2 herein for details of supplier recommended
Group C Inspection options
5.2(g)
5.2(e)
5.2(e)
5.2(g)
5.2(e)
5.2(e)
5.2(e)
5.2(f)
NR
LEGEND: X = Required, NR = Not Required, AR = As Required
TABLE 5 - Test Matrix
1/ Performed at package LAT. Include LAT data sheet.
2/ When specified, RGA samples will be removed from the lot after completion of this operation. Use of Screening failures require customer concurrence.
3/ By customer request, the Aging test may be terminated after 15 days if the measured aging rate is less than one-half the specified aging rate, as described in paragraph
4.3.4.1 herein. Must be explicitly stated on the customer PO.
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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Mil-PRF-
38534
Subgroup Class
K
Test
Mil-STD-883
Quantity
Reference
Paragraph
Method
Condition
(accept number)
Element Electrical
A. May perform at wafer level
B. All failures shall be removed
from the lot
1
X
100%
C.3.3.1
C.3.3.2
C. Perform at room ambient
2
3
4
X
X
Element Visual
Internal Visual
2010
2010
100%
10(0) or 22(0)
C.3.3.3
C.3.3.4.2
C.3.3.3
X
X
Temperature Cycling
Mechanical Shock
or
1010
2002
C
B, Y1
10(0)
22(0)
direction
3,000 G, Y1
direction
Constant Acceleration
2001
X
X
Interim Electrical
Burn-In
C.3.3.4.3
C.3.3.4.3
240 hours
minimum at
+125°C
1015
1005
X
X
X
Post Burn-In Electrical
Steady State Life
Final Electrical
C.3.3.4.3
C.3.3.3
C.3.3.5
C.3.3.6
10(0) wires or
20(1) wires
5
6
X
X
Wire Bond Evaluation
SEM
2011
2018
See method 2018
Notes:
Subgroups 3, 4, & 5 shall be performed on a sample of 10 die if the wafer lot is from a QPL/QML line. If the die are
from commercial wafer lots, then the sample size shall be 22 die.
TABLE 6 - MICROCIRCUIT ENHANCED ELEMENT EVALUATION
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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Parts Type
Test
Requirement
Paragraph
Sample size
Allowable Reject(s)
Ceramic Capacitors
M55681 FRL S or
M123 (chips)
N/A
N/A
N/A
N/A
N/A
Ultrasonic Scan or
CSAM
Group A
M123
100%
COTS (chips)
M123
M123
M123
M123
M123
M123
Group B, Subgroups
1 and 2
Resistors
M55342 FRL R or S
N/A
N/A
N/A
N/A
Inductors (See Paragraph 4.1.2)
Custom closed
magnetics
Group A
Group B
Mil-Std-981
Mil-Std-981
Mil-Std-981
Mil-Std-981
Mil-Std-981
Mil-Std-981
Magnetics, Closed Construction Leaded and Surface Mount (transformers, inductors, coils) (Note: Stacking magnetics
shall be qualified and the effects of the long term performance of the hybrids verified. When stacking magnetics, a
repeat of the thermal cycling plus electrical measurements as specified in Group A of Mil-Std-981. Design,
workmanship and materials/processes shall conform to MIL-STD-981 requirements).
Magnetics, Open Construction are unencapsulated and unpotted self-leaded parts consisting of magnet wire wound
around a magnetic core. These parts are fully visually inspectable. Open construction magnetics shall be subjected to
100% electrical measurements and visual inspection per Mil-Std-981.
TABLE 7: PASSIVE COMPONENT ENHANCED ELEMENT EVALUATION
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
MICROCHIP CONFIDENTIAL
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FIGURE 1
Models 1101 & 1107 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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FIGURE 2
Models 1102 & 1108 Package Outline
Tolerances: Unspecified = 0.010”
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
MICROCHIP CONFIDENTIAL
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FIGURE 3
Models 1103 & 1109 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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FIGURE 4
Model 1115 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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FIGURE 5
Model 1104 & 1110 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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FIGURE 6
Model 1105 & 1111 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
MICROCHIP CONFIDENTIAL
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FIGURE 7
Model 1116 & 1117 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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FIGURE 8
Model 1157 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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FIGURE 9
Model 1119 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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FIGURE 10
Model 1120 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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FIGURE 11
Model 1121 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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FIGURE 12
Model 1122 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
MICROCHIP CONFIDENTIAL
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FIGURE 13
Model 1167 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
MICROCHIP CONFIDENTIAL
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FIGURE 14
Model 1177 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
MICROCHIP CONFIDENTIAL
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FIGURE 15
Model 1187 Package Outline
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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APPENDIX A
Recommended Land Patterns
Model 1116 & 1117
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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Model 1157
Model 1119
UNSPECIFIED TOLERANCES
CODE IDENT NO.
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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Model 1120
Model 1121
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
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Model 1122
Model 1177
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
MICROCHIP CONFIDENTIAL
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Model 1187
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
A
00136
N/A
MICROCHIP CONFIDENTIAL
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