TC1304-AP0EMFTR [MICROCHIP]
500 mA Synchronous Buck Regulator, + 300 mA LDO with Power-Good Output; ，500 mA同步降压稳压器， + 300毫安LDO与电源就绪输出
| 型号： | TC1304-AP0EMFTR |
| 厂家： | 
MICROCHIP |
| 描述： | 500 mA Synchronous Buck Regulator, + 300 mA LDO with Power-Good Output |
| 文件： | 总36页 (文件大小：613K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TC1303A/TC1303B/
TC1303C/TC1304
500 mA Synchronous Buck Regulator,
+ 300 mA LDO with Power-Good Output
Features
Description
• Dual-Output Regulator (500 mA Buck Regulator
and 300 mA Low-Dropout Regulator)
The TC1303/TC1304 combines a 500 mA synchro-
nous buck regulator and 300 mA Low-Dropout Regula-
tor (LDO) with a power-good monitor to provide a highly
integrated solution for devices that require multiple
supply voltages. The unique combination of an
integrated buck switching regulator and low-dropout
linear regulator provides the lowest system cost for
dual-output voltage applications that require one lower
processor core voltage and one higher bias voltage.
• Power-Good Output with 300 ms Delay
• Total Device Quiescent Current = 65 µA, Typ.
• Independent Shutdown for Buck and LDO
Outputs (TC1303)
• Both Outputs Internally Compensated
• Synchronous Buck Regulator:
- Over 90% Typical Efficiency
The 500 mA synchronous buck regulator switches at a
fixed frequency of 2.0 MHz when the load is heavy,
providing a low noise, small-size solution. When the
load on the buck output is reduced to light levels, it
changes operation to a Pulse Frequency Modulation
(PFM) mode to minimize quiescent current draw from
the battery. No intervention is necessary for smooth
transition from one mode to another.
- 2.0 MHz Fixed-Frequency PWM
(Heavy Load)
- Low Output Noise
- Automatic PWM to PFM mode transition
- Adjustable (0.8V to 4.5V) and Standard
Fixed-Output Voltages (0.8V, 1.2V, 1.5V,
1.8V, 2.5V, 3.3V)
The LDO provides a 300 mA auxiliary output that
requires a single 1 µF ceramic output capacitor,
minimizing board area and cost. The typical dropout
voltage for the LDO output is 137 mV for a 200 mA
load.
• Low-Dropout Regulator:
- Low-Dropout Voltage = 137 mV Typ. @
200 mA
- Standard Fixed-Output Voltages
(1.5V, 1.8V, 2.5V, 3.3V)
For the TC1303/TC1304, the power-good output is
based on the regulation of the buck regulator output, the
LDO output or the combination of both. The TC1304
features start-up and shutdown output sequencing.
• Power-Good Function:
- Monitors Buck Output Function (TC1303A)
- Monitors LDO Output Function (TC1303B)
- Monitors Both Buck and LDO Output Func-
tions (TC1303C and TC1304)
The TC1303/TC1304 is available in either the 10-pin
DFN or MSOP package.
- 300 ms Delay Used for Processor Reset
Additional protection features include: UVLO,
overtemperature and overcurrent protection on both
outputs.
• Sequenced Startup and Shutdown (TC1304)
• Small 10-pin 3X3 DFN or MSOP Package
Options
For a complete listing of TC1303/TC1304 standard
parts, consult your Microchip representative.
• Operating Junction Temperature Range:
- -40°C to +125°C
• Undervoltage Lockout (UVLO)
• Output Short Circuit Protection
• Overtemperature Protection
Applications
• Cellular Phones
• Portable Computers
• USB-Powered Devices
• Handheld Medical Instruments
• Organizers and PDAs
© 2005 Microchip Technology Inc.
DS21949B-page 1
TC1303A/TC1303B/TC1303C/TC1304
Package Types
TC1303A,B,C
10-Lead DFN
10-Lead MSOP
PGND
10
9
SHDN2
VIN2
1
2
3
4
5
PGND
SHDN2 1
10
9
LX
VIN2
2
LX
VIN1
VOUT2
8
VOUT2
3
VIN1
8
7
SHDN1
PG
4
7
SHDN1
VFB1/VOUT1
PG
VFB1/VOUT1
AGND
6
AGND
5
6
TC1304
10-Lead DFN
10-Lead MSOP
PGND
10
9
SHDN
VIN2
1
PGND
SHDN 1
10
9
LX
VIN2
2
2
3
4
5
LX
VIN1
VOUT2
8
VOUT2
3
VIN1
8
7
AGND
PG
AGND
4
5
7
PG
VFB1/VOUT1
AGND
6
AGND
6
VFB1/VOUT1
DS21949B-page 2
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
Functional Block Diagram – TC1303
Undervoltage Lockout
(UVLO)
UVLO
VREF
Synchronous Buck Regulator
VIN1
PDRV
VIN2
LX
Driver
Control
SHDN1
NDRV
PGND
PGND
PGND
AGND
VOUT1/VFB1
Sense Switcher for A,C
PG
TC1303A(1),B(2),C(1) options
PG Generator with Delay
VREF
Sense LDO for B,C
UVLO
VOUT2
LDO
SHDN2
AGND
Note 1: PG open-drain for A,C options
2: PG push-pull output for B option
© 2005 Microchip Technology Inc.
DS21949B-page 3
TC1303A/TC1303B/TC1303C/TC1304
Functional Block Diagram – TC1304
Undervoltage Lockout
(UVLO)
UVLO
VREF
Synchronous Buck Regulator
VIN1
PDRV
VIN2
LX
Driver
Control
SHDN
NDRV
PGND
PGND
PGND
AGND
VOUT1/VFB1
PG
TC1304(Note)
PG Generator with Delay
Output Voltage
Sequencer ckt.
AGND
VREF
UVLO
VOUT2
LDO
AGND
Note:
PG open-drain for TC1304
DS21949B-page 4
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
Typical Application Circuits
TC1303A
Fixed-Output Application
10-Lead MSOP
4.7 µH
V
IN
V
V
V
OUT1
1.5V @ 500 mA
L
8
2
7
1
4
9
10
6
IN1
IN2
X
2.7V to 4.2V
4.7 µF
4.7 µF
P
GND
V
V
SHDN1
SHDN2
PG
OUT1
OUT2
V
3
OUT2
1 µF
2.5V @ 300 mA
R
A
GND
PULLUP
5
Processor
RESET
TC1303B
Adjustable-Output Application
10-Lead DFN
4.7 µH
V
OUT1
Input
Voltage
4.5V to 5.5V
8
9
V
V
L
X
IN1
2.1V @
500 mA
4.7 µF
1 µF
4.7 µF
P
GND 10
2
7
1
4
200 kΩ 4.99 kΩ
IN2
V
OUT1
OUT2
6
3
SHDN1
SHDN2
*Optional
Capacitor
V
OUT2
1.0 µF
V
33 pF
3.3V @
300 mA
V
IN2
121 kΩ
A
GND
PG
5
(Note)
Processor
RESET
Note: Connect DFN package exposed pad to AGND
.
TC1304
Fixed-Output Application
10-Lead MSOP
4.7 µH
V
IN
V
V
V
L
8
2
7
1
4
9
10
6
IN1
OUT1
X
2.7V to 4.2V
1.2V @ 500 mA
4.7 µF
4.7 µF
P
IN2
GND
V
V
A
GND
OUT1
OUT2
V
SHDN
PG
3
OUT2
1 µF
2.5V @ 300 mA
R
A
GND
PULLUP
5
Processor
RESET
© 2005 Microchip Technology Inc.
DS21949B-page 5
TC1303A/TC1303B/TC1303C/TC1304
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
1.0
ELECTRICAL
CHARACTERISTICS
Absolute Maximum Ratings †
VIN - AGND ......................................................................6.0V
All Other I/O .............................. (A - 0.3V) to (V + 0.3V)
GND
IN
L to P
.............................................. -0.3V to (V + 0.3V)
X
GND
IN
P
to A
...................................................-0.3V to +0.3V
GND
GND
Output Short Circuit Current .................................Continuous
Power Dissipation (Note 7)..........................Internally Limited
Storage temperature .....................................-65°C to +150°C
Ambient Temp. with Power Applied.................-40°C to +85°C
Operating Junction Temperature...................-40°C to +125°C
ESD protection on all pins (HBM) ....................................... 3 kV
DC CHARACTERISTICS
Electrical Characteristics: V =V = SHDN1,2 = 3.6V, C
= C = 4.7 µF, C
= 1µF, L = 4.7 µH, V
(ADJ) = 1.8V,
IN1
IN2
OUT1
IN
OUT2
OUT1
I
= 100 ma, I
= 0.1 mA T = +25°C. Boldface specifications apply over the T range of -40°C to +85°C.
OUT1
OUT2 A A
Parameters
Sym
Min
Typ
Max
Units
Conditions
Input/Output Characteristics
Input Voltage
V
2.7
500
300
—
—
—
5.5
—
—
1
V
Note 1, Note 2, Note 8
Note 1
IN
Maximum Output Current
Maximum Output Current
Shutdown Current
I
I
mA
mA
µA
OUT1_MAX
OUT2_MAX
—
Note 1
I
0.05
SHDN1 = SHDN2 = GND
IN_SHDN
Combined V
and V
Current
IN2
IN1
TC1303A,B Operating I
TC1303C, TC1304 Operating I
I
I
—
65.0
70.1
110
110
µA
SHDN1 = SHDN2 = V
IN2
Q
Q
Q
I
= 0 mA, I
= 0 mA
Q
OUT1
OUT2
Synchronous Buck I
—
—
38
46
—
—
µA
µA
SHDN1 = V , SHDN2 = GND
IN
Q
LDO I
SHDN1 = GND, SHDN2 = V
IN2
Q
Shutdown/UVLO/Thermal Shutdown Characteristics
SHDN1,SHDN2, SHDN (TC1304)
Logic Input Voltage Low
V
—
—
—
15
—
%V
V
V
V
=V
=V
=V
= 2.7V to 5.5V
= 2.7V to 5.5V
= 2.7V to 5.5V
IL
IH
IN
IN
IN1
IN1
IN1
IN2
IN2
IN2
SHDN1,SHDN2, SHDN (TC1304)
Logic Input Voltage High
V
45
%V
IN
SHDN1,SHDN2, SHDN (TC1304)
I
-1.0
±0.01
1.0
µA
Input Leakage Current
SHDNX = GND
SHDNY = V
IN
Thermal Shutdown
T
—
—
165
10
—
—
°C
°C
V
Note 6, Note 7
SHD
Thermal Shutdown Hysteresis
T
SHD-HYS
Undervoltage Lockout
UVLO
2.4
2.55
2.7
V
Falling
IN1
(V
and V
)
OUT1
OUT2
Undervoltage Lockout Hysteresis UVLO-HYS
—
200
—
mV
Note 1: The Minimum V has to meet two conditions: V ≥ 2.7V and V ≥ V + V
V
= V or V
.
R2
IN
IN
IN
RX
DROPOUT, RX
R1
2:
V
is the regulator output voltage setting.
RX
6
3: TCV
= ((V
– V
) * 10 )/(V
* D ).
OUT2 T
OUT2
OUT2max
OUT2min
4: Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested
over a load range from 0.1 mA to the maximum specified output current.
5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its
nominal value measured at a 1V differential.
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air. (i.e. T , T , θ ). Exceeding the maximum allowable power
A
J
JA
dissipation causes the device to initiate thermal shutdown.
7: The integrated MOSFET switches have an integral diode from the L pin to V , and from L to P . In cases where
GND
X
IN
X
these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not
able to limit the junction temperature for these cases.
8:
V
and V
are supplied by the same input source.
IN2
IN1
DS21949B-page 6
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
DC CHARACTERISTICS (CONTINUED)
Electrical Characteristics: V =V = SHDN1,2 = 3.6V, C
= C = 4.7 µF, C
= 1µF, L = 4.7 µH, V
(ADJ) = 1.8V,
IN1
IN2
OUT1
IN
OUT2
OUT1
I
= 100 ma, I
= 0.1 mA T = +25°C. Boldface specifications apply over the T range of -40°C to +85°C.
OUT1
OUT2 A A
Parameters
Sym
)
Min
Typ
Max
Units
Conditions
Synchronous Buck Regulator (V
Adjustable Output Voltage Range
Adjustable Reference Feedback
OUT1
V
0.8
—
4.5
V
V
OUT1
V
0.78
0.8
0.82
FB1
Voltage (V
)
FB1
Feedback Input Bias Current
(I
I
—
-2.5
—
-1.5
±0.3
0.2
—
+2.5
—
nA
%
VFB1
)
FB1
Output Voltage Tolerance Fixed
(V
V
Note 2
OUT1
)
OUT1
Line Regulation (V
)
V
%/V
%
V
=V +1V to 5.5V,
OUT1
LINE-REG
IN
R
I
= 100 mA
LOAD
Load Regulation (V
)
V
—
0.2
—
V
= V + 1.5V, I
= 100 mA to
OUT1
OUT1
LOAD-REG
IN
R
LOAD
500 mA (Note 1)
Dropout Voltage V
V
– V
—
280
—
mV
I
= 500 mA, V
= 3.3V
OUT1
IN
OUT1
OUT1
(Note 5)
Internal Oscillator Frequency
Start Up Time
F
1.6
—
2.0
0.5
2.4
—
MHz
ms
OSC
T
T = 10% to 90%
R
SS
R
R
L
P-Channel
N-Channel
R
—
450
450
±0.01
650
650
1.0
mΩ
mΩ
μA
I =100 mA
DSon
DSon
DSon-P
DSon-N
P
R
—
I =100 mA
N
Pin Leakage Current
I
-1.0
SHDN = 0V, V = 5.5V, L = 0V,
IN X
X
LX
L
= 5.5V
X
Positive Current Limit Threshold
LDO Output (V
+I
—
700
—
mA
%
LX(MAX)
)
OUT2
Output Voltage Tolerance (V
Temperature Coefficient
Line Regulation
)
V
-2.5
—
±0.3
25
+2.5
—
Note 2
OUT2
OUT2
TCV
ppm/°C Note 3
OUT
ΔV
/
-0.2
±0.02
+0.2
%/V
(V +1V) ≤ V ≤ 5.5V
OUT2
R
IN
ΔV
IN
Load Regulation, V
Load Regulation, V
≥ 2.5V
ΔV
I
/
/
-0.75
-0.9
—
-0.08
-0.18
+0.75
+0.9
%
I
I
= 0.1 mA to 300 mA (Note 4)
= 0.1 mA to 300 mA (Note 4)
OUT2
OUT2
OUT2
OUT2
OUT2
OUT2
< 2.5V
> 2.5V
ΔV
%
OUT2
OUT2
OUT2
I
Dropout Voltage V
V
– V
137
205
300
500
mV
I
I
= 200 mA (Note 5)
= 300 mA
IN
OUT2
OUT2
OUT2
Power Supply Rejection Ratio
Output Noise
PSRR
eN
—
62
1.8
240
—
—
—
dB
f ≤ 100 Hz, I
= I
= 50 mA,
OUT2
OUT1
C
= 0 µF
IN
½
—
µV/(Hz)
mA
f ≤ 1 kHz, I
= 50 mA,
OUT2
SHDN1 = GND
R ≤ 1Ω
LOAD2
Output Short Circuit Current
(Average)
I
—
OUTsc2
Note 1: The Minimum V has to meet two conditions: V ≥ 2.7V and V ≥ V + V
V
= V or V
.
R2
IN
IN
IN
RX
DROPOUT, RX
R1
2:
V
is the regulator output voltage setting.
RX
6
3: TCV
= ((V
– V
) * 10 )/(V
* D ).
OUT2 T
OUT2
OUT2max
OUT2min
4: Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested
over a load range from 0.1 mA to the maximum specified output current.
5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its
nominal value measured at a 1V differential.
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air. (i.e. T , T , θ ). Exceeding the maximum allowable power
A
J
JA
dissipation causes the device to initiate thermal shutdown.
7: The integrated MOSFET switches have an integral diode from the L pin to V , and from L to P . In cases where
GND
X
IN
X
these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not
able to limit the junction temperature for these cases.
8:
V
and V
are supplied by the same input source.
IN2
IN1
© 2005 Microchip Technology Inc.
DS21949B-page 7
TC1303A/TC1303B/TC1303C/TC1304
DC CHARACTERISTICS (CONTINUED)
Electrical Characteristics: V =V = SHDN1,2 = 3.6V, C
= C = 4.7 µF, C
= 1µF, L = 4.7 µH, V
(ADJ) = 1.8V,
IN1
IN2
OUT1
IN
OUT2
OUT1
I
= 100 ma, I
= 0.1 mA T = +25°C. Boldface specifications apply over the T range of -40°C to +85°C.
OUT1
OUT2 A A
Parameters
Wake-Up Time (From SHDN2
mode), (V
Sym
Min
Typ
Max
Units
Conditions
t
—
31
100
µs
I
I
= I
= I
= 50 mA
WK
OUT1
OUT2
)
OUT2
Settling Time (From SHDN2
mode), (V
t
—
100
—
—
µs
= 50 mA
S
OUT1
OUT2
)
OUT2
Power-Good (PG)
Voltage Range PG
V
1.0
5.5
V
T = 0°C to +70°C
A
PG
1.2
5.5
T = -40°C to +85°C
A
V
≤ 2.7 I
= 100 µA
SINK
IN
PG Threshold High
V
—
89
—
94
92
2
96
—
—
% of
On Rising V
or V
OUT1 OUT2
TH_H
(V
or V
)
V
V
= V
or V
OUT1
OUT2
OUTX
OUTX
OUT1 OUT2
PG Threshold Low
(V or V
V
% of
On Falling V
or V
OUT1 OUT2
TH_L
)
V
V
= V
or V
OUT1
OUT2
OUTX
OUTX
OUT1
OUT2
PG Threshold Hysteresis
(V and V
V
% of
V
OUTX
V
= V
or V
OUT2
TH_HYS
OUTX
OUT1
)
OUT1
OUT2
PG Threshold Tempco
PG Delay
ΔV /ΔT
—
—
30
—
—
ppm/°C
TH
t
165
µs
V
or V
= (V + 100 mV)
RPD
OUT1
OUT2 TH
to (V - 100 mV)
TH
PG Active Time-out Period
PG Output Voltage Low
t
140
262
—
560
0.2
—
ms
V
to V
or V
= V - 100 mV
OUT2 TH
RPU
OUT1
100 mV,
TH +
I
= 1.2 mA
SINK
PG_V
PG_V
—
V
V
V
orV
= V - 100 mV
OUT2 TH ,
OL
OUT1
I
I
= 1.2 mA V
= 100 µA, 1.0V < V
> 2.7V
PG
PG
IN2
< 2.7V
IN2
PG Output Voltage High
(TC1303B only)
0.9* V
—
V
V
V
or V
= V + 100 mV
OH
OUT2
OUT1
OUT2
OUT2
OUT2 TH
≥ 1.8V, I = - 500 µA
< 1.8V,I = - 300 µA
PG
PG
Note 1: The Minimum V has to meet two conditions: V ≥ 2.7V and V ≥ V + V
V
= V or V
.
R2
IN
IN
IN
RX
DROPOUT, RX
R1
2:
V
is the regulator output voltage setting.
RX
6
3: TCV
= ((V
– V
) * 10 )/(V
* D ).
OUT2 T
OUT2
OUT2max
OUT2min
4: Regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is tested
over a load range from 0.1 mA to the maximum specified output current.
5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its
nominal value measured at a 1V differential.
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction
temperature and the thermal resistance from junction to air. (i.e. T , T , θ ). Exceeding the maximum allowable power
A
J
JA
dissipation causes the device to initiate thermal shutdown.
7: The integrated MOSFET switches have an integral diode from the L pin to V , and from L to P . In cases where
GND
X
IN
X
these diodes are forward-biased, the package power dissipation limits must be adhered to. Thermal protection is not
able to limit the junction temperature for these cases.
8:
V
and V
are supplied by the same input source.
IN2
IN1
DS21949B-page 8
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, all limits are specified for: VIN = +2.7V to +5.5V
Parameters
Sym
Min
Typ
Max
Units
Conditions
Temperature Ranges
Operating Junction Temperature
Range
TJ
-40
—
+125
°C
Steady state
Storage Temperature Range
Maximum Junction Temperature
Thermal Package Resistances
Thermal Resistance, 10L-DFN
TA
TJ
-65
—
—
—
+150
+150
°C
°C
Transient
θJA
—
—
41
—
—
°C/W Typical 4-layer Board with
Internal Ground Plane and 2 Vias
in Thermal Pad
Thermal Resistance, 10L-MSOP
θJA
113
°C/W Typical 4-layer Board with
Internal Ground Plane
© 2005 Microchip Technology Inc.
DS21949B-page 9
TC1303A/TC1303B/TC1303C/TC1304
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, V = V = SHDN1,2 = 3.6V, C
= C = 4.7 µF, C
= 1 µF, L = 4.7 µH,
OUT2
IN1
IN2
OUT1
IN
V
(ADJ) = 1.8V, T = +25°C. Boldface specifications apply over the T range of -40°C to +85°C. T = +25°C. Adjustable- or fixed-
OUT1
A
A
A
output voltage options can be used to generate the Typical Performance Characteristics.
80
76
72
68
64
60
55
50
45
40
35
30
VIN = 5.5V
IOUT1 = IOUT2 = 0 mA
SHDN1 = VIN2
SHDN2 = VIN2
IOUT2 = 0 mA
VIN = 5.5V
VIN = 4.2V
VIN = 4.2V
VIN = 3.6V
SHDN1 = AGND
SHDN2 = VIN2
VIN = 3.6V
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
Ambient Temperature (°C)
Ambient Temperature (°C)
FIGURE 2-1:
IQ Switcher and LDO
FIGURE 2-4:
IQ LDO Current vs. Ambient
Current vs. Ambient Temperature (TC1303A,B).
Temperature.
VIN = 5.5V
78
76
74
72
70
68
66
100
95
90
85
80
75
70
65
60
55
50
SHDN1 = VIN2
SHDN2 = VIN2
SHDN1 = VIN2
SHDN2 = AGND
IOUT1 = 100 mA
VIN = 4.2V
IOUT1 = 250 mA
IOUT1 = 500 mA
VIN = 3.6V
-40 -25 -10
5
20 35 50 65 80 95 110 125
2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5
Input Voltage (V)
Ambient Temperature (°C)
FIGURE 2-2:
IQ Switcher and LDO
FIGURE 2-5:
VOUT1 Output Efficiency vs.
Current vs. Ambient Temperature
(TC1303C, TC1304).
Input Voltage (VOUT1 = 1.2V).
SHDN1 = VIN2
SHDN2 = AGND
100
95
90
85
80
75
70
55
SHDN1 = VIN2
SHDN2 = AGND
IOUT1 = 0 mA
VIN = 5.5V
50
45
VIN1 = 3.6V
40
VIN1 = 4.2V
VIN = 4.2V
VIN = 3.6V
35
30
VIN1 = 3.0V
0.005
0.104
0.203
0.302
0.401
0.5
-40 -25 -10
5
20 35 50 65 80 95 110 125
IOUT1 (A)
Ambient Temperature (°C)
FIGURE 2-6:
V
OUT1 Output Efficiency vs.
FIGURE 2-3:
IQ Switcher Current vs.
IOUT1 (VOUT1 = 1.2V).
Ambient Temperature.
DS21949B-page 10
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, V = V = SHDN1,2 = 3.6V, C
= C = 4.7 µF, C
= 1 µF, L = 4.7 µH,
OUT2
IN1
IN2
OUT1
IN
V
(ADJ) = 1.8V, T = +25°C. Boldface specifications apply over the T range of -40°C to +85°C. T = +25°C. Adjustable- or fixed-
OUT1
A
A
A
output voltage options can be used to generate the Typical Performance Characteristics.
VIN1 = 3.6V
100
95
90
85
80
75
70
65
60
100
95
90
85
80
75
70
65
60
SHDN1 = VIN2
SHDN2 = AGND
IOUT1 = 100 mA
IOUT1 = 250 mA
VIN1 = 4.2V
SHDN1 = VIN2
SHDN2 = AGND
IOUT1 = 500 mA
VIN1 = 5.5V
0.005
0.104
0.203
0.302
0.401
0.5
2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5
Input Voltage (V)
IOUT1 (A)
FIGURE 2-7:
VOUT1 Output Efficiency vs.
FIGURE 2-10:
V
OUT1 Output Efficiency vs.
Input Voltage (VOUT1 = 1.8V).
IOUT1 (VOUT1 = 3.3V).
1.21
1.206
1.202
1.198
1.194
1.19
100
SHDN1 = VIN2
SHDN2 = AGND
SHDN1 = VIN2
SHDN2 = AGND
VIN = 3.0V
95
VIN1 = 3.6V
90
85
80
75
VIN = 4.2V
VIN = 3.6V
0.005
0.104
0.203
0.302
0.401
0.5
0.005
0.104
0.203
0.302
0.401
0.5
I
OUT1 (A)
IOUT1 (A)
FIGURE 2-8:
VOUT1 Output Efficiency vs.
FIGURE 2-11:
VOUT1 vs. IOUT1
IOUT1 (VOUT1 = 1.8V).
(VOUT1 = 1.2V).
100
96
92
88
84
80
1.82
1.815
1.81
SHDN1 = VIN2
SHDN2 = AGND
SHDN1 = VIN2
SHDN2 = AGND
VIN1 = 3.6V
IOUT1 = 100 mA
IOUT1 = 250 mA
1.805
1.8
IOUT1 = 500 mA
1.795
1.79
0.005
0.104
0.203
0.302
0.401
0.5
3.60
3.92
4.23
4.55
4.87
5.18
5.50
I
OUT1 (A)
Input Voltage (V)
FIGURE 2-9:
VOUT1 Output Efficiency vs.
FIGURE 2-12:
VOUT1 vs. IOUT1
Input Voltage (VOUT1 = 3.3V).
(VOUT1 = 1.8V).
© 2005 Microchip Technology Inc.
DS21949B-page 11
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, V = V = SHDN1,2 = 3.6V, C
= C = 4.7 µF, C
= 1 µF, L = 4.7 µH,
OUT2
IN1
IN2
OUT1
IN
V
(ADJ) = 1.8V, T = +25°C. Boldface specifications apply over the T range of -40°C to +85°C. T = +25°C. Adjustable- or fixed-
OUT1
A
A
A
output voltage options can be used to generate the Typical Performance Characteristics.
0.820
0.815
0.810
0.805
0.800
0.795
0.790
3.4
3.36
3.32
3.28
3.24
3.2
SHDN1 = VIN2
SHDN2 = AGND
SHDN1 = VIN2
SHDN2 = AGND
VIN1 = 3.6V
VIN1 = 4.2V
0.005
0.104
0.203
0.302
0.401
0.5
IOUT1 (A)
Ambient Temperature (°C)
FIGURE 2-13:
VOUT1 vs. IOUT1
FIGURE 2-16:
VOUT1 Adjustable Feedback
(VOUT1 = 3.3V).
Voltage vs. Ambient Temperature.
0.6
2.20
2.15
2.10
2.05
2.00
1.95
1.90
SHDN1 = VIN2
SHDN2 = AGND
SHDN1 = VIN2
SHDN2 = AGND
0.55
0.5
TA = 25 °C
0.45
0.4
N-Channel
P-Channel
0.35
0.3
2.7
3.1
3.5
3.9
4.3
4.7
5.1
5.5
3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
Input Voltage (V)
Input Voltage (V)
FIGURE 2-14:
VOUT1 Switching Frequency
FIGURE 2-17:
VOUT1 Switch Resistance
vs. Input Voltage.
vs. Input Voltage.
0.65
2.00
1.98
1.96
1.94
1.92
1.90
SHDN1 = VIN2
SHDN2 = AGND
SHDN1 = VIN2
SHDN2 = AGND
VIN1 = 3.6V
0.6
0.55
0.5
P-Channel
N-Channel
0.45
0.4
0.35
0.3
-40 -25 -10
5
20 35 50 65 80 95 110 125
Ambient Temperature (°C)
Ambient Temperature (°C)
FIGURE 2-15:
VOUT1 Switching Frequency
FIGURE 2-18:
VOUT1 Switch Resistance
vs. Ambient Temperature.
vs. Ambient Temperature.
DS21949B-page 12
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, V = V = SHDN1,2 = 3.6V, C
= C = 4.7 µF, C
= 1 µF, L = 4.7 µH,
OUT2
IN1
IN2
OUT1
IN
V
(ADJ) = 1.8V, T = +25°C. Boldface specifications apply over the T range of -40°C to +85°C. T = +25°C. Adjustable- or fixed-
OUT1
A
A
A
output voltage options can be used to generate the Typical Performance Characteristics.
IOUT2 = 150 mA
0.4
0.35
0.3
1.492
1.49
SHDN1 = VIN2
SHDN2 = AGND
TA = + 85°C
TA = + 25°C
1.488
1.486
1.484
1.482
0.25
0.2
SHDN1 = AGND
SHDN2 = VIN2
VOUT1 = 3.3V
IOUT1 = 500 mA
TA = - 40°C
0.15
0.1
2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5
Input Voltage (V)
Ambient Temperature (°C)
FIGURE 2-19:
VOUT1 Dropout Voltage vs.
FIGURE 2-22:
VOUT2 Output Voltage vs.
Ambient Temperature.
Input Voltage (VOUT2 = 1.5V).
1.802
IOUT2 = 150 mA
SHDN1 = AGND
SHDN2 = VIN2
1.800
TA = + 85°C
1.798
TA = + 25°C
1.796
TA = - 40°C
1.794
1.792
2.7 3.05 3.4 3.75 4.1 4.45 4.8 5.15 5.5
Input Voltage (V)
FIGURE 2-20:
VOUT1 and VOUT2 Heavy
FIGURE 2-23:
VOUT2 Output Voltage vs.
Load Switching Waveforms vs. Time.
Input Voltage (VOUT2 = 1.8V).
2.508
2.506
2.504
2.502
2.500
2.498
2.496
SHDN1 = AGND
SHDN2 = VIN2
IOUT2 = 150 mA
TA = + 85°C
TA = + 25°C
TA = - 40°C
3.3 3.5 3.7 3.9 4.1 4.3 4.5 4.7 4.9 5.1 5.3 5.5
Input Voltage (V)
FIGURE 2-21:
VOUT1 and VOUT2 Light
FIGURE 2-24:
VOUT2 Output Voltage vs.
Load Switching Waveforms vs. Time.
Input Voltage (VOUT2 = 2.5V).
© 2005 Microchip Technology Inc.
DS21949B-page 13
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, V = V = SHDN1,2 = 3.6V, C
= C = 4.7 µF, C
= 1 µF, L = 4.7 µH,
OUT2
IN1
IN2
OUT1
IN
V
(ADJ) = 1.8V, T = +25°C. Boldface specifications apply over the T range of -40°C to +85°C. T = +25°C. Adjustable- or fixed-
OUT1
A
A
A
output voltage options can be used to generate the Typical Performance Characteristics.
SHDN1 = AGND
SHDN2 = VIN2
0.005
0.000
3.298
3.297
3.296
3.295
3.294
3.293
3.292
SHDN1 = AGND
SHDN2 = VIN2
IOUT2 = 150 mA
VOUT2 = 3.3V
-0.005
-0.010
-0.015
-0.020
-0.025
-0.030
-0.035
TA = + 85°C
IOUT2 = 100 µA
VOUT2 = 2.5V
TA = + 25°C
TA = - 40°C
VOUT2 = 1.5V
3.60
3.92
4.23
4.55
4.87
5.18
5.50
-40 -25 -10
5
20 35 50 65 80 95 110 125
Input Voltage (V)
Ambient Temperature (°C)
FIGURE 2-25:
VOUT2 Output Voltage vs.
FIGURE 2-28:
V
OUT2 Line Regulation vs.
Input Voltage (VOUT2 = 3.3V).
Ambient Temperature.
0.1
0.30
VIN2 = 3.6V
SHDN1 = AGND
SHDN2 = VIN2
SHDN1 = AGND
SHDN2 = VIN2
VOUT2 = 3.3V
0.0
-0.1
-0.2
-0.3
-0.4
0.25
IOUT2 = 300 mA
0.20
IOUT2 = 200 mA
0.15
VOUT2 = 2.6V
VOUT2 = 1.5V
0.10
0.05
Ambient Temperature (°C)
Ambient Temperature (°C)
FIGURE 2-26:
VOUT2 Dropout Voltage vs.
FIGURE 2-29:
VOUT2 Load Regulation vs.
Ambient Temperature (VOUT2 = 2.5V).
Ambient Temperature.
0.3
350
VIN = 3.6V
SHDN1 = AGND
SHDN2 = VIN2
SHDN1 = VIN2
SHDN2 = VIN2
325
300
275
250
225
200
0.2
0.1
0.0
IOUT2 = 300 mA
IOUT2 = 200 mA
-40 -25 -10
5
20 35 50 65 80 95 110 125
-40 -25 -10
5
20 35 50 65 80 95 110 125
Ambient temperature (°C)
Ambient Temperature (°C)
FIGURE 2-27:
VOUT2 Dropout Voltage vs.
FIGURE 2-30:
PG Active Delay Time-out
Ambient Temperature (VOUT2 = 3.3V).
vs. Ambient Temperature.
DS21949B-page 14
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, V = V = SHDN1,2 = 3.6V, C
= C = 4.7 µF, C
= 1 µF, L = 4.7 µH,
OUT2
IN1
IN2
OUT1
IN
V
(ADJ) = 1.8V, T = +25°C. Boldface specifications apply over the T range of -40°C to +85°C. T = +25°C. Adjustable- or fixed-
OUT1
A
A
A
output voltage options can be used to generate the Typical Performance Characteristics.
96
95
94
93
92
91
90
0
-10
-20
-30
-40
-50
-60
-70
-80
SHDN1 = VIN2
SHDN2 = VIN2
VIN = 3.6V
SHDN1 = GND
VOUT2 = 1.5V
COUT2 = 1.0 µF
IOUT2 = 30 mA
PG Threshold Hi
CIN = 0 µF
COUT2 = 4.7 µF
PG Threshold Low
0.01
0.1
1
10
100
1000
-40 -25 -10
5
20 35 50 65 80 95 110 125
Frequency (kHz)
Ambient Temperature (°C)
FIGURE 2-31:
PG Threshold Voltage vs.
FIGURE 2-34:
VOUT2 Power Supply Ripple
Ambient Temperature.
Rejection vs. Frequency.
10
0.02
SHDN1 = AGND
SHDN2 = VIN2
SHDN1 = VIN2
SHDN2 = VIN2
VIN = 3.6V
0.018
1
0.016
0.014
0.012
0.01
IOL = 1.2 mA
0.1
VIN = 3.6V
VOUT2 = 2.5V
I
OUT2 = 50 mA
0.01
0.01
0.1
1
10
100
1000 10000
Ambient Temperature (°C)
Frequency (kHz)
FIGURE 2-32:
PG Output Voltage Level
FIGURE 2-35:
VOUT2 Noise vs. Frequency.
Low vs. Ambient Temperature.
VOUT2 = 2.8V
3.0
2.5
VOUT2 = 2.5V
2.0
1.5
VOUT2 = 1.5V
1.0
VIN = 3.6V
0.5
SHDN1 = VIN2
SHDN2 = VIN2
IOH = 500 µA
0.0
-40 -25 -10
5
20 35 50 65 80 95 110 125
Ambient Temperature (°C)
FIGURE 2-33:
PG Output Voltage Level
FIGURE 2-36:
VOUT1 Load Step Response
High vs. Ambient Temperature.
vs. Time.
© 2005 Microchip Technology Inc.
DS21949B-page 15
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, V = V = SHDN1,2 = 3.6V, C
= C = 4.7 µF, C
= 1 µF, L = 4.7 µH,
OUT2
IN1
IN2
OUT1
IN
V
(ADJ) = 1.8V, T = +25°C. Boldface specifications apply over the T range of -40°C to +85°C. T = +25°C. Adjustable- or fixed-
OUT1
A
A
A
output voltage options can be used to generate the Typical Performance Characteristics.
FIGURE 2-37:
vs. Time.
VOUT2 Load Step Response
VOUT1 and VOUT2 Line Step
VOUT1 and VOUT2 Start-up
FIGURE 2-40:
Waveforms.
V
OUT1 and VOUT2 Shutdown
FIGURE 2-38:
Response vs. Time.
FIGURE 2-41:
Power-Good Output Timing.
FIGURE 2-42:
Start-up Waveforms
FIGURE 2-39:
(TC1304).
Waveforms.
DS21949B-page 16
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
Note: Unless otherwise indicated, V = V = SHDN1,2 = 3.6V, C
= C = 4.7 µF, C
= 1 µF, L = 4.7 µH,
OUT2
IN1
IN2
OUT1
IN
V
(ADJ) = 1.8V, T = +25°C. Boldface specifications apply over the T range of -40°C to +85°C. T = +25°C. Adjustable- or fixed-
OUT1
A
A
A
output voltage options can be used to generate the Typical Performance Characteristics.
FIGURE 2-43:
Shutdown Waveforms
(TC1304).
© 2005 Microchip Technology Inc.
DS21949B-page 17
TC1303A/TC1303B/TC1303C/TC1304
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
Pin No.
PIN FUNCTION TABLE
TC1303
Name
TC1304
Name
Function
1
1
SHDN2
—
—
Active Low Shutdown Input for LDO Output Pin
SHDN
Active Low Shutdown Input both Buck Regulator Output and LDO Output.
Initiates sequencing up and down
2
3
4
5
6
VIN2
VOUT2
PG
VIN2
VOUT2
PG
Analog Input Supply Voltage Pin
LDO Output Voltage Pin
Power-Good Output Pin
Analog Ground Pin
AGND
AGND
V
FB/VOUT1 VFB/VOUT1 Buck Feedback Voltage (Adjustable Version) / Buck Output Voltage
(Fixed Version) Pin
7
7
SHDN1
—
—
Active Low Shutdown Input for Buck Regulator Output Pin
Analog Ground Pin
AGND
VIN1
LX
8
VIN1
LX
Buck Regulator Input Voltage Pin
Buck Inductor Output Pin
9
10
EP
PGND
PGND
Power Ground Pin
Exposed
Pad
Exposed For the DFN package, the center exposed pad is a thermal path to remove
Pad
heat from the device. Electrically this pad is at ground potential and should
be connected to AGND
3.1
TC1303 LDO Shutdown Input Pin
(SHDN2)
3.5
Power-Good Output Pin (PG)
PG is an output level indicating that VOUT2 (LDO) is
within 94% of regulation. The PG output is configured
as a push-pull for the TC1303B and open-drain output
for the TC1303A, TC1303C and TC1304.
SHDN2 is a logic-level input used to turn the LDO Reg-
ulator on and off. A logic-high (> 45% of VIN), will
enable the regulator output. A logic-low (< 15% of VIN)
will ensure that the output is turned off.
3.6
Analog Ground Pin (A
)
GND
3.2
TC1304 Shutdown Input Pin
(SHDN)
AGND is the analog ground connection. Tie AGND to the
analog portion of the ground plane (AGND). See the
physical layout information in Section 5.0 “Application
Circuits/Issues” for grounding recommendations.
SHDN is a logic-level input used to initiate the sequenc-
ing of the LDO output, then the buck regulator output.
A logic-high (> 45% of VIN), will enable the regulator
outputs. A logic-low (< 15% of VIN) will ensure that the
outputs are turned off.
3.7
Buck Regulator Output Sense Pin
(V /V
)
FB OUT1
For VOUT1 adjustable-output voltage options, connect
the center of the output voltage divider to the VFB pin.
For fixed-output voltage options, connect the output of
the buck regulator to this pin (VOUT1).
3.3
LDO Input Voltage Pin (V
)
IN2
VIN2 is a LDO power input supply pin. Connect variable
input voltage source to VIN2. Connect VIN1 and VIN2
together with board traces as short as possible. VIN2
provides the input voltage for the LDO. An additional
capacitor can be added to lower the LDO regulator
input ripple voltage.
3.8
Buck Regulator Shutdown Input
Pin (SHDN1)
SHDN1 is a logic-level input used to turn the buck
regulator on and off. A logic-high (> 45% of VIN), will
enable the regulator output. A logic-low (< 15% of VIN)
will ensure that the output is turned off.
3.4
LDO Output Voltage Pin (V
)
OUT2
VOUT2 is a regulated LDO output voltage pin. Connect
a 1 µF or larger capacitor to VOUT2 and AGND for proper
operation.
DS21949B-page 18
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
3.9
Buck Regulator Input Voltage Pin
(V
3.11 Power Ground Pin (P
)
GND
)
IN1
VIN1 is the buck regulator power input supply pin.
Connect a variable input voltage source to VIN1
Connect VIN1 and VIN2 together with board traces as
short as possible.
Connect all large-signal level ground returns to PGND
.
These large-signal, level ground traces should have a
small loop area and length to prevent coupling of
switching noise to sensitive traces. Please see the
physical layout information supplied in Section 5.0
“Application Circuits/Issues”
recommendations.
.
for
grounding
3.10 Buck Inductor Output Pin (L )
X
Connect LX directly to the buck inductor. This pin
carries large signal-level current; all connections
should be made as short as possible.
3.12 Exposed Pad (EP)
For the DFN package, connect the EP to AGND, with
vias into the AGND plane.
© 2005 Microchip Technology Inc.
DS21949B-page 19
TC1303A/TC1303B/TC1303C/TC1304
4.2.1
FIXED-FREQUENCY PWM MODE
4.0
4.1
DETAILED DESCRIPTION
Device Overview
While operating in Pulse Width Modulation (PWM)
mode, the TC1303/TC1304 buck regulator switches at
a fixed, 2.0 MHz frequency. The PWM mode is suited
for higher load current operation, maintaining low out-
put noise and high conversion efficiency. PFM-to-PWM
mode transition is initiated for any of the following
conditions:
The TC1303/TC1304 combines a 500 mA synchro-
nous buck regulator with a 300 mA LDO and a power-
good output. This unique combination provides a small,
low-cost solution for applications that require two or
more voltage rails. The buck regulator can deliver high-
output current over a wide range of input-to-output
voltage ratios while maintaining high efficiency. This is
typically used for the lower-voltage, high-current
processor core. The LDO is a minimal parts-count
solution (single-output capacitor), providing a regulated
voltage for an auxiliary rail. The typical LDO dropout
voltage (137 mV @ 200 mA) allows the use of very low
input-to-output LDO differential voltages, minimizing
the power loss internal to the LDO pass transistor. A
power-good output is provided, indicating that the buck
regulator output, the LDO output or both outputs are in
regulation. Additional features include independent
shutdown inputs (TC1303), UVLO, output voltage
• Continuous inductor current is sensed
• Inductor peak current exceeds 100 mA
• The buck regulator output voltage has dropped
out of regulation (step load has occurred)
The typical PFM-to-PWM threshold is 80 mA.
4.2.2
PFM MODE
PFM mode is entered when the output load on the buck
regulator is very light. Once detected, the converter
enters the PFM mode automatically and begins to skip
pulses to minimize unnecessary quiescent current
draw by reducing the number of switching cycles per
second. The typical quiescent current for the switching
regulator is less than 35 µA. The transition from PWM
to PFM mode occurs when discontinuous inductor
current is sensed or the peak inductor current is less
than 60 mA (typ.). The typical PWM to PFM mode
threshold is 30 mA. For low input-to-output differential
voltages, the PWM-to-PFM mode threshold can be low
due to the lack of ripple current. It is recommended that
VIN1 be one volt greater than VOUT1 for PWM-to-PFM
transitions.
sequencing
overtemperature shutdown.
(TC1304),
overcurrent
and
4.2
Synchronous Buck Regulator
The synchronous buck regulator is capable of supply-
ing a 500 mA continuous output current over a wide
range of input and output voltages. The output voltage
range is from 0.8V (min) to 4.5V (max). The regulator
operates in three different modes, automatically select-
ing the most efficient mode of operation. During heavy
load conditions, the TC1303/TC1304 buck converter
operates at a high, fixed frequency (2.0 MHz) using
current mode control. This minimizes output ripple and
noise (less than 8 mV peak-to-peak ripple) while main-
taining high efficiency (typically > 90%). For standby or
light load applications, the buck regulator will automat-
ically switch to a power-saving Pulse Frequency
Modulation (PFM) mode. This minimizes the quiescent
current draw on the battery, while keeping the buck
output voltage in regulation. The typical buck PFM
mode current is 38 µA. The buck regulator is capable of
operating at 100% duty cycle, minimizing the voltage
drop from input-to-output for wide input, battery-
powered applications. For fixed-output voltage applica-
tions, the feedback divider and control loop compensa-
tion components are integrated, eliminating the need
for external components. The buck regulator output is
protected against overcurrent, short circuit and over-
temperature. While shut down, the synchronous buck
N-channel and P-channel switches are off, so the LX
pin is in a high-impedance state (this allows for
connecting a source on the output of the buck regulator
as long as its voltage does not exceed the input
voltage).
4.3
Low Drop Out Regulator (LDO)
The LDO output is a 300 mA low-dropout linear regula-
tor that provides a regulated output voltage with a
single 1 µF external capacitor. The output voltage is
available in fixed options only, ranging from 1.5V to
3.3V. The LDO is stable using ceramic output capaci-
tors that inherently provide lower output noise and
reduce the size and cost of the regulator solution. The
quiescent current consumed by the LDO output is
typically less than 40 µA, with a typical dropout voltage
of 137 mV at 200 mA. While operating in Dropout
mode, the LDO quiescent current will increase, mini-
mizing the necessary voltage differential needed for the
LDO output to maintain regulation. The LDO output is
protected against overcurrent and overtemperature
conditions.
DS21949B-page 20
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
4.4
Power-Good
4.5
Power Good Output Options
A Power-Good (PG) output signal is generated based
off of the buck regulator output voltage (VOUT1), the
LDO output voltage (VOUT2) or the combination of both
outputs. A fixed delay time of approximately 262 ms is
generated once the monitored output voltage is above
the power-good threshold (typically 94% of VOUTX). As
the monitored output voltage falls out of regulation, the
falling PG threshold is typically 92% of the output
voltage. The PG output signal is pulled up to the output
voltage, indicating that power is good and pulled low,
indicating that the output is out of regulation. The typi-
cal quiescent current draw for power-good circuitry is
less than 10 µA.
There are three monitoring options for the TC1303
family.
For the TC1303A, only the buck regulator output
voltage (VOUT1) is monitored. The PG output signal
depends only on VOUT1
For the TC1303B, only the LDO output voltage (VOUT2
is monitored. The PG output signal depends only on
VOUT2
.
)
.
For the TC1303C and TC1304, both the buck regulator
output voltage and LDO output voltage are monitored.
If either one of the outputs fall out of regulation, the PG
will be low. Only if both VOUT1 and VOUT2 are within the
PG voltage threshold limits will the PG output be high.
If the monitored output voltage falls below the power-
good threshold, the power-good output will transition to
the Low state. The power-good circuitry has a 165 µs
delay when detecting a falling output voltage. This
helps to increase the noise immunity of the power-good
output, avoiding false triggering of the PG signal during
line and load transients.
For the TC1303A,C and TC1304, the PG output pin is
open drain and can be pulled up to any level within the
given absolute maximum ratings (AGND - 0.3V) to (VIN
+ 0.3V).
TABLE 4-1:
PG AVAILABLE OPTIONS
PG
PG Output
Part
Number
Output
LDO
PG Output
Type
VTH_H
VOUT1
Buck
(VOUT1
)
(VOUT2
)
or VOUT2
tRPU
TC1303A
TC1303B
Yes
No
No
Open-Drain
Push-Pull
Yes
(VOUT2
)
VOH
tRPD
TC1303C
TC1304
Yes
Yes
Yes
Yes
Open-Drain
Open-Drain
PG
VOL
FIGURE 4-1:
Power-Good Timing.
© 2005 Microchip Technology Inc.
DS21949B-page 21
TC1303A/TC1303B/TC1303C/TC1304
the turn on of the Buck Regulator output (VOUT1) until
the LDO output is in regulation. During power-down,
the sequencing circuit will turn off the Buck Regulator
output prior to turning off LDO output.
4.6
TC1304 Sequencing
The TC1304 device features an integrated sequencing
option. A sequencing circuit using only the SHDN input,
(Pin1), will turn on the LDO output (VOUT2) and delay
160 µs Delay*
+
–
V
SHDN
OUT2
Enable
To PG
Delay CKT.
92% of V
OUT2
+
–
160 µs Delay*
V
OUT1
Enable
92% of V
OUT1
* 160 µs delay on trailing edge
FIGURE 4-2:
TC1304 Sequencing Circuit.
4.7
Soft Start
TC1304
Power Up Timing From SHDN
Both outputs of the TC1303/TC1304 are controlled
during start-up. Less than 1% of VOUT1 or VOUT2 over-
shoot is observed during start-up from VIN rising above
the UVLO voltage or either SHDN1 or SHDN2 being
enabled.
V
/V
IN1 IN2
4.8
Overtemperature Protection
SHDN
500 µs
The TC1303/TC1304 has an integrated overtempera-
ture protection circuit that monitors the device junction
temperature and shuts the device off if the junction tem-
perature exceeds the typical 165°C threshold. If the
overtemperature threshold is reached, the soft start is
reset so that, once the junction temperature cools to
approximately 155°C, the device will automatically
restart.
V
OUT1
OUT2
t
+ t
S
WK
V
300ms
Power Good
FIGURE 4-3:
TC1304 Power-up Timing
from SHDN.
DS21949B-page 22
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
An additional VIN2 capacitor can be added to reduce
5.0
5.1
APPLICATION
CIRCUITS/ISSUES
high-frequency noise on the LDO input voltage pin
(VIN2). This additional capacitor (1 µF on page 5) is not
necessary for typical applications.
Typical Applications
5.4
Input and Output Capacitor
Selection
The TC1303/TC1304 500 mA buck regulator + 300 mA
LDO with power-good operates over a wide input volt-
age range (2.7V to 5.5V) and is ideal for single-cell Li-
Ion battery-powered applications, USB-powered appli-
cations, three-cell NiMH or NiCd applications and 3V to
5V regulated input applications. The 10-pin MSOP and
3X3 DFN packages provide a small footprint with
minimal external components.
As with all buck-derived dc-dc switching regulators, the
input current is pulled from the source in pulses. This
places a burden on the TC1303/TC1304 input filter
capacitor. In most applications, a minimum of 4.7 µF is
recommended on VIN1 (buck regulator input voltage
pin). In applications that have high source impedance,
or have long leads, (10 inches) connecting to the input
source, additional capacitance should be used. The
capacitor type can be electrolytic (aluminum, tantalum,
POSCAP, OSCON) or ceramic. For most portable elec-
tronic applications, ceramic capacitors are preferred
due to their small size and low cost.
5.2
Fixed Output Application
A typical VOUT1 fixed-output voltage application is
shown in “Typical Application Circuits”. A 4.7 µF
VIN1 ceramic input capacitor, 4.7 µF VOUT1 ceramic
capacitor, 1.0 µF ceramic VOUT2 capacitor and 4.7 µH
inductor make up the entire external component solu-
tion for this dual-output application. No external divid-
ers or compensation components are necessary. For
this application, the input voltage range is 2.7V to 4.2V,
VOUT1 = 1.5V at 500 mA, while VOUT2 = 2.5V at
300 mA.
For applications that require very low noise on the LDO
output, an additional capacitor (typically 1 µF) can be
added to the VIN2 pin (LDO input voltage pin).
Low ESR electrolytic or ceramic can be used for the
buck regulator output capacitor. Again, ceramic is
recommended because of its physical attributes and
cost. For most applications, a 4.7 µF is recommended.
Refer to Table 5-1 for recommended values. Larger
capacitors (up to 22 µF) can be used. There are some
advantages in load step performance when using
larger value capacitors. Ceramic materials X7R and
X5R have low temperature coefficients and are well
within the acceptable ESR range required.
5.3
Adjustable Output Application
A typical VOUT1 adjustable output application is also
shown in “Typical Application Circuits”. For this
application, the buck regulator output voltage is adjust-
able by using two external resistors as a voltage
divider. For adjustable-output voltages, it is recom-
mended that the top resistor divider value be 200 kΩ.
The bottom resistor divider can be calculated using the
following formula:
TABLE 5-1:
TC1303A, TC1303B, TC1303C,
TC1304 RECOMMENDED
CAPACITOR VALUES
EQUATION 5-1:
C(VIN1
4.7 µF
none
)
C(VIN2
)
COUT1
COUT2
VFB
⎛
⎝
⎞
⎠
min
none
none
4.7 µF
22 µF
1 µF
--------------------------------
RBOT = RTOP
×
VOUT1 – VFB
max
10 µF
Example:
RTOP
VOUT1
VFB
=
=
=
=
=
200 kΩ
2.1V
0.8V
RBOT
RBOT
200 kΩ x (0.8V/(2.1V – 0.8V))
123 kΩ (Standard Value = 121 kΩ)
For adjustable-output applications, an additional R-C
compensation is necessary for the buck regulator
control loop stability. Recommended values are:
RCOMP
CCOMP
=
=
4.99 kΩ
33 pF
© 2005 Microchip Technology Inc.
DS21949B-page 23
TC1303A/TC1303B/TC1303C/TC1304
TABLE 5-2:
TC1303A, TC1303B, TC1303C,
TC1304 RECOMMENDED
INDUCTOR VALUES
5.5
Inductor Selection
For most applications, a 4.7 µH inductor is recom-
mended to minimize noise. There are many different
magnetic core materials and package options to select
from. That decision is based on size, cost and accept-
able radiated energy levels. Toroid and shielded ferrite
pot cores will have low radiated energy, but tend to be
larger and higher is cost. With a typical 2.0 MHz switch-
ing frequency, the inductor ripple current can be
calculated based on the following formulas.
DCR
Ω
(MAX)
Part
Value
MAX
Size
Number (µH)
IDC (A) WxLxH (mm)
Coiltronics®
SD10
SD10
2.2
3.3
4.7
0.091 1.35 5.2, 5.2, 1.0 max.
0.108 1.24 5.2, 5.2, 1.0 max.
0.154 1.04 5.2, 5.2, 1.0 max.
SD10
EQUATION 5-2:
Coiltronics
SD12
VOUT
2.2
3.3
4.7
0.075 1.80 5.2, 5.2, 1.2 max.
0.104 1.42 5.2, 5.2, 1.2 max.
0.118 1.29 5.2, 5.2, 1.2 max.
-------------
DutyCycle =
VIN
SD12
SD12
Sumida Corporation®
Duty cycle represents the percentage of switch-on
time.
CMD411
CMD411
CMD411
Coilcraft®
1008PS
2.2
3.3
4.7
0.116 0.950 4.4, 5.8, 1.2 max.
0.174 0.770 4.4, 5.8, 1.2 max.
0.216 0.750 4.4, 5.8, 1.2 max.
EQUATION 5-3:
1
FSW
---------
TON = DutyCycle ×
4.7
4.7
0.35
0.11
1.0 3.8, 3.8, 2.74 max.
1.15 5.9, 5.0, 3.81 max
Where:
FSW = Switching Frequency.
1812PS
5.6
Thermal Calculations
The inductor ac ripple current can be calculated using
the following relationship:
5.6.1
BUCK REGULATOR OUTPUT
(VOUT1
)
EQUATION 5-4:
The TC1303/TC1304 is available in two different 10-pin
packages (MSOP and 3X3 DFN). By calculating the
power dissipation and applying the package thermal
resistance, (θJA), the junction temperature is estimated.
The maximum continuous junction temperature rating
for the TC1303/TC1304 is +125°C.
ΔIL
Δt
--------
VL = L ×
Where:
VL = voltage across the inductor (VIN – VOUT
)
Δt = on-time of P-channel MOSFET
To quickly estimate the internal power dissipation for
the switching buck regulator, an empirical calculation
using measured efficiency can be used. Given the
measured efficiency (Section 2.0 “Typical Perfor-
mance Curves”), the internal power dissipation is
estimated below:
Solving for ΔIL = yields:
EQUATION 5-5:
VL
-----
ΔIL
=
× Δt
L
EQUATION 5-6:
When considering inductor ratings, the maximum DC
current rating of the inductor should be at least equal to
the maximum buck regulator load current (IOUT1), plus
one half of the peak-to-peak inductor ripple current
(1/2 * ΔIL). The inductor DC resistance can add to the
buck converter I2R losses. A rating of less than 200 mΩ
is recommended. Overall efficiency will be improved by
using lower DC resistance inductors.
VOUT1 × IOUT1
Efficiency
⎛
⎝
⎞
⎠
-------------------------------------
– (VOUT1 × IOUT1) = PDissipation
The first term is equal to the input power (definition of
efficiency, POUT/PIN = Efficiency). The second term is
equal to the delivered power. The difference is internal
power dissipation. This is an estimate assuming that
most of the power lost is internal to the TC1303B.
There is some percentage of power lost in the buck
inductor, with very little loss in the input and output
capacitors.
DS21949B-page 24
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
As an example, for a 3.6V input, 1.8V output with a load
components are placed near their respective pins to
minimize trace length. The CIN1 and COUT1 capacitor
returns are connected closely together at the PGND
plane. The LDO optional input capacitor (CIN2) and
LDO output capacitor COUT2 are returned to the AGND
plane. The analog ground plane and power ground
plane are connected at one point (shown near L1). All
other signals (SHDN1, SHDN2, feedback in the
adjustable-output case) should be referenced to AGND
and have the AGND plane underneath them.
of 400 mA, the efficiency taken from Figure 2-8 is
approximately 84%. The internal power dissipation is
approximately 137 mW.
5.6.2
The
LDO OUTPUT (VOUT2
)
internal power dissipation
within
the
TC1303/TC1304 LDO is a function of input voltage,
output voltage and output current. Equation 5-7 can be
used to calculate the internal power dissipation for the
LDO.
- Via
A
to P
GND
GND
EQUATION 5-7:
PLDO = (VIN(MAX )) – VOUT2(MIN)) × IOUT2(MAX ))
+V
OUT1
* C
Optional
IN2
C
OUT1
Where:
L
1
A
GND
PLDO
= LDO Pass device internal
power dissipation
P
GND
C
IN2
1
2
3
4
5
10
9
VIN(MAX) = Maximum input voltage
C
IN1
+V
+V
IN2
VOUT(MIN)= LDO minimum output voltage
+V
IN1
8
OUT2
7
C
OUT2
The maximum power dissipation capability for a
package can be calculated given the junction-to-
ambient thermal resistance and the maximum ambient
temperature for the application. The following equation
can be used to determine the package’s maximum
internal power dissipation.
6
TC1303B
P
Plane
GND
A
GND
A
Plane
GND
FIGURE 5-1:
Fixed 10-Pin MSOP.
Component Placement,
There will be some difference in layout for the 10-pin
DFN package due to the thermal pad. A typical fixed-
output DFN layout is shown below. For the DFN layout,
the VIN1 to VIN2 connection is routed on the bottom of
the board around the TC1303/TC1304 thermal pad.
5.6.3
LDO POWER DISSIPATION
EXAMPLE
Input Voltage
VIN = 5V±10%
LDO Output Voltage and Current
VOUT = 3.3V
- Via
+V
A
to P
GND
OUT1
GND
IOUT = 300 mA
* C
Optional
IN2
Internal Power Dissipation
PLDO(MAX) = (VIN(MAX) – VOUT2(MIN)) x IOUT2(MAX)
PLDO = (5.5V – 0.975 x 3.3V) x 300 mA
PLDO = 684.8 mW
C
OUT1
L
A
1
GND
PGND
C
IN2
1
2
3
4
5
10
9
P
GND
+V
IN2
C
IN1
5.7
PCB Layout Information
8
+V
OUT2
+V
IN1
7
Some basic design guidelines should be used when
physically placing the TC1303/TC1304 on a Printed
Circuit Board (PCB). The TC1303/TC1304 has two
ground pins, identified as AGND (analog ground) and
PGND (power ground). By separating grounds, it is
possible to minimize the switching frequency noise on
the LDO output. The first priority, while placing external
components on the board, is the input capacitor (CIN1).
Wiring should be short and wide; the input current for
the TC1303/TC1304 can be as high as 800 mA. The
next priority would be the buck regulator output
capacitor (COUT1) and inductor (L1). All three of these
C
OUT2
6
TC1303B
A
GND
P
Plane
GND
A
Plane
GND
FIGURE 5-2:
Fixed 10-Pin DFN.
Component Placement,
© 2005 Microchip Technology Inc.
DS21949B-page 25
TC1303A/TC1303B/TC1303C/TC1304
5.8
Design Example
VOUT1 = 2.0V @ 500 mA
VOUT2 = 3.3V @ 300 mA
VIN = 5V±10%
L = 4.7µH
Calculate PWM mode inductor ripple current
Nominal Duty
Cycle = 2.0V/5.0V = 40%
P-channel
Switch-on time = 0.40 x 1/(2 MHz) = 200 ns
VL = (VIN-VOUT1) = 3V
ΔIL = (VL/L) x TON = 128 mA
Peak inductor current:
IL(PK) = IOUT1+1/2ΔIL = 564 mA
Switcher power loss:
Use efficiency estimate for 1.8V from Figure 2-8
Efficiency = 84%, PDISS1 = 190 mW
Resistor Divider:
RTOP = 200 kΩ
RBOT = 133 kΩ
LDO Output:
PDISS2 = (VIN(MAX)
–
VOUT2(MIN)) x IOUT2(MAX)
PDISS2 = (5.5V – (0.975) x 3.3V) x 300 mA
PDISS2 = 684.8 mW
Total
Dissipation = 190 mW + 685 mW = 874 mW
Junction Temp Rise and Maximum Ambient
Operating Temperature Calculations
10-Pin MSOP (4-Layer Board with internal Planes)
RθJA = 113° C/Watt
Junction Temp.
Rise = 874 mW x 113° C/Watt = 98.8°C
Max. Ambient
Temperature = 125°C - 98.8°C
Max. Ambient
Temperature = 26.3°C
10-Pin DFN
RθJA = 41° C/Watt (4-Layer Board with
internal planes and 2 vias)
Junction Temp.
Rise = 874 mW x 41° C/Watt = 35.8°C
Max. Ambient
Temperature = 125°C - 35.8°C
Max. Ambient
Temperature = 89.2°C
This is above the +85°C max. ambient temperature.
DS21949B-page 26
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
10-Lead MSOP*
Example:
10-Lead DFN
Example:
— 1 = TC1303B
— 2 = TC1303A
— 3 = TC1303C
— 4 = TC1304
— 1 = 1.375V VOUT1
— H = 2.6V VOUT2
— 0 = Default
XXXX
YYWW
NNN
11H0
0520
256
XXXXXX
YWWNNN
11H0/E
520256
* The MSOP package for this device has not
been qualified at the time of this publication.
Contact your Microchip sales office for
availability.
Third letter represents VOUT2 configuration:
Code VOUT2 Code VOUT1 Code VOUT2
A
B
C
D
E
F
G
H
I
3.3V
3.2V
3.1V
3.0V
2.9V
2.8V
2.7V
2.6V
2.5V
J
K
L
2.4V
2.3V
2.2V
2.1V
2.0V
1.9V
1.8V
1.7V
1.6V
S
T
1.5V
—
Second letter represents VOUT1 configuration:
U
V
W
X
Y
Z
—
M
N
O
P
Q
R
—
Code VOUT1 Code VOUT1 Code VOUT1
—
A
B
C
D
E
F
G
H
I
3.3V
3.2V
3.1V
3.0V
2.9V
2.8V
2.7V
2.6V
2.5V
J
K
L
2.4V
2.3V
2.2V
2.1V
2.0V
1.9V
1.8V
1.7V
1.6V
S
T
1.5V
1.4V
1.3V
1.2V
1.1V
1.0V
0.9V
Adj
—
—
U
V
W
X
Y
Z
—
M
N
O
P
Q
R
Fourth letter represents +50 mV Increments:
Code
Code
0
1
Default
2
3
+50 mV to V2
1
1.375V
+50 mV to V1
+50 mV to V1
and V2
Legend: XX...X Customer-specific information
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2005 Microchip Technology Inc.
DS21949B-page 27
TC1303A/TC1303B/TC1303C/TC1304
10-Lead Plastic Dual Flat No Lead Package (MF) 3x3x0.9 mm Body (DFN) – Saw Singulated
p
b
E
n
L
D
D2
EXPOSED
METAL
PAD
2
1
PIN 1
ID INDEX
AREA
E2
TOP VIEW
BOTTOM VIEW
(NOTE 2)
A
EXPOSED
TIE BAR
A3
A1
(NOTE 1)
Units
INCHES
NOM
MILLIMETERS*
Dimension Limits
MIN
MAX
MIN
NOM
10
MAX
n
e
Number of Pins
Pitch
10
.020 BSC
0.50 BSC
0.90
Overall Height
Standoff
A
.031
.035
.001
.008 REF.
.039
.002
0.80
1.00
A1
A3
E
.000
0.00
0.02
0.05
Lead Thickness
Overall Length
Exposed Pad Length
Overall Width
Exposed Pad Width
Lead Width
0.20 REF.
3.00
.112
.055
.112
.047
.008
.012
.118
--
.124
.096
.124
.069
.015
.020
2.85
1.39
2.85
1.20
0.18
0.30
3.15
2.45
3.15
1.75
0.30
0.50
(Note 3)
(Note 3)
E2
D
--
.118
--
3.00
D2
b
--
.010
.016
0.25
Lead Length
L
0.40
*Controlling Parameter
Notes:
1. Package may have one or more exposed tie bars at ends.
2. Pin 1 visual index feature may vary, but must be located within the hatched area.
3. Exposed pad dimensions vary with paddle size.
4. JEDEC equivalent: Not registered
Drawing No. C04-063
Revised 05/24/04
DS21949B-page 28
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
10-Lead Plastic Micro Small Outline Package (UN) (MSOP*)
E
E1
p
D
2
1
B
n
α
A
φ
c
A2
A1
L
(F)
β
L1
Units
Dimension Limits
INCHES
MILLIMETERS*
NOM
MIN
NOM
MAX
MIN
MAX
n
p
Number of Pins
Pitch
10
10
.020 TYP
0.50 TYP.
Overall Height
A
A2
A1
E
-
-
.033
-
.043
-
-
1.10
0.95
0.15
Molded Package Thickness
Standoff
.030
.037
0.75
0.85
.000
.006
0.00
-
Overall Width
.193 BSC
4.90 BSC
Molded Package Width
Overall Length
Foot Length
E1
D
.118 BSC
3.00 BSC
.118 BSC
3.00 BSC
L
.016
.024
.031
0.40
0.60
0.80
Footprint
F
.037 REF
0.95 REF
φ
c
Foot Angle
0°
.003
.006
5°
-
8°
.009
.012
15°
0°
0.08
0.15
5°
-
8°
0.23
0.30
15°
Lead Thickness
Lead Width
-
-
B
α
β
.009
0.23
Mold Draft Angle Top
Mold Draft Angle Bottom
*Controlling Parameter
Notes:
-
-
-
-
5°
15°
5°
15°
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.
JEDEC Equivalent: MO-187
Drawing No. C04-021
* The MSOP package for the TC1303B has not been qualified at the time of this publication.
Contact your Microchip sales office for availability.
© 2005 Microchip Technology Inc.
DS21949B-page 29
TC1303A/TC1303B/TC1303C/TC1304
NOTES:
DS21949B-page 30
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
APPENDIX A: REVISION HISTORY
Revision B (July 2005)
1. Added information on TC1303A, TC1303C and
TC1304 throughout data sheet.
Revision A (June 2005)
• Original Release of this Document.
© 2005 Microchip Technology Inc.
DS21949B-page 31
TC1303A/TC1303B/TC1303C/TC1304
NOTES:
DS21949B-page 32
© 2005 Microchip Technology Inc.
TC1303A/TC1303B/TC1303C/TC1304
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
TC1303
X-
X
X
X
X
XX
XX
a)
b)
c)
TC1303A-SI0EMF:
1.5V, 2.5V, Default,
10LD DFN pkg.
Adj, 3.3V, Default,
10LD MSOP pkg.
Type
B
V
V
+50 mV Temp Package Tube
Increments
OUT1
OUT2
or
Tape &
Reel
Range
TC1303A-ZA0EUN:
TC1303A-PP3EMFTR: 1.8V, 1.8V, +50 mV,
10LD DFN pkg.
Tape and Reel
Device:
Options
TC1303A: PWM/LDO combo with Power-Good
TC1303B: PWM/LDO combo with Power-Good
TC1303C: PWM/LDO combo with Power-Good
TC1304: PWM/LDO combo with Power-Good
a)
TC1303B-1H0EMF:
1.375V, 2.6V, Default,
10LD DFN pkg.
3.3V, 2.7V, Default,
10LD MSOP pkg.
3.3V, 3.0V, Default,
10LD DFN pkg.
2.5V, 3.3V, Default,
10LD MSOP pkg.
2.5V, 3.3V, Default,
10LD DFN pkg.
1.8V, 2.8V, Default,
10LD MSOP pkg.
1.8V, 2.8V, Default,
10LD DFN pkg.
b)
c)
d)
e)
f)
TC1303B-AG0EUN:
TC1303B-AD0EMF:
TC1303B-IA0EUN:
TC1303B-IA0EMF:
TC1303B-PF0EUN:
TC1303B-PF0EMF:
TC1303B-PG0EUN:
Code
VOUT1
Code
VOUT2
Code
+50 mV
A
B
C
D
E
F
G
H
I
3.3V
3.2V
3.1V
3.0V
2.9V
2.8V
2.7V
2.6V
2.5V
2.4V
2.3V
2.2V
2.1V
2.0V
1.9V
1.8V
1.7V
1.6V
1.5V
1.4V
1.3V
1.2V
1.1V
1.0V
0.9V
Adjustable
1.375V
A
B
C
D
E
F
G
H
I
3.3V
3.2V
3.1V
3.0V
2.9V
2.8V
2.7V
2.6V
2.5V
2.4V
2.3V
2.2V
2.1V
2.0V
1.9V
1.8V
1.7V
1.6V
1.5V
0
1
2
3
Default
+50 mV to V1
+50 mV to V2
+50 mV to V1
and V2
g)
h)
i)
1.8V, 2.7V, Default,
10LD MSOP pkg.
J
K
L
J
K
L
TC1303B-DG0EMFTR: 3.0V, 2.7V, Default,
10LD DFN pkg.
M
N
O
P
Q
R
S
T
U
V
W
X
Y
Z
M
N
O
P
Q
R
S
T
U
V
W
X
Y
Z
Tape and Reel
a)
b)
TC1303C-VP0EMF:
1.2V, 1.8V, Default,
10LD DFN pkg.
TC1303C-VP0EMFTR: 1.2V, 1.8V, Default,
10LD DFN pkg.
Tape and Reel.
a)
TC1304-VI0EMF:
1.2V, 2.5V, Default,
10LD DFN pkg.
1.2V, 1.8V, Default,
10LD DFN pkg.
1.2V, 2.5V, Default,
10LD MSOP pkg.
1.2V, 2.5V, Default,
10LD DFN pkg.
b)
c)
d)
TC1304-VP0EMF:
TC1304-VI0EUN:
TC1304-VI0EMFTR:
1
1
* Contact Factory for Alternate Output Voltage and Reset
Voltage Configurations.
Tape and Reel.
1.2V, 1.8V, Default
10LD DFN pkg.
e)
f)
TC1304-VP0EMFTR:
TC1304-VI0EUNTR:
Tape and Reel.
Temperature
Range:
E
= -40°C to +85°C
1.2V, 2.5V, Default,
10LD MSOP pkg.
Tape and Reel.
Package:
MF
UN
=
=
Dual Flat, No Lead (3x3 mm body), 10-lead
Plastic Micro Small Outline (MSOP), 10-lead
(The MSOP package for this device has not been
qualified at the time of this publication. Contact your
Microchip sales office for availability.)
Tube or
Tape and Reel:
Blank
TR
=
=
Tube
Tape and Reel
© 2005 Microchip Technology Inc.
DS21949B-page 33
TC1303A/TC1303B/TC1303C/TC1304
NOTES:
DS21949B-page 34
© 2005 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
WRITTEN OR ORAL, STATUTORY OR OTHERWISE,
RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
its use. Use of Microchip’s products as critical components in
life support systems is not authorized except with express
written approval by Microchip. No licenses are conveyed,
implicitly or otherwise, under any Microchip intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro,
PICSTART, PRO MATE, PowerSmart, rfPIC, and
SmartShunt are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
PICMASTER, SEEVAL, SmartSensor and The Embedded
Control Solutions Company are registered trademarks of
Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Linear Active Thermistor,
MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM,
PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo,
PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode,
Smart Serial, SmartTel, Total Endurance and WiperLock are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2005, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2005 Microchip Technology Inc.
DS21949B-page 35
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
India - Bangalore
Tel: 91-80-2229-0061
Fax: 91-80-2229-0062
Austria - Weis
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-5160-8631
Fax: 91-11-5160-8632
China - Chengdu
Tel: 86-28-8676-6200
Fax: 86-28-8676-6599
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
Atlanta
China - Fuzhou
Tel: 86-591-8750-3506
Fax: 86-591-8750-3521
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
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Tel: 770-640-0034
Fax: 770-640-0307
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Korea - Seoul
Boston
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
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Tel: 86-532-502-7355
Fax: 86-532-502-7205
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Fax: 604-646-5086
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
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Tel: 34-91-352-30-52
Fax: 34-91-352-11-47
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Fax: 86-21-5407-5066
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Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
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Tel: 011-632-634-9065
Fax: 011-632-634-9069
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
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Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenzhen
Detroit
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
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Tel: 248-538-2250
Fax: 248-538-2260
Taiwan - Hsinchu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
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Tel: 86-757-2839-5507
Fax: 86-757-2839-5571
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
China - Xian
Tel: 86-29-8833-7250
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
San Jose
Mountain View, CA
Tel: 650-215-1444
Fax: 650-961-0286
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
07/01/05
DS21949B-page 36
© 2005 Microchip Technology Inc.
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