TA100-Y230C2X01-00B-VAO [MICROCHIP]
CryptoAutomotive⢠TA100 (B5) Summary Data Sheet;型号: | TA100-Y230C2X01-00B-VAO |
厂家: | MICROCHIP |
描述: | CryptoAutomotive⢠TA100 (B5) Summary Data Sheet |
文件: | 总28页 (文件大小:718K) |
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TA100 (B5)
™
CryptoAutomotive TA100 (B5) Summary Data Sheet
Description
The Microchip Technology Inc. Trust Anchor security device TA100 is intended for automotive, industrial, or
commercial systems and can provide support for code authentication (secure boot), Message Authentication Code
(MAC) generation, support for trusted firmware updates, multiple key management protocols including Transport
Layer Security (TLS), and other root-of-trust-based operations.
It is typically a companion device to an MCU or MPU on the same board.
Features
•
•
•
Advanced Crypto Engine (ACE) for Execution of All Cryptography Commands
Fast Crypto Engine for SHA-256, HMAC and AES-CMAC Algorithms
Sign/Verify Support:
– ECDSA – P224, P256, P384 and 256-bit Brainpool elliptic curves
– ECDSA – SECP256K1 (Bitcoin/Blockchain) curve
– RSA 2048-bit signature generation and verification
– RSA 3072-bit signature verification only
•
•
ECDH/ECDHE/ECBD Key Agreement Support
– Elliptic-Curve Diffie-Hellman (ECDH) Support for P224, P256, P384 and 256-bit Brainpool
– Elliptic-Curve Burmeiseter-Desmedt (ECBD) Support for P224 Curve
Internal Symmetric and Asymmetric Key Generation and Derivation:
– P224, P256, P384 and 256-Bit Brainpool
– 2048-bit RSA keys
– AES 16-byte keys
•
AES and RSA Encryption / Decryption Support
– AES ECB/GCM Encryption/Decryption Supported directly
– RSA 1024-bit and 2048-bit Keys Encryption/Decryption Support
NIST SP800-90 A/B/C Random Number Generator (RNG)
Multiple I/O Options for Security Commands Include:
– 1 MHz standard I2C interface
•
•
– 16 MHz SPI interface
•
Package Options:
– 8-lead SOIC
– 14-lead SOIC
•
•
Voltage Supply Range: 2.7V to 5.5V
Automotive Temperature Range: -40°C to +125°C Ambient Operating Range
Applications
•
Full and Partial Secure Boot
DS20006369C-page 1
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
•
•
•
•
•
•
Secure Firmware Update
CAN Message Authentication
WPC 1.3 Qi High Power Transmitter Authentication
High-Bandwidth Digital Content Protection (HDCP) Cryptographic Support
Network Authentication and Session Establishment using TLS
Electric Vehicle (EV) Battery Authentication
DS20006369C-page 2
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Table of Contents
Description..................................................................................................................................................... 1
Features......................................................................................................................................................... 1
Applications....................................................................................................................................................1
1. Pin Configuration.....................................................................................................................................4
1.1. SOIC-8 Pinout with SPI Interface.................................................................................................4
1.2. SOIC-8 Pinout with I2C Interface..................................................................................................4
1.3. SOIC-14 Pinout with I2C and SPI Interface..................................................................................5
2. Overview................................................................................................................................................. 7
3. Device Features......................................................................................................................................8
4. Nonvolatile Memory................................................................................................................................ 9
5. Security Features..................................................................................................................................10
6. Electrical Characteristics....................................................................................................................... 11
6.1. Absolute Maximum Ratings........................................................................................................11
6.2. DC Characteristics......................................................................................................................11
6.3. AC Characteristics......................................................................................................................12
6.3.1.
6.3.2.
6.3.3.
All Interfaces................................................................................................................12
I2C Interface Timing.....................................................................................................13
SPI Interface Timing.................................................................................................... 14
7. Package Marking Information............................................................................................................... 16
8. Package Drawings................................................................................................................................ 17
8.1. 8-Lead SOIC.............................................................................................................................. 17
8.2. 14-Lead SOIC............................................................................................................................ 20
9. Revision History.................................................................................................................................... 23
The Microchip Website.................................................................................................................................24
Product Change Notification Service............................................................................................................24
Customer Support........................................................................................................................................ 24
Product Identification System.......................................................................................................................25
Microchip Devices Code Protection Feature................................................................................................26
Legal Notice................................................................................................................................................. 26
Trademarks.................................................................................................................................................. 26
Quality Management System....................................................................................................................... 27
Worldwide Sales and Service.......................................................................................................................28
DS20006369C-page 3
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Pin Configuration
1.
Pin Configuration
The TA100 device comes in three package configuration options based on the desired I/O interface. These include:
•
•
•
SPI only interface in 8-pin SOIC
I2C only interface in 8-pin SOIC
SPI and I2C interfaces in 14-pin SOIC
Based on the configuration selected, different GPIO options are available.
1.1
SOIC-8 Pinout with SPI Interface
The 8-pin SOIC SPI interface consists of the four SPI signals, a Reset signal and GPIO_3.
Table 1-1. 8-Pin SOIC SPI Pin Configuration
Pin Name
CS
Pin Number
Function
1
2
3
4
5
6
7
8
Chip Select for SPI
Reset Input, active low
GPIO_3
RESET
GPIO_3
VSS
Ground
SI
SPI Serial Data Input
SPI Clock
SCK
SO
SPI Serial Data Output
2.7V-5.5V Power Supply
VCC
Figure 1-1. Pinout
SPI I/O
RESET
GPIO
8
CS
RESET
1
VCC
SO
SCK
SI
7
6
5
2
3
4
GPIO_3
VSS
Pwr/Gnd
1.2
SOIC-8 Pinout with I2C Interface
Pull-up resistors are required for proper operation of the I2C bus, sized according to the board configuration and bus
speed per the I2C specification.
Table 1-2. 8-Pin SOIC I2C Pin Configuration
Pin Name
GPIO_1
GPIO_2
GPIO_3
VSS
Pin Number
Function
GPIO_1
GPIO_2
GPIO_3
Ground
1
2
3
4
DS20006369C-page 4
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Pin Configuration
...........continued
Pin Name
Pin Number
Function
SDA
5
6
7
8
I2C Data
SCL
I2C Clock
RESET
VCC
Reset Input, active low
2.7V-5.5V Power Supply
Figure 1-2. Pinout
VCC
RESET
GPIO
1
2
3
4
8
7
6
5
GPIO_1
GPIO_2
GPIO_3
VSS
RESET
SCL
SDA
Pwr/Gnd
I2C I/O
1.3
SOIC-14 Pinout with I2C and SPI Interface
In the 14-pin package, there is access to both the I2C and SPI bus pins. Both can be used simultaneously. However,
any concurrent transactions must be to different blocks in the device.
Pull-up resistors are required for proper operation of the I2C bus, sized according to the board configuration and bus
speed required per the I2C specification.
Table 1-3. 14-Pin SOIC Pin Configuration
Pin Name
CS
Pin Number
Function
1
2
Chip Select for SPI
General Purpose I/O pin
General Purpose I/O pin
Not Internally Connected
General Purpose I/O pin
Ground
GPIO_1
GPIO_2
NC
3
4, 5
6
GPIO_3
VSS
7
SDA
8
I2C Data
SCL
9
I2C Clock
SI
10
11
12
13
14
SPI Serial Data Input
SPI Clock
SCK
SO
SPI Serial Data Output
Reset Input, active low
2.7V-5.5V Power Supply
RESET
VCC
DS20006369C-page 5
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Pin Configuration
Figure 1-3. Pinout
VCC
RESET
SO
SCK
SI
SCL
SDA
CS
GPIO_1
GPIO_2
NC
1
2
3
4
5
6
7
SPI I/O
14
13
12
11
10
9
RESET
GPIO
No Connect
Pwr/Gnd
I2C I/O
NC
GPIO_3
VSS
8
DS20006369C-page 6
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Overview
2.
Overview
The TA100 security device interfaces with a host MCU to provide a hardened root of trust with symmetric and
asymmetric computation ability to facilitate a number of security-related capabilities within an automotive system.
•
Secure boot support:
– Host code image and signature validation
– Secure encryption key storage and image encryption
– Authenticated update of the code validation public key
X.509 certificate storage, parsing, validation and revocation, supporting both ECC and RSA
Fully internal random key generation for RSA, ECC and AES
Monotonic counters protected against tearing
•
•
•
•
Elliptic curves support:
– P224 – ECDSA sign, verify, ECDH and ECBD
– P256 – ECDSA sign, verify and ECDH
– SECP256K1 (Bitcoin/Blockchain) – ECDSA support
– 256-bit Brainpool – ECDSA and ECDH
– P384 – ECDSA sign and verify
•
RSA support:
– 1024-bit and 2048-bit RSA OAEP/MGF encrypt/decrypt
– 2048-bit RSA signature generation and verification
– 3072-bit RSA verification
•
•
•
•
•
•
•
•
•
ECDH key management capability with integrated KDF, either PRF or HKDF
NIST SP800-90 A/B/C high-quality cryptographic random number generation
TLS V1.2/V1.3 – Full session establishment support in conjunction with host SW
AES-CMAC calculation and validation
AES-ECB and GCM encrypt/decrypt for general purpose use
SHA-256 and SHA-HMAC digest calculation
Input/output encryption and authentication using AES-GCM, AES-CMAC and/or SHA-HMAC
Flexible self-test support to meet FIPS 140 requirements
Cryptographic support for High-Bandwidth Digital Content Protection (HDCP) V2.2
The TA100 device contains two processing blocks:
1. A main command processor that implements an Advanced Crypto Engine along with the management and
session establishment functionality. The ACE can implement all symmetric and asymmetric crypto functions.
2. A Fast Crypto Engine capable of implementing AES and SHA calculations in parallel with the operation of the
main command processor.
DS20006369C-page 7
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Device Features
3.
Device Features
The TA100 device supports several broad features, including secure boot (host code authentication), MAC
generation, secure key and certificate storage and management.
Public information stored within the protected memory, such as code digests, certificate validation status, public keys,
etc., can only be modified when properly authorized by using the specified protocols in this data sheet.
The TA100 is powered by an internal microcontroller running dedicated software loaded into the ROM and nonvolatile
memory during chip manufacture. Nonvolatile memory is used for certificate storage and secret/private key storage.
There is no direct access to the memories from the external pins of the device and there is no available programming
or debug interface.
The block diagram of the TA100 shows the major architectural features of the device.
Figure 3-1. TA100 Block Diagram
GPIO
VCC
GPIO
Circuitry
Circuitry
Power
Power
Management
Management
GPIO
RESET
Commands
Results
Command Processor
Command Processor
I2C
I/O
Logic
Logic
I/O
Keys,
Algorithm
Digest
SPI
Instructions
Data
FAST Crypto Engine
FAST Crypto Engine
DS20006369C-page 8
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Nonvolatile Memory
4.
Nonvolatile Memory
The nonvolatile memory within the TA100 device is split into three pieces:
Configuration
Memory:
In general, this area is expected to be written prior to the placement of the TA100 device on
the application board. Once the configuration is complete, this area must be locked to prevent
further modification and for proper device operation.
Shared Data
Memory:
This area can be used for keys, secrets, certificates, and/or data. The TA100 does not place
any requirements on the arrangement or distribution of items stored within this block other
than the overall limit on the space available to all the shared elements.
Dedicated Data
Memory:
Certain other items are stored within the device and are managed directly by various
commands.
DS20006369C-page 9
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Security Features
5.
Security Features
The TA100 device includes protection against both active (invasive) and passive (noninvasive) attacks on the
certificates, private and symmetric keys stored within the device. Specific hardware and firmware elements are
included to prevent environmental (voltage, temperature and frequency) attacks, emissions attacks, fault attacks,
physical attacks, cloning and many other attack methodologies. All internal memory for private/symmetric keys or
other secret data is encrypted.
DS20006369C-page 10
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Electrical Characteristics
6.
Electrical Characteristics
6.1
Absolute Maximum Ratings
Ambient Temperature under Bias(1)
Storage Temperature (without Bias)
Maximum Supply Voltage
-40°C to +125°C
-65°C to +150°C
6.0V
DC Voltage on Any Pin(4)
-0.5 to VCC + 0.5
ESD Ratings
— Human Body Model (HBM) ESD(2)
— Charged Device Model (CDM) ESD(3)
≥ ±4 kV
≥ ±750V
Notes:ꢀ
1. Recent Partial Networking Transceivers from Microchip and others use a spec throughout the document called
the Virtual Junction Temperature, measured in accordance with IEC60747-1. An alternate definition is TVJ = TA
+ P x Rth(j-a), where P is the power and Rth(j-a) is the thermal resistance from virtual junction to ambient. TVJ
would be higher than +125°C (maximum).
2. Specified by: JEDEC® Standard JS-001-2017
3. Specified by: JEDEC® Standard JS-002-2014
4. VCC is the supply voltage to which the device is driven and must be within the specified operating voltage
range.
Note:ꢀ Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions beyond
those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
6.2
DC Characteristics
Table 6-1. DC Characteristics – All Interfaces
Applicable over the recommended operating range from TA = -40°C to +125°C, VCC = +2.7V to +5.5V.
Parameters
Test Conditions
Symbol
VCC
Min.
2.7
Typ.
—
25
—
7
Max.
5.5
Units Type(1)
Supply Voltage on Pin VCC
Supply Current on Pin VCC
—
V
mA
mA
uA
V/µs
V
A
A
B
B
C
A
A
Active mode(4)
IIO_Active
IIO_Idle
IIO_Sleep
VRISE
VIH
—
40
Idle mode(2) (TA = +85°C)
—
10
Sleep mode
—
15
VCC Rise Rate
—
—
—
—
—
—
—
0.1
High-Level Input Voltage
Low-Level Input Voltage
0.7 x VCC
-0.3
VCC + 0.3
0.3 x VCC
VIL
V
DS20006369C-page 11
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Electrical Characteristics
Notes:ꢀ
1. Type means: A = 100% tested, B = characterized, C = design parameter.
2. Idle means that power is applied, the device is NOT in Sleep mode and no commands nor instructions are
running.
3. The state of the VCC latches will be retained so long as VCC remains above the VPOR level.
4. Active current is measured with all GPIO pins either driven to ground or configured as inputs. Active current
also excludes any DC load on the I/O pins.
Table 6-2. DC Characteristics – SPI Interface, RESET and GPIO Pins
Applicable over the recommended operating range from TA = -40°C to +125°C, VCC = +2.7V to +5.5V.
Parameters
Test Conditions
0.1VCC < Vi < 0.9VCC
—
Symbol
IL
Min.
-2
Typ. Max. Units Type(1)
Input Current(2)
—
40k
—
+2
62k
—
µA
Ω
A
A
A
A
Programmable Pull-Up
High-Level Output Voltage
Low-Level Output Voltage
RPU
VOH
VOL
24k
IOH = -4 mA
IOL = 4 mA
VCC – 0.4
—
V
—
0.4
V
Notes:ꢀ
1. Type means: A = 100% tested
2. This specification is only valid when the internal pull-ups are disabled. Otherwise, the input current is
determined by the internal pull-up resistance value RPU
.
Table 6-3. DC Characteristics of SDA and SCL Pins for I2C Interface
Applicable over the recommended operating range from TA = -40°C to +125°C, VCC = +2.7V to +5.5V.
Parameters
Test Conditions
Symbol
Min. Typ Max.
Units Type(1)
Input Current(2)
0.1VCC < Vi < 0.9VCC
Ii
-10
0
—
—
+10
0.4
µA
V
A
B
Low-Level Output Voltage
IOL = 20 mA
VOL
VCC > 3.6V to 5.5V
IOL = 14 mA
VCC = 2.7V to 3.6V
VOL
0
—
0.4
V
B
A
Programmable Pull-Up
—
RPU
2.3k 3.0k
4.5k
Ω
Notes:ꢀ
1. Type means: A = 100% tested, B = characterized on samples
2. The input current specification is only valid when the internal pull-ups are disabled. Otherwise, the input
current is determined by the internal pull-up resistance value RPU
.
6.3
AC Characteristics
6.3.1
All Interfaces
Table 6-4. AC Timing Characteristics – All Interfaces
Applicable over the recommended operating range from TA = -40°C to +125°C, VCC = +2.7V to +5.5V.
Parameters
Wake-up Time from Sleep State. VCC > 2.7V
Power-up Time from VCC < 2.7V
Symbol
Min. Typ. Max. Units Type(4)
(1)
tPU.SLEEP
—
—
3
4
5
6
ms
ms
A
A
(1)
tPU.POWERON
DS20006369C-page 12
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Electrical Characteristics
...........continued
Parameters
Symbol
Min. Typ. Max. Units Type(4)
(2)
Idle Tmer
tIDLE
0.85
42
1
1.15
60
s
s
B
B
Rate at which the Nonvolatile Portion of Monotonic Counter
Increments
tMONOTONIC
51
(3)
Noise Suppression on RESET Input Pin
Minimum Allowed Reset Pulse
tRESET_NOISE
0
—
—
—
0.150 µs
A
A
A
(3)
tRESET_MIN
1.0
—
—
µs
µs
GPIO_3 Transition Ignored, Measured Starting with the Last
Bit of Power (Sleep)
tSLEEP_WAKE
250
Low-Pulse Width for GPIO_3 High to Wake TA100
Watchdog Time-out Value
tWAKE_GPIO_LOW 40
tWATCHDOG
—
—
µs
A
B
900 1000 1100 ms
Notes:ꢀ
1. Various situations can cause the power-up delays to exceed these parameters as follows:
– If the power-on or the wake self-test functions are enabled in the configuration area, the execution of
those self-test operations will increase the delay.
– If an internal failure occurs to cause a boot event, then, there may be an additional delay during the boot
to write the internal failure log in the nonvolatile memory within the chip.
– If a device update is started but does not complete due to a power interruption, on the next power-up,
some cleanup may be required and may take additional time.
– If the 1 minute timer is enabled and is being updated in the nonvolatile memory concurrent with the
wake event, the device will accept an Input command after tPU_SLEEP/tPU_POWERON, but will not start the
execution of that command until the nonvolatile update is complete.
2. The idle timer specifications here assume that the idle timer is enabled and configured for 1 second. It is
recommended that these times be multiplied by the delay time value set in the idle timer configuration field if
that is not 1.
3. All noise pulses ≤ tRESET_NOISE are assured to be suppressed. All pulse widths ≥ tRESET_MIN are assured to
pass to the device. Pulses in between these values may or may not be suppressed.
4. Type Means: A = 100% Tested, B = Characterized.
6.3.2
I2C Interface Timing
Table 6-5. AC Characteristics of I2C Interface
Applicable over the recommended operating range from TA = -40°C to +125°C, VCC = +2.7V to +5.5V.
Parameters
Symbol
Fast-Mode Plus
Units
Min.
—
Max.
SCL Clock Frequency
SCL High Time
fSCL
1000 kHz
tHIGH
260
500
260
260
260
50
—
—
ns
ns
ns
ns
ns
ns
ns
ns
SCL Low Time
tLOW
Start Setup Time
Start Hold Time
tSU.STA
tHD.STA
tSU.STO
tSU.DAT
tHD.DAT
tR
—
—
Stop Setup Time
Data in Setup Time
Data in Hold Time
Input Rise Time(1, 3)
—
—
0
—
—
120
DS20006369C-page 13
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Electrical Characteristics
...........continued
Parameters
Symbol
Fast-Mode Plus
Units
Min.
Max.
Input Fall Time(1, 3)
tF
20 x (VDD/5.5V)(5) 120
ns
ns
ns
ns
Clock Low to Data Out Valid
tAA
tBUF
tSP
—
500
—
450
—
Time bus must be free before a new transmission can start (1)
Pulse width of spikes that must be suppressed by the input filter(4)
50
Notes:ꢀ
1. Values are based on characterization and are not tested.
2. AC measurement conditions: input pulse voltages: 0.3 x VCC to 0.7 x VCC, input rise and fall times: ≤ 50 ns.
3. System designers must ensure that all AC parametrics are met. Rise fall times shown are for the Fast Mode
Plus (1 MHz) of operation. For slower clock speeds, the rise and fall times may be increased but must still
meet the industry standard I2C specification UM10204.
4. Input filters on the SDA and SCL pins will suppress noise spikes of less than 50 ns.
5. Backwards compatibility is necessary for the Fast mode (400 kHz) specifications.
Figure 6-1. I2C Synchronous Data Timing
tHIGH
tF
tR
tLOW
tLOW
SCL
tSU.STA
tHD.STA
tHD.DAT
tSU.DAT
tSU.STO
SDA IN
tAA
tDH
tBUF
SDA OUT
6.3.3
SPI Interface Timing
Table 6-6. AC Characteristics of SPI Interface
Applicable over the recommended operating range from TA = -40°C to +125°C, VCC = +2.7V to +5.5V.
Parameters
SCK Clock Frequency
Symbol
Min.
—
Max.
16
—
—
—
—
—
—
—
2
Units
MHz
ns
fSCK
tWH
tWL
tCS
tCSS
tCSH
tSU
tH
SCK High Time
SCK Low Time
CS High Time
20
25
ns
100
100
100
5
ns
CS Setup Time
CS Hold Time
ns
ns
Data in Setup Time
Data in Hold Time
Input Rise Time(1, 2)
ns
5
ns
tRI
—
μs
DS20006369C-page 14
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Electrical Characteristics
...........continued
Parameters
Symbol
Min.
—
Max.
2
Units
μs
Input Fall Time(1, 2)
Output Valid
tFI
tV
—
25
—
ns
Output Hold Time
tHO
tDIS
0
ns
Output Disable Time
—
25
ns
Notes:ꢀ
1. Values are based on characterization and are not production tested.
2. System designers must ensure that all AC parametrics are met, which will typically require rise and fall times
faster than these values for most clock rates. Ramp rates slower than this may result in improper operation.
Figure 6-2. SPI Mode 0 Synchronous Data Timing
Figure 6-3. SPI Mode 3 Synchronous Data Timing
DS20006369C-page 15
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Package Marking Information
7.
Package Marking Information
As part of Microchip’s overall security features, the part marking for all crypto devices is intentionally vague. The
marking on the top of the package does not provide any information as to the actual device type or the manufacturer
of the device. The alphanumeric code on the package provides manufacturing information and will vary with
assembly lot. It is recommended that the packaging mark not be used as part of any incoming inspection procedure
to identify the device.
DS20006369C-page 16
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Package Drawings
8.
Package Drawings
8.1
8-Lead SOIC
8-Lead Plastic Small Outline (OA) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2X
0.10 C A–B
D
A
D
NOTE 5
N
E
2
E1
2
E1
E
2X
0.10 C A–B
2X
0.10 C A–B
1
2
NOTE 1
e
NX b
0.25
C A–B D
B
NOTE 5
TOP VIEW
0.10 C
0.10 C
C
A2
A
SEATING
PLANE
8X
SIDE VIEW
A1
h
R0.13
R0.13
h
H
0.23
L
SEE VIEW C
(L1)
VIEW A–A
VIEW C
Microchip Technology Drawing No. C04-057-OA Rev F Sheet 1 of 2
DS20006369C-page 17
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Package Drawings
8-Lead Plastic Small Outline (OA) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
8
1.27 BSC
Overall Height
Molded Package Thickness
Standoff
Overall Width
A
-
-
-
-
1.75
-
0.25
A2
A1
E
1.25
0.10
§
6.00 BSC
Molded Package Width
Overall Length
E1
D
3.90 BSC
4.90 BSC
Chamfer (Optional)
Foot Length
h
L
0.25
0.40
-
-
0.50
1.27
Footprint
L1
1.04 REF
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
0°
0.17
0.31
5°
-
-
-
-
-
8°
c
0.25
0.51
15°
b
5°
15°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or
protrusions shall not exceed 0.15mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
5. Datums A & B to be determined at Datum H.
Microchip Technology Drawing No. C04-057-OA Rev F Sheet 2 of 2
DS20006369C-page 18
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Package Drawings
8-Lead Plastic Small Outline (OA) - Narrow, 3.90 mm (.150 In.) Body [SOIC]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
SILK SCREEN
C
Y1
X1
E
RECOMMENDED LAND PATTERN
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Contact Pitch
E
C
X1
Y1
1.27 BSC
5.40
Contact Pad Spacing
Contact Pad Width (X8)
Contact Pad Length (X8)
0.60
1.55
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-2057-OA Rev F
DS20006369C-page 19
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Package Drawings
8.2
14-Lead SOIC
14-Lead Plastic Small Outline (D3X, UEB, M5B, UEB) - Narrow, 3.90 mm Body [SOIC]
Atmel Legacy Global Package Code SVQ
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
2X
0.10 C A–B
D
NOTE 5
A
D
E
N
E
2
E2
2
E1
2X
0.10 C D
NOTE 1
2X N/2 TIPS
0.20 C
1
2
3
e
NX b
0.25
C A–B D
0.10 C
NOTE 5
B
TOP VIEW
C
A2
A
SEATING
PLANE
14X
0.10 C
SIDE VIEW
A1
h
h
R0.13
H
R0.13
c
SEE VIEW C
L
VIEW A–A
(L1)
VIEW C
Microchip Technology Drawing No. C04-065-D3X Rev D
DS20006369C-page 20
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Package Drawings
14-Lead Plastic Small Outline (D3X, UEB, M5B, UEB) - Narrow, 3.90 mm Body [SOIC]
Atmel Legacy Global Package Code SVQ
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Number of Pins
Pitch
N
e
14
1.27 BSC
Overall Height
Molded Package Thickness
Standoff
Overall Width
A
-
-
-
-
1.75
-
0.25
A2
A1
E
1.25
0.10
§
6.00 BSC
Molded Package Width
Overall Length
Chamfer (Optional)
Foot Length
E1
D
h
3.90 BSC
8.65 BSC
0.25
0.40
-
-
0.50
1.27
L
Footprint
L1
1.04 REF
Lead Angle
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
0°
0°
0.10
0.31
5°
-
-
-
-
-
-
-
8°
0.25
0.51
15°
15°
c
b
5°
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. § Significant Characteristic
3. Dimension D does not include mold flash, protrusions or gate burrs, which shall
not exceed 0.15 mm per end. Dimension E1 does not include interlead flash
or protrusion, which shall not exceed 0.25 mm per side.
4. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
5. Datums A & B to be determined at Datum H.
Microchip Technology Drawing No. C04-065-D3X Rev D Sheet 2 of 2
DS20006369C-page 21
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Package Drawings
14-Lead Plastic Small Outline (D3X, UEB, M5B, UEB) - Narrow, 3.90 mm Body [SOIC]
Atmel Legacy Global Package Code SVQ
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
14
SILK SCREEN
C
Y
1
2
X
E
RECOMMENDED LAND PATTERN
Units
MILLIMETERS
Dimension Limits
MIN
NOM
1.27 BSC
5.40
MAX
Contact Pitch
Contact Pad Spacing
Contact Pad Width (X14)
E
C
X
0.60
1.55
Contact Pad Length (X14)
Y
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing No. C04-2065-D3X Rev D
DS20006369C-page 22
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Revision History
9.
Revision History
Revision C (Dec 2021)
•
•
•
Removed References to 24-VQFN Package. Not an option for B5 Silicon.
Added Type of testing column to Table 6-4
Added Figure 6-3 for SPI Mode 3 Timing information.
Revision B (Feb 2021)
•
•
•
Updated Feature List to include RSA signature generation and verification capabilities
Correction to Table 6-2 RPU Max value
Update to Product Identification System
Revision A (Nov 2020)
Original release of the document
DS20006369C-page 23
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
The Microchip Website
Microchip provides online support via our website at www.microchip.com/. This website is used to make files and
information easily available to customers. Some of the content available includes:
•
•
•
Product Support – Data sheets and errata, application notes and sample programs, design resources, user’s
guides and hardware support documents, latest software releases and archived software
General Technical Support – Frequently Asked Questions (FAQs), technical support requests, online
discussion groups, Microchip design partner program member listing
Business of Microchip – Product selector and ordering guides, latest Microchip press releases, listing of
seminars and events, listings of Microchip sales offices, distributors and factory representatives
Product Change Notification Service
Microchip’s product change notification service helps keep customers current on Microchip products. Subscribers will
receive email notification whenever there are changes, updates, revisions or errata related to a specified product
family or development tool of interest.
To register, go to www.microchip.com/pcn and follow the registration instructions.
Customer Support
Users of Microchip products can receive assistance through several channels:
•
•
•
•
Distributor or Representative
Local Sales Office
Embedded Solutions Engineer (ESE)
Technical Support
Customers should contact their distributor, representative or ESE for support. Local sales offices are also available to
help customers. A listing of sales offices and locations is included in this document.
Technical support is available through the website at: www.microchip.com/support
DS20006369C-page 24
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Product Identification System
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART
NO
I/O
Type
-
-
Temperature
Range
IC
Package Firmware
-
-
OTS Shipping
Format
-
-
Product
Identifier
Revision
Option
Revision
xxxxx
Device:
I/O Type
y
t
xxx
ppp
ff
cc
s
VAO
TA100
Blank
Blank
T
14-Pin SOIC SPI and I2C Interfaces
8-PIN SOIC SPI Interface Only
8-PIN SOIC I2C Interface Only
-40℃ to +125℃
Temperature Range:
IC Revision(2)
Y
xxx
C2X
D3X
01
Contact Microchip for Information
8-Pin SOIC
Package Option
14-Pin SOIC
Firmware Release 01
Firmware Release 02
Standard Configuration
SPI Pull-ups Disabled
Tape and Reel(1)
Firmware Revision
02
00
OTS or Customer Code
PD
T
Shipping Options
Product Identifier
B
Bulk Units
VAO
Generic Automotive Product
Examples:
2
Customer Ordering Code
I/O
Internal I C
Package
Delivery
Personalization
Interfaces
Pull-up
2
TA100T-Y230C2X01-00T-VAO
TA100T-Y230C2X01-00B-VAO
TA100-Y230C2X01-00T-VAO
TA100-Y230C2X01-PDT-VAO
TA100-Y230C2X01-00B-VAO
TA100-Y230C2X01-PDB-VAO
TA100-Y230D3X01-00T-VAO
TA100-Y230D3X01-00B-VAO
I C
No
No
—
SOIC-8
SOIC-8
SOIC-8
SOIC-8
SOIC-8
SOIC-8
SOIC-14
SOIC-14
Tape and Reel
Bulk
Standard Configuration
Standard Configuration
Standard Configuration
SPI Pull-ups Disabled
Standard Configuration
SPI Pull-ups Disabled
Standard Configuration
Standard Configuration
2
I C
SPI
SPI
SPI
SPI
Tape and Reel
Tape and Reel
Bulk
—
—
—
Bulk
2
I C, SPI
No
No
Tape and Reel
Bulk
2
I C, SPI
Notes:ꢀ
1. Tape and Reel identifier only appears in the catalog part number description. This identifier is used for ordering
purposes and is not printed on the device package. Check with your Microchip Sales Office for package
availability with the Tape and Reel option.
2. IC Revision code indicates the base silicon revision and ROM code revision.
DS20006369C-page 25
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip products:
•
•
Microchip products meet the specifications contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is secure when used in the intended manner, within operating
specifications, and under normal conditions.
•
•
Microchip values and aggressively protects its intellectual property rights. Attempts to breach the code
protection features of Microchip product is strictly prohibited and may violate the Digital Millennium Copyright
Act.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of its code. Code
protection does not mean that we are guaranteeing the product is “unbreakable”. Code protection is constantly
evolving. Microchip is committed to continuously improving the code protection features of our products.
Legal Notice
This publication and the information herein may be used only with Microchip products, including to design, test,
and integrate Microchip products with your application. Use of this information in any other manner violates these
terms. Information regarding device applications is provided only for your convenience and may be superseded
by updates. It is your responsibility to ensure that your application meets with your specifications. Contact your
local Microchip sales office for additional support or, obtain additional support at www.microchip.com/en-us/support/
design-help/client-support-services.
THIS INFORMATION IS PROVIDED BY MICROCHIP "AS IS". MICROCHIP MAKES NO REPRESENTATIONS
OR WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY
OR OTHERWISE, RELATED TO THE INFORMATION INCLUDING BUT NOT LIMITED TO ANY IMPLIED
WARRANTIES OF NON-INFRINGEMENT, MERCHANTABILITY, AND FITNESS FOR A PARTICULAR PURPOSE,
OR WARRANTIES RELATED TO ITS CONDITION, QUALITY, OR PERFORMANCE.
IN NO EVENT WILL MICROCHIP BE LIABLE FOR ANY INDIRECT, SPECIAL, PUNITIVE, INCIDENTAL, OR
CONSEQUENTIAL LOSS, DAMAGE, COST, OR EXPENSE OF ANY KIND WHATSOEVER RELATED TO THE
INFORMATION OR ITS USE, HOWEVER CAUSED, EVEN IF MICROCHIP HAS BEEN ADVISED OF THE
POSSIBILITY OR THE DAMAGES ARE FORESEEABLE. TO THE FULLEST EXTENT ALLOWED BY LAW,
MICROCHIP'S TOTAL LIABILITY ON ALL CLAIMS IN ANY WAY RELATED TO THE INFORMATION OR ITS USE
WILL NOT EXCEED THE AMOUNT OF FEES, IF ANY, THAT YOU HAVE PAID DIRECTLY TO MICROCHIP FOR
THE INFORMATION.
Use of Microchip devices in life support and/or safety applications is entirely at the buyer's risk, and the buyer agrees
to defend, indemnify and hold harmless Microchip from any and all damages, claims, suits, or expenses resulting
from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual property rights
unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, Adaptec, AnyRate, AVR, AVR logo, AVR Freaks, BesTime,
BitCloud, CryptoMemory, CryptoRF, dsPIC, flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck,
LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi, Microsemi logo, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, PolarFire, Prochip Designer, QTouch, SAM-BA, SenGenuity,
SpyNIC, SST, SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon, TimeSource, tinyAVR, UNI/O, Vectron,
and XMEGA are registered trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
AgileSwitch, APT, ClockWorks, The Embedded Control Solutions Company, EtherSynch, Flashtec, Hyper Speed
Control, HyperLight Load, IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision Edge, ProASIC, ProASIC
Plus, ProASIC Plus logo, Quiet- Wire, SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub, TimePictra,
TimeProvider, TrueTime, WinPath, and ZL are registered trademarks of Microchip Technology Incorporated in the
U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, Augmented Switching,
BlueSky, BodyCom, CodeGuard, CryptoAuthentication, CryptoAutomotive, CryptoCompanion, CryptoController,
DS20006369C-page 26
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
TA100 (B5)
dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, Espresso T1S, EtherGREEN, GridTime,
IdealBridge, In-Circuit Serial Programming, ICSP, INICnet, Intelligent Paralleling, Inter-Chip Connectivity,
JitterBlocker, Knob-on-Display, maxCrypto, maxView, memBrain, Mindi, MiWi, MPASM, MPF, MPLAB Certified
logo, MPLIB, MPLINK, MultiTRAK, NetDetach, NVM Express, NVMe, Omniscient Code Generation, PICDEM,
PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple Blocker, RTAX, RTG4, SAM-
ICE, Serial Quad I/O, simpleMAP, SimpliPHY, SmartBuffer, SmartHLS, SMART-I.S., storClad, SQI, SuperSwitcher,
SuperSwitcher II, Switchtec, SynchroPHY, Total Endurance, TSHARC, USBCheck, VariSense, VectorBlox, VeriPHY,
ViewSpan, WiperLock, XpressConnect, and ZENA are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
The Adaptec logo, Frequency on Demand, Silicon Storage Technology, Symmcom, and Trusted Time are registered
trademarks of Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their respective companies.
©
2020-2021, Microchip Technology Incorporated and its subsidiaries. All Rights Reserved.
ISBN: 978-1-5224-8955-9
Quality Management System
For information regarding Microchip’s Quality Management Systems, please visit www.microchip.com/quality.
DS20006369C-page 27
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
Worldwide Sales and Service
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DS20006369C-page 28
Summary Datasheet
© 2020-2021 Microchip Technology Inc.
and its subsidiaries
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