RFRXD0920 [MICROCHIP]

UHF ASK/FSK/FM Receiver; 超高频ASK / FSK / FM接收器
RFRXD0920
型号: RFRXD0920
厂家: MICROCHIP    MICROCHIP
描述:

UHF ASK/FSK/FM Receiver
超高频ASK / FSK / FM接收器

文件: 总32页 (文件大小:632K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
rfRXD0420/0920  
UHF ASK/FSK/FM Receiver  
Features:  
Pin Diagram:  
• Low cost single conversion superheterodyne  
receiver architecture  
LQFP  
• Compatible with rfPIC™ and rfHCS series of RF  
transmitters  
®
• Easy interface to PICmicro microcontroller  
®
(MCU) and KEELOQ decoders  
V
SS  
1
2
3
4
5
6
7
8
24  
23  
22  
21  
20  
19  
18  
17  
DEMOUT  
DEMOUT  
SS  
-
• VCO phase locked to quartz crystal reference:  
- Narrow receiver bandwidth  
+
LNAGAIN  
LNAOUT  
1IFIN  
V
rfRXD0420  
rfRXD0920  
RSSI  
OPA+  
OPA-  
OPA  
- Maximizes range and interference immunity  
VSS  
1IF+  
1IF-  
• Selectable LNA gain control for improved dynamic  
range  
VDD  
VDD  
• Selectable IF bandwidth via external ceramic IF  
filter  
• Received Signal Strength Indicator (RSSI) for  
signal strength indication (FSK, FM) and ASK  
demodulation  
• FSK/FM quadrature (phase coincidence) detector  
demodulator  
• 32-Lead LQFP package  
Applications:  
UHF ASK/FSK Receiver:  
• Wireless remote command and control  
• Wireless security systems  
• Remote Keyless Entry (RKE)  
• Low power telemetry  
• Single frequency receiver set by crystal frequency  
• Receive frequency range:  
Device  
rfRXD0420  
Frequency Range  
300 MHz to 450 MHz  
800 MHz to 930 MHz  
• Low power FM receiver  
• Home automation  
rfRXD0920  
• Remote sensing  
• Maximum data rate:  
- ASK: 80 Kbps NRZ  
- FSK: 40 Kbps NRZ  
Bi-CMOS Technology:  
• Wide operating voltage range  
• IF frequency range: 455 kHz to 21.4 MHz  
• RSSI range: 70 dB  
• Low current consumption in Active and Standby  
modes  
• Frequency deviation range: 5 kHz to 120 kHz  
• Maximum FM modulation frequency: 15 kHz  
- rfRXD0420  
- 8.2 mA (typical, LNA High Gain mode)  
- <100 nA standby  
- rfRXD0920  
- 9.2 mA (typical, LNA High Gain mode)  
- <100 nA standby  
• Wide temperature range:  
- Industrial: -40°C to +85°C  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 1  
rfRXD0420/0920  
The rfRXD0420/0920 is a single conversion superhet-  
erodyne architecture. A block diagram is illustrated in  
Figure 1-1. The rfRXD0420/0920 consists of:  
1.0  
DEVICE OVERVIEW  
The rfRXD0420/0920 are low cost, compact single  
frequency short-range radio receivers requiring only a  
minimum number of external components for a  
complete receiver system. The rfRXD0420 covers the  
receive frequency range of 300 MHz to 450 MHz and  
the rfRXD0920 covers 800 MHz to 930 MHz. The  
rfRXD0420 and rfRXD0920 share a common architec-  
ture. They can be configured for Amplitude Shift Keying  
(ASK), Frequency Shift Keying (FSK), or FM modula-  
tion. The rfRXD0420/0920 are compatible with rfPIC™  
and rfHCS series of RF transmitters.  
• Low-noise amplifier (LNA) - Gain selectable  
• Mixer for down-conversion of the RF signal to the  
Intermediate Frequency (IF) followed by an IF  
preamplifier  
• Fully integrated Phase-Locked Loop (PLL)  
frequency synthesizer for generation of the Local  
Oscillator (LO) signal. The frequency synthesizer  
consists of:  
- Crystal oscillator  
- Phase-frequency detector and charge pump  
• High frequency stability over temperature and  
power supply variations  
- High-frequency Voltage Controlled Oscillator  
(VCO)  
• Low spurious signal emission  
- Fixed feedback divider  
- rfRXD0420 = divide by 16  
- rfRXD0920 = divide by 32  
• High large-signal handling capability with  
selectable LNA gain control for improved dynamic  
range  
• Selectable IF bandwidth via external low cost  
ceramic IF filter. The IF Frequency range is  
selectable between 455 kHz to 21.4 MHz. This  
facilitates the use of readily available low cost  
10.7 MHz ceramic IF filters in a variety of  
bandwidths.  
• IF limiting amplifier to amplify and limit the IF  
signal and for Received Signal Strength Indication  
(RSSI) generation  
• Demodulator (DEMOD) section consists of a  
phase detector (MIXER2) and amplifier creating a  
quadrature detector (also known as a phase  
coincidence detector) to demodulate the IF signal  
in FSK and FM modulation applications  
• ASK or FSK for digital data reception  
• FM modulation for analog signal reception  
• FSK/FM demodulation using quadrature detector  
(phase coincidence detector)  
• Operational amplifier (OPA) that can be config-  
ured as a comparator for ASK or FSK data  
decision or as a filter for FM modulation.  
• Received Signal Strength Indication (RSSI) for  
signal strength indication and ASK detection  
• Bias circuitry for bandgap biasing and circuit  
shutdown  
• Wide supply voltage range  
• Low active current consumption  
• Very low standby current  
DS70090A-page 2  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
FIGURE 1-1: rfRXD0420/0920 BLOCK DIAGRAM  
O P A  
S S V  
D D V  
M I X E R 2  
O U T + D E M  
I N  
D E M  
D E M  
O U T -  
O U T 2 I F  
D D V  
F B C 2  
F B C 1  
S S V  
X T A L  
I N 2 I F  
S S V  
D D V  
O U T 1 I F  
E N R X  
L F  
D D V  
1 I F -  
1 I F +  
S S V  
1 I F  
I N  
O U T L N A  
G A I N L N A  
S S V  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 3  
rfRXD0420/0920  
TABLE 1-1:  
rfRXD0420/0920 PINOUT I/O DESCRIPTION  
Pin Name  
Pin Number  
Pin Type  
Buffer Type  
Description  
LNAGAIN  
LNAOUT  
1IFIN  
2
I
O
I
CMOS  
Analog  
Analog  
Analog  
Analog  
Analog  
Analog  
Analog  
Analog  
Analog  
Analog  
Analog  
Analog  
Analog  
Analog  
Analog  
Analog  
Analog  
CMOS  
Analog  
LNA gain control (with hysteresis)  
LNA output (open collector)  
1st IF stage input  
3
4
1IF+  
6
--  
--  
O
I
MIXER1 bias (open collector)  
MIXER1 bias (open collector)  
1st IF stage output  
1IF-  
7
1IFOUT  
2IFIN  
9
11  
12  
13  
15  
16  
18  
19  
20  
21  
23  
24  
26  
28  
29  
2nd IF stage input  
FBC1  
FBC2  
2IFOUT  
DEMIN  
OPA  
--  
--  
O
I
Limiter IF Amplifier external feedback capacitor  
Limiter IF Amplifier external feedback capacitor  
2nd IF stage output  
Demodulator input  
O
I
Operational amplifier output  
Operational amplifier input (negative)  
Operational amplifier input (positive)  
Received signal strength indicator output  
Demodulator output (positive)  
Demodulator output (negative)  
Crystal oscillator input  
OPA-  
OPA+  
RSSI  
I
O
O
O
I
DEMOUT+  
DEMOUT-  
XTAL  
ENRX  
LF  
I
Receiver enable input  
I
External loop filter connection. Common node of  
charge pump output and VCO tuning input.  
LNAIN  
VDD  
31  
I
Analog  
LNA input  
8, 14, 17, 27, 32  
1, 5, 10, 25, 30  
P
P
Positive supply  
Ground reference  
VSS  
Legend: I = Input, O = Output, I/O = Input/Output, P = Power, CMOS = CMOS compatible input or output  
DS70090A-page 4  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
The PLL consists of a phase-frequency detector,  
charge pump, voltage-controlled oscillator (VCO), and  
fixed divide-by-16 (rfRXD0420) or divide-by-32  
(rfRXD0920) divider. The rfRXD0420/0920 employs a  
charge pump PLL that offers many advantages over  
the classical voltage phase detector PLL: infinite pull-in  
range and zero steady state phase error. The charge  
pump PLL allows the use of passive loop filters that are  
lower cost and minimize noise. Charge pump PLLs  
have reduced flicker noise thus limiting phase noise.  
2.0  
CIRCUIT DESCRIPTION  
This section gives a circuit description of the internal  
circuitry of the rfRXD0420/0920 receiver. External  
connections and components are given in the  
APPLICATION CIRCUITS section.  
2.1  
Bias Circuitry  
Bias circuitry provides bandgap biasing and circuit  
shutdown capabilities. The ENRX (Pin 28) modes are  
summarized in Table 2-1. The ENRX pin is a CMOS  
compatible input and is internally pulled down to Vss.  
An external loop filter is connected to pin LF (Pin 29).  
The loop filter controls the dynamic behavior of the  
PLL, primarily lock time and spur levels. The applica-  
tion determines the loop filter requirements.  
TABLE 2-1: BIAS CIRCUITRY CONTROL  
(1)  
ENRX  
Description  
The VCO gain for the rfRXD0420/0920 receivers are  
listed in Table 2-2.  
0
1
Standby mode  
Receiver enabled  
TABLE 2-2: PLL PARAMETERS  
Note 1: ENRX has internal pull-down to Vss  
(1)  
KVCO  
(1)  
Device  
Divider  
ICP  
rfRXD0420 250 MHz/V at  
433 MHz  
60 µA  
60 µA  
16  
2.2  
Frequency Synthesizer  
rfRXD0920 300 MHz/V at  
868 MHz  
32  
The Phase-locked Loop (PLL) frequency synthesizer  
generates the Local Oscillator (LO) signal. It consists  
of:  
Note 1: Typical value  
• Crystal oscillator  
The LF pin is illustrated in Figure 2-2.  
• Phase-frequency detector and charge pump  
• Voltage Controlled Oscillator (VCO)  
• Fixed feedback divider:  
FIGURE 2-2: BLOCK DIAGRAM OF LOOP  
FILTER PIN  
- rfRXD0420 = divide by 16  
- rfRXD0920 = divide by 32  
200  
2.2.1 CRYSTAL OSCILLATOR  
VDD  
The internal crystal oscillator is a Colpitts type oscilla-  
tor. It provides the reference frequency to the PLL. A  
crystal is normally connected to the XTAL (Pin 26) and  
ground. The internal capacitance of the crystal oscilla-  
tor is 15 pF. Alternatively, a signal can be injected into  
the XTAL pin from a signal source. The signal should  
be AC coupled via a series capacitor at a level of  
LF  
29  
400 Ω  
VSS  
4 pF  
VSS  
VSS  
approximately 600 mV  
.
pp  
2.3  
Low Noise Amplifier  
The XTAL pin is illustrated in Figure 2-1.  
The Low-Noise Amplifier (LNA) is a high-gain amplifier  
whose primary purpose is to lower the overall noise  
figure of the entire receiver thus enhancing the receiver  
sensitivity. The LNA is an open-collector cascode  
design. The benefits of a cascode design are:  
FIGURE 2-1:  
BLOCK DIAGRAM OF  
XTAL PIN  
VDD  
• high gain with low noise  
• high-frequency  
VDD  
VDD  
50 k  
XTAL  
26  
• wide bandwidth  
30 pF  
30 pF  
• low effective input capacitance with stable input  
impedance  
VSS  
40 µA  
• high output resistance  
VSS  
VSS  
• high reverse isolation that provides improved  
stability and reduces LO leakage  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 5  
rfRXD0420/0920  
Approximate LNA noise figures are listed in Table 2-3.  
The 1IF+ (Pin 6) and 1IF- (Pin 7) are bias connections  
to the MIXER1 balanced collectors. Both pins are  
open-collector outputs and are individually pulled up to  
VDD by a load resistor. The MIXER1 bias pins are illus-  
trated in Figure 2-5.  
TABLE 2-3: LNA NOISE FIGURES  
(1)  
Device  
Noise Figure  
rfRXD0420  
TBD  
TBD  
1IFOUT (Pin 9) has an approximately 330 single-  
ended output impedance. The 330 impedance  
provides a direct match to low cost ceramic IF filters.  
The 1IFOUT pins is illustrated in Figure 2-6.  
rfRXD0920  
Note 1: Approximate value  
LNAIN (Pin 31) has an input impedance of approxi-  
mately 26 || 2 pF single-ended.  
FIGURE 2-4: BLOCK DIAGRAM OF MIXER1  
PIN  
LNAOUT (Pin 3) has an open-collector output and is  
pulled up to VDD via a tuned circuit.  
VDD  
Important: To ensure LNA stability the VSS pin (Pin 1)  
13  
must be connected to a low impedance ground.  
1IFIN  
The LNA pins are illustrated in Figure 2-3.  
4
13 Ω  
500 µA  
VSS  
FIGURE 2-3: BLOCK DIAGRAM OF LNA  
PINS  
VSS  
LNAOUT  
3
1.6V  
FIGURE 2-5: BLOCK DIAGRAM OF MIXER1  
BIAS PINS  
0.8V  
VDD  
VSS  
VDD  
5 k  
VDD  
VDD  
LNAIN  
31  
20 pF  
20 pF  
1IF-  
1IF+  
6
VSS  
1
7
VSS  
VSS  
500 µA  
VSS  
VSS  
500 µA  
VSS  
The gain of the LNA can be selected between High and  
Low Gain modes by the LNAGAIN pin (Pin 2). LNAGAIN  
is a CMOS input with hysteresis. Table 2-4 summarizes  
the voltage levels and modes for LNA gain.  
VSS  
FIGURE 2-6: BLOCK DIAGRAM OF IF  
PREAMP PIN  
In the High Gain mode the LNA operates normally. In  
Low Gain mode the gain of the LNA is reduced approx-  
imately 25 dB, reduces total supply current, and  
increases maximum input signal levels (see Electrical  
Characteristics section for values).  
VDD  
VDD  
VDD  
6.8 k  
130 Ω  
1IFOUT  
9
TABLE 2-4: LNA GAIN CONTROL  
230 µA  
VSS  
LNAGAIN  
Description  
VSS  
< 0.8 V  
> 1.4 V  
High Gain mode  
Low Gain mode  
2.5  
IF Limiting Amplifier with RSSI  
The IF Limiting Amplifier amplifies and limits the IF  
signal at the 2IFIN pin (Pin 11). It also generates the  
Received Signal Strength Indicator (RSSI) signal  
(Pin 21).  
2.4  
MIXER1 and IF Preamp  
MIXER1 performs down-conversion of the RF signal to  
the Intermediate Frequency (IF) and is followed by an  
IF preamplifier.  
2.5.1 IF LIMITING AMPLIFIER  
1IFIN (Pin 4) has an approximately 33 single-ended  
Magnitude control circuitry is used in the last stage of  
the receiver to keep the signal constant for demodula-  
tion. It can consist of a limiting or Automatic Gain  
input impedance. The 1IFIN pin is illustrated in Figure 2-  
4.  
Control (AGC) amplifier.  
A limiting amplifier is  
DS70090A-page 6  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
employed in this design because it can handle a larger  
dynamic range while consuming less power with simple  
circuitry than AGC circuitry.  
For FSK and FM demodulation, the RSSI represents  
the received signal strength of the incoming RF signal.  
The RSSI pin is illustrated in Figure 2-9.  
The internal resistance of the 2IFIN pin is approximately  
2.2 k. In order to terminate ceramic IF filters whose  
output impedance is 330 , a 390 resistor can be  
paralleled to the 2IFIN and FBC2 pins.  
FIGURE 2-9: BLOCK DIAGRAM OF RSSI  
PIN  
VDD  
FBC1 (Pin 12) and FBC2 (Pin 13) are connected to  
external feedback capacitors.  
I (Pi)  
50  
RSSI  
The IF Limiting Amplifier pins are illustrated in  
Figures 2-7 and 2-8.  
21  
36 kΩ  
VSS  
VSS  
FIGURE 2-7: BLOCK DIAGRAM OF IF  
LIMITING AMPLIFIER INPUT  
PINS  
2.6  
Demodulator  
The demodulator (DEMOD) section consists of a phase  
detector (MIXER2) and amplifier creating a quadrature  
detector (also known as a phase coincidence detector)  
to demodulate the IF signal in FSK and FM modulation  
applications. The quadrature detector provides all the  
IF functions required for FSK and FM demodulation  
with only a few external parts.  
VDD  
VDD  
FBC1  
12  
2IFIN  
11  
VSS  
VDD  
VSS  
2.2 k  
200 µA  
2.2 kΩ  
The in-phase signal comes directly from the output of  
the IF limiting amplifier to MIXER2. The quadrature  
signal is created by an external tuned circuit from the  
output of the IF limiting amplifier (2IFOUT, Pin 15) AC-  
coupled to the MIXER2 DEMIN (Pin 16) input. The input  
impedance of the DEMIN pin is approximately 47 k.  
FBC2  
13  
Vss  
VSS  
FIGURE 2-8: BLOCK DIAGRAM OF IF  
LIMITING AMPLIFIER OUTPUT  
PIN  
The external tuned circuit can be constructed from sim-  
ple inductor-capacitor (LC) components but will require  
one of the elements to be tunable. A no-tune solution  
can be constructed with a ceramic discriminator.  
VDD  
VDD  
The output voltage of the DEMOD amplifier (DEMout+  
and DEMout-, Pins 23 and 24) depends on the peak  
deviation of the FSK or FM signal and the Q of the  
external tuned circuit. DEMout+ and DEMout- are high  
impedance outputs with only a 20 µA current capability.  
2IFOUT  
15  
40 µA  
VSS  
VSS  
The Demodulator pins are illustrated in Figures 2-10  
and 2-11.  
2.5.2  
RECEIVED SIGNAL STRENGTH  
INDICATOR (RSSI)  
FIGURE 2-10: BLOCK DIAGRAM OF  
DEMODULATOR INPUT PIN  
The RSSI signal is proportional to the log of the signal  
at 2IFIN. The 2IFIN input RSSI range is approximately  
40 µV to 160 mV. The slope of the RSSI output is  
approximately 26 mV/dB of RF signal.  
VDD  
VDD  
VDD  
47 kΩ  
DEMIN  
16  
The RSSI output has an internal 36 kresister to Vss  
fed by a current source. This resistor converts the  
RSSI current to voltage.  
VSS  
For Amplitude Shift Keying (ASK) demodulation, RSSI  
is compared to a reference voltage (static or dynamic).  
Post detector filtering is easily implemented by  
connecting a capacitor to ground from the RSSI pin  
effectively creating an RC filter with the internal 36 kΩ  
resistor.  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 7  
rfRXD0420/0920  
FIGURE 2-11: BLOCK DIAGRAM OF  
DEMODULATOR OUTPTUT  
PINS  
VDD  
50  
DEMOUT+  
23  
20 µA  
VSS  
20 µA  
VSS  
VSS  
VDD  
50 Ω  
20 µA  
VSS  
DEMOUT-  
24  
20 µA  
VSS  
VSS  
2.7  
Operational Amplifier  
The internal operational amplifier (OPA) can be  
configured as a comparator for ASK or FSK or as a filter  
for FM modulation applications.  
The Op Amp pins are illustrated in Figures 2-12 and  
2-13.  
FIGURE 2-12: BLOCK DIAGRAM OF OP AMP  
INPUT PINS  
VDD  
VDD  
VDD  
20 µA  
50 Ω  
50 Ω  
OPA-  
19  
OPA+  
20  
VSS  
VSS  
FIGURE 2-13: BLOCK DIAGRAM OF OP AMP  
OUTPUT PIN  
VDD  
VDD  
50 Ω  
OPA  
18  
VSS  
VSS  
DS70090A-page 8  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
effect the trim capacitor has on the receive frequency  
for the rfRXD0420 at 433.92 MHz. Keep in mind that  
this graph represents one example circuit and the  
actual results depends on the crystal and PCB layout.  
3.0  
APPLICATION CIRCUITS  
This section provides general information on applica-  
tion circuits for the rfRXD0420/0920 receiver. The  
following connections and external components  
provide starting points for designs and list the minimum  
FIGURE 3-2: RECEIVE FREQUENCY VS.  
TRIM CAPACITANCE  
circuitry  
recommended  
for  
general  
purpose  
applications.  
434.10  
434.05  
434.00  
433.95  
433.90  
433.85  
433.80  
433.75  
Performance of the radio system (transmitter and  
receiver) is affected by component selection and the  
environment in which it operates. Each system design  
has its own unique requirements. Specifications for a  
particular design requires careful analysis of the appli-  
cation and compromises for a practical implementation.  
3.1  
General  
This subsection lists connections and components that  
are common between applications. The following  
subsections give specific circuit connections and  
components for ASK, FSK and FM applications.  
Trim Capacitor (pF)  
Note that a 0 resistor, in the lower left of the graph,  
represents an infinite capacitance. This will be the  
lowest frequency obtainable for the crystal and PCB  
combination.  
3.1.1 BYPASS CAPACITORS  
Bypass capacitors should be placed as physically close  
as possible to VDD pins 8, 14, 17, 27 and 32  
respectively. Additional bypassing and board level low-  
pass filtering of the power supply may be required  
depending on the application.  
Calculation of the crystal frequency requires knowl-  
edge of the receive frequency (f ) and intermediate  
rf  
frequency (f ). Figure 3-3 is a worksheet to assist the  
if  
designer in calculating the crystal frequency. Table 3-1  
lists crystal frequencies for popular receive frequen-  
cies. Table 3-2 lists crystal parameters required for  
ordering crystals. For background information on  
crystal selection see Application Note AN826, Crystal  
3.1.2 FREQUENCY PLANNING  
The rfRXD0420/0920 receivers are single-conversion  
TM  
Oscillator Basics and Crystal Selection for rfPIC and  
superheterodyne architecture with  
frequency. The receive frequency is set by the crystal  
frequency (f ) and intermediate frequency (f ). For  
a
single IF  
®
PICmicro Devices.  
XTAL  
if  
TABLE 3-1: CRYSTAL FREQUENCIES FOR  
POPULAR RECEIVE  
a majority of applications an external crystal is  
connected to XTAL (Pin 26). Figure 3-1 illustrates an  
example circuit with an optional trim capacitor.  
FREQUENCIES  
Receive  
Crystal  
Frequency  
FIGURE 3-1: XTAL EXAMPLE CIRCUIT  
WITH OPTIONAL TRIM  
Frequency  
rfRXD0420  
CAPACITOR  
(2)  
(1)  
315 MHz  
20.35625 MHz  
26.45125 MHz  
433.92 MHz  
26  
rfRXD0920  
(1)  
868.3 MHz  
915 MHz  
26.8 MHz  
C TRIM  
(1)  
(OPTIONAL)  
28.259375 MHz  
(1) Low-side injection (2) High-side injection  
X1  
TABLE 3-2: CRYSTAL PARAMETERS  
Parameter  
Value  
The crystal load capacitance should be specified to  
include the internal load capacitance of the XTAL pin of  
15 pF plus PCB stray capacitance (approximately 2 to  
3 pF). A trim capacitor can be used to trim the crystal  
on frequency within the limitations of the crystal’s trim  
sensitivity and pullability. Figure 3-2 illustrates the  
Frequency:  
Mode:  
(see Figure 3-1)  
Fundamental  
15-20 pF  
Load Capacitance:  
ESR:  
60 Maximum  
These values are for design guidance only.  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 9  
rfRXD0420/0920  
FIGURE 3-3: FREQUENCY PLANNING WORKSHEET  
Step 1: Identify receive (f ) and IF frequency (f ).  
rf if  
f
if  
f
rf  
f =  
rf  
____________________  
f
lo  
f
=
____________________  
if  
Step 2: Calculate crystal frequencies for high- and low-side injection:  
f
x PLL divide ratio  
XTAL  
High-side Injection  
(
f
rf  
+
f
if  
)
(
_________ + _________  
)
f
=
=
= _______________  
XTAL-HIGH  
PLL divide ratio  
16 if rfRXD0420  
32 if rfRXD0920  
Low-side Injection  
(
f
rf  
-
f
)
if  
(
_________ - _________  
)
f
=
=
= _______________  
XTAL-LOW  
PLL divide ratio  
16 if rfRXD0420  
32 if rfRXD0920  
Step 3: Calculate Local Oscillator (LO) frequencies (f ) using f  
lo  
and f  
:
XTAL-LOW  
XTAL-HIGH  
High-side Injection  
16 if rfRXD0420  
32 if rfRXD0920  
f
=
f x PLL Divide Ratio  
=
XTAL-HIGH  
_________ x  
= _____________  
lo-HIGH  
Low-side Injection  
16 if rfRXD0420  
32 if rfRXD0920  
f
=
f
x PLL Divide Ratio  
=
XTAL-LOW  
_________ x  
= _____________  
lo-LOW  
Step 4: Select high-side injection (f  
) or low-side injection (f  
lo-HIGH  
) that corresponds to the LO frequency  
lo-LOW  
that is between the ranges of:  
Device  
LO Frequency Range  
300 to 430 MHz  
rfRXD0420  
rfRXD0920  
800 to 915 MHz  
Step 5: From the chosen injection mode in Step 4, write the selected crystal frequency (f  
) and circle  
XTAL  
injection mode.  
(circle one)  
f
=
____________________  
High-side Injection  
Low-side Injection  
XTAL  
Step 6: Calculate image frequency (f  
) for the Injection mode chosen:  
rf-image  
if High-side Injection  
f
=
f + (2 x f )  
rf if  
=
___________ + ( 2 x ___________ ) = ______________  
rf-image  
if Low-side Injection  
f
=
f - (2 x f )  
rf if  
=
___________ - ( 2 x ___________ ) = ______________  
rf-image  
Note: Image frequency should be sufficiently filtered by the preselector for the application.  
DS70090A-page 10  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
The SAW filter has the added advantage of filtering  
wide-band noise and improving the signal-to-noise  
ratio (SNR) of the receiver.  
3.1.3 PLL LOOP FILTER  
An external PLL loop filter is connected to pin LF  
(Pin 29). The loop filter controls the dynamic behavior  
of the PLL, primarily lock time and spur levels. Gener-  
ally, the PLL lock time is a small fraction of the overall  
receiver start-up time (see Electrical Characteristics  
Section). The crystal oscillator is the largest contributor  
to start-up time. Thus, for the majority of applications,  
design loop filter values for a wide loop bandwidth to  
suppress noise. Figure 3-4 illustrates an example filter  
circuit for a wide frequency range suitable for a majority  
of applications.  
SAW filters require impedance matching. Refer to the  
manufacturers' data sheet and application notes for  
SAW filter pinouts, specified impedances and recom-  
mended matching circuits. Figure 3-5 shows a SAW  
filter example circuit.  
A secondary purpose of the preselector is to provide  
impedance matching between the antenna and LNAIN  
(Pin 31).  
3.1.5 ANTENNA  
FIGURE 3-4: PLL LOOP FILTER EXAMPLE  
CIRCUIT  
Receiver performance and device packaging influence  
antenna selection. There are many third-party anten-  
nas to choose from. Third-party antennas typically  
have an impedance of 50 Ω. The preselector compo-  
nents should be chosen to match the impedance of the  
antenna to the LNAIN (Pin 31) impedance of  
26 || 2 pF.  
29  
C2  
OPTIONAL  
C1  
1000 pF  
The designer can chose to use a simple wire antenna.  
The length of the wire should be one-quarter the wave-  
length (λ) of the receive frequency. For example, the  
wavelength of 433.92 MHz is:  
R1  
10 k  
8
λ = c / f where c = 3 x 10 m/s  
rf  
8 6  
λ = 3 x 10 m/s / 433.92 x 10 Hz  
3.1.4 PRESELECTOR  
λ = 0.69 m  
therefore  
Receiver performance is heavily influenced by the  
preselector (also known as the front-end filter). The  
purpose of the preselector is to filter unwanted signals  
and noise from entering the receiver.  
0.25λ = 17.3 cm or 6.8 inches  
Finally, the wire antenna should be impedance  
matched to the preselector. The typical impedance of a  
one-quarter wavelength wire antenna is 36 Ω.  
The most important unwanted signal is the image  
frequency (f  
). Pay particular attention to the  
rf-image  
image frequency calculated in Figure 3-3 as this will be  
the frequency that needs to be filtered out by the  
preselector.  
3.1.6 LNA GAIN  
For a majority of applications, LNAGAIN can be tied to  
Vss (ground) enabling High Gain mode. If the applica-  
tion requires short range communications, LNAGAIN  
can be tied to VDD (pulled up) enabling Low Gain mode.  
The preselector can be designed using a simple LC  
filter or a Surface Acoustic Wave (SAW) filter. A simple  
LC filter provides a low cost solution but will have the  
least effect filtering the image frequency. A SAW filter  
can effectively filter the image frequency with a  
minimum of 40 dB attenuation.  
More Information on LNAGAIN operation can be found  
in the Circuit Description section.  
FIGURE 3-5: SAW FILTER EXAMPLE CIRCUIT  
F1  
Input  
SAW Filter  
Output  
L1  
L2  
2
5
6
Antenna  
LNAIN  
1
Input Gnd Output Gnd  
Case Gnd  
C1  
C2  
3
4
7
8
Note: Refer to SAW filter manufacturer’s data sheet for pin outs  
and values for impedance matching components.  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 11  
rfRXD0420/0920  
3.1.7 LNA TUNED CIRCUIT  
3.1.8 MIXER1 BIAS  
The LNAOUT (Pin 3) has an open-collector output. It is  
pulled up to VDD via a tuned circuit. It is also connected  
to 1IFIN (Pin 4) via a series decoupling capacitor. The  
1IFIN input impedance is approximately 33 || 1.5 pF.  
The 1IF+ (Pin 6) and 1IF- (Pin 7) are bias connections  
to the MIXER1 balanced collectors. Both pins are  
open-collector outputs and are individually pulled up to  
VDD by a load resistor. Figure 3-7 shows a MIXER1  
bias example circuit.  
Important: To ensure LNA stability the VSS pin (Pin 1)  
must be connected to a low impedance ground.  
FIGURE 3-7: MIXER1 BIAS EXAMPLE  
CIRCUIT  
As shown in Figure 3-6, components C1 and L1 make  
up the tuned circuit and provide collector current via  
pull-up. Together with decoupling capacitor C2, they  
provided impedance matching between the LNA and  
MIXER1. To a lesser extent, C1, L1, and C2 provide  
VDD  
VDD  
band-pass filtering at the receive frequency (f ).  
rf  
R1  
470 Ω  
R2  
470 Ω  
Component values depend on the selected receive  
frequency. The challenge is to design the circuit with  
the fewest components setting Q as high as possible  
as limited by component tolerances. For a majority of  
applications it is best to design a wide bandwidth tuned  
circuit to account for manufacturing and component  
tolerances. The best approach is to design the tuned  
circuit using a filter simulation program. Table 3-3 lists  
example component values for popular receive  
frequencies.  
6
7
3.1.9 INTERMEDIATE FREQUENCY (IF)  
FILTER  
The IF filter defines the overall adjacent signal selectiv-  
ity of the receiver. For a majority of applications, low-  
cost 10.7 MHz ceramic IF filters are used. These are  
available in a variety of bandwidths and packages.  
FIGURE 3-6: LNA OUTPUT TO MIXER1  
EXAMPLE CIRCUIT.  
IF filter bandwidth selection is a function of:  
• modulation (ASK, FSK or FM)  
• signal bandwidth  
VDD  
• frequency and temperature tolerances of the  
transmitter and receiver components  
C Bypass  
The typical input and output impedance of ceramic  
filters is 330 . 1IFOUT (Pin 9) has an approximately  
330 single-ended output impedance and provides a  
direct match to the ceramic IF filter. The internal resis-  
tance of the 2IFIN (Pin 11) is approximately 2.2 k. In  
order to terminate ceramic IF filters a 390 resistor  
can be paralleled to the 2IFIN and FBC2 (Pin 13).  
Figure 3-8 shows an example circuit schematic using a  
10.7 MHz ceramic IF filter.  
C1  
L1  
C2  
3
4
3.1.10 IF LIMITING AMPLIFIER EXTERNAL  
FEEDBACK CAPACITORS  
TABLE 3-3: LNA TUNED CIRCUIT EXAMPLE  
COMPONENT VALUES  
FBC1 (Pin 12) and FBC2 (Pin 13) are connected to  
external feedback capacitors. Figure 3-8 shows  
component values and connections for these  
capacitors.  
f
rf  
C1  
L1  
C2  
315 MHz  
433.92 MHz  
868.3 MHz  
915 MHz  
7.0 pF  
3.0 pF  
2.0 pF  
2.0 pF  
22 nH  
15 nH  
7.6 nH  
6.8 nH  
6.0 pF  
6.0 pF  
3.0 pF  
3.0 pF  
These values are for design guidance only.  
DS70090A-page 12  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
FIGURE 3-8: IF FILTER, LIMITING AMPLIFIER AND DEMODULATOR BLOCK DIAGRAM  
I N  
D E M  
2 I F  
O U T  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 13  
rfRXD0420/0920  
FIGURE 3-9: ASK APPLICATION CIRCUIT  
O P A  
D D V  
S S V  
M I X E R 2  
O U T + D E M  
O U T - D E M  
I N  
D E M  
O U T 2 I F  
D D V  
1 0 0 0 p F  
C 1 3  
F B C 2  
S S V  
F B C 1  
X T A L  
I N 2 I F  
S S V  
D D V  
O U T 1 I F  
E N R X  
L F  
D D V  
1 I F -  
1 I F +  
S S V  
1 I F  
I N  
O U T L N A  
G A I N L N A  
S S V  
DS70090A-page 14  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
If the bit decision occurs near the end of the signal  
period, then the time constant should be set at less  
than or equal to the signal period. Figure 3-11  
illustrates this method.  
3.2  
Amplitude Shift Keying (ASK)  
Figure 3-9 illustrates an example ASK applications cir-  
cuit.  
The IF Limiting Amplifier with RSSI is used as an ASK  
detector. The RSSI signal is post detector filtered and  
then compared to a reference voltage to determine if  
the incoming RF signal is a logical one or zero. The  
reference voltage can be configured as a dynamic  
voltage level determined by the incoming RF signal  
strength or by a predetermined fixed level.  
Once the signal decision time and time period of the  
signal period are known, then capacitor C1 can be  
selected. Once C1 is selected, the designer should  
observe the RSSI signal with an oscilloscope and  
perform operational and/or bit error rate testing to  
confirm receiver performance.  
FIGURE 3-11: NEAR END OF THE SIGNAL  
PERIOD DECISION RSSI LOW-  
PASS FILTERED  
3.2.1 RSSI POST DETECTOR FILTERING  
The RSSI signal is low-passed filtered to remove high  
frequency and pulse noise to aid the decision making  
process of the comparator and increase the sensitivity  
of the receiver. The RSSI signal low-pass filter is a RC  
filter created by the RSSI output impedance of 36 kΩ  
and capacitor C1. Setting the time constant (RC = τ) of  
the RC filter depends on the signal period and when the  
signal decision will be made.  
Signal Decision  
OOK Signal  
Signal Period  
3.2.1.1  
Signal Period  
Optimum sensitivity of the receiver with reasonable  
pulse distortion occurs when the RC filter time constant  
is between 1 and 2 times the signal period. If the time  
constant of the RC filter is set too short, there is little  
noise filtering benefit. However, if the time constant of  
the RC filter is set too long, the data pulses will become  
elongated causing inter-symbol interference.  
RSSI Signal  
1τ to 2τ  
3.2.2 COMPARATOR  
3.2.1.2 Signal Decision  
The internal operational amplifier is configured as a  
comparator. The RSSI signal is applied to OPA+ (Pin  
20) and compared with a reference voltage on OPA-  
(Pin 19) to determine the logic level of the received  
signal. The reference voltage can be dynamic or static.  
If the bit decision occurs in the center of the signal  
period (such as KEELOQ decoders), then one or two  
times the RC filter time constant should be set at less  
than or equal to half the signal period. Figure 3-10 illus-  
trates this method. The top trace represents the  
received on-off keying (OOK) signal. The bottom trace  
shows the RSSI signal after the RC low-pass filter.  
The choice of dynamic versus static reference voltage  
depends in part on the ratio of logical ones versus  
zeros of the data (this can also be thought of as the AC  
content of the data). Provided the ratio has an even  
number of logical ones versus zeros, a dynamic refer-  
ence voltage can be generated with a simple low-pass  
filter. The advantage of the dynamic reference voltage  
is the increased receiver sensitivity compared to a fixed  
reference voltage. However, the comparator will output  
random data. The decoder (for example, a pro-  
grammed PICmicro MCU or KEELOQ decoder) must  
distinguish between random noise and valid data.  
FIGURE 3-10: CENTER SIGNAL PERIOD  
DECISION RSSI LOW-PASS  
FILTERED  
Signal Decision  
OOK Signal  
The choice of a static reference voltage depends in part  
on the DC content of the data. That is, the data has an  
uneven number of logical ones versus zeros. The  
disadvantage of the static reference voltage is  
decreased receiver sensitivity compared to a dynamic  
reference voltage. In this case, the comparator will  
output data without random noise.  
Signal Period  
RSSI Signal  
1τ to 2τ  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 15  
rfRXD0420/0920  
Selection of component values for R1 and C2 is an  
iterative process. First start with a time constant  
between 10 to 100 times the signal rate. Second, view  
the reference voltage against the RSSI signal to  
determine if the values are suitable. Figure 3-12 is an  
oscilloscope screen capture of an incoming RF square  
wave modulated signal (ASK on-off keying). The top  
trace is the data output of OPA (Pin 18). The two  
bottom traces are the RSSI signal (Pin 21, bottom  
square wave) and generated reference voltage (Pin 19,  
bottom trace centered in the RSSI square wave). The  
goal is to select values for R1 and C2 such that the  
reference voltage is in the middle of the RSSI signal.  
This reference voltage level provides the optimum data  
comparison of the incoming data signal.  
3.2.2.1 DYNAMIC REFERENCE VOLTAGE  
A dynamic reference voltage can be derived by averag-  
ing the received signal with a low-pass filter. The exam-  
ple ASK application circuit shown in Figure 3-9, the  
low-pass filter is formed by R1 and C2. The output of  
the low-pass filter is then fed to OPA-.  
The setting of the R1-C2 time constant depends on the  
ratio of logical ones versus zeros and a trade off in  
stability versus receiver reaction time. If the received  
signal has an even number of logical ones versus  
zeros, the time constant can be set relatively short.  
Thus the reference voltage can react quickly to  
changes in the received signal amplitude and differ-  
ences in transmitters. However, it may not be as stable  
and can fluctuate with the ratio of logical ones and  
zeros. If the time constant is set long, the reference  
voltage will be more stable. However, the receiver  
cannot react as quickly upon the reception of a  
received signal.  
3.2.2.2 STATIC REFERENCE VOLTAGE  
A static reference voltage can be derived by a voltage  
divider network.  
FIGURE 3-12:  
RSSI AND REFERENCE VOLTAGE COMPARISON  
OPA  
(Pin 18)  
RSSI  
(Pin 21)  
OPA-  
(Pin 19)  
DS70090A-page 16  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
FIGURE 3-13: FSK APPLICATION CIRCUIT  
O P A  
D D V  
S S V  
M I X E R 2  
O U T + D E M  
O U T - D E M  
I N  
D E M  
O U T 2 I F  
D D V  
1 0 0 0 p F  
C 1 3  
F B C 2  
S S V  
F B C 1  
X T A L  
I N 2 I F  
S S V  
D D V  
O U T 1 I F  
E N R X  
L F  
D D V  
1 I F -  
1 I F +  
S S V  
1 I F  
I N  
O U T L N A  
G A I N L N A  
S S V  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 17  
rfRXD0420/0920  
FIGURE 3-14: LC DISCRIMINATOR  
EXAMPLE CIRCUIT  
3.3  
Frequency Shift Keying (FSK)  
Figure 3-13 illustrates an example FSK application  
circuit.  
R1  
4.7 k  
3.3.1 IF FILTER CONSIDERATIONS  
C3  
0-56 pF  
As mentioned in the Section 3.1 above, IF filter band-  
width selection is a function of:  
• modulation (ASK, FSK or FM)  
• signal bandwidth  
C1  
L1  
1.0 pF  
3.3 µH  
• frequency and temperature tolerances of the  
transmitter and receiver components  
C2  
680 pF  
The occupied bandwidth of binary FSK signals is 2  
times the peak frequency deviation plus 2 times the  
signal bandwidth. For example, if the data rate is 2400  
bits per second Manchester encoded, the signal band-  
width is 4800 baud or 1200 Hz, and if the peak  
frequency deviation is 24 kHz, the minimum bandwidth  
of the IF filter is:  
15  
16  
3.3.2.2 Ceramic Discriminator  
A no-tune solution can be constructed with a ceramic  
discriminator. Figure 3-15 illustrates an example  
ceramic discriminator circuit.  
IF BW  
IF BW  
= (2 x 2400) + (2 x 24000)  
= 52800 Hz  
min  
min  
The ceramic discriminator acts as a parallel tuned  
circuit at the IF frequency (for example, 10.7 MHz). The  
parallel capacitor C3 tunes the ceramic resonator. The  
high Q of this circuit enables higher output of the detec-  
tor for small frequency deviations. However, smaller  
frequency deviations require better frequency  
tolerances at the transmitter and receiver.  
Add to this value the frequency and temperature  
tolerances of the transmitter and receiver components.  
FSK signals are more sensitive to group delay varia-  
tions of the IF filter. Therefore, a filter with a low group  
delay variation should be used. As an alternative, a  
filter with wider than required bandwidth can be used  
because the group delay variation in the center of the  
bandpass will be relatively constant.  
In order to detect wider deviation or off-frequency  
signals, the detector bandwidth has to be increased.  
This can be accomplished by reducing the Q of the  
tuned circuit. One method is to parallel a resistor  
across the ceramic discriminator. A second is to  
increase the value of the coupling capacitor C1  
increasing the load on the detector. The result of  
reducing the Q of the discriminator will be that the  
detector output will be smaller.  
3.3.2 FSK DETECTOR  
The demodulator (DEMOD) section consists of a phase  
detector (MIXER2) and amplifier creating a quadrature  
detector (also known as a phase coincidence detector)  
to demodulate the IF signal in FSK and FM modulation  
applications. The in-phase signal comes directly from  
the output of the IF limiting amplifier to MIXER2. The  
quadrature signal is created by an external tuned circuit  
from the output of the IF limiting amplifier (2IFOUT, Pin  
15) AC-coupled to the MIXER2 DEMIN (Pin 16) input.  
FIGURE 3-15: CERAMIC DISCRIMINATOR  
EXAMPLE CIRCUIT  
F1  
3.3.2.1 LC Discriminator  
CERAMIC DISCRIMINATOR  
The external tuned circuit can be constructed from  
simple inductor-capacitor (LC) components. This type  
circuit produces and excellent output. However, one of  
the elements (L or C) must be tunable. Figure 3-14  
illustrates an example LC discriminator circuit using a  
tunable capacitor. A similar circuit with a tunable induc-  
tor is also possible. Resistor R1 = 4.7 kreduces the  
Q of the circuit so that frequency deviations of up to 75  
kHz can be demodulated.  
C1  
1.0 pF  
C3  
10-12 pF  
C2  
680 pF  
15  
16  
DS70090A-page 18  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
3.3.3 POST DETECTOR FILTERING  
Care should be taken in selecting the values of capac-  
itors C1 and C2 (Figure 3-13) so that the output of the  
detector is not distorted and receiver sensitivity  
improved. These values are chosen depending on the  
data signal rate.  
Generally, if the data signal rate is fast then the filter  
time constant can be set short. Conversely, if the signal  
rate is slow, the filter time constant can be set long. The  
designer should observe the output of the detector with  
an oscilloscope and perform operational and/or bit  
error rate testing to confirm receiver performance.  
3.3.4 COMPARATOR  
The output of the DEMOD amplifier (DEMOUT+ and  
DEMOUT-, Pins 23 and 24) depends on the peak  
deviation of the FSK or FM signal and the Q of the  
external tuned circuit. DEMout+ and DEMout- are high  
impedance outputs with only a 20 µA current capability.  
The capacitance on these pins limit the maximum data  
signal rate. The nominal output voltage of these pins is  
1.23V.  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 19  
rfRXD0420/0920  
FIGURE 3-16: FM APPLICATION CIRCUIT  
O P A  
D D V  
S S V  
M I X E R 2  
O U T + D E M  
D E M  
I N  
-
O U T  
D E M  
O U T 2 I F  
D D V  
1 0 0 0 p F  
C 1 3  
F B C 2  
F B C 1  
S S V  
X T A L  
I N 2 I F  
S S V  
D D V  
O U T 1 I F  
E N R X  
L F  
D D V  
1 I F -  
1 I F +  
S S V  
1 I F  
I N  
O U T L N A  
G A I N L N A  
S S V  
DS70090A-page 20  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
3.4  
Frequency Modulation (FM)  
Figure 3-16 illustrates an example FM application  
circuit.  
3.4.1 FSK DETECTOR  
FM demodulation is performed in the same manner as  
described in the FSK section above.  
3.4.2 OPERATIONAL AMPLIFIER  
The internal operational amplifier is configured as an  
active low-pass filter.  
FM audio is typically de-emphasized. It is recom-  
mended that de-emphasis circuitry be connected at the  
output of the operational amplifier rather than the  
output of the detector.  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 21  
rfRXD0420/0920  
4.0  
ELECTRICAL CHARACTERISTICS  
Absolute Maximum Ratings  
Supply voltage...................................................................................................................................................0 to +7.0V  
Input voltage...........................................................................................................................................-0.3 to VCC+0.3V  
Input RF level.........................................................................................................................................................10dBm  
Storage temperature .................................................................................................................................... -40 to +125C  
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the  
device. This is a stress rating only and functional operation of the device at those or any other conditions above those  
indicated in the operation listings of this specification is not implied. Exposure to maximum rating conditions for  
extended periods may affect device reliability.  
DS70090A-page 22  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
4.1  
DC Characteristics: rfRXD0420  
(Industrial)  
Standard Operating Conditions (unless otherwise stated)  
DC CHARACTERISTICS  
Operating Temperature -40°C TA +85°C  
Param  
Sym  
No.  
Characteristic  
Supply Voltage  
Min  
Typ  
Max  
Units  
Conditions  
VCC  
2.5  
2.7  
5.5  
5.5  
100  
8.0  
V
V
f < 400 MHz  
rf  
f > 400 MHz  
rf  
ISTBY  
ICC  
Standby Current  
nA  
mA  
mA  
mV  
nA  
nA  
V
ENRX = 0  
Supply Current  
5.0  
6.5  
6.5  
8.2  
LNAGAIN = 1  
LNAGAIN = 0  
10.0  
20  
VOPA  
IOPA  
Op Amp input voltage offset  
Op Amp input current offset  
Op Amp input bias current  
RSSI voltage  
-20  
-50  
50  
IBIAS  
VRSSI  
-100  
0.5  
100  
1.5  
1.0  
1.9  
LNAGAIN = 1  
LNAGAIN = 0  
1.25  
2.45  
V
*
These parameters are characterized but not tested.  
Data in “Typ” column is at 3V, 23°C unless otherwise stated. These parameters are for design guidance only and  
are not tested.  
4.2  
AC Characteristics: rfRXD0420  
(Industrial)  
Standard Operating Conditions (unless otherwise stated)  
AC CHARACTERISTICS  
Operating Temperature -40°C TA +85°C  
Param  
Sym  
No.  
Characteristic  
Min  
Typ  
Max  
Units  
Conditions  
TFSK  
TASK  
Start-up time - FSK/FM  
Start-up time - ASK  
0.9  
ms  
ms  
ENRX = 0 to 1  
R1xC1  
Note 1  
+TFSK  
Sensitivity - Narrowband FSK  
Sensitivity - Wideband FSK  
Sensitivity - Narrowband ASK  
Sensitivity - Wideband ASK  
-111  
-104  
-109  
-106  
0
dBm  
dBm  
dBm  
dBm  
dBm  
Note 2  
Note 3  
Note 4  
Note 5  
Input RF level maximum FSK/  
FM  
LNAGAIN = 1  
Input RF level maximum ASK  
-10  
dBm  
LNAGAIN = 1  
*
These parameters are characterized but not tested.  
Data in “Typ” column is at 3V, 23°C, f = 433.6 MHz, IF = 10.7 MHz unless otherwise stated. These parameters  
rf  
are for design guidance only and are not tested.  
Note 1: Dependant on ASK detector time constant.  
-3  
2: IF bandwidth = 40 kHz, f = +/- 15 kHz, BER <= 3 x 10  
-3  
3: IF bandwidth = 150 kHz, f = +/- 50 kHz, BER <= 3 x 10  
-3  
4: IF bandwidth = 40 kHz, BER <= 3 x 10  
-3  
5: IF bandwidth = 150 kHz, BER <= 3 x 10  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 23  
rfRXD0420/0920  
4.3  
DC Characteristics: rfRXD0920  
(Industrial)  
Standard Operating Conditions (unless otherwise stated)  
DC CHARACTERISTICS  
Operating Temperature -40°C TA +85°C  
Param  
Sym  
No.  
Characteristic  
Supply Voltage  
Min  
Typ  
Max  
Units  
Conditions  
VCC  
2.5  
3.3  
5.5  
5.5  
100  
9.0  
11.0  
20  
V
V
f < 900 MHz  
rf  
f > 900 MHz  
rf  
ISTBY  
ICC  
Standby Current  
nA  
mA  
mA  
mV  
nA  
nA  
V
ENRX = 0  
Supply Current  
6.0  
7.5  
7.5  
9.2  
LNAGAIN = 1  
LNAGAIN = 0  
VOPA  
IOPA  
Op Amp input voltage offset  
Op Amp input current offset  
Op Amp input bias current  
RSSI voltage  
-20  
-50  
50  
IBIAS  
VRSSI  
-100  
0.5  
100  
1.5  
2.45  
1.0  
1.9  
LNAGAIN = 1  
LNAGAIN = 0  
1.25  
V
*
These parameters are characterized but not tested.  
Data in “Typ” column is at 3V, 23°C unless otherwise stated. These parameters are for design guidance only and  
are not tested.  
4.4  
AC Characteristics: rfRXD0920  
(Industrial)  
Standard Operating Conditions (unless otherwise stated)  
AC CHARACTERISTICS  
Operating Temperature -40°C TA +85°C  
Param  
Sym  
No.  
Typ  
Characteristic  
Min  
Max  
Units  
Conditions  
TFSK  
TASK  
Start-up time - FSK/FM  
Start-up time - ASK  
0.9  
ms  
ms  
ENRX = 0 to 1  
R1xC1  
Note 1  
+ TFSK  
Sensitivity - Narrowband FSK  
Sensitivity - Wideband FSK  
Sensitivity - Narrowband ASK  
Sensitivity - Wideband ASK  
-109  
-102  
-108  
-104  
0
dBm  
dBm  
dBm  
dBm  
dBm  
Note 2  
Note 3  
Note 4  
Note 5  
Input RF level maximum FSK/  
FM  
LNAGAIN = 1  
Input RF level maximum ASK  
-10  
dBm  
LNAGAIN = 1  
*
These parameters are characterized but not tested.  
Data in “Typ” column is at 3V, 23°C, f = 433.6 MHz, IF = 10.7 MHz unless otherwise stated. These parameters  
rf  
are for design guidance only and are not tested.  
Note 1: Dependant on ASK detector time constant.  
-3  
2: IF bandwidth = 40 kHz, f = +/- 15 kHz, BER <= 3 x 10  
-3  
3: IF bandwidth = 150 kHz, f = +/- 50 kHz, BER <= 3 x 10  
-3  
4: IF bandwidth = 40 kHz, BER <= 3 x 10  
-3  
5: IF bandwidth = 150 kHz, BER <= 3 x 10  
DS70090A-page 24  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
5.0 PACKAGING INFORMATION  
5.1  
Package Marking Information  
32-Lead LQFP  
Example  
XXXXXXXXXXXX  
XXXXXXXXXXXX  
XXXXXXXXXXXX  
YYWWNNN  
rfRXD0420  
02123ABC  
Legend: XX...X Customer specific information*  
Y
Year code (last digit of calendar year)  
YY  
Year code (last 2 digits of calendar year)  
Week code (week of January 1 is week ‘01’)  
Alphanumeric traceability code  
WW  
NNN  
Note: In the event the full Microchip part number cannot be marked on one line, it will  
be carried over to the next line thus limiting the number of available characters  
for customer specific information.  
*
Standard PICmicro device marking consists of Microchip part number, year code, week code, and  
traceability code. For PICmicro device marking beyond this, certain price adders apply. Please check  
with your Microchip Sales Office. For QTP devices, any special marking adders are included in QTP  
price.  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 25  
rfRXD0420/0920  
5.2  
Package Details  
The following section gives the technical details of the package.  
32-Lead Plastic Low Profile Quad Flat Package (LQ) 7 x 7 x 1.4 mm Body  
Not available at this time.  
DS70090A-page 26  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
ON-LINE SUPPORT  
SYSTEMS INFORMATION AND  
UPGRADE HOT LINE  
Microchip provides on-line support on the Microchip  
World Wide Web site.  
The Systems Information and Upgrade Line provides  
system users a listing of the latest versions of all of  
Microchip's development systems software products.  
Plus, this line provides information on how customers  
can receive the most current upgrade kits.The Hot Line  
Numbers are:  
The web site is used by Microchip as a means to make  
files and information easily available to customers. To  
view the site, the user must have access to the Internet  
®
and a web browser, such as Netscape or Microsoft  
®
Internet Explorer. Files are also available for FTP  
download from our FTP site.  
1-800-755-2345 for U.S. and most of Canada, and  
1-480-792-7302 for the rest of the world.  
ConnectingtotheMicrochipInternetWebSite  
The Microchip web site is available at the following  
URL:  
092002  
www.microchip.com  
The file transfer site is available by using an FTP  
service to connect to:  
ftp://ftp.microchip.com  
The web site and file transfer site provide a variety of  
services. Users may download files for the latest  
Development Tools, Data Sheets, Application Notes,  
User's Guides, Articles and Sample Programs. A vari-  
ety of Microchip specific business information is also  
available, including listings of Microchip sales offices,  
distributors and factory representatives. Other data  
available for consideration is:  
• Latest Microchip Press Releases  
Technical Support Section with Frequently Asked  
Questions  
• Design Tips  
• Device Errata  
• Job Postings  
• Microchip Consultant Program Member Listing  
• Links to other useful web sites related to  
Microchip Products  
• Conferences for products, Development Systems,  
technical information and more  
• Listing of seminars and events  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page 27  
rfRXD0420/0920  
READER RESPONSE  
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-  
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation  
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.  
Please list the following information, and use this outline to provide us with your comments about this document.  
To:  
Technical Publications Manager  
Reader Response  
Total Pages Sent ________  
RE:  
From:  
Name  
Company  
Address  
City / State / ZIP / Country  
Telephone: (_______) _________ - _________  
FAX: (______) _________ - _________  
Application (optional):  
Would you like a reply?  
Y
N
Literature Number:  
DS70090A  
Device:  
rfRXD0420/0920  
Questions:  
1. What are the best features of this document?  
2. How does this document meet your hardware and software development needs?  
3. Do you find the organization of this document easy to follow? If not, why?  
4. What additions to the document do you think would enhance the structure and subject?  
5. What deletions from the document could be made without affecting the overall usefulness?  
6. Is there any incorrect or misleading information (what and where)?  
7. How would you improve this document?  
DS70090A-page 28  
Preliminary  
2003 Microchip Technology Inc.  
rfRXD0420/0920  
PRODUCT IDENTIFICATION SYSTEM  
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.  
PART NO.  
Device  
X
/XX  
XXX  
Examples:  
Temperature Package  
Range  
Pattern  
a)  
b)  
rfRXD0420-I/LQ = Industrial temp, LQFP  
package  
rfRXD0920-I/LQ = Industrial temp, LQFP  
package  
Device  
rfRXD0420-I/LQ UHF ASK/FSK/FM Receiver  
rfRXD0920-I/LQ UHF ASK/FSK/FM Receiver  
rfRXD0420T-I/LQ UHF ASK/FSK/FM Receiver  
(Tape & Reel)  
rfRXD0920T-I/LQ UHF ASK/FSK/FM Receiver  
(Tape & Reel)  
Temperature Range  
I
=
=
-40°C to +85°C  
Package  
LQ  
LQFP32  
Pattern  
Special Requirements  
Sales and Support  
Data Sheets  
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-  
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:  
1. Your local Microchip sales office  
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277  
3. The Microchip Worldwide Site (www.microchip.com)  
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.  
New Customer Notification System  
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A-page29  
rfRXD0420/0920  
NOTES:  
DS70090A-page30  
Preliminary  
2003 Microchip Technology Inc.  
Note the following details of the code protection feature on Microchip devices:  
Microchip products meet the specification contained in their particular Microchip Data Sheet.  
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the  
intended manner and under normal conditions.  
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our  
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data  
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  
Microchip is willing to work with the customer who is concerned about the integrity of their code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not  
mean that we are guaranteeing the product as “unbreakable.”  
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our  
products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts  
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.  
Information contained in this publication regarding device  
applications and the like is intended through suggestion only  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications. No  
representation or warranty is given and no liability is assumed by  
Microchip Technology Incorporated with respect to the accuracy  
or use of such information, or infringement of patents or other  
intellectual property rights arising from such use or otherwise.  
Use of Microchip’s products as critical components in life  
support systems is not authorized except with express written  
approval by Microchip. No licenses are conveyed, implicitly or  
otherwise, under any intellectual property rights.  
Trademarks  
The Microchip name and logo, the Microchip logo, KEELOQ,  
MPLAB, PIC, PICmicro, PICSTART, PRO MATE and  
PowerSmart are registered trademarks of Microchip Technology  
Incorporated in the U.S.A. and other countries.  
FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL  
and The Embedded Control Solutions Company are registered  
trademarks of Microchip Technology Incorporated in the U.S.A.  
Accuron, dsPIC, dsPICDEM.net, ECONOMONITOR,  
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial Programming,  
ICSP, ICEPIC, microPort, Migratable Memory, MPASM, MPLIB,  
MPLINK, MPSIM, PICC, PICkit, PICDEM, PICDEM.net,  
PowerCal, PowerInfo, PowerTool, rfPIC, Select Mode,  
SmartSensor, SmartShunt, SmartTel and Total Endurance are  
trademarks of Microchip Technology Incorporated in the U.S.A.  
and other countries.  
Serialized Quick Turn Programming (SQTP) is a service mark of  
Microchip Technology Incorporated in the U.S.A.  
All other trademarks mentioned herein are property of their  
respective companies.  
© 2003, Microchip Technology Incorporated, Printed in the  
U.S.A., All Rights Reserved.  
Printed on recycled paper.  
Microchip received QS-9000 quality system  
certification for its worldwide headquarters,  
design and wafer fabrication facilities in  
Chandler and Tempe, Arizona in July 1999  
and Mountain View, California in March 2002.  
The Company’s quality system processes and  
procedures are QS-9000 compliant for its  
PICmicro® 8-bit MCUs, KEELOQ® code hopping  
devices, Serial EEPROMs, microperipherals,  
non-volatile memory and analog products. In  
addition, Microchip’s quality system for the  
design and manufacture of development  
systems is ISO 9001 certified.  
2003 Microchip Technology Inc.  
Preliminary  
DS70090A - page 31  
WORLDWIDE SALES AND SERVICE  
Japan  
AMERICAS  
ASIA/PACIFIC  
Microchip Technology Japan K.K.  
Corporate Office  
Australia  
Benex S-1 6F  
2355 West Chandler Blvd.  
Microchip Technology Australia Pty Ltd  
Suite 22, 41 Rawson Street  
Epping 2121, NSW  
3-18-20, Shinyokohama  
Chandler, AZ 85224-6199  
Kohoku-Ku, Yokohama-shi  
Kanagawa, 222-0033, Japan  
Tel: 81-45-471- 6166 Fax: 81-45-471-6122  
Tel: 480-792-7200 Fax: 480-792-7277  
Technical Support: 480-792-7627  
Web Address: http://www.microchip.com  
Australia  
Tel: 61-2-9868-6733 Fax: 61-2-9868-6755  
Korea  
China - Beijing  
Rocky Mountain  
Microchip Technology Korea  
168-1, Youngbo Bldg. 3 Floor  
Samsung-Dong, Kangnam-Ku  
Seoul, Korea 135-882  
Microchip Technology Consulting (Shanghai)  
Co., Ltd., Beijing Liaison Office  
Unit 915  
2355 West Chandler Blvd.  
Chandler, AZ 85224-6199  
Tel: 480-792-7966 Fax: 480-792-4338  
Bei Hai Wan Tai Bldg.  
Tel: 82-2-554-7200 Fax: 82-2-558-5934  
Atlanta  
No. 6 Chaoyangmen Beidajie  
Beijing, 100027, No. China  
Tel: 86-10-85282100 Fax: 86-10-85282104  
Singapore  
3780 Mansell Road, Suite 130  
Alpharetta, GA 30022  
Microchip Technology Singapore Pte Ltd.  
200 Middle Road  
Tel: 770-640-0034 Fax: 770-640-0307  
China - Chengdu  
#07-02 Prime Centre  
Boston  
Microchip Technology Consulting (Shanghai)  
Co., Ltd., Chengdu Liaison Office  
Rm. 2401-2402, 24th Floor,  
Singapore, 188980  
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Tel: 978-692-3848 Fax: 978-692-3821  
Tel: 65-6334-8870 Fax: 65-6334-8850  
Taiwan  
Ming Xing Financial Tower  
Microchip Technology (Barbados) Inc.,  
Taiwan Branch  
No. 88 TIDU Street  
Chicago  
Chengdu 610016, China  
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Itasca, IL 60143  
11F-3, No. 207  
Tel: 86-28-86766200 Fax: 86-28-86766599  
Tung Hua North Road  
Taipei, 105, Taiwan  
China - Fuzhou  
Tel: 630-285-0071 Fax: 630-285-0075  
Microchip Technology Consulting (Shanghai)  
Co., Ltd., Fuzhou Liaison Office  
Unit 28F, World Trade Plaza  
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139  
Dallas  
4570 Westgrove Drive, Suite 160  
Addison, TX 75001  
EUROPE  
No. 71 Wusi Road  
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Tel: 972-818-7423 Fax: 972-818-2924  
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Durisolstrasse 2  
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Tel: 86-591-7503506 Fax: 86-591-7503521  
Tri-Atria Office Building  
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A-4600 Wels  
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Tel: 248-538-2250 Fax: 248-538-2260  
Microchip Technology Hongkong Ltd.  
Unit 901-6, Tower 2, Metroplaza  
223 Hing Fong Road  
Austria  
Tel: 43-7242-2244-399  
Fax: 43-7242-2244-393  
Denmark  
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Tel: 852-2401-1200 Fax: 852-2401-3431  
2767 S. Albright Road  
Kokomo, Indiana 46902  
Tel: 765-864-8360 Fax: 765-864-8387  
Microchip Technology Nordic ApS  
Regus Business Centre  
Lautrup hoj 1-3  
China - Shanghai  
Microchip Technology Consulting (Shanghai)  
Co., Ltd.  
Ballerup DK-2750 Denmark  
Tel: 45 4420 9895 Fax: 45 4420 9910  
Los Angeles  
Room 701, Bldg. B  
18201 Von Karman, Suite 1090  
Irvine, CA 92612  
Far East International Plaza  
No. 317 Xian Xia Road  
France  
Microchip Technology SARL  
Parc d’Activite du Moulin de Massy  
43 Rue du Saule Trapu  
Tel: 949-263-1888 Fax: 949-263-1338  
Shanghai, 200051  
San Jose  
Tel: 86-21-6275-5700 Fax: 86-21-6275-5060  
Microchip Technology Inc.  
2107 North First Street, Suite 590  
San Jose, CA 95131  
China - Shenzhen  
Batiment A - ler Etage  
Microchip Technology Consulting (Shanghai)  
Co., Ltd., Shenzhen Liaison Office  
91300 Massy, France  
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79  
Tel: 408-436-7950 Fax: 408-436-7955  
Rm. 1812, 18/F, Building A, United Plaza  
No. 5022 Binhe Road, Futian District  
Shenzhen 518033, China  
Germany  
Toronto  
Microchip Technology GmbH  
Steinheilstrasse 10  
6285 Northam Drive, Suite 108  
Mississauga, Ontario L4V 1X5, Canada  
Tel: 905-673-0699 Fax: 905-673-6509  
Tel: 86-755-82901380 Fax: 86-755-82966626  
D-85737 Ismaning, Germany  
Tel: 49-89-627-144 0 Fax: 49-89-627-144-44  
China - Qingdao  
Rm. B503, Fullhope Plaza,  
Italy  
No. 12 Hong Kong Central Rd.  
Qingdao 266071, China  
Microchip Technology SRL  
Centro Direzionale Colleoni  
Palazzo Taurus 1 V. Le Colleoni 1  
20041 Agrate Brianza  
Tel: 86-532-5027355 Fax: 86-532-5027205  
India  
Milan, Italy  
Microchip Technology Inc.  
India Liaison Office  
Tel: 39-039-65791-1 Fax: 39-039-6899883  
Divyasree Chambers  
United Kingdom  
1 Floor, Wing A (A3/A4)  
No. 11, O’Shaugnessey Road  
Bangalore, 560 025, India  
Tel: 91-80-2290061 Fax: 91-80-2290062  
Microchip Ltd.  
505 Eskdale Road  
Winnersh Triangle  
Wokingham  
Berkshire, England RG41 5TU  
Tel: 44 118 921 5869 Fax: 44-118 921-5820  
12/05/02  
DS70090A-page 32  
Preliminary  
2003 Microchip Technology Inc.  

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