PIC18F24K50-I/ML [MICROCHIP]
MICROCONTROLLER;
| 型号： | PIC18F24K50-I/ML |
| 厂家： | 
MICROCHIP |
| 描述： | MICROCONTROLLER 时钟 微控制器 外围集成电路 |
| 文件： | 总10页 (文件大小：105K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PIC18(L)F2X/45K50
PIC18(L)F2X/45K50 USB Flash MCU Product Brief
• High/Low-Voltage Detect module
Universal Serial Bus Features:
• Charge Time Measurement Unit (CTMU):
• USB V2.0 Compliant
- Supports capacitive touch sensing for touch
• Crystal-less Full Speed (12 Mb/s) and Low-Speed
screens and capacitive switches
Operation (1.5 Mb/s)
• Enhanced USART module:
• Supports Control, Interrupt, Isochronous and Bulk
- Supports RS-485, RS-232 and LIN/J2602
Transfers
- Auto-wake-up on Start bit
- Auto-Baud Detect
• Supports up to 32 Endpoints (16 Bidirectional)
• 1 Kbyte Dual Access RAM for USB
• On-Chip USB Transceiver
Extreme Low-Power Management with
XLP:
Flexible Oscillator Structure:
• Sleep mode: 20 nA, typical
• 3x and 4x PLL Clock Multipliers
• Two External Clock modes, Up to 48 MHz (12
MIPS)
• Watchdog Timer: 300 nA, typical
• Timer1 Oscillator: 800 nA @ 32 kHz
• Peripheral Module Disable
• Internal 31 kHz Oscillator
• Internal Oscillator, 31 kHz to 16 MHz
- Factory calibrated to ± 1%
- Self-tune to ± 0.20% max. from USB or
secondary oscillator
• Secondary Oscillator using Timer1 @ 32 kHz
• Fail-Safe Clock Monitor:
- Allows for safe shutdown if any clock stops
Special Microcontroller Features:
• Low-Power, High-Speed CMOS Flash Technology
• C Compiler Optimized Architecture for Re-Entrant
Code
• Power Management Features:
- Run: CPU on, peripherals on, SRAM on
- Idle: CPU off, peripherals on, SRAM on
- Sleep: CPU off, peripherals off, SRAM on
• Priority Levels for Interrupts
Peripheral Highlights:
• Up to 33 I/O Pins plus 3 Input-Only Pins:
- High-current Sink/Source 25 mA/25 mA
- Three programmable external interrupts
- 11 programmable Interrupt-on-Change
- 9 programmable weak pull-ups
- Programmable slew rate
• Self-Programmable under Software Control
•
8 x 8 Single-Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT):
- Programmable period from 4 ms to 131s
• Single-Supply In-Circuit Serial Programming™
(ICSP™) via Two Pins
• SR Latch
• In-Circuit Debug (ICD) with Three Breakpoints via
Two Pins
• Enhanced Capture/Compare/PWM (ECCP)
module:
• Optional dedicated ICD/ICSP Port (44-Pin TQFP
Package Only)
- One, two or four PWM outputs
- Selectable polarity
• Wide Operating Voltage Range:
- F devices: 2.3V to 5.5V
- LF devices: 1.8V to 3.6V
- Programmable dead time
- Auto-shutdown and auto-restart
- Pulse steering control
• Flash Program Memory of 10,000 Erase/Write
Cycles Minimum and 20-year Data Retention
• Capture/Compare/PWM (CCP) module
• Master Synchronous Serial Port (MSSP) module
Supporting 3-Wire SPI (all 4 modes) and I2C™
Master and Slave modes
• Two Analog Comparators with Input Multiplexing
• 10-Bit Analog-to-Digital (A/D) Converter module:
- Up to 25 input channels
- Auto-acquisition capability
- Conversion available during Sleep
• Digital-to-Analog Converter (DAC) module:
- Fixed Voltage Reference (FVR) with 1.024V,
2.048V and 4.096V output levels
- 5-bit rail-to-rail resistive DAC with positive
and negative reference selection
2012 Microchip Technology Inc.
Advance Information
DS30025A-page 1
PIC18(L)F2X/45K50
PIC18(L)F2X/45K50 Family Types
Program Memory
Data Memory
Data
EEPROM
(bytes)
Device
Pins I/O
SRAM
(bytes)
Flash
(bytes) Instructions
Single Word
PIC18(L)F45K50
PIC18(L)F25K50
PIC18(L)F24K50
32K
32K
16K
16384
16384
8192
2048
2048
2048
256
256
256
40/44 36 25-ch
2
2
2
1/1 Yes Yes
1/1 Yes Yes
1/1 Yes Yes
1
1
1
1
1
1
2/2
2/2
2/2
Yes
Yes
Yes
28
28
25 14-ch
25 14-ch
FIGURE 1:
28-PIN PDIP, SOIC, SSOP DIAGRAM FOR PIC18(L)F2XK50
28-PIN PDIP (300 MIL), SOIC, SSOP
RB7
RB6
RB5
1
2
3
4
5
6
7
8
9
28
27
26
25
24
23
22
21
20
19
18
17
16
15
MCLR/VPP/RE3
RA0
RA1
RA2
RA3
RA4
RA5
VSS
RA7
RA6
RB4
RB3
RB2
RB1
RB0
VDD
VSS
10
11
RC7
RC6
RC5/D+
RC4/D-
RC0
RC1
RC2
12
13
14
VUSB3V3
FIGURE 2:
28-PIN QFN
28-PIN QFN DIAGRAM FOR PIC18(L)F2XK50
RA2
RA3
RA4
RA5
VSS
1
2
3
4
5
6
7
21
20
19
18
17
16
15
RB3
RB2
RB1
RB0
VDD
VSS
RC7
PIC18(L)F2XK50
RA7
RA6
DS30025A-page 2
Advance Information
2012 Microchip Technology Inc.
PIC18(L)F2X/45K50
FIGURE 3:
40-PIN PDIP DIAGRAM FOR PIC18(L)F45K50
40-PIN PDIP (600 MIL)
MCLR/VPP/RE3
1
2
3
4
5
6
7
8
RB7
RB6
RB5
RB4
RB3
RB2
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
RA0
RA1
RA2
RA3
RA4
RA5
RE0
RE1
RE2
VDD
VSS
RA7
RA6
RC0
RB1
RB0
VDD
VSS
9
10
11
12
13
14
15
16
17
18
19
20
RD7
RD6
RD5
RD4
RC7
RC6
RC1
RC2
RC5/D+
VUSB3V3
RD0
RC4/D-
RD3
RD1
RD2
FIGURE 4:
40-PIN UQFN
40-PIN UQFN DIAGRAM FOR PIC18(L)F45K50
RC0
RA6
RA7
VSS
VDD
RE2
RE1
RE0
RA5
RA4
30
29
28
27
26
25
24
RC7
RD4
RD5
RD6
RD7
VSS
VDD
RB0
RB1
RB2
1
2
3
4
5
6
7
8
9
10
PIC18(L)F45K50
23
22
21
2012 Microchip Technology Inc.
Advance Information
DS30025A-page 3
PIC18(L)F2X/45K50
FIGURE 5:
44-PIN TQFP
44-PIN TQFP DIAGRAM FOR PIC18(L)F45K50
NC/ICRST(1)/ICVPP
(1)
1
2
3
4
5
6
7
8
9
10
11
33
32
31
30
29
28
27
26
RC7
RD4
RD5
RD6
RD7
VSS
VDD
RB0
RB1
RB2
RB3
RC0
RA6
RA7
VSS
VDD
RE2
RE1
RE0
RA5
RA4
PIC18(L)F45K50
25
24
23
Note 1: Special ICPORT programming/debug port features available when ICPRT = 1
DS30025A-page 4
Advance Information
2012 Microchip Technology Inc.
TABLE 1:
PIC18(L)F2X/45K50 PIN SUMMARY
RA0
RA1
RA2
2
3
4
27
28
1
2
3
4
17
18
19
19
20
21
AN0
AN1
AN2
C12IN0-
C12IN1- CTCMP
C2IN+
VREF-
DACOUT
RA3
RA4
RA5
RA6
5
6
2
3
4
7
5
6
7
20
21
22
22
23
24
31
AN3
AN4
C1IN+
C1OUT
C2OUT
VREF+
LVDIN
SRQ
T0CKI
SRNQ
7
SS
10
14 29
OSC2
CLKO
RA7
RB0
RB1
9
6
13 28
30
8
OSC1
CLKI
21 18 33
22 19 34
8
9
AN12
SRI
FLT0
SDI
SDA
INT0
INT1
INT2
Y
Y
(5)
9
AN10 C12IN3-
P1C
P1B
SCK
SCL
(5)
(1)
RB2
RB3
RB4
RB5
23 20 35 10
24 21 36 11
25 22 37 12
26 23 38 13
10
11
14
15
AN8
CTED1
Y
Y
Y
Y
AN9
AN11
AN13
C12IN2- CTED2
CCP2
SDO
(5)
P1D
IOCB4
IOCB5
T1G
T3CKI
(2)
RB6
RB7
27 24 39 14
28 25 40 15
16
17
IOCB6
IOCB7
Y
Y
PGC
PGD
Note 1: Alternate CCP2 pin location based on Configuration bit.
2: Alternate T3CKI pin location based on Configuration bits.
3: Pins are enabled when ICPRT = 1, otherwise, they are disabled.
4: Location on 40/44-Pin parts (PIC18(L)F45K50). Function not on this pin on 28-Pin parts (PIC18(L)F2XK50).
5: Location on 28-Pin parts (PIC18(L)F2XK50). Function not on this pin on 40/44-Pin parts (PIC18(L)F45K50).
6: Alternate SDO pin location based on Configuration bits.
7: RE3, RC4 and RC5 can be used for digital input only (no output functionality).
TABLE 1:
PIC18(L)F2X/45K50 PIN SUMMARY
RC0
11
12
8
9
15 30
16 31
32
SOSCO IOCC0
T1CKI
T3CKI
T3G
RC1
RC2
35
36
CCP2
SOSCI IOCC1
IOCC2
13 10 17 32
AN14
CTPLS
CCP1
P1A
—
14 11 18 33
37
42
43
44
—
—
VUSB3V3
D-
VDDCORE
(7)
RC4
RC5
15 12 23 38
16 13 24 39
17 14 25 40
IOCC4
IOCC5
IOCC6
(7)
—
D+
RC6
RC7
AN18
TX
CK
(6)
18 15 26
1
1
AN19
RX
DT
SDO
IOCC7
RD0
RD1
RD2
RD3
RD4
RD5
RD6
RD7
RE0
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
19 34
20 35
21 36
22 37
38
39
40
41
2
AN20
AN21
AN22
AN23
AN24
AN25
AN26
AN27
AN5
27
28
29
30
8
2
3
(4)
3
P1B
(4)
4
4
P1C
(4)
5
5
P1D
23
25
Note 1: Alternate CCP2 pin location based on Configuration bit.
2: Alternate T3CKI pin location based on Configuration bits.
3: Pins are enabled when ICPRT = 1, otherwise, they are disabled.
4: Location on 40/44-Pin parts (PIC18(L)F45K50). Function not on this pin on 28-Pin parts (PIC18(L)F2XK50).
5: Location on 28-Pin parts (PIC18(L)F2XK50). Function not on this pin on 40/44-Pin parts (PIC18(L)F45K50).
6: Alternate SDO pin location based on Configuration bits.
7: RE3, RC4 and RC5 can be used for digital input only (no output functionality).
TABLE 1:
PIC18(L)F2X/45K50 PIN SUMMARY
—
—
1
—
—
26
RE1
RE2
9
24
10 25
16
26
27
18
AN6
AN7
—
(7)
RE3
1
Y
MCLR
VPP
20 17 11, 7,
32 26
7,
28
VDD
8,
5, 12, 6,
6,
VSS
19 16 31 27
29
(3)
(3)
(3)
(3)
–
–
–- 12
ICPGC
ICPGD
ICCK
ICDT
(3)
(3)
(3)
(3)
–- 13
–- 33
(3)
–-
ICVPP
ICRST
Note 1: Alternate CCP2 pin location based on Configuration bit.
2: Alternate T3CKI pin location based on Configuration bits.
3: Pins are enabled when ICPRT = 1, otherwise, they are disabled.
4: Location on 40/44-Pin parts (PIC18(L)F45K50). Function not on this pin on 28-Pin parts (PIC18(L)F2XK50).
5: Location on 28-Pin parts (PIC18(L)F2XK50). Function not on this pin on 40/44-Pin parts (PIC18(L)F45K50).
6: Alternate SDO pin location based on Configuration bits.
7: RE3, RC4 and RC5 can be used for digital input only (no output functionality).
PIC18(L)F2X/45K50
NOTES:
DS30025A-page 8
Advance Information
2012 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
32
PIC logo, rfPIC and UNI/O are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, chipKIT,
chipKIT logo, CodeGuard, dsPICDEM, dsPICDEM.net,
dsPICworks, dsSPEAK, ECAN, ECONOMONITOR,
FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP,
Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB,
MPLINK, mTouch, Omniscient Code Generation, PICC,
PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, REAL ICE,
rfLAB, Select Mode, Total Endurance, TSHARC,
UniWinDriver, WiperLock and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2012, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 9781620762592
QUALITY MANAGEMENT SYSTEM
CERTIFIED BY DNV
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
== ISO/TS 16949 ==
2012 Microchip Technology Inc.
Advance Information
DS30025A-page 9
Worldwide Sales and Service
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://www.microchip.com/
support
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Suites 3707-14, 37th Floor
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Taiwan - Taipei
Tel: 886-2-2500-6610
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Santa Clara, CA
Tel: 408-961-6444
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China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Toronto
Mississauga, Ontario,
Canada
China - Xiamen
Tel: 905-673-0699
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Tel: 86-592-2388138
Fax: 86-592-2388130
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
11/29/11
DS30025A-page 10
Advance Information
2012 Microchip Technology Inc.
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