MCRF355/WQ11 [MICROCHIP]
SPECIALTY TELECOM CIRCUIT, UUC6, 0.011 INCH, BACKGRIND DIE-6;![MCRF355/WQ11](http://pdffile.icpdf.com/pdf2/p00281/img/icpdf/MCRF355-SQ11_1679560_icpdf.jpg)
型号: | MCRF355/WQ11 |
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描述: | SPECIALTY TELECOM CIRCUIT, UUC6, 0.011 INCH, BACKGRIND DIE-6 电信 电信集成电路 |
文件: | 总22页 (文件大小:373K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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MCRF355
13.56 MHz Passive RFID Device with Anti-Collision Feature
Features
Package Type
PDIP/SOIC
• Carrier frequency: 13.56 MHz
• Data modulation frequency: 70 kHz
• Manchester coding protocol
• 154 bits of user memory
VPRG
VDD
NC
1
8
CLK
Ant. A
NC
2
3
4
7
6
5
• On-board 100 ms SLEEP timer
Ant. B
VSS
• Built-in anti-collision algorithm for reading up to
multiple tags in the same RF field
• “Cloaking” feature to minimize the detuning
effects of adjacent tags
Note: Pins 1, 2, 5 and 8 are for device testing
and contact programming.
• Read only device in RF field
• Long read range
Pins 3, 5 and 6 are for external antenna
connection.
• Rewritable with contact programmer
• Factory-programmed options
• Very low-power CMOS design
NC = Not connected
• Die, wafer, wafer-on-frame, PDIP or SOIC
package options
MCRF355 may be ordered blank or factory-
programmed with a unique serial number, header and
checksum. Microchip’s format is further defined in
TB031.
Applications
• Book store and library book ID
• Airline baggage tracking
• Toys and games
• Access control/asset tracking
• Applications for reading multiple tags and long
read range
RF Carrier
Ant. A
MCRF355
Ant. B
Reader
Modulated
RF Data
Vss
Read range: ~ up to 1.5 meters depending on tag size
and system design.
© 2005 Microchip Technology Inc.
DS21287G-page 1
MCRF355
The data stream consists of 154 bits of Manchester-
encoded data at a 70 kHz rate. The Manchester code
waveform is shown in Figure 2-2. After completion of
the data transmission, the device goes into SLEEP
mode for about 100 ms. The device repeats the trans-
mitting and SLEEP cycles as long as it is energized.
During the SLEEP time, the device remains in an
uncloaked state.
Description
The MCRF355 is Microchip’s uniquely designed read-
only passive Radio Frequency Identification (RFID)
device with an advanced anti-collision feature. It is
programmable with a contact programmer or factory
programming only. The device is powered remotely by
rectifying RF magnetic fields that are transmitted from
the reader.
SLEEP time is determined by a built-in, low-current
timer. There is a wide variation of the SLEEP time
between each device. This wide variation of SLEEP
time results in a randomness of the time slot. Each
device wakes up and transmits its data in a different
time slot with respect to each other. Based on this
scenario, the reader is able to read many tags that are
in the same RF field.
The device has a total of six pads (see Figure 1-1).
Three (ant. A, ant. B, VSS) are used to connect the
external resonant circuit elements. The additional three
pads (VPRG, CLK, VDD) are used for programming and
testing of the device.
The device needs an external resonant circuit between
antenna A, B, and VSS pads. The resonant frequency
of the circuit is determined by the circuit elements
between the antenna A and VSS pads. The resonant
circuit must be tuned to the carrier frequency of the
reader for maximum performance. The circuit element
between the antenna B and VSS pads is used for data
modulation. See Application Note AN707 for further
operational details. Examples of the resonant circuit
configuration for the MCRF355 are shown in
Section 3.0.
The device has a total of 154 bits of reprogrammable
memory. All bits are reprogrammable by a contact
programmer. A contact programmer (part number
PG103003) is available from Microchip Technology Inc.
Factory programming prior to shipment, known as
Serialized Quick Turn ProgrammingSM (SQTPSM), is
also available. The device is available in die, wafer,
wafer-on-frame, PDIP and SOIC packages.
When a tag (device with the external LC resonant
circuit) is brought to the reader’s RF field, it induces an
RF voltage across the LC resonant circuit. The device
rectifies the RF voltage and develops a DC voltage.
The device becomes functional as soon as VDD
reaches the operating voltage level.
Note: Information provided herein is subject to
change without notice.
The device includes a modulation transistor that is
located between antenna B and VSS pads. The transis-
tor has high turn-off (a few MΩ) and low turn-on (3 Ω)
resistance. The turn-on resistance is called modulation
resistance (RM). When the transistor turns off, the res-
onant circuit is tuned to the carrier frequency of the
reader. This condition is called uncloaking. When the
modulation transistor turns on, its low turn-on resis-
tance shorts the external circuit element between
antenna B and VSS. As a result, the resonant circuit no
longer resonates at the carrier frequency. This is called
cloaking.
The induced voltage amplitude (on the resonant circuit)
changes with the modulation data: higher amplitude
during uncloaking (tuned), and lower amplitude during
cloaking (detuned). This is called “amplitude modula-
tion” signal. The receiver channel in the reader detects
this amplitude modulation signal and reconstructs the
modulation data.
The occurrence of the cloaking and uncloaking of the
device is controlled by the modulation signal that turns
the modulation transistor on and off, resulting in com-
munication from the device to the reader.
DS21287G-page 2
© 2005 Microchip Technology Inc.
MCRF355
1.0
ELECTRICAL CHARACTERISTICS
TABLE 1-1:
ABSOLUTE RATINGS
Parameters
Symbol
Min
Max
Units
Conditions
Coil Current
IPP_AC
TASM
—
—
40
mA
°C
Peak-to-Peak coil current
Assembly temperature
Storage temperature
265
150
< 10 sec
—
TSTORE
-65
°C
TABLE 1-2:
DC CHARACTERISTICS
All parameters apply
across the specified
operating ranges, unless
otherwise noted.
Commercial (C): TAMB = -20oC to 70oC
Parameters
Symbol
Min
Typ
Max
Units
Conditions
Reading voltage
Hysteresis voltage
Operating current
VDDR
VHYST
IDDR
2.4
—
—
TBD
7
—
—
10
V
VDD voltage for reading
—
TBD
μA
—
VDD = 2.4V during reading at
25°C
Testing voltage
VDDT
—
4
—
V
—
Programming voltage:
High level input voltage
Low level input voltage
High voltage
VIH
VIL
VHH
0.7 * VDDT
—
—
20
—
0.3 * VDDT
—
V
V
V
External DC voltage for
programming and testing
—
—
Current leakage during
SLEEP time
IDD_OFF
—
10
—
nA
(Note 1)
Modulation resistance
RM
—
3
4
Ω
DC resistance between Drain and
Source gates of the modulation
transistor (when it is turned on)
Pull-Down resistor
RPDW
5
8
—
kΩ
CLK and VPRG internal pull-down
resistor
Note 1: This parameter is not tested in production.
© 2005 Microchip Technology Inc.
DS21287G-page 3
MCRF355
TABLE 1-3:
AC CHARACTERISTICS
All parameters apply across Commercial (C): TAMB = -20oC to 70oC
the specified operating
ranges, unless otherwise
noted.
Parameters
Carrier frequency
Symbol
Min
Typ
Max
Units
Conditions
FC
FM
13.56
70
MHz Reader’s transmitting frequency
Modulation frequency
58
4
82
—
kHz Manchester coding, at VDD = 2.6 VDC
- 5 VDC
Coil voltage during reading
VPP_AC
—
VPP Peak-to-Peak AC voltage across the
coil during reading
Coil clamp voltage
Test mode clock frequency
SLEEP time
VCLMP_AC
FCLK
—
32
—
VPP Peak-to-Peak coil clamp voltage
kHz 25°C
115
100
500
200
TOFF
50
ms Off time for anti-collision feature, at
25°C and VDD = 2.5 VDC
Write/Erase pulse width
Clock high time
TWC
THIGH
—
—
—
—
—
—
—
2
10
—
—
—
—
—
—
ms Time to program bit, at 25°C
4.4
μs 25°C for testing and programming
μs 25°C for testing and programming
ns 25°C for testing and programming
ns 25°C for testing and programming
ns 25°C for testing and programming
Clock low time
TLOW
4.4
STOP condition pulse width
STOP condition setup time
Setup time for high voltage
High voltage delay time
TPW:STO
TSU:STO
TSU:HH
TDL:HH
1000
200
800
800
ns Delay time before the next clock, at
25°C for testing and programming
Data input setup time
Data input hold time
Output valid from clock
Data retention
TSU:DAT
THD:DAT
TAA
—
—
450
1.2
—
—
—
—
ns 25°C for testing and programming
μs 25°C for testing and programming
ns 25°C for testing and programming
Years For T < 120°C
—
200
—
200
DS21287G-page 4
© 2005 Microchip Technology Inc.
MCRF355
TABLE 1-4:
Pad Name
PAD COORDINATES (MICRONS)
Passivation Openings
Pad Width Pad Height
89 89
Lower Lower Upper
Upper
Pad
Pad
LeftX Left Y Right X Right Y
Center X Center Y
Ant. A
Ant. B
VSS
-610.0 489.2
-605.0 -579.8
-605.0 -58.2
463.4 -181.4
463.4 496.8
463.4 157.6
-521.0
-516.0
-516.0
552.4
552.4
552.4
578.2
-490.8
30.8
-565.5
-560.5
-560.5
507.9
507.9
507.9
533.7
-535.3
-13.7
89
89
89
89
89
89
89
89
89
89
VDD
-92.4
585.8
246.6
-136.9
541.3
202.1
CLK
VPRG
Note 1: All coordinates are referenced from the center of the die. The minimum distance between pads (edge to
edge) is 10 mil.
2: Die Size = 1.417 mm x 1.513 mm = 1417 μm x 1513 μm = 55.79 mil x 59.57 mil
FIGURE 1-1:
DIE LAYOUT
Y (Notch edge of wafer)
1162.4
x
x
Ant A
CLK
250.2
250
458.4
x
x
VPRG
VDD
X
x
VSS
432.6
x
Ant B
1157.4
1417
Die size before saw:
Die size after saw:
Bond pad size:
1417 μm x 1513 μm
1353.8 μm x 1450.34 μm
89 μm x 89 μm
55.79 mil x 59.57 mil
53.3 mil x 57.1 mil
3.5 mil x 3.5 mil
© 2005 Microchip Technology Inc.
DS21287G-page 5
MCRF355
TABLE 1-5:
Name
PAD FUNCTION TABLE
Function
Connected to external resonant circuit, (Note 1)
Ant. A
Ant. B
VSS
Connected to external resonant circuit, (Note 1)
Connected to external resonant circuit, (Note 1)
Device ground during Test mode
VDD
DC voltage supply for programming and Test mode
Main clock pulse for programming and Test mode
Input/Output for programming and Test mode
CLK
VPRG
Note 1: See Figure 3-1 for the connection with external resonant circuit.
TABLE 1-6:
DIE MECHANICAL DIMENSIONS
Specifications
Min.
Typ.
Max.
Unit
Comments
Wafer Diameter
Die separation line width
Dice per wafer
—
—
—
—
8
80
—
—
—
—
inch
μm
12,000
24
die
Batch size
wafer
Bond pad opening
—
—
3.5 x 3.5
89 x 89
—
—
mil
μm
(Note 1, Note 2)
Die back grind thickness
7.5
8
8.5
mil
Sawed 8” wafer on frame
190.5
203.2
215.9
μm
(option = WF) (Note 3)
10
254
11
279.4
12
304.8
mil
μm
• Bumped, sawed 8” wafer
on frame (option = WFB)
• Unsawed wafer (option = W)
• Unsawed 8” bumped
wafer (option = WB), (Note 3)
Die passivation thickness (multilayer)
—
1.3
—
μm
(Note 4)
Die Size:
Die size X*Y before saw (step size)
Die size X*Y after saw
—
—
55.79 x 59.57
53.3 x 57.1
—
—
mil
mil
—
—
Note 1: The bond pad size is that of the passivation opening. The metal overlaps the bond pad passivation by at least 0.1 mil.
2: Metal pad composition is 98.5% aluminum with 1% Si and 0.5% Cu.
3: As the die thickness decreases, susceptibility to cracking increases. It is recommended that the die be as thick as the
application will allow.
4: The die passivation thickness (1.3 μm) can vary by device depending on the mask set used.
-
-
-
Layer 1: Oxide (undoped oxide)
Layer 2: PSG (doped oxide)
Layer 3: Oxynitride (top layer)
Note: Extreme care is urged in the handling and assembly of die products since they are susceptible to
mechanical and electrostatic damage.
DS21287G-page 6
© 2005 Microchip Technology Inc.
MCRF355
2.1.3
DATA MODULATION
2.0
FUNCTIONAL DESCRIPTION
The data modulation circuit consists of a modulation
transistor and an external LC resonant circuit. The
external circuit must be tuned to the carrier frequency
of the reader (i.e., 13.56 MHz) for maximum perfor-
mance.
The device contains three major sections: (1) analog
front-end, (2) controller logic and (3) memory.
Figure 2-1 shows the block diagram of the device.
2.1
Analog Front-End Section
The modulation transistor is placed between antenna B
and Vss pads and has small turn-on resistance (RM).
This small turn-on resistance shorts the external circuit
between the antenna B and Vss pads as it turns on.
This section includes power supply, Power-on Reset,
and data modulation circuits.
2.1.1
POWER SUPPLY
The transistor turns on during the “Hi” period of the
modulation data and turns off during the “Lo” period.
The power supply circuit generates DC voltage (VDD)
by rectifying induced RF coil voltage. The power supply
circuit includes high-voltage clamping diodes to
prevent excessive voltage development across the
antenna coil.
When the transistor is turned off, the resonant circuit
resonates at the carrier frequency. Therefore, the
external circuit develops maximum voltage across it.
This condition is called uncloaking (tuned). When the
transistor is turned on, its low turn-on resistance shorts
the external circuit, and therefore the circuit no longer
resonates at the carrier frequency. The voltage across
the external circuit is minimized. This condition is called
cloaking (detuned).
2.1.2
POWER-ON-RESET (POR)
This circuit generates a Power-on Reset when the tag
first enters the reader field. The RESET releases when
sufficient power has developed on the VDD regulator to
allow for correct operation.
The device transmits data by cloaking and uncloaking
based on the on/off condition of the modulation transis-
tor. Therefore, with the 70 kHz - Manchester format, the
data bit “0” will be sent by cloaking (detuned) and
uncloaking (tuned) the device for 7 μs each. Similarly,
the data bit “1” will be sent by uncloaking (tuned) and
cloaking (detuned) the device for 7 μs each. See
Figure 2-2 for the Manchester waveform.
FIGURE 2-1:
BLOCK DIAGRAM
ANALOG FRONT-END SECTION
CONTROLLER LOGIC SECTION
MEMORY SECTION
Address
Column and Row Decoders
Clock Generator
Column Drivers
(High-Voltage Circuit)
VDD
Power Supply
Power-on Reset
Modulation
CLK Pulse
POR
Data
Modulation Logic
154-Bit
Memory Array
Modulation
Pulse
Wake-up Signal
Set/Clear
SLEEP Timer
(anti-collision)
Read/Write Logic
Test Logic
VPRG and CLK
© 2005 Microchip Technology Inc.
DS21287G-page 7
MCRF355
2.2.3
SLEEP TIMER
2.2
Controller Logic Section
CLOCK PULSE GENERATOR
This circuit generates a SLEEP time (100 ms 50%)
for the anti-collision feature. During this SLEEP time
(TOFF), the modulation transistor remains in a turned-
on condition (cloaked) which detunes the LC resonant
circuit.
2.2.1
This circuit generates a clock pulse (CLK). The clock
pulse is generated by an on-board time base oscillator.
The clock pulse is used for baud rate timing, data
modulation rate, etc.
2.2.4
READ/WRITE LOGIC
2.2.2
MODULATION LOGIC
This logic controls the reading and programming of the
memory array.
This logic acts upon the serial data (154 bits) being
read from the memory array. The data is then encoded
into Manchester format. The encoded data is then fed
to the modulation transistor in the analog front-end
section. The Manchester code waveform is shown in
Figure 2-2.
FIGURE 2-2:
SIGNAL
CODE WAVEFORMS
DESCRIPTION
WAVEFORM
Data
Digital Data
1
0
1
1
0
0
0
1
1
0
1
0
Internal Clock Signal
CLK
Biphase – Level (Split Phase)
A level change occurs at middle of
BIPHASE-L
(Manchester)
every bit clock period.
“1” is represented by a high-to-low
level change at mid-clock.
“0” is represented by a low-to-high
level change at mid-clock.
Non-Return to Zero – Level
NRZ-L
(Reference only)
“1” is represented by logic high level.
“0” is represented by logic low level.
Note: The CLK and NRZ-L signals are shown for reference only. BIPHASE-L (Manchester) is the device output.
DS21287G-page 8
© 2005 Microchip Technology Inc.
MCRF355
form a parallel resonant circuit to pick up incoming RF
signals and also to send modulated signals to the
reader. The first coil (L1) is connected between
antenna A and B pads. The second coil (L2) is con-
nected between antenna B and VSS pads. The capaci-
tor is connected between antenna A and VSS pads.
3.0
RESONANT CIRCUIT
The MCRF355 requires external coils and a capacitor
in order to resonate at the carrier frequency of the
reader. About one-fourth to one-half of the turns of the
coil should be connected between antenna B and VSS;
remaining turns should be connected between antenna
A and B pads.
Figure 3-1(b) shows the resonant circuit formed by two
capacitors (C1 and C2) and one inductor.
Figures 3-1 (a) and (b) show possible configurations of
the external circuits for the MCRF355. In Figure 3-1 (a),
two external antenna coils (L1 and L2) in series and a
capacitor that is connected across the two inductors
FIGURE 3-1:
CONFIGURATION OF EXTERNAL RESONANT CIRCUITS
1
f = -----------------------
0
Ant. A
2π CLT
RF Carrier
Where:
L1
Interrogator
C
MCRF355
LT = L1 + L2 + 2LM
Ant. B
LM = Mutual inductance
between L1 and L2
L2
Modulated
RF Data
VSS
L1 > L2
(a)
Ant. A
RF Carrier
1
f
= -------------------------------------------
C1
0
C1C2
⎛
⎝
⎞
⎠
----------------------
2π
L
L
C1 + C2
Interrogator
MCRF355
Ant. B
C2
C1 ≥ C2
Modulated
RF Data
VSS
(b)
© 2005 Microchip Technology Inc.
DS21287G-page 9
MCRF355
3. The above mode function (3.2.2) will be
executed when the last bit of code is entered.
4.0
DEVICE PROGRAMMING
MCRF355 is a reprogrammable device in Contact
mode. The device has 154 bits of reprogrammable
memory. It can be programmed in the following proce-
dure. (A programmer, part number PG103003, is avail-
able from Microchip). Developer kits, DV103003 and
DV103006, also include contact programmers.
4. Power the device off (VDD = VSS) to exit
Programming mode.
5. An alternative method to exit the Programming
mode is to bring CLK logic “High” before VPRG to
VHH (high voltage).
6. Any Programming mode can be entered after
exiting the current function.
4.1
Programming Logic
Programming logic is enabled by applying power to the
device and clocking the device via the CLK pad while
loading the mode code via the VPRG pad (See
Examples 4-1 through 4-4 for test definitions). Both the
CLK and the VPRG pads have internal pull-down
resistors.
4.4
Programming Mode
1. Erase EE Code:
2. Program EE Code:
3. Read EE Code:
0111010100
0111010010
0111010110
Note: ‘0’ means logic “Low” (VIL) and ‘1’
means logic “High” (VIH).
4.2
Pin Configuration
Connect antenna A, antenna B and VSS pads to
ground.
4.5
Signal Timing
Examples 4-1 through 4-4 show the timing sequence
for programming and reading of the device.
4.3
Pin Timing
1. Apply VDDT voltage to VDD. Leave VSS, CLK and
VPRG at ground.
2. Load mode code into the VPRG pad. The VPRG
is sampled at CLK low-to-high edge.
EXAMPLE 4-1:
PROGRAMMING MODE 1: ERASE EE
12
CLK Number:
CLK
1
2
3
4
5
6
7
8
9
10
11
VHH
VIH
TWC
VPRG:
VIL
Note: Erases entire array to a ‘1’ state between CLK 11 and 12.
EXAMPLE 4-2:
PROGRAMMING MODE 2: PROGRAM EE
CLK Number:
1
2
5
6
7
8
9
10
11
…
165
…
CLK:
Pulse high to program bit to “0”
Leave low to leave bit at “1”
VHH…
VIH
TWC
TWC
VIL
VPRG:
Program bit #0 … Program bit #153
Note: Pulsing VPRG to VHH for the bit programming time while holding the CLK low programs the bit to a ‘0’.
DS21287G-page 10
© 2005 Microchip Technology Inc.
MCRF355
EXAMPLE 4-3:
CLK Number:
CLK:
PROGRAMMING MODE 3: READ EE
1
2
5
6
7
8
9
10
11
12
165
VIH…
VPRG:
VIL
...
bit #0
bit #1
data
bit #153
data
data
Turn off programmer drive during
CLK high so MCRF355 can drive
VPRG.
EXAMPLE 4-4:
TIMING DATA
THIGH
TLOW
CLK:
TPW:STO
THD:DAT
VHH
VIH
VIL
VPRG:
TAA
TSU:STO
TSU:DAT
TWC
VHH
TDL:HH
TSU:HH
VPRG:
(Reading)
VIH…
VIL
© 2005 Microchip Technology Inc.
DS21287G-page 11
MCRF355
5.0
FAILED DIE IDENTIFICATION
7.0
NOTICE ON DIE AND WAFER
HANDLING
Every die on the wafer is electrically tested according
to the data sheet specifications and visually inspected
to detect any mechanical damage, such as mechanical
cracks and scratches.
The device is very susceptible to Electro-Static
Discharge (ESD), which can cause critical damage to
the device. Special attention is needed during the han-
dling process.
Any failed die in the test or visual inspection is identified
by black colored ink. Therefore, any die covered with
black ink should not be used.
Any ultraviolet (UV) light can erase the memory cell
contents of an unpackaged device. Fluorescent lights
and sunlight can also erase the memory cell, although
it takes more time than UV lamps. Therefore, keep any
unpackaged device out of UV light and also avoid direct
exposure of strong fluorescent lights and shining
sunlight.
The ink dot specification:
• Ink dot size: 254 μm in circular diameter
• Position: central third of die
• Color: black
• Wafer map files are also available upon request
Certain IC manufacturing, COB and tag assembly
operations may use UV light. Operations such as back-
grind de-tape, certain cleaning procedures, epoxy or
glue cure should be done without exposing the die
surface to UV light.
6.0
WAFER DELIVERY
DOCUMENTATION
The wafer is shipped with the following information:
Using X-ray for die inspection will not harm the die, nor
erase memory cell contents.
• Microchip Technology Inc. MP Code
• Lot Number
• Total number of wafers in the container
• Total number of good dice in the container
• Average die per wafer (DPW)
8.0
REFERENCES
It is recommended that the reader reference the
following documents.
• Scribe number of wafers with number of good
dice
1. “Antenna Circuit Design for RFID Applications”,
AN710, DS00710.
• Wafer map files are also available upon request
2. “RFID Tag and COB Development Guide with
Microchip’s RFID Devices”, AN830, DS00830.
3. “MCRF355/360 Application Note: Mode of
Operation and External Resonance Circuit”,
AN707, DS00707.
4. “Microchip Development Kit Sample Format for
the MCRF355/360 Devices”, TB031, DS91031.
5. “MCRF355/360 Reader Reference Design”,
DS21311.
DS21287G-page 12
© 2005 Microchip Technology Inc.
MCRF355
PACKAGING INFORMATION
8.1
Package Marking Information
8-Lead PDIP (300 mil)
Example:
MCRF355
XXXXXNNN
0525
XXXXXXXX
XXXXXNNN
YYWW
8-Lead SOIC (150 mil)
Example:
XXXXXXXX
XXXXYYWW
MCRF355
XXX0525
NNN
NNN
Legend: XX...X Customer specific information*
Y
YY
WW
NNN
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
*
Standard device marking consists of Microchip part number, year code, week code, and traceability
code.
© 2005 Microchip Technology Inc.
DS21287G-page 13
MCRF355
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
B
p
eB
UNITS
DIMENSION LIMITS
INCHES*
NOM
8
MILLIMETERS
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
.100
2.54
Top to Seating Plane
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
A
.140
.155
.130
.170
3.56
2.92
3.94
3.30
4.32
A2
A1
E
E1
D
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
.145
3.68
0.38
7.62
6.10
9.14
3.18
0.20
1.14
0.36
7.87
5
.313
.250
.373
.130
.012
.058
.018
.370
.325
.260
.385
.135
.015
.070
.022
.430
7.94
6.35
9.46
3.30
0.29
1.46
0.46
9.40
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
Tip to Seating Plane
Lead Thickness
L
c
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
B1
B
§
eB
α
15
15
10
10
5
10
10
β
15
5
5
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
DS21287G-page 14
© 2005 Microchip Technology Inc.
MCRF355
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
h
α
45°
c
A2
A
φ
β
L
A1
UNITS
DIMENSION LIMITS
INCHES*
NOM
8
MILLIMETERS
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
1.27
.050
1.75
Overall Height
Molded Package Thickness
A
A2
A1
E
.053
.061
.056
.007
.237
.154
.193
.015
.025
.069
1.35
1.55
1.42
.18
6.02
3.91
4.90
.38
1.55
.25
6.20
3.99
5.00
.51
.76
8
.061
.010
.244
.157
.197
.020
.030
1.32
.10
5.79
3.71
4.80
.25
.48
0
.052
.004
.228
.146
.189
.010
.019
0
Standoff
§
Overall Width
Molded Package Width
Overall Length
E1
D
Chamfer Distance
Foot Length
h
L
φ
.62
4
4
Foot Angle
8
c
.25
.51
15
.010
.020
.20
.33
0
.23
Lead Thickness
Lead Width
.008
.013
0
.009
.017
B
α
.42
12
12
12
12
Mold Draft Angle Top
Mold Draft Angle Bottom
15
15
β
15
0
0
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
© 2005 Microchip Technology Inc.
DS21287G-page 15
MCRF355
NOTES:
DS21287G-page 16
© 2005 Microchip Technology Inc.
MCRF355
THE MICROCHIP WEB SITE
CUSTOMER SUPPORT
Microchip provides online support via our WWW site at
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© 2005 Microchip Technology Inc.
DS21287G-page 17
MCRF355
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
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MCRF355
DS21287G
Literature Number:
Device:
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
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DS21287G-page 18
© 2005 Microchip Technology Inc.
MCRF355
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X
/XXX
XXX
Examples:
a)
b)
MCRF355/W:
= 11-mil wafer, blank
Temperature Package
Range
Programming
MCRF355/WF:
= 8-mil wafer on
frame, blank
c)
d)
MCRF355/P:
= PDIP package, blank
Device:
MCRF355
=
= 13.56 MHz Anti-Collision device.
MCRF355/SNQ11 = SOIC package,
factory-programmed
Temperature Range:
Package:
-20°C to +70°C
W
=
=
=
=
=
Wafer (11 mil backgrind)
WF
P
Sawed wafer on frame (8 mil backgrind)
Plastic PDIP (300 mil Body) 8-lead
Dice in waffle pack (8 mil)
S
SN
Plastic SOIC (150 mil Body) 8-lead
Programming:
blank
Q11
=
=
blank memory
Factory programmed in Microchip format
(see TB031)
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
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2. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
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2002 Microchip Technology Inc.
DS21287G-page 19
MCRF355
NOTES:
DS21287G-page 20
2002 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
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MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
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Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
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AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
PICMASTER, SEEVAL, SmartSensor and The Embedded
Control Solutions Company are registered trademarks of
Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Linear Active Thermistor,
MPASM, MPLIB, MPLINK, MPSIM, PICkit, PICDEM,
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PowerMate, PowerTool, rfLAB, rfPICDEM, Select Mode,
Smart Serial, SmartTel, Total Endurance and WiperLock are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2005, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2005 Microchip Technology Inc.
DS21287G-page 21
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08/24/05
DS21287G-page 22
© 2005 Microchip Technology Inc.
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