MCP6541RT [MICROCHIP]
Push-Pull Output Sub-Microamp Comparators; 推挽输出亚微安比较
| 型号： | MCP6541RT |
| 厂家： | 
MICROCHIP |
| 描述： | Push-Pull Output Sub-Microamp Comparators |
| 文件： | 总29页 (文件大小：575K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MCP6541/2/3/4
M
Push-Pull Output Sub-Microamp Comparators
Features
Description
• Low Quiescent Current: 600 nA/comparator (typ.)
• Rail-to-Rail Input: VSS - 0.3V to VDD + 0.3V
• CMOS/TTL-Compatible Output
The Microchip Technology Inc. MCP6541/2/3/4 family
of comparators is offered in single (MCP6541), single
with chip select (MCP6543), dual (MCP6542) and quad
(MCP6544) configurations. The outputs are push-pull
(CMOS/TTL-compatible) and are capable of driving
heavy DC or capacitive loads.
These comparators are optimized for low power, single-
supply operation with greater than rail-to-rail input
operation. The push-pull output of the MCP6541/2/3/4
family supports rail-to-rail output swing and interfaces
with TTL/CMOS logic. The internal input hysteresis
eliminates output switching due to internal input noise
voltage, reducing current draw. The output limits supply
current surges and dynamic power consumption while
switching. This product family operates with a single-
supply voltage as low as 1.6V and draws less than 1 µA/
comparator of quiescent current.
• Propagation Delay 4 µs (typ.)
• Wide Supply Voltage Range: 1.6V to 5.5V
• Available in Single, Dual and Quad
• Single available in SOT-23-5, SC-70-5 packages
• Chip Select (CS) with MCP6543
• Low Switching Current
• Internal Hysteresis: 3.3 mV (typ.)
• Industrial Temperature: -40°C to +85°C
Typical Applications
• Laptop Computers
• Mobile Phones
• Metering Systems
• Hand-held Electronics
• RC Timers
• Alarm and Monitoring Circuits
• Windowed Comparators
• Multi-vibrators
The related MCP6546/7/8/9 family of comparators from
Microchip has an open-drain output. Used with a pull-up
resistor, these devices can be used as level-shifters for
any desired voltage up to 10V and in wired-OR logic.
Related Devices
• Open-Drain Output: MCP6546/7/8/9
Package Types
MCP6541
MCP6541-R
SOT-23-5
MCP6542
MCP6544
PDIP, SOIC, MSOP
PDIP, SOIC, TSSOP
PDIP, SOIC, MSOP
V
OUTA
14 OUTD
13 VIND
12 VIND
OUTA
1
2
3
4
V
1
2
3
4
8
7
6
5
NC
1
2
3
4
8 NC
V
7
6
OUT
DD
VIN+
DD
1
2
3
5
SS
VINA
VINA
VDD
–
+
- +
+
–
+
VINA
VINA
V
–
+
SS
OUTB
VINB
VINB
-
-
+
V –
-
+
V
-
VIN+
DD
OUT
+
–
+
-
VIN–
IN
4
VSS
11
V
5 NC
SS
VINB
VINB
+
–
10 VINC
9 VINC
+
–
5
6
7
MCP6541
SOT-23-5, SC-70-5
MCP6543
PDIP, SOIC, MSOP
- +
-
+
OUTB
8 OUTC
NC
VIN–
VIN+
CS
DD
OUT
NC
V
1
2
3
4
8
7
6
5
OUT
SS
VIN+
1
2
3
5
DD
V
-
+
V
-
VIN–
4
V
SS
2003 Microchip Technology Inc.
DS21696C-page 1
MCP6541/2/3/4
† Notice: Stresses above those listed under “Maximum Rat-
ings” may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied.
Exposure to maximum rating conditions for extended periods
may affect device reliability.
1.0
ELECTRICAL
CHARACTERISTICS
1.1
Absolute Maximum Ratings †
VDD - VSS .........................................................................7.0V
All inputs and outputs ...................... VSS –0.3V to VDD +0.3V
PIN FUNCTION TABLE
Difference Input voltage ....................................... |VDD - VSS
|
Output Short-Circuit Current .................................continuous
Current at Input Pins ....................................................±2 mA
Current at Output and Supply Pins ............................±30 mA
Storage temperature .....................................-65°C to +150°C
Maximum Junction Temperature (TJ)..........................+150°C
ESD protection on all pins (HBM;MM) ...................4 kV; 400V
NAME
FUNCTION
VIN+, VINA+, VINB+, VINC+,
Non-Inverting Inputs
VIND
+
VIN–, VINA–, VINB–, VINC–, VIND– Inverting Inputs
VDD
VSS
Positive Power Supply
Negative Power Supply
Outputs
OUT, OUTA, OUTB, OUTC,
OUTD
CS
NC
Chip Select
Not Connected
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C,VIN+ = VDD/2,
VIN– = VSS, and RL = 100 kΩ to VDD/2 (Refer to Figure 1-3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
Power Supply
Supply Voltage
Quiescent Current per comparator
Input
VDD
IQ
1.6
0.3
—
0.6
5.5
1.0
V
µA
IOUT = 0
Input Voltage Range
VCMR
CMRR
CMRR
CMRR
PSRR
VOS
∆VOS/∆TA
VHYST
V
SS−0.3
55
50
55
63
-7.0
—
1.5
—
—
—
—
70
65
70
80
±1.5
±3
3.3
10
5
VDD+0.3
—
V
Common Mode Rejection Ratio
Common Mode Rejection Ratio
Common Mode Rejection Ratio
Power Supply Rejection Ratio
Input Offset Voltage
Drift with Temperature
Input Hysteresis Voltage
Drift with Temperature
Drift with Temperature
Input Bias Current
dB
dB
dB
dB
mV
VDD = 5V, VCM = -0.3V to 5.3V
VDD = 5V, VCM = 2.5V to 5.3V
VDD = 5V, VCM = -0.3V to 2.5V
VCM = VSS
—
—
—
+7.0
—
6.5
—
—
—
100
VCM = VSS (Note 1)
µV/°C TA = -40°C to +85°C, VCM = VSS
mV VCM = VSS (Note 1)
µV/°C TA = -40°C to +25°C, VCM = VSS
µV/°C TA = +25°C to +85°C, VCM = VSS
pA
pA
∆VHYST/∆TA
∆VHYST/∆TA
IB
1
—
VCM = VSS
TA = -40°C to +85°C, VCM = VSS
(Note 3)
Over-Temperature
IB
—
Input Offset Current
IOS
ZCM
ZDIFF
—
—
—
±1
—
—
—
pA
Ω||pF
Ω||pF
VCM = VSS
Common Mode Input Impedance
Differential Input Impedance
Push-Pull Output
1013||4
1013||2
High-Level Output Voltage
Low-Level Output Voltage
Short-Circuit Current
VOH
VOL
ISC
V
DD−0.2
—
—
—
—
±50
—
VSS+0.2
—
V
V
mA
IOUT = -2 mA, VDD = 5V
IOUT = 2 mA, VDD = 5V
(Note 2)
Note 1: The input offset voltage is the center (average) of the input-referred trip points. The input hysteresis is the difference
between the input-referred trip points.
2: Limit the output current to Absolute Maximum Rating of 30 mA.
3: Input bias current over temperature is not tested for SC-70-5 package.
DS21696C-page 2
2003 Microchip Technology Inc.
MCP6541/2/3/4
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2,
Step = 200 mV, Overdrive = 100 mV, and CL = 36 pF (Refer to Figure 1-2 and Figure 1-3).
Parameters
Sym
Min
Typ
Max
Units
Conditions
Rise Time
Fall Time
Propagation Delay (High-to-Low)
Propagation Delay (Low-to-High)
Propagation Delay Skew
tR
tF
—
—
—
—
—
—
—
—
0.85
0.85
4
—
—
8
µs
µs
µs
µs
µs
tPHL
tPLH
tPDS
fMAX
fMAX
EN
4
8
±0.2
160
120
200
—
—
—
—
(Note 1)
Maximum Toggle Frequency
kHz VDD = 1.6V
kHz VDD = 5.5V
µVP-P 10 Hz to 100 kHz
Input Noise Voltage
Note 1: Propagation Delay Skew is defined as: tPDS = tPLH - tPHL
.
SPECIFICATIONS FOR MCP6543 CHIP-SELECT
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = VSS
,
and CL= 36 pF (Refer to Figures 1-1 and 1-3).
Parameters
Sym
Min
Typ
Max Units
Conditions
CS Low Specifications
CS Logic Threshold, Low
VIL
VSS
—
—
0.2VDD
—
V
CS Input Current, Low
ICSL
5.0
pA
CS = VSS
CS High Specifications
CS Logic Threshold, High
VIH
ICSH
IDD
0.8VDD
—
—
1
VDD
—
V
CS Input Current, High
pA
pA
pA
pA
CS = VDD
CS = VDD
CS = VDD
VOUT = VDD
CS Input High, VDD Current
CS Input High, GND Current
Comparator Output Leakage
CS Dynamic Specifications
—
18
-20
1
—
ISS
—
—
IO(LEAK)
—
—
CS Low to Comparator Output Low
Turn-on Time
tON
tOFF
—
—
—
2
50
—
—
ms
µs
V
CS = 0.2 VDD to VOUT = VDD/2,
IN– = VDD
V
CS High to Comparator Output
High Z Turn-off Time
10
0.6
CS = 0.8 VDD to VOUT = VDD/2,
IN– = VDD
V
CS Hysteresis
VCS_HYST
VDD = 5V
CS
VIL
VIH
VIN–
VIN+ = VDD/2
100 mV
tON
Hi-Z
tOFF
tPHL
100 mV
VOH
VOUT
Hi-Z
tPLH
-0.6 µA, typ.
-20 pA, typ.
1 pA, typ.
-20 pA, typ.
1 pA, typ.
ISS
ICS
VOUT
VOL
VOL
FIGURE 1-1:
Timing Diagram for the CS
FIGURE 1-2:
Diagram.
Propagation Delay Timing
Pin on the MCP6543.
2003 Microchip Technology Inc.
DS21696C-page 3
MCP6541/2/3/4
TEMPERATURE SPECIFICATIONS
Electrical Specifications: Unless otherwise indicated, VDD = +1.6V to +5.5V and VSS = GND.
Parameters
Sym
Min
Typ
Max
Units
Conditions
Temperature Ranges
Specified Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, 5L-SC-70
Thermal Resistance, 5L-SOT-23
Thermal Resistance, 8L-PDIP
Thermal Resistance, 8L-SOIC
Thermal Resistance, 8L-MSOP
Thermal Resistance, 14L-PDIP
Thermal Resistance, 14L-SOIC
Thermal Resistance, 14L-TSSOP
TA
TA
TA
-40
-40
-65
—
—
—
+85
+125
+150
°C
°C Note
°C
θJA
θJA
θJA
θJA
θJA
θJA
θJA
θJA
—
—
—
—
—
—
—
—
331
256
85
163
206
70
—
—
—
—
—
—
—
—
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
120
100
Note:
The MCP6541/2/3/4 operates over this extended temperature range, but with reduced performance. In any
case, the Junction Temperature (TJ) must not exceed the Absolute Maximum specification of +150°C.
1.2
Test Circuit Configuration
This test circuit configuration is used to determine the
AC and DC specifications.
VDD
200 kΩ
MCP654X
200 kΩ
VOUT
36 pF
200 kΩ
VIN = VSS
200 kΩ
VSS = 0V
FIGURE 1-3:
AC and DC Test Circuit for
the Push-Pull Output Comparators.
DS21696C-page 4
2003 Microchip Technology Inc.
MCP6541/2/3/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 100 kΩ to VDD/2, and CL = 36 pF.
14%
12%
10%
8%
18%
16%
14%
12%
10%
8%
6%
4%
2%
1200 Samples
CM = VSS
1200 Samples
CM = VSS
V
V
6%
4%
2%
0%
0%
1.6 2.0 2.4 2.8 3.2 3.6 4.0 4.4 4.8 5.2 5.6 6.0
Input Hysteresis Voltage (mV)
-7 -6 -5 -4 -3 -2 -1
0
1
2
3
4
5
6
7
Input Offset Voltage (mV)
FIGURE 2-1:
Input Offset Voltage
= V
FIGURE 2-4:
Input Hysteresis Voltage
= V
Histogram at V
.
Histogram at V
.
SS
CM
SS
CM
26%
16%
1200 Samples
CM = VSS
24%
22%
20%
18%
16%
14%
12%
10%
8%
1200 Samples
CM = VSS
V
14%
12%
10%
8%
6%
4%
V
TA = +25°C to +85°C
TA = -40°C to +25°C
6%
4%
2%
0%
2%
0%
2
3
4
5
6
7
8
9 10 11 12 13 14 15 16
-14 -12 -10 -8 -6 -4 -2
0
2
4
6
8 10 12 14
Input Hysteresis Voltage Drift (µV/°C)
Input Offset Voltage Drift (µV/°C)
FIGURE 2-2:
Input Offset Voltage Drift
FIGURE 2-5:
Input Hysteresis Voltage
Histogram at V
= V
.
SS
Drift Histogram.
CM
500
6.0
VCM = VSS
VCM = VSS
5.5
400
300
200
100
0
VDD = 1.6V
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
V= 1.6V
DD
-100
-200
-300
-400
-500
VDD = 5.5V
VDD = 5.5V
20
-40
-20
0
40
60
80
-40
-20
0
20
40
60
80
Ambient Temperature (°C)
Ambient Temperature (°C)
FIGURE 2-3:
Input Offset Voltage vs.
= V
FIGURE 2-6:
Input Hysteresis Voltage vs.
= V
Ambient Temperature at V
.
Ambient Temperature at V
.
SS
CM
SS
CM
2003 Microchip Technology Inc.
DS21696C-page 5
MCP6541/2/3/4
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 100 kΩ to VDD/2, and CL = 36 pF.
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
VDD = 1.6V
VDD = 1.6V
TA = +85°C
TA = +85°C
A = +25°C
T
TA = +25°C
TA = -40°C
TA = -40°C
Common Mode Input Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-7:
Input Offset Voltage vs.
FIGURE 2-10:
Input Hysteresis Voltage vs.
Common Mode Input Voltage at V = 1.6V.
Common Mode Input Voltage at V = 1.6V.
DD
DD
2.0
1.5
1.0
0.5
0.0
-0.5
-1.0
-1.5
-2.0
6.0
VDD = 5.5V
VDD = 5.5V
5.5
5.0
4.5
TA = +85°C
TA = +25°C
TA = +85°C
4.0
3.5
TA = +25°C
TA = -40°C
3.0
2.5
2.0
1.5
TA = -40°C
Common Mode Input Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-8:
Input Offset Voltage vs.
FIGURE 2-11:
Input Hysteresis Voltage vs.
Common Mode Input Voltage at V = 5.5V.
Common Mode Input Voltage at V = 5.5V.
DD
DD
90
85
24
TA = +85°C
DD = 5.5V
22
20
18
16
14
12
10
8
V
PSRR, VIN+ = VSS, VDD = 1.6V to 5.5V
80
Input Bias Current
Input Offset Current
CMRR, VIN+ = -0.3V to 2.5V, VDD = 5.0V
75
CMRR, VIN+ = -0.3V to 5.3V, VDD = 5.0V
70
CMRR, VIN+ = 2.5V to 5.3V, VDD = 5.0V
65
6
4
60
55
2
0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Common Mode Input Voltage (V)
-40
-20
0
20
40
60
80
Ambient Temperature (°C)
FIGURE 2-9:
CMRR, PSRR vs. Ambient
= V
FIGURE 2-12:
Input Bias Current, Input
Temperature at V
.
SS
Offset Current vs. Common Mode Voltage at
+85°C.
CM
DS21696C-page 6
2003 Microchip Technology Inc.
MCP6541/2/3/4
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 100 kΩ to VDD/2, and CL = 36 pF.
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
22
20
18
16
14
12
10
8
TA = +85°C
VDD = 5.5V
VCM = VDD
TA = +25°C
TA = -40°C
Input Bias Current
6
Input Offset
4
2
Current
0
-2
25
35
45
55
65
75
85
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
Ambient Temperature (°C)
FIGURE 2-13:
Input Bias Current, Input
FIGURE 2-16:
Quiescent Current vs.
Offset Current vs. Ambient Temperature.
Power Supply Voltage.
0.7
0.7
VDD = 5.5V
VDD = 5.5 V
0.6
0.5
0.4
0.6
0.5
0.4
0.3
0.2
0.1
0.0
VDD = 1.6 V
0.3
0.2
0.1
0.0
Sweep VIN+, VIN– = VDD/2
Sweep VIN–, VIN+ = VDD/2
-40
-20
0
20
40
60
80
Ambient Temperature (°C)
Common Mode Input Voltage (V)
FIGURE 2-14:
Quiescent Current vs.
FIGURE 2-17:
Quiescent Current vs.
Ambient Temperature.
Common Mode Input Voltage at V = 5V.
DD
50
45
40
35
30
0.7
VDD = 1.6V
0.6
0.5
0.4
-IOSC, TA = -40°C
-IOSC, TA
= +25°C
25
20
15
10
5
-IOSC, TA +85°C
=
0.3
0.2
0.1
0.0
Sweep VIN+, VIN- = VDD/2
Sweep VIN-, VIN+ = VDD/2
|+IOSC|, TA = -40°C
|+IOSC|, TA +25°C
=
|+IOSC|, TA
=
+85°C
0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
Common Mode Input Voltage (V)
Power Supply Voltage (V)
FIGURE 2-15:
Quiescent Current vs.
FIGURE 2-18:
Output Short-Circuit Current
Common Mode Input Voltage at V = 1.6V.
vs. Power Supply Voltage.
DD
2003 Microchip Technology Inc.
DS21696C-page 7
MCP6541/2/3/4
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 100 kΩ to VDD/2, and CL = 36 pF.
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
VDD = 1.6V
VDD = 5.5V
VOL-VSS, TA = -40°C
V
OL-VSS, TA = +25°C
OL-VSS, TA = +85°C
VOL-VSS, TA = -40°C
V
V
V
OL-VSS, TA = +25°C
OL-VSS, TA = +85°C
VDD-VOH, TA = +85°C
VDD-VOH, TA = +85°C
DD-VOH, TA = +25°C
V
DD-VOH, TA = +25°C
DD-VOH, TA = -40°C
V
V
V
DD-VOH, TA = -40°C
0
5
10
15
20
25
0.0
0.5
1.0
1.5
2.0
2.5
Output Current (mA)
Output Current (mA)
FIGURE 2-19:
Output Voltage Headroom
FIGURE 2-22:
Output Voltage Headroom
vs. Output Current at V = 1.6V.
vs. Output Current at V = 5.5V.
DD
DD
45%
40%
45%
600 Samples
600 Samples
40%
35%
30%
25%
20%
15%
10%
5%
100 mV Overdrive
VCM = VDD/2
100 mV Overdrive
35%
30%
25%
20%
15%
10%
5%
VCM = VDD/2
VDD = 1.6V
VDD = 5.5V
VDD = 1.6V
VDD = 5.5V
0%
0%
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
High-to-Low Propagation Delay (µs)
Low-to-High Propagation Delay (µs)
FIGURE 2-20:
High-to-Low Propagation
FIGURE 2-23:
Low-to-High Propagation
Delay Histogram.
Delay Histogram.
45%
8
100 mV Overdrive
VCM = VDD/2
600 Samples
100 mV Overdrive
CM = VDD/2
40%
35%
30%
25%
20%
15%
10%
5%
7
6
5
4
3
2
1
0
V
tPLH @ VDD = 5.5V
tPHL @ VDD = 5.5V
VDD = 5.5V
VDD = 1.6V
tPLH @ VDD = 1.6V
tPHL @ VDD = 1.6V
0%
-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0
Propagation Delay Skew (µs)
-40
-20
0
20
40
60
80
Ambient Temperature (°C)
FIGURE 2-21:
Propagation Delay Skew
FIGURE 2-24:
Propagation Delay vs.
Histogram.
Ambient Temperature.
DS21696C-page 8
2003 Microchip Technology Inc.
MCP6541/2/3/4
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 100 kΩ to VDD/2, and CL = 36 pF.
100
10
1
14
13
12
11
10
9
VCM = VDD/2
VCM = VDD/2
tPHL @ VDD = 5.5V
tPLH @ VDD = 1.6V
tPLH @ 10 mV Overdrive
tPHL @ VDD = 1.6V
8
tPHL @ 10 mV Overdrive
tPLH @ 100 mV Overdrive
7
6
tPLH @ VDD = 5.5V
5
4
3
2
tPHL @ 100 mV Overdrive
1
0
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
1
10
100
1000
Input Overdrive (mV)
FIGURE 2-25:
Propagation Delay vs.
FIGURE 2-28:
Propagation Delay vs. Input
Power Supply Voltage.
Overdrive.
8
8
7
VDD = 1.6V
100 mV Overdrive
VDD = 5.5V
100 mV Overdrive
7
6
5
4
3
2
1
0
6
5
4
3
2
1
0
tPHL
tPLH
tPLH
tPHL
Common Mode Input Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-26:
Propagation Delay vs.
FIGURE 2-29:
Propagation Delay vs.
Common Mode Input Voltage at V = 1.6V.
Common Mode Input Voltage at V = 5.5V.
DD
DD
50
10
100 mV Overdrive
100 mV Overdrive
45
40
35
30
25
20
15
10
5
VCM = VDD/2
VCM = VDD/2
RL = Infinity
tPHL @ VDD = 1.6V
VDD = 5.5 V
1
VDD = 1.6 V
tPLH @ VDD = 1.6V
tPHL @ VDD = 5.5V
tPLH @ VDD = 5.5V
0.1
0
0.1
1
10
100
0
10 20 30 40 50 60 70 80 90
Load Capacitance (nF)
Toggle Frequency (kHz)
FIGURE 2-27:
Propagation Delay vs. Load
FIGURE 2-30:
Supply Current vs. Toggle
Capacitance.
Frequency.
2003 Microchip Technology Inc.
DS21696C-page 9
MCP6541/2/3/4
Note: Unless otherwise indicated, VDD = +1.6V to +5.5V, VSS = GND, TA = +25°C, VIN+ = VDD/2, VIN– = GND,
RL = 100 kΩ to VDD/2, and CL = 36 pF.
7
6
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
VDD = 5.5V
VDD = 5.5V
5
VOUT
4
VOUT
3
2
VIN
–
1
CS
5
0
-1
0
1
2
3
4
6
7
8
9
10
0
1
2
3
4
5
6
7
8
9
10
Time (ms)
Time (1 ms/div)
FIGURE 2-31:
The MCP6541/2/3/4
FIGURE 2-34:
Chip-Select (CS) Step
comparators show no phase reversal.
Response (MCP6543 only).
1.E-04
1.E-04
100µ
100µ
Comparator
Comparator
Shuts Off Here
Turns On Here
CS Low-to-High
Comparator
Comparator
1.E-05
1.E-05
10µ
10µ
Turns On Here
Shuts Off Here
1.E-06
1.E-06
1µ
1µ
CS High-to-Low
CS Hysteresis
1.E-07
CS Hysteresis
1.E-07
100n
100n
1.E-08
1.E-08
CS Low-to-High
10n
10n
CS High-to-Low
1.E-09
1.E-09
1n
1n
1.E-10
1.E-10
100p
100p
VDD = 1.6V
VDD = 5.5V
1.E-11
1.E-11
10p
0.0
10p
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Chip Select (CS) Voltage (V)
Chip Select (CS) Voltage (V)
FIGURE 2-32:
Supply Current (shoot
FIGURE 2-35:
Supply Current (shoot
through current) vs. Chip-Select (CS) Voltage at
through current) vs. Chip-Select (CS) Voltage at
V
= 1.6V (MCP6543 only).
V
= 5.5V (MCP6543 only).
DD
DD
20
140
120
6
3
0
1.6
VOUT
VOUT
0.0
CS
CS
VDD = 5.5V
20
VDD = 1.6V
15
100
Start-up IDD
Start-up IDD
80
60
40
20
0
Charging output
capacitance
10
Charging output
capacitance
5
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5
Time (0.5 ms/div)
0
Time (1 ms/div)
FIGURE 2-33:
current) vs. Chip-Select (CS) pulse at
= 1.6V (MCP6543 only).
Supply Current (charging
FIGURE 2-36:
Supply Current (charging
current) vs. Chip-Select (CS) pulse at
V
V
= 5.5V (MCP6543 only).
DD
DD
DS21696C-page 10
2003 Microchip Technology Inc.
MCP6541/2/3/4
3.3
MCP6543 Chip Select (CS)
3.0
APPLICATIONS INFORMATION
The MCP6543 is a single comparator with chip select
(CS). When CS is pulled high, the total current
consumption drops to 20 pA (typ); 1 pA (typ) flows
through the CS pin, 1 pA (typ) flows through the output
pin and 18 pA (typ) flows through the VDD pin, as
shown in Figure 1-1. When this happens, the
comparator output is put into a high-impedance state.
By pulling CS low, the comparator is enabled. If the CS
pin is left floating, the comparator will not operate
properly. Figure 1-1 shows the output voltage and
supply current response to a CS pulse.
The MCP6541/2/3/4 family of push-pull output compar-
ators are fabricated on Microchip’s state-of-the-art
CMOS process. They are suitable for a wide range of
applications requiring very low power consumption.
3.1
Comparator Inputs
The MCP6541/2/3/4 comparator family uses CMOS
transistors at the input. They are designed to prevent
phase inversion when the input pins exceed the supply
voltages. Figure 2-31 shows an input voltage
exceeding both supplies with no resulting phase
inversion.
The input stage of this family of devices uses two
differential input stages in parallel: one operates at low
input voltages and the other at high input voltages. With
this topology, the input voltage is 0.3V above VDD and
0.3V below VSS. Therefore, the input offset voltage is
measured at both VSS - 0.3V and VDD + 0.3V to ensure
proper operation.
The internal CS circuitry is designed to minimize
glitches when cycling the CS pin. This helps conserve
power, which is especially important in battery-
powered applications.
3.4
Externally-Set Hysteresis
Greater flexibility in selecting hysteresis (or input trip
points) is achieved by using external resistors.
The maximum operating input voltages that can be
applied are VSS - 0.3V and VDD + 0.3V. Voltages on the
inputs that exceed this absolute maximum rating can
cause excessive current to flow and permanently
damage the device. In applications where the input pin
exceeds the specified range, external resistors can be
used to limit the current below ±2 mA, as shown in
Figure 3-1.
Input offset voltage (VOS) is the center (average) of the
(input-referred) low-high and high-low trip points. Input
hysteresis voltage (VHYST) is the difference between
the same trip points. Hysteresis reduces output
chattering when one input is slowly moving past the
other and thus reduces dynamic supply current. It also
helps in systems where it is best not to cycle between
states too frequently (e.g., air conditioner thermostatic
control). The MCP6541/2/3/4 family has internally-set
hysteresis that is small enough to maintain input offset
accuracy (<7 mV) and large enough to eliminate output
chattering caused by the comparator’s own input noise
voltage (200 µVp-p).
VOUT
RIN
MCP654X
VIN
30
VDD = 5.0V
25
(Maximum expected V ) – V
VIN+ = +2.75V
20
IN
DD
---------------------------------------------------------------------------------
R
≥
15
IN
2 mA
VOUT
10
5
V
– (Minimum expected V
)
SS
IN
5
4
3
------------------------------------------------------------------------------
2 mA
R
≥
0
IN
Hysteresis
-5
2
-10
-15
-20
-25
-30
1
FIGURE 3-1:
An input resistor (R )
IN
0
should be used to limit excessive input current if
either of the inputs exceeds the Absolute
Maximum specification.
VIN
–
0
100
200
300
400
500
600
700
800
900
1000
Time (100 ms/div)
3.2
Push-Pull Output
FIGURE 3-2:
The MCP6541/2/3/4
comparators’ internal hysteresis eliminates
The push-pull output is designed to be compatible with
CMOS and TTL logic, while the output transistors are
configured to give rail-to-rail output performance. They
are driven with circuitry that minimizes any switching
current (shoot-through current from supply-to-supply)
when the output is transitioned from high-to-low, or from
low-to-high (see Figures 2-15, 2-17, 2-32 through 2-36
for more information).
output chatter caused by input noise voltage.
2003 Microchip Technology Inc.
DS21696C-page 11
MCP6541/2/3/4
3.4.1
NON-INVERTING CIRCUIT
3.4.2
INVERTING CIRCUIT
Figure 3-3 shows a non-inverting circuit for single-
supply applications using just two resistors. The
resulting hysteresis diagram is shown in Figure 3-4.
Figure 3-5 shows an inverting circuit for single-supply
using three resistors. The resulting hysteresis diagram
is shown in Figure 3-6.
VDD
VDD
VIN
VREF
-
VDD
VOUT
MCP654X
VOUT
MCP654X
+
R2
VIN
RF
R1
RF
Non-inverting circuit with
R3
FIGURE 3-3:
hysteresis for single-supply.
FIGURE 3-5:
Inverting Circuit With
Hysteresis.
VOUT
VDD
VOH
VOUT
VDD
VOH
High-to-Low
Low-to-High
VDD
Low-to-High
High-to-Low
VIN
VOL
VSS
VIN
VOL
VSS
VSS
VTHL VTLH
VSS
VTLH VTHL
VDD
FIGURE 3-4:
Hysteresis Diagram for the
Non-Inverting Circuit.
FIGURE 3-6:
Hysteresis Diagram for the
Inverting Circuit.
The trip points for Figures 3-3 and 3-4 are:
In order to determine the trip voltages (VTHL and VTLH
)
for the circuit shown in Figure 3-5, R2 and R3 can be
simplified to the Thevenin equivalent circuit with
respect to VDD, as shown in Figure 3-7.
EQUATION
R
R
1
1
------
V
V
= V
= V
1 +------ – V
TLH
REF
OL
R
R
R
F
F
1
R
VDD
1
------
1 +------ – V
THL
REF
OH
R
R
F
F
-
MCP654X
VTLH = trip voltage from low to high
VTHL = trip voltage from high to low
VOUT
+
VSS
V23
R23
RF
FIGURE 3-7:
Thevenin Equivalent Circuit.
DS21696C-page 12
2003 Microchip Technology Inc.
MCP6541/2/3/4
Where:
3.8
PCB Surface Leakage
R2R3
R23 = ------------------
R2 + R3
In applications where low input bias current is critical,
PCB (Printed Circuit Board) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA, if current-to-flow. This is greater than the
MCP6541/2/3/4 family’s bias current at 25°C (1 pA,
typ).
R3
R2 + R3
------------------
V23
=
× VDD
Using this simplified circuit, the trip voltage can be
calculated using the following equation:
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 3-8.
EQUATION
R23
23 + R
RF
OH
----------------------
---------------------
R23 + RF
VTHL = V
+ V
+ V
23
R
F
R23
RF
OL
----------------------
---------------------
R23 + RF
VTLH = V
23
R
23 + R
VIN-
VIN+
F
VSS
VTLH = trip voltage from low to high
VTHL = trip voltage from high to low
Figure 2-19 and Figure 2-22 can be used to determine
typical values for VOH and VOL
.
Guard Ring
Example Guard Ring Layout
3.5
Bypass Capacitors
FIGURE 3-8:
With this family of comparators, the power supply pin
(VDD for single supply) should have a local bypass
capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm for good
edge rate performance.
for Inverting Circuit.
1. Inverting Configuration (Figures 3-5 and 3-8):
a. Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the
comparator (e.g., VDD/2 or ground).
3.6
Capacitive Loads
Reasonable capacitive loads (e.g., logic gates) have
little impact on propagation delay (see Figure 2-27).
The supply current increases with increasing toggle
frequency (Figure 2-30), especially with higher
capacitive loads.
b. Connect the inverting pin (VIN–) to the input
pad without touching the guard ring.
2. Non-inverting Configuration (Figure 3-3):
a. Connect the non-inverting pin (VIN+) to the
input pad without touching the guard ring.
3.7
Battery Life
b. Connect the guard ring to the inverting input
pin (VIN–).
In order to maximize battery life in portable
applications, use large resistors and small capacitive
loads. Also, avoid toggling the output more than
necessary and do not use chip select (CS) to conserve
power for short periods of time. Capacitive loads will
draw additional power at start-up.
2003 Microchip Technology Inc.
DS21696C-page 13
MCP6541/2/3/4
3.9.3
BISTABLE MULTI-VIBRATOR
3.9
Typical Applications
A simple bistable multi-vibrator design is shown in
Figure 3-11. VREF needs to be between the power
supplies (VSS = GND and VDD) to achieve oscillation.
3.9.1
PRECISE COMPARATOR
Some applications require higher DC precision. An
easy way to solve this problem is to use an amplifier
(such as the MCP6041) to gain-up the input signal
before it reaches the comparator. Figure 3-9 shows an
example of this approach.
The output duty cycle changes with VREF
R1 R2
VDD
.
VREF
VDD
VREF
VOUT
MCP6541
MCP6041
VDD
MCP654X
VIN
C1
R3
R1
R2
VREF
VOUT
FIGURE 3-11:
Bistable Multi-vibrator.
FIGURE 3-9:
Precise Inverting
Comparator.
3.9.2
WINDOWED COMPARATOR
Figure 3-10 shows one approach to designing a win-
dowed comparator. The AND gate produces a logic ‘1’
when the input voltage is between VRB and VRT (where
VRT > VRB).
VRT
1/2
MCP6542
VIN
1/2
VRB
MCP6542
FIGURE 3-10:
Windowed Comparator.
DS21696C-page 14
2003 Microchip Technology Inc.
MCP6541/2/3/4
4.0
4.1
PACKAGING INFORMATION
Package Marking Information
5-Lead SC-70 (MCP6541)
Example:
XNN
YWW
A25
307
Example:
5-Lead SOT-23 (MCP6541)
XXNN
AB37
8-Lead PDIP (300 mil)
Example:
MCP6541
XXXXXXXX
XXXXXNNN
I/P256
YYWW
0307
8-Lead SOIC (150 mil)
Example:
XXXXXXXX
XXXXYYWW
MCP6542
I/SN0307
NNN
256
Example:
8-Lead MSOP
XXXXXX
YWWNNN
6543I
307256
Legend: XX...X Customer specific information*
YY
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
WW
NNN
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
*
Standard marking consists of Microchip part number, year code, week code, traceability code (facility
code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please
check with your Microchip Sales Office.
2003 Microchip Technology Inc.
DS21696C-page 15
MCP6541/2/3/4
Package Marking Information (Continued)
14-Lead PDIP (300 mil) (MCP6544)
Example:
MCP6544-I/P
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
YYWWNNN
0307256
14-Lead SOIC (150 mil) (MCP6544)
Example:
MCP6544ISL
XXXXXXXXXX
XXXXXXXXXX
YYWWNNN
0307256
Example:
14-Lead TSSOP (MCP6544)
MCP6544I
XXXXXXXX
YYWW
0307
256
NNN
DS21696C-page 16
2003 Microchip Technology Inc.
MCP6541/2/3/4
5-Lead Plastic Package (LT) (SC-70)
E
E1
D
p
B
n
1
Q1
A2
A
c
A1
L
Units
INCHES
NOM
5
MILLIMETERS*
Dimension Limits
MIN
MAX
MIN
NOM
5
MAX
n
p
Number of Pins
Pitch
.026 (BSC)
0.65 (BSC)
Overall Height
A
A2
A1
E
.031
.031
.000
.071
.045
.071
.004
.004
.004
.006
.043
0.80
1.10
Molded Package Thickness
Standoff
.039
.004
.094
.053
.087
.012
.016
.007
.012
0.80
0.00
1.80
1.15
1.80
0.10
0.10
0.10
0.15
1.00
0.10
2.40
1.35
2.20
0.30
0.40
0.18
0.30
Overall Width
Molded Package Width
Overall Length
E1
D
Foot Length
L
Q1
c
Top of Molded Pkg to Lead Shoulder
Lead Thickness
Lead Width
B
*Controlling Parameter
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .005" (0.127mm) per side.
JEITA (EIAJ) Standard: SC-70
Drawing No. C04-061
2003 Microchip Technology Inc.
DS21696C-page 17
MCP6541/2/3/4
5-Lead Plastic Small Outline Transistor (OT) (SOT23)
E
E1
p
B
p1
D
n
1
α
c
A
A2
φ
A1
L
β
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
5
MAX
n
p
p1
A
A2
A1
E
E1
D
L
φ
c
B
α
β
Number of Pins
5
Pitch
.038
.075
.046
.043
.003
.110
.064
.116
.018
5
0.95
1.90
Outside lead pitch (basic)
Overall Height
Molded Package Thickness
.035
.035
.000
.102
.059
.110
.014
0
.057
0.90
0.90
1.18
1.10
0.08
2.80
1.63
2.95
0.45
5
1.45
.051
.006
.118
.069
.122
.022
10
1.30
0.15
3.00
1.75
3.10
0.55
10
Standoff
§
0.00
2.60
1.50
2.80
0.35
0
Overall Width
Molded Package Width
Overall Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
.004
.014
0
.006
.017
5
.008
.020
10
0.09
0.35
0
0.15
0.43
5
0.20
0.50
10
Mold Draft Angle Top
Mold Draft Angle Bottom
0
5
10
0
5
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MO-178
Drawing No. C04-091
DS21696C-page 18
2003 Microchip Technology Inc.
MCP6541/2/3/4
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
B
p
eB
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
MAX
n
p
A
A2
A1
E
E1
D
L
c
B1
B
eB
α
β
Number of Pins
Pitch
Top to Seating Plane
8
8
.100
.155
.130
2.54
3.94
3.30
.140
.170
.145
3.56
4.32
3.68
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
2.92
0.38
7.62
6.10
9.14
3.18
0.20
1.14
0.36
7.87
5
.313
.250
.373
.130
.012
.058
.018
.370
10
.325
.260
.385
.135
.015
.070
.022
.430
15
7.94
6.35
9.46
3.30
0.29
1.46
0.46
9.40
10
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
§
5
10
15
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
2003 Microchip Technology Inc.
DS21696C-page 19
MCP6541/2/3/4
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
h
α
45°
c
A2
A
φ
β
L
A1
Units
Dimension Limits
INCHES*
NOM
MILLIMETERS
MIN
MAX
MIN
NOM
8
MAX
n
p
A
A2
A1
E
E1
D
h
L
φ
Number of Pins
Pitch
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
1.27
Overall Height
.053
.069
1.35
1.32
1.55
1.42
0.18
6.02
3.91
4.90
0.38
0.62
4
1.75
Molded Package Thickness
.052
.004
.228
.146
.189
.010
.019
0
.061
.010
.244
.157
.197
.020
.030
8
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
Standoff
§
0.10
5.79
3.71
4.80
0.25
0.48
0
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
c
.008
.013
0
.009
.017
12
.010
.020
15
0.20
0.33
0
0.23
0.42
12
0.25
0.51
15
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
12
15
0
12
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
DS21696C-page 20
2003 Microchip Technology Inc.
MCP6541/2/3/4
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E
E1
p
D
2
B
n
1
α
A2
A
c
φ
A1
(F)
L
β
Units
Dimension Limits
INCHES
NOM
MILLIMETERS*
MIN
MAX
MIN
NOM
MAX
n
p
Number of Pins
Pitch
8
8
.026 BSC
0.65 BSC
Overall Height
A
A2
A1
E
-
-
.043
-
-
1.10
Molded Package Thickness
Standoff
.030
.000
.033
-
.037
.006
0.75
0.00
0.85
-
0.95
0.15
Overall Width
.193 TYP.
4.90 BSC
Molded Package Width
Overall Length
Foot Length
E1
D
.118 BSC
.118 BSC
3.00 BSC
3.00 BSC
L
.016
.024
.037 REF
.031
0.40
0.60
0.95 REF
0.80
Footprint (Reference)
Foot Angle
F
φ
c
0°
.003
.009
5°
-
8°
.009
.016
15°
0°
0.08
0.22
5°
-
-
-
-
-
8°
0.23
0.40
15°
Lead Thickness
Lead Width
.006
B
α
β
.012
Mold Draft Angle Top
Mold Draft Angle Bottom
*Controlling Parameter
Notes:
-
-
5°
15°
5°
15°
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.
JEDEC Equivalent: MO-187
Drawing No. C04-111
2003 Microchip Technology Inc.
DS21696C-page 21
MCP6541/2/3/4
14-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
B1
β
eB
p
B
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
14
MAX
n
p
A
A2
A1
E
E1
D
L
c
B1
B
eB
α
β
Number of Pins
Pitch
14
.100
.155
.130
2.54
3.94
3.30
Top to Seating Plane
.140
.170
.145
3.56
2.92
0.38
7.62
6.10
18.80
3.18
0.20
1.14
0.36
7.87
5
4.32
3.68
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
.115
.015
.300
.240
.740
.125
.008
.045
.014
.310
5
.313
.250
.750
.130
.012
.058
.018
.370
10
.325
.260
.760
.135
.015
.070
.022
.430
15
7.94
6.35
19.05
3.30
0.29
1.46
0.46
9.40
10
8.26
6.60
19.30
3.43
0.38
1.78
0.56
10.92
15
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
§
5
10
15
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-005
DS21696C-page 22
2003 Microchip Technology Inc.
MCP6541/2/3/4
14-Lead Plastic Small Outline (SL) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
α
h
45°
c
A2
A
φ
A1
L
β
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
MAX
n
p
A
A2
A1
E
Number of Pins
Pitch
14
14
.050
.061
.056
.007
.236
.154
.342
.015
.033
4
1.27
1.55
1.42
0.18
5.99
3.90
8.69
0.38
0.84
4
Overall Height
.053
.069
1.35
1.75
Molded Package Thickness
.052
.004
.228
.150
.337
.010
.016
0
.061
.010
.244
.157
.347
.020
.050
8
1.32
0.10
5.79
3.81
8.56
0.25
0.41
0
1.55
0.25
6.20
3.99
8.81
0.51
1.27
8
Standoff
§
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
E1
D
h
L
φ
c
.008
.014
0
.009
.017
12
.010
.020
15
0.20
0.36
0
0.23
0.42
12
0.25
0.51
15
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
12
15
0
12
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-065
2003 Microchip Technology Inc.
DS21696C-page 23
MCP6541/2/3/4
14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
α
A
c
φ
A1
A2
β
L
Units
INCHES
NOM
MILLIMETERS*
Dimension Limits
MIN
MAX
MIN
NOM
14
MAX
n
p
A
Number of Pins
Pitch
14
.026
0.65
Overall Height
.043
1.10
0.95
0.15
6.50
4.50
5.10
0.70
8
Molded Package Thickness
A2
A1
E
E1
D
L
φ
c
.033
.002
.246
.169
.193
.020
0
.004
.007
0
.035
.004
.251
.173
.197
.024
4
.006
.010
5
.037
.006
.256
.177
.201
.028
8
.008
.012
10
0.85
0.05
6.25
4.30
4.90
0.50
0
0.09
0.19
0
0.90
0.10
6.38
4.40
5.00
0.60
4
0.15
0.25
5
Standoff
§
Overall Width
Molded Package Width
Molded Package Length
Foot Length
Foot Angle
Lead Thickness
0.20
0.30
10
Lead Width
B1
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
5
10
0
5
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-087
DS21696C-page 24
2003 Microchip Technology Inc.
MCP6541/2/3/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
Device
-X
/XX
a)
MCP6541T-I/LT: Tape and Reel,
Temperature Package
Range
Industrial Temperature,
5LD SC-70.
b)
MCP6541T-I/OT: Tape and Reel,
Industrial Temperature,
5LD SOT-23.
Industrial Temperature,
8LD PDIP.
Device:
MCP6541: Single Comparator
MCP6541T: Single Comparator (Tape and Reel)
(SC-70, SOT-23, SOIC, MSOP)
c)
d)
MCP6541-I/P:
MCP6541RT: Single Comparator (Rotated - Tape and
Reel) (SOT-23 only)
MCP6541RT-I/OT: Tape and Reel,
MCP6542: Dual Comparator
Industrial Temperature,
5LD SOT23.
MCP6542T: Dual Comparator
(Tape and Reel for SOIC and MSOP)
MCP6543: Single Comparator with CS
MCP6543T: Single Comparator with CS
(Tape and Reel for SOIC and MSOP)
MCP6544: Quad Comparator
a)
b)
MCP6542-I/MS: Industrial Temperature,
8LD MSOP.
MCP6544T: Quad Comparator
MCP6542T-I/MS: Tape and Reel,
Industrial Temperature,
8LD MSOP.
(Tape and Reel for SOIC and TSSOP)
c)
MCP6542-I/P:
Industrial Temperature,
8LD PDIP.
Temperature Range:
Package:
I
=
-40°C to +85°C
LT
=
=
=
=
=
=
=
Plastic Package (SC-70), 5-lead
OT
MS
P
Plastic Small Outline Transistor (SOT-23), 5-lead
Plastic MSOP, 8-lead
a)
b)
MCP6543-I/SN: Industrial Temperature,
8LD SOIC.
Plastic DIP (300 mil Body), 8-lead, 14-lead
Plastic SOIC (150 mil Body), 8-lead
SN
SL
ST
MCP6543T-I/SN: Tape and Reel,
Industrial Temperature,
8LD SOIC.
Plastic SOIC (150 mil Body), 14-lead (MCP6544)
Plastic TSSOP (4.4mm Body), 14-lead (MCP6544)
c)
a)
MCP6543-I/P:
Industrial Temperature,
8LD PDIP.
MCP6544T-I/SL: Tape and Reel,
Industrial Temperature,
14LD SOIC.
b)
c)
MCP6544T-I/SL: Tape and Reel,
Industrial Temperature,
14LD SOIC.
MCP6544-I/P:
Industrial Temperature,
14LD PDIP.
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2003 Microchip Technology Inc.
DS21696C-page 25
MCP6541/2/3/4
NOTES:
DS21696C-page 26
2003 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical
components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, MPLAB, PIC, PICmicro, PICSTART, PRO MATE and
PowerSmart are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL
and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Accuron, Application Maestro, dsPICDEM, dsPICDEM.net,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB, In-
Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
PICC, PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo,
PowerMate, PowerTool, rfLAB, rfPIC, Select Mode,
SmartSensor, SmartShunt, SmartTel and Total Endurance are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2003, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
®
PICmicro 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
DS21696C-page 27
2003 Microchip Technology Inc.
M
WORLDWIDE SALES AND SERVICE
Korea
AMERICAS
ASIA/PACIFIC
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Corporate Office
Australia
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: 82-2-554-7200 Fax: 82-2-558-5932 or
82-2-558-5934
Fax: 480-792-7277
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Singapore
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
200 Middle Road
China - Beijing
#07-02 Prime Centre
Singapore, 188980
Unit 915
Atlanta
Bei Hai Wan Tai Bldg.
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: 86-10-85282100
Fax: 86-10-85282104
3780 Mansell Road, Suite 130
Alpharetta, GA 30022
Tel: 770-640-0034
Fax: 770-640-0307
Tel: 65-6334-8870 Fax: 65-6334-8850
Taiwan
Kaohsiung Branch
30F - 1 No. 8
Boston
Min Chuan 2nd Road
Kaohsiung 806, Taiwan
Tel: 886-7-536-4818
Fax: 886-7-536-4803
China - Chengdu
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848
Fax: 978-692-3821
Rm. 2401-2402, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Taiwan
Chengdu 610016, China
Tel: 86-28-86766200
Taiwan Branch
Chicago
11F-3, No. 207
333 Pierce Road, Suite 180
Itasca, IL 60143
Tel: 630-285-0071
Fax: 630-285-0075
Fax: 86-28-86766599
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
China - Fuzhou
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Dallas
Fuzhou 350001, China
Tel: 86-591-7503506
Fax: 86-591-7503521
EUROPE
Austria
4570 Westgrove Drive, Suite 160
Addison, TX 75001
Tel: 972-818-7423
Fax: 972-818-2924
Durisolstrasse 2
China - Hong Kong SAR
A-4600 Wels
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Austria
Detroit
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
Denmark
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200
Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250
Fax: 852-2401-3431
Regus Business Centre
Lautrup hoj 1-3
China - Shanghai
Fax: 248-538-2260
Room 701, Bldg. B
Ballerup DK-2750 Denmark
Tel: 45-4420-9895 Fax: 45-4420-9910
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Kokomo
France
2767 S. Albright Road
Kokomo, IN 46902
Tel: 765-864-8360
Fax: 765-864-8387
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Tel: 86-21-6275-5700
Fax: 86-21-6275-5060
China - Shenzhen
Los Angeles
Rm. 1812, 18/F, Building A, United Plaza
No. 5022 Binhe Road, Futian District
Shenzhen 518033, China
Tel: 86-755-82901380
18201 Von Karman, Suite 1090
Irvine, CA 92612
Germany
Tel: 949-263-1888
Steinheilstrasse 10
D-85737 Ismaning, Germany
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Fax: 949-263-1338
Fax: 86-755-8295-1393
Phoenix
China - Shunde
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7966
Fax: 480-792-4338
Room 401, Hongjian Building
No. 2 Fengxiangnan Road, Ronggui Town
Shunde City, Guangdong 528303, China
Tel: 86-765-8395507 Fax: 86-765-8395571
Italy
Via Quasimodo, 12
20025 Legnano (MI)
Milan, Italy
China - Qingdao
San Jose
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950
Rm. B505A, Fullhope Plaza,
No. 12 Hong Kong Central Rd.
Qingdao 266071, China
Fax: 408-436-7955
Tel: 86-532-5027355 Fax: 86-532-5027205
P. A. De Biesbosch 14
NL-5152 SC Drunen, Netherlands
Tel: 31-416-690399
India
Toronto
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062
Japan
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699
Fax: 31-416-690340
United Kingdom
505 Eskdale Road
Fax: 905-673-6509
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44-118-921-5869
Fax: 44-118-921-5820
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
07/28/03
DS21696C-page 28
2003 Microchip Technology Inc.
This datasheet has been download from:
www.datasheetcatalog.com
Datasheets for electronics components.
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