MCP6401U-E/ST [MICROCHIP]
1 MHz, 45 μA Op Amps; 1兆赫, 45 μA运算放大器型号: | MCP6401U-E/ST |
厂家: | MICROCHIP |
描述: | 1 MHz, 45 μA Op Amps |
文件: | 总38页 (文件大小:999K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
MCP6401/1R/1U/2/4
1 MHz, 45 µA Op Amps
Description
Features
• Low Quiescent Current: 45 µA (typical)
• Gain Bandwidth Product: 1 MHz (typical)
• Rail-to-Rail Input and Output
The Microchip Technology Inc. MCP6401/1R/1U/2/4
family of operational amplifiers (op amps) has low
quiescent current (45 µA, typical) and rail-to-rail input
and output operation. This family is unity gain stable
and has a gain bandwidth product of 1 MHz (typical).
These devices operate with a single supply voltage as
low as 1.8V. These features make the family of op
amps well suited for single-supply, battery-powered
applications.
• Supply Voltage Range: 1.8V to 6.0V
• Unity Gain Stable
• Extended Temperature Range: -40°C to +125°C
• No Phase Reversal
Applications
The MCP6401/1R/1U/2/4 family is designed with
Microchip’s advanced CMOS process and offered in
single packages. All devices are available in the
extended temperature range, with a power supply
range of 1.8V to 6.0V.
• Portable Equipment
• Battery Powered System
• Medical Instrumentation
• Data Acquisition Equipment
• Sensor Conditioning
Package Types
• Supply Current Sensing
• Analog Active Filters
MCP6401
MCP6401R
SC70-5, SOT-23-5
SOT-23-5
Design Aids
VOUT
VSS
1
2
3
5 VDD
VOUT
VDD
1
2
3
5
4
VSS
• SPICE Macro Models
• FilterLab® Software
4
VIN–
VIN
+
VIN+
VIN–
• Mindi™ Circuit Designer and Simulator
• Microchip Advanced Part Selector (MAPS)
• Analog Demonstration and Evaluation Boards
• Application Notes
MCP6402
MCP6401U
SOIC
SOT-23-5
VOUTA
1
2
3
4
8
7
6
5
VDD
VIN
+
1
2
3
5 VDD
Typical Application
VINA
–
+
VOUTB
VSS
VINA
4
VINB
VINB
–
+
VOUT
VIN
–
R2
VSS
D2
MCP6402
MCP6404
SOIC, TSSOP
2x3 TDFN
VIN
R1
VOUTA
V
V
V
14
13
12
11
1
2
3
4
OUTD
VOUT
VOUTA
1
8
7
VDD
VINA
–
+
–
MCP6401
IND
VOUTB
VINA
VINA
VSS
–
2
EP
9
VINA
+
D1
IND
+
VINB
VINB
–
+
3
4
6
5
VDD
VSS
VINB
+
–
V
+
–
10
9
5
6
7
INC
VINB
VINC
Precision Half-Wave Rectifier
V
VOUTC
8
OUTB
© 2010 Microchip Technology Inc.
DS22229B-page 1
MCP6401/1R/1U/2/4
NOTES:
DS22229B-page 2
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
1.0
1.1
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
V
– V ........................................................................7.0V
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to the
device. This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification is not
implied. Exposure to maximum rating conditions for extended
periods may affect device reliability.
DD
SS
Current at Input Pins.....................................................±2 mA
Analog Inputs (V +, V -)†† .......... V – 1.0V to V + 1.0V
IN
IN
SS
DD
All Other Inputs and Outputs ......... V – 0.3V to V + 0.3V
SS
DD
Difference Input Voltage ...................................... |V – V
|
SS
DD
Output Short-Circuit Current ................................Continuous
Current at Output and Supply Pins ............................±30 mA
Storage Temperature ....................................-65°C to +150°C
†† See Section 4.1.2 “Input Voltage Limits”
Maximum Junction Temperature (T )..........................+150°C
J
ESD Protection on All Pins (HBM; MM)............... ≥ 4 kV; 300V
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, V = +1.8V to +6.0V, V = GND, T = +25°C, V
= V /2,
DD
SS
A
CM
DD
V
» V /2, V = V /2 and R = 100 kΩ to V . (Refer to Figure 1-1).
OUT
DD
L
DD
L
L
Parameters
Sym
Min
Typ
Max
Units
Conditions
Input Offset
Input Offset Voltage
V
-4.5
—
—
+4.5
—
mV
V
= V
CM SS
OS
Input Offset Drift with Temperature
ΔV /ΔT
±2.0
µV/°C T = -40°C to +125°C,
OS
A
A
V
= V
= V
CM
SS
SS
Power Supply Rejection Ratio
Input Bias Current and Impedance
Input Bias Current
PSRR
63
78
—
dB
V
CM
I
—
—
—
—
—
—
±1.0
30
100
—
pA
pA
B
T = +85°C
A
800
±1.0
—
pA
T = +125°C
A
Input Offset Current
I
—
pA
OS
13
Common Mode Input Impedance
Differential Input Impedance
Common Mode
Z
10 ||6
—
Ω||pF
Ω||pF
CM
13
Z
10 ||6
—
DIFF
CMR
Common Mode Input Voltage Range
V
V
V
-0.2
—
—
71
V
V
+0.2
V
V
V
V
= 1.8V, Note 1
= 6.0V, Note 1
SS
DD
DD
DD
DD
-0.3
+0.3
SS
Common Mode Rejection Ratio
CMRR
56
—
dB
V
V
= -0.2V to 2.0V,
= 1.8V
CM
DD
63
90
78
110
—
—
—
dB
dB
V
V
= -0.3V to 6.3V,
= 6.0V
CM
DD
Open-Loop Gain
DC Open-Loop Gain
(Large Signal)
A
V
V
= 0.3V to V -0.3V
OL
OUT
DD
= V
CM
SS
Output
Maximum Output Voltage Swing
V
V
V
+20
V
–20
mV
V
= 6.0V, R = 10 kΩ
OL, OH
SS
DD
DD
L
0.5V input overdrive
Output Short-Circuit Current
I
—
—
±5
—
—
mA
mA
V
V
= 1.8V
= 6.0V
SC
DD
DD
±15
Power Supply
Supply Voltage
V
1.8
20
—
6.0
70
V
DD
Quiescent Current per Amplifier
I
45
µA
I = 0, V = 5.0V
O DD
Q
V
= 0.2V
CM
DD
Note 1: Figure 2-11 shows how V
© 2010 Microchip Technology Inc.
changes across temperature.
CMR
DS22229B-page 3
MCP6401/1R/1U/2/4
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8 to +6.0V, VSS = GND, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF. (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
AC Response
Gain Bandwidth Product
Phase Margin
GBWP
PM
—
—
—
1
—
—
—
MHz
°
65
0.5
G = +1 V/V
Slew Rate
SR
V/µs
Noise
Input Noise Voltage
Input Noise Voltage Density
Input Noise Current Density
Eni
eni
ini
—
—
—
3.6
28
—
—
—
µVp-p f = 0.1 Hz to 10 Hz
nV/√Hz f = 1 kHz
0.6
fA/√Hz f = 1 kHz
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V and VSS = GND.
Parameters
Temperature Ranges
Sym
Min
Typ
Max
Units
Conditions
Operating Temperature Range
Storage Temperature Range
TA
TA
-40
-65
—
—
+125
+150
°C
°C
Note 1
Thermal Package Resistances
Thermal Resistance, 5L-SC70
Thermal Resistance, 5L-SOT-23
Thermal Resistance, 8L-SOIC
Thermal Resistance, 8L-2x3 TDFN
Thermal Resistance, 14L-SOIC
Thermal Resistance, 14L-TSSOP
θJA
θJA
θJA
θJA
θJA
θJA
—
—
—
—
—
—
331
220.7
149.5
41
—
—
—
—
—
—
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
95.3
100
Note 1: The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C.
1.2
Test Circuits
CF
6.8 pF
The circuit used for most DC and AC tests is shown in
Figure 1-1. This circuit can independently set VCM and
VOUT; see Equation 1-1. Note that VCM is not the
circuit’s Common Mode voltage ((VP + VM)/2), and that
RG
RF
100 kΩ
V
OST includes VOS plus the effects (on the input offset
100 kΩ
VDD/2
VP
error, VOST) of temperature, CMRR, PSRR and AOL
.
VDD
VIN+
EQUATION 1-1:
CB1
100 nF
CB2
1 µF
MCP640x
GDM = RF ⁄ RG
VCM = (VP + VDD ⁄ 2) ⁄ 2
VOST = VIN– – VIN+
VIN–
VOUT = (VDD ⁄ 2) + (VP – VM) + VOST(1 + GDM
)
VOUT
VM
RL
CL
RG
100 kΩ
RF
100 kΩ
Where:
100 kΩ 60 pF
GDM = Differential Mode Gain
(V/V)
(V)
CF
6.8 pF
VCM = Op Amp’s Common Mode
VL
Input Voltage
VOST = Op Amp’s Total Input Offset
(mV)
FIGURE 1-1:
Most Specifications.
AC and DC Test Circuit for
Voltage
DS22229B-page 4
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
24%
21%
18%
15%
12%
9%
1200
1000
800
600
400
VDD = 1.8V
Representative Part
1760 Samples
VCM = VSS
200
0
TA = +125°C
-200
-400
-600
-800
-1000
T
T
A = +85°C
A = +25°C
6%
TA = -40°C
3%
0%
-5 -4 -3 -2 -1
0
1
2
3
4
5
Common Mode Input Voltage (V)
Input Offset Voltage (mV)
FIGURE 2-1:
Input Offset Voltage.
FIGURE 2-4:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 1.8V.
45%
1000
750
1760 Samples
CM = VSS
TA = -40°C to +125°C
40%
35%
30%
25%
20%
15%
10%
5%
V
500
250
VDD = 6.0V
0
VDD = 1.8V
-250
-500
Representative Part
-750
-1000
0%
-10 -8 -6 -4 -2
0
2
4
6
8
10
Input Offset Voltage Drift (µV/°C)
Output Voltage (V)
FIGURE 2-2:
Input Offset Voltage Drift.
FIGURE 2-5:
Input Offset Voltage vs.
Output Voltage.
1000
900
800
700
600
500
400
300
200
100
0
1000
800
VDD = 6.0V
Representative Part
TA = +125°C
Representative Part
TA = +85°C
600
400
200
0
TA = +25°C
TA = -40°C
TA = +125°C
TA = +85°C
-200
-400
-600
-800
TA = +25°C
A = -40°C
T
-100
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0 6.5
Power Supply Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-3:
Common Mode Input Voltage with VDD = 6.0V.
Input Offset Voltage vs.
FIGURE 2-6:
Power Supply Voltage.
Input Offset Voltage vs.
© 2010 Microchip Technology Inc.
DS22229B-page 5
MCP6401/1R/1U/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
1,000
90
85
80
75
70
65
60
55
50
PSRR (VDD = 1.8V to 6.0V, VCM = VSS
)
100
10
CMRR (VDD = 6.0V, VCM = -0.3V to 6.3V)
CMRR (VDD = 1.8V, VCM = -0.2V to 2.0V)
0.1
1
10
100
1k
10k
100k
-50
-25
0
25
50
75
100
125
Frequency (Hz)
Ambient Temperature (°C)
FIGURE 2-7:
Input Noise Voltage Density
FIGURE 2-10:
CMRR, PSRR vs. Ambient
vs. Frequency.
Temperature.
40
35
30
25
20
15
10
0.35
0.30
0.25
0.20
0.15
VCMR_H - VDD @ VDD = 6.0V
VCMR_H - VDD @ VDD = 1.8V
0.10
0.05
0.00
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
VCMR_L - VSS @ VDD = 1.8V
VCMR_L - VSS @ VDD = 6.0V
f = 1 kHz
VDD = 6.0 V
5
0
-50
-25
0
25
50
75
100 125
Common Mode Input Voltage (V)
Ambient Temperature (°C)
FIGURE 2-8:
Input Noise Voltage Density
FIGURE 2-11:
Common Mode Input
vs. Common Mode Input Voltage.
Voltage Range Limits vs. Ambient Temperature.
100
10000
Representative Part
PSRR+
VDD = 6.0V
90
80
70
60
50
40
30
20
1000
CMRR
PSRR-
Input Bias Current
100
10
Input Offset Current
1
10
100
1k
10k
100k
1M
25 35 45 55 65 75 85 95 105 115 125
Ambient Temperature (°C)
Frequency (Hz)
FIGURE 2-9:
CMRR, PSRR vs.
FIGURE 2-12:
Input Bias, Offset Current
Frequency.
vs. Ambient Temperature.
DS22229B-page 6
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
120
100
80
60
40
20
0
0
1000
100
10
Open-Loop Gain
-30
TA = +125°C
-60
Open-Loop Phase
-90
-120
-150
-180
-210
TA = +85°C
VDD = 6.0V
VDD = 6.0V
1
-20
0.1110100 1k 10k 100k 1M10M
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Common Mode Input Voltage (V)
Frequency (Hz)
FIGURE 2-13:
Input Bias Current vs.
FIGURE 2-16:
Open-Loop Gain, Phase vs.
Common Mode Input Voltage.
Frequency.
70
65
150
145
140
135
130
125
120
115
60
55
50
45
40
35
30
25
20
VDD = 6.0V
VDD = 5.0V
VDD = 1.8V
RL = 10 kΩ
VSS + 0.3V < VOUT < VDD - 0.3V
VCM = 0.2VDD
110
105
100
-50
-25
0
25
50
75
100 125
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Power Supply Voltage (V)
Ambient Temperature (°C)
FIGURE 2-14:
Quiescent Current vs.
FIGURE 2-17:
DC Open-Loop Gain vs.
Ambient Temperature.
Power Supply Voltage.
150
145
70
VCM = 0.2VDD
60
VDD = 6.0V
140
135
130
125
120
115
110
105
100
50
40
30
20
10
0
VDD = 1.8V
TA = +125°C
TA = +85°C
TA = +25°C
Large Signal AOL
T
A = -40°C
0.00
0.05
0.10
0.15
0.20
0.25
Output Voltage Headroom
VDD - VOH or VOL-VSS (V)
Power Supply Voltage (V)
FIGURE 2-15:
Quiescent Current vs.
FIGURE 2-18:
DC Open-Loop Gain vs.
Power Supply Voltage.
Output Voltage Headroom.
© 2010 Microchip Technology Inc.
DS22229B-page 7
MCP6401/1R/1U/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
1.6
1.5
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
90
85
80
75
70
65
60
55
50
45
10
VDD = 6.0V
Gain Bandwidth Product
VDD = 1.8V
1
Phase Margin
VDD = 6.0V
0.1
100
1k
10k
100k
1M
-50 -25
0
25
50
75 100 125
Ambient Temperature (°C)
Frequency (Hz)
FIGURE 2-19:
Gain Bandwidth Product,
FIGURE 2-22:
Output Voltage Swing vs.
Phase Margin vs. Ambient Temperature.
Frequency.
1000
1.6
1.5
90
85
80
75
70
65
60
55
50
45
Gain Bandwidth Product
1.4
VDD - VOH @ VDD = 1.8V
OL - VSS @ VDD = 1.8V
100
10
1
V
1.3
1.2
1.1
1.0
Phase Margin
VDD - VOH @ VDD = 6.0V
VOL - VSS @ VDD = 6.0V
0.9
VDD = 1.8V
RL = 10 kΩ
0.8
0.7
0.1
0.01
0.1
1
10
Output Current (mA)
-50 -25
0
25
50
75 100 125
Ambient Temperature (°C)
FIGURE 2-20:
Gain Bandwidth Product,
FIGURE 2-23:
Output Voltage Headroom
Phase Margin vs. Ambient Temperature.
vs. Output Current.
30
24
22
VDD - VOH @ VDD = 6.0V
VOL - VSS@ VDD = 6.0V
25
20
18
16
14
12
10
8
TA = -40°C
T
A = +25°C
20
15
10
5
TA = +85°C
TA = +125°C
6
4
VDD - VOH @ VDD = 1.8V
VOL - VSS @ VDD = 1.8V
2
0
0
-50
-25
0
25
50
75
100 125
Power Supply Voltage (V)
Ambient Temperature (°C)
FIGURE 2-21:
Output Short Circuit Current
FIGURE 2-24:
Output Voltage Headroom
vs. Power Supply Voltage.
vs. Ambient Temperature.
DS22229B-page 8
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
0.9
6.0
Falling Edge, VDD = 6.0V
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
Rising Edge, VDD = 6.0V
VDD = 6.0V
G = +1 V/V
Falling Edge, VDD = 1.8V
Rising Edge, VDD = 1.8V
-50
-25
0
25
50
75
100
125
Ambient Temperature (°C)
Time (20 µs/div)
FIGURE 2-25:
Slew Rate vs. Ambient
FIGURE 2-28:
Large Signal Non-Inverting
Temperature.
Pulse Response.
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
VDD = 6.0V
G = -1 V/V
VDD = 6.0V
G = +1 V/V
Time (2 µs/div)
Time (20 µs/div)
FIGURE 2-26:
Small Signal Non-Inverting
FIGURE 2-29:
Large Signal Inverting Pulse
Pulse Response.
Response.
7.0
6.0
VOUT
5.0
VDD = 6.0V
G = -1 V/V
VIN
4.0
3.0
2.0
1.0
VDD = 6.0V
G = +2 V/V
0.0
-1.0
Time (2 µs/div)
Time (0.1 ms/div)
FIGURE 2-27:
Small Signal Inverting Pulse
FIGURE 2-30:
The MCP6401/1R/1U/2/4
Response.
Shows No Phase Reversal.
© 2010 Microchip Technology Inc.
DS22229B-page 9
MCP6401/1R/1U/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
150
140
130
120
110
100
90
10000
1000
100
10
GN:
101 V/V
11 V/V
1 V/V
Input Referred
1
80
10E0
1.E0
.0E4
10E0
.E0
10
100
1.Ek+3
10k
100k
1M
100k
1100
1k
10k
Frequency (Hz)
Frequency (Hz)
FIGURE 2-31:
Closed Loop Output
FIGURE 2-33:
Channel-to-Channel
Impedance vs. Frequency.
Separation vs. Frequency (MCP6402/4 only).
1m
1
100µ
1
10µ
11µ
1
100n
1
10n
TA = -40°C
A = +25°C
T
1
1n
TA = +85°C
TA = +125°C
100p
10p
1p
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
IN (V)
V
FIGURE 2-32:
Measured Input Current vs.
Input Voltage (below VSS).
DS22229B-page 10
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1: PIN FUNCTION TABLE
MCP6401 MCP6401R MCP6401U
MCP6402
MCP6404
Symbol
Description
SC70-5,
SOT-23-5
2x3
TDFN
SOIC,
TSSOP
SOT-23-5
SOT-23-5
SOIC
1
4
1
4
4
3
1
2
3
8
5
6
1
2
3
8
5
6
1
2
3
4
5
6
VOUT, VOUTA Analog Output (op amp A)
VIN–, VINA
VIN+, VINA
VDD
–
Inverting Input (op amp A)
Non-inverting Input (op amp A)
Positive Power Supply
3
3
1
+
5
2
5
—
—
—
—
—
—
VINB
+
–
Non-inverting Input (op amp B)
Inverting Input (op amp B)
VINB
—
—
—
—
2
—
—
—
—
5
—
—
—
—
2
7
7
7
VOUTB
VOUTC
Analog Output (op amp B)
Analog Output (op amp C)
Inverting Input (op amp C)
Non-inverting Input (op amp C)
Negative Power Supply
—
—
—
4
—
—
—
4
8
9
VINC
–
+
10
11
12
13
14
—
VINC
VSS
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
9
VIND+
Non-inverting Input (op amp D)
Inverting Input (op amp D)
Analog Output (op amp D)
VIND–
VOUTD
EP
Exposed Thermal Pad (EP);
must be connected to VSS.
3.1
Analog Output (V
)
3.3
Power Supply Pin (V , V
)
SS
OUT
DD
The output pin is low-impedance voltage source.
The positive power supply (VDD) is 1.8V to 6.0V higher
than the negative power supply (VSS). For normal
operation, the other pins are at voltages between VSS
3.2
Analog Inputs (V +, V -)
IN IN
and VDD
.
The non-inverting and inverting inputs are high-
impedance CMOS inputs with low bias currents.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
© 2010 Microchip Technology Inc.
DS22229B-page 11
MCP6401/1R/1U/2/4
NOTES:
DS22229B-page 12
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
4.0
APPLICATION INFORMATION
VDD
The MCP6401/1R/1U/2/4 family of op amps is
manufactured using Microchip’s state-of-the-art CMOS
process and is specifically designed for low-power,
high precision applications.
D1 D2
U1
V1
V2
VOUT
MCP640x
4.1
Rail-to-Rail Input
4.1.1
PHASE REVERSAL
The MCP6401/1R/1U/2/4 op amps are designed to
prevent phase reversal when the input pins exceed the
supply voltages. Figure 2-30 shows the input voltage
exceeding the supply voltage with no phase reversal.
FIGURE 4-2:
Inputs.
Protecting the Analog
A significant amount of current can flow out of the
inputs when the Common Mode voltage (VCM) is below
ground (VSS); See Figure 2-32.
4.1.2
INPUT VOLTAGE LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the voltages at
the input pins (see Section 1.1 “Absolute Maximum
Ratings †”).
4.1.3
INPUT CURRENT LIMITS
In order to prevent damage and/or improper operation
of these amplifiers, the circuit must limit the currents
into the input pins (see Section 1.1 “Absolute
Maximum Ratings †”).
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors against many (but not all)
over-voltage conditions, and to minimize the input bias
current (IB).
Figure 4-3 shows one approach to protecting these
inputs. The resistors R1 and R2 limit the possible
currents in or out of the input pins (and the ESD diodes,
D1 and D2). The diode currents will go through either
VDD or VSS.
Bond
VDD
VDD
Pad
D1 D2
R1
U1
Bond
Pad
Bond
Pad
Input
Stage
VIN+
VIN–
V1
V2
VOUT
MCP640x
Bond
Pad
R2
VSS
VSS – min(V1, V2)
2 mA
min(R1,R2) >
min(R1,R2) >
FIGURE 4-1:
Structures.
Simplified Analog Input ESD
max(V1,V2) – VDD
2 mA
The input ESD diodes clamp the inputs when they try
to go more than one diode drop below VSS. They also
clamp any voltages that go well above VDD; their
breakdown voltage is high enough to allow normal
operation, but not low enough to protect against slow
over-voltage (beyond VDD) events. Very fast ESD
events (that meet the spec) are limited so that damage
does not occur.
FIGURE 4-3:
Inputs.
Protecting the Analog
4.1.4
NORMAL OPERATION
The input stage of the MCP6401/1R/1U/2/4 op amps
uses two differential input stages in parallel. One oper-
ates at a low Common Mode input voltage (VCM), while
the other operates at a high VCM. With this topology,
the device operates with a VCM up to 300 mV above
VDD and 300 mV below VSS. (See Figure 2-11). The
input offset voltage is measured at VCM = VSS – 0.3V
and VDD + 0.3V to ensure proper operation.
In some applications, it may be necessary to prevent
excessive voltages from reaching the op amp inputs;
Figure 4-2 shows one approach to protecting these
inputs.
The transition between the input stages occurs when
VCM is near VDD – 1.1V (See Figures 2-3 and 2-4). For
the best distortion performance and gain linearity, with
non-inverting gains, avoid this region of operation.
© 2010 Microchip Technology Inc.
DS22229B-page 13
MCP6401/1R/1U/2/4
After selecting RISO for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP6401/1R/1U/2/4 SPICE
macro model are very helpful.
4.2
Rail-to-Rail Output
The output voltage range of the MCP6401/1R/1U/2/4
op amps is VSS + 20 mV (minimum) and VDD – 20 mV
(maximum) when RL = 10 kΩ is connected to VDD/2
and VDD = 6.0V. Refer to Figures 2-23 and 2-24 for
more information.
4.4
Supply Bypass
4.3
Capacitive Loads
With this family of operational amplifiers, the power
supply pin (VDD for single-supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high frequency performance. It can use a bulk
capacitor (i.e., 1 µF or larger) within 100 mm to provide
large, slow currents. This bulk capacitor can be shared
with other analog parts.
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1 V/V) is the
most sensitive to capacitive loads, all gains show the
same general behavior.
4.5
Unused Op Amps
An unused op amp in a quad package (MCP6404)
should be configured as shown in Figure 4-6. These
circuits prevent the output from toggling and causing
crosstalk. Circuits A sets the op amp at its minimum
noise gain. The resistor divider produces any desired
reference voltage within the output voltage range of the
op amp; the op amp buffers that reference voltage.
Circuit B uses the minimum number of components
and operates as a comparator, but it may draw more
current.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1 V/V), a small series
resistor at the output (RISO in Figure 4-4) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitance load.
–
RISO
MCP640x
+
VOUT
¼ MCP6404 (A)
VDD
¼ MCP6404 (B)
VIN
CL
VDD
VDD
R1
R2
FIGURE 4-4:
Output Resistor, RISO
Stabilizes Large Capacitive Loads.
VREF
Figure 4-5 gives recommended RISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit's noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
R2
VREF = VDD • ------------------
R1 + R2
FIGURE 4-6:
Unused Op Amps.
10000
VDD = 6.0 V
4.6 PCB Surface Leakage
RL = 10 kΩ
1000
100
10
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow; which is greater than the
MCP6401/1R/1U/2/4 family’s bias current at +25°C
(±1.0 pA, typical).
GN:
1 V/V
2 V/V
≥ 5 V/V
1
10p
100p
1n
10n
0.1µ
1µ
Normalized Load Capacitance; CL/GN (F)
FIGURE 4-5:
Recommended RISO Values
for Capacitive Loads.
DS22229B-page 14
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-7.
Figure 4-8 shows a precision half-wave rectifier and its
transfer characteristic. The rectifier’s input impedance
is determined by the input resistor R1. To avoid loading
effect, it must be driven from a low impedance source.
When VIN is greater than zero, D1 is OFF, D2 is ON, and
VOUT is zero. When VIN is less than zero, D1 is ON, D2
is OFF, and VOUT is the VIN with an amplification of -R2/
R1.
Guard Ring
VIN– VIN+
VSS
The rectifier circuit shown in Figure 4-8 has the benefit
that the op amp never goes in saturation, so the only
thing affecting its frequency response is the
amplification and the gain bandwidth product.
.
R2
FIGURE 4-7:
for Inverting Gain.
Example Guard Ring Layout
D2
1. Non-inverting Gain and Unity-Gain Buffer:
VIN
R1
a) Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
VOUT
MCP6401
b) Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
Common Mode input voltage.
D1
2. Inverting Gain and Transimpedance Gain
Amplifiers (convert current to voltage, such as
photo detectors):
Precision Half-Wave Rectifier
VOUT
a) Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
-R2/R1
b) Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
VIN
4.7
Application Circuits
Transfer Characteristic
4.7.1
PRECISION HALF-WAVE
RECTIFIER
FIGURE 4-8:
Rectifier.
Precision Half-Wave
The precision half-wave rectifier, which is also known
as a super diode, is a configuration obtained with an
operational amplifier in order to have a circuit behaving
like an ideal diode and rectifier. It effectively cancels the
forward voltage drop of the diode so that very low level
signals can still be rectified with minimal error. This can
be useful for high-precision signal processing. The
MCP6401/1R/1U/2/4 op amps have high input
impedance, low input bias current and rail-to-rail input/
output, which makes this device suitable for precision
rectifier applications.
© 2010 Microchip Technology Inc.
DS22229B-page 15
MCP6401/1R/1U/2/4
4.7.2
BATTERY CURRENT SENSING
4.7.3
INSTRUMENTATION AMPLIFIER
The MCP6401/1R/1U/2/4 op amps’ Common Mode
Input Range, which goes 0.3V beyond both supply
rails, supports their use in high-side and low-side
battery current sensing applications. The low quiescent
current (45 µA, typical) helps prolong battery life, and
the rail-to-rail output supports detection of low currents.
The MCP6401/1R/1U/2/4 op amps are well suited for
conditioning sensor signals in battery-powered
applications. Figure 4-10 shows
a two op amp
instrumentation amplifier, using the MCP6402, that
works well for applications requiring rejection of
Common Mode noise at higher gains. The reference
voltage (VREF) is supplied by a low impedance source.
In single supply applications, VREF is typically VDD/2.
Figure 4-9 shows a high side battery current sensor
circuit. The 10Ω resistor is sized to minimize power
losses. The battery current (IDD) through the 10Ω
resistor causes its top terminal to be more negative
than the bottom terminal. This keeps the Common
Mode input voltage of the op amp below VDD, which is
within its allowed range. The output of the op amp will
also be below VDD, which is within its Maximum Output
Voltage Swing specification.
RG
R1
R2
R2
R1
VREF
VOUT
V2
V1
1/2 MCP6402
1/2 MCP6402
IDD
To load
1.8V
to
VDD
10Ω
VOUT
R1 2R1
6.0V
⎛
⎞
VOUT = (V1 – V2) 1 + ----- + -------- + VREF
MCP6401
⎝
⎠
R2 RG
100 kΩ
FIGURE 4-10:
Instrumentation Amplifier.
Two Op Amp
1 MΩ
VDD – VOUT
IDD = -----------------------------------------
(10 V/V) ⋅ (10Ω)
FIGURE 4-9:
Supply Current Sensing.
DS22229B-page 16
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
5.4
Microchip Advanced Part Selector
(MAPS)
5.0
DESIGN AIDS
Microchip provides the basic design tools needed for
the MCP6401/1R/1U/2/4 family of op amps.
MAPS is a software tool that helps semiconductor
professionals efficiently identify Microchip devices that
fit a particular design requirement. Available at no cost
from the Microchip website at www.microchip.com/
maps, the MAPS is an overall selection tool for
Microchip’s product portfolio that includes Analog,
Memory, MCUs and DSCs. Using this tool you can
define a filter to sort features for a parametric search of
devices and export side-by-side technical comparison
reports. Helpful links are also provided for Datasheets,
Purchase, and Sampling of Microchip parts.
5.1
SPICE Macro Model
The latest SPICE macro model for the MCP6401/1R/
1U/2/4 op amp is available on the Microchip web site at
www.microchip.com. The model was written and tested
in official Orcad (Cadence) owned PSPICE. For the
other simulators, it may require translation.
The model covers a wide aspect of the op amp's
electrical specifications. Not only does the model cover
voltage, current, and resistance of the op amp, but it
also covers the temperature and noise effects on the
behavior of the op amp. The model has not been
verified outside of the specification range listed in the
op amp data sheet. The model behaviors under these
conditions cannot be guaranteed that it will match the
actual op amp performance.
5.5
Analog Demonstration and
Evaluation Boards
Microchip offers
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market. For
a
broad spectrum of Analog
a
complete listing of these boards and their
Moreover, the model is intended to be an initial design
tool. Bench testing is a very important part of any
design and cannot be replaced with simulations. Also,
simulation results using this macro model need to be
validated by comparing them to the data sheet
specifications and characteristic curves.
corresponding user’s guides and technical information,
visit the Microchip web site at www.microchip.com/
analogtools.
Some boards that are especially useful are:
• MCP6XXX Amplifier Evaluation Board 1
• MCP6XXX Amplifier Evaluation Board 2
• MCP6XXX Amplifier Evaluation Board 3
• MCP6XXX Amplifier Evaluation Board 4
• Active Filter Demo Board Kit
®
5.2
FilterLab Software
Microchip’s FilterLab® software is an innovative
software tool that simplifies analog active filter (using
op amps) design. Available at no cost from the
Microchip web site at www.microchip.com/filterlab, the
FilterLab design tool provides full schematic diagrams
of the filter circuit with component values. It also
outputs the filter circuit in SPICE format, which can be
used with the macro model to simulate actual filter
performance.
• 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
• 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,
P/N SOIC8EV
• 14-Pin SOIC/TSSOP/DIP Evaluation Board, P/N
SOIC14EV
5.3
Mindi™ Circuit Designer and
Simulator
Microchip’s Mindi™ Circuit Designer and Simulator
aids in the design of various circuits useful for active
filter, amplifier and power-management applications. It
is a free online circuit designer and simulator available
from the Microchip web site at www.microchip.com/
mindi. This interactive circuit designer and simulator
enables designers to quickly generate circuit diagrams,
and simulate circuits. Circuits developed using the
Mindi Circuit Designer and Simulator can be down-
loaded to a personal computer or workstation.
© 2010 Microchip Technology Inc.
DS22229B-page 17
MCP6401/1R/1U/2/4
5.6
Application Notes
The following Microchip Analog Design Note and
Application Notes are available on the Microchip web
site at www.microchip.com/appnotes and are
recommended as supplemental reference resources.
• ADN003: “Select the Right Operational Amplifier
for your Filtering Circuits”, DS21821
• AN722: “Operational Amplifier Topologies and DC
Specifications”, DS00722
• AN723: “Operational Amplifier AC Specifications
and Applications”, DS00723
• AN884: “Driving Capacitive Loads With Op
Amps”, DS00884
• AN990: “Analog Sensor Conditioning Circuits –
An Overview”, DS00990
• AN1177: “Op Amp Precision Design: DC Errors”,
DS01177
• AN1228: “Op Amp Precision Design: Random
Noise”, DS01228
• AN1297: “Microchip’s Op Amp SPICE Macro
Models”, DS01297
These application notes and others are listed in the
design guide:
• “Signal Chain Design Guide”, DS21825
DS22229B-page 18
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
6.0
6.1
PACKAGING INFORMATION
Package Marking Information
5-Lead SC70 (MCP6401 only)
Example:
XXNN
BL25
5-Lead SOT-23
Example:
Part Number
Code
MCP6401T-E/OT
MCP6401RT-E/OT
MCP6401UT-E/OT
NLNN
XXNN
NL25
NMNN
NPNN
Example:
8-Lead TDFN (2 x 3)
XXX
YWW
NN
AAW
025
25
8-Lead SOIC (150 mil)
Example:
XXXXXXXX
XXXXYYWW
MCP6402E
SN^^1025
e
3
NNN
256
Legend: XX...X Customer-specific information
Y
Year code (last digit of calendar year)
YY
Year code (last 2 digits of calendar year)
WW
NNN
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
*
)
3
e
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2010 Microchip Technology Inc.
DS22229B-page 19
MCP6401/1R/1U/2/4
Package Marking Information (Continued)
Example:
14-Lead SOIC (150 mil) (MCP6404)
MCP6404
XXXXXXXXXX
XXXXXXXXXX
YYWWNNN
E/SL^
e3
1025256
Example:
14-Lead TSSOP (MCP6404)
XXXXXX
YYWW
6404E/ST
1025
NNN
256
Legend: XX...X Customer-specific information
Y
YY
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
WW
NNN
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
e
3
Pb-free JEDEC designator for Matte Tin (Sn)
*
This package is Pb-free. The Pb-free JEDEC designator (
can be found on the outer packaging for this package.
)
e3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
DS22229B-page 20
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢓꢄꢑꢉꢋꢉꢊꢔꢓꢆꢕꢂꢒꢖꢆꢗꢍꢘꢙꢚꢛ
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
D
b
1
3
2
E1
E
4
5
e
e
A
A2
c
A1
L
3ꢆꢃ#
ꢏꢙ44ꢙꢏ"ꢗ"ꢚꢕ
ꢂꢃꢄꢅꢆ ꢃꢇꢆꢈ4ꢃꢄꢃ#
ꢏꢙ5
56ꢏ
ꢏꢔ7
5$ꢄ8ꢅꢍꢈꢇ%ꢈ1ꢃꢆ
1ꢃ#ꢊꢌ
5
ꢅ
(
ꢐꢁ9(ꢈ)ꢕ*
6,ꢅꢍꢉꢋꢋꢈ:ꢅꢃꢓꢌ#
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈꢗꢌꢃꢊ/ꢆꢅ
ꢕ#ꢉꢆ!ꢇ%%
ꢔ
ꢐꢁ;ꢐ
ꢐꢁ;ꢐ
ꢐꢁꢐꢐ
ꢀꢁ;ꢐ
ꢀꢁꢀ(
ꢀꢁ;ꢐ
ꢐꢁꢀꢐ
ꢐꢁꢐ;
ꢐꢁꢀ(
M
M
M
ꢑꢁꢀꢐ
ꢀꢁꢑ(
ꢑꢁꢐꢐ
ꢐꢁꢑꢐ
M
ꢀꢁꢀꢐ
ꢀꢁꢐꢐ
ꢐꢁꢀꢐ
ꢑꢁꢖꢐ
ꢀꢁꢛ(
ꢑꢁꢑ(
ꢐꢁꢖ9
ꢐꢁꢑ9
ꢐꢁꢖꢐ
ꢔꢑ
ꢔꢀ
"
"ꢀ
ꢂ
4
ꢊ
8
6,ꢅꢍꢉꢋꢋꢈ=ꢃ!#ꢌ
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ=ꢃ!#ꢌ
6,ꢅꢍꢉꢋꢋꢈ4ꢅꢆꢓ#ꢌ
.ꢇꢇ#ꢈ4ꢅꢆꢓ#ꢌ
4ꢅꢉ!ꢈꢗꢌꢃꢊ/ꢆꢅ
4ꢅꢉ!ꢈ=ꢃ!#ꢌ
M
ꢜꢔꢊꢃꢉꢝ
ꢀꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀꢑꢒꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ
ꢑꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐ9ꢀ)
© 2010 Microchip Technology Inc.
DS22229B-page 21
MCP6401/1R/1U/2/4
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
DS22229B-page 22
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢓꢄꢑꢉꢋꢉꢊꢔꢓꢆꢕꢏꢒꢖꢆꢗꢍꢏꢒꢁ !ꢛ
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
b
N
E
E1
3
2
1
e
e1
D
A2
c
A
φ
A1
L
L1
3ꢆꢃ#
ꢏꢙ44ꢙꢏ"ꢗ"ꢚꢕ
ꢂꢃꢄꢅꢆ ꢃꢇꢆꢈ4ꢃꢄꢃ#
ꢏꢙ5
56ꢏ
ꢏꢔ7
5$ꢄ8ꢅꢍꢈꢇ%ꢈ1ꢃꢆ
4ꢅꢉ!ꢈ1ꢃ#ꢊꢌ
5
ꢅ
(
ꢐꢁꢝ(ꢈ)ꢕ*
6$# ꢃ!ꢅꢈ4ꢅꢉ!ꢈ1ꢃ#ꢊꢌ
6,ꢅꢍꢉꢋꢋꢈ:ꢅꢃꢓꢌ#
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈꢗꢌꢃꢊ/ꢆꢅ
ꢕ#ꢉꢆ!ꢇ%%
6,ꢅꢍꢉꢋꢋꢈ=ꢃ!#ꢌ
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ=ꢃ!#ꢌ
6,ꢅꢍꢉꢋꢋꢈ4ꢅꢆꢓ#ꢌ
.ꢇꢇ#ꢈ4ꢅꢆꢓ#ꢌ
.ꢇꢇ#ꢎꢍꢃꢆ#
.ꢇꢇ#ꢈꢔꢆꢓꢋꢅ
4ꢅꢉ!ꢈꢗꢌꢃꢊ/ꢆꢅ
4ꢅꢉ!ꢈ=ꢃ!#ꢌ
ꢅꢀ
ꢔ
ꢔꢑ
ꢔꢀ
"
"ꢀ
ꢂ
4
ꢀꢁꢝꢐꢈ)ꢕ*
ꢐꢁꢝꢐ
ꢐꢁ;ꢝ
ꢐꢁꢐꢐ
ꢑꢁꢑꢐ
ꢀꢁꢛꢐ
ꢑꢁꢒꢐ
ꢐꢁꢀꢐ
ꢐꢁꢛ(
ꢐꢞ
M
M
M
M
M
M
M
M
M
M
M
ꢀꢁꢖ(
ꢀꢁꢛꢐ
ꢐꢁꢀ(
ꢛꢁꢑꢐ
ꢀꢁ;ꢐ
ꢛꢁꢀꢐ
ꢐꢁ9ꢐ
ꢐꢁ;ꢐ
ꢛꢐꢞ
4ꢀ
ꢀ
ꢊ
8
ꢐꢁꢐ;
ꢐꢁꢑꢐ
ꢐꢁꢑ9
ꢐꢁ(ꢀ
ꢜꢔꢊꢃꢉꢝ
ꢀꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀꢑꢒꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ
ꢑꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐꢝꢀ)
© 2010 Microchip Technology Inc.
DS22229B-page 23
MCP6401/1R/1U/2/4
"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢜꢖꢆMꢆꢜꢄꢓꢓꢔ$%ꢆ!&'ꢚꢆꢎꢎꢆ(ꢔꢅ)ꢆꢗꢍꢏ*ꢘꢛ
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
D
e
N
E
E1
NOTE 1
1
2
3
α
h
b
h
c
φ
A2
A
L
A1
L1
β
3ꢆꢃ#
ꢏꢙ44ꢙꢏ"ꢗ"ꢚꢕ
ꢂꢃꢄꢅꢆ ꢃꢇꢆꢈ4ꢃꢄꢃ#
ꢏꢙ5
56ꢏ
ꢏꢔ7
5$ꢄ8ꢅꢍꢈꢇ%ꢈ1ꢃꢆ
1ꢃ#ꢊꢌ
5
ꢅ
;
ꢀꢁꢑꢒꢈ)ꢕ*
6,ꢅꢍꢉꢋꢋꢈ:ꢅꢃꢓꢌ#
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈꢗꢌꢃꢊ/ꢆꢅ
ꢕ#ꢉꢆ!ꢇ%%ꢈꢈꢟ
ꢔ
M
ꢀꢁꢑ(
ꢐꢁꢀꢐ
M
M
M
ꢀꢁꢒ(
M
ꢐꢁꢑ(
ꢔꢑ
ꢔꢀ
"
6,ꢅꢍꢉꢋꢋꢈ=ꢃ!#ꢌ
9ꢁꢐꢐꢈ)ꢕ*
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ=ꢃ!#ꢌ
6,ꢅꢍꢉꢋꢋꢈ4ꢅꢆꢓ#ꢌ
*ꢌꢉꢄ%ꢅꢍꢈ@ꢇꢎ#ꢃꢇꢆꢉꢋA
.ꢇꢇ#ꢈ4ꢅꢆꢓ#ꢌ
"ꢀ
ꢂ
ꢌ
ꢛꢁꢝꢐꢈ)ꢕ*
ꢖꢁꢝꢐꢈ)ꢕ*
ꢐꢁꢑ(
ꢐꢁꢖꢐ
M
M
ꢐꢁ(ꢐ
ꢀꢁꢑꢒ
4
.ꢇꢇ#ꢎꢍꢃꢆ#
.ꢇꢇ#ꢈꢔꢆꢓꢋꢅ
4ꢅꢉ!ꢈꢗꢌꢃꢊ/ꢆꢅ
4ꢅꢉ!ꢈ=ꢃ!#ꢌ
ꢏꢇꢋ!ꢈꢂꢍꢉ%#ꢈꢔꢆꢓꢋꢅꢈꢗꢇꢎ
ꢏꢇꢋ!ꢈꢂꢍꢉ%#ꢈꢔꢆꢓꢋꢅꢈ)ꢇ##ꢇꢄ
4ꢀ
ꢀ
ꢀꢁꢐꢖꢈꢚ".
ꢐꢞ
ꢐꢁꢀꢒ
ꢐꢁꢛꢀ
(ꢞ
M
M
M
M
M
;ꢞ
ꢊ
8
ꢁ
ꢐꢁꢑ(
ꢐꢁ(ꢀ
ꢀ(ꢞ
ꢂ
(ꢞ
ꢀ(ꢞ
ꢜꢔꢊꢃꢉꢝ
ꢀꢁ 1ꢃꢆꢈꢀꢈ,ꢃ $ꢉꢋꢈꢃꢆ!ꢅ&ꢈ%ꢅꢉ#$ꢍꢅꢈꢄꢉꢘꢈ,ꢉꢍꢘ0ꢈ8$#ꢈꢄ$ #ꢈ8ꢅꢈꢋꢇꢊꢉ#ꢅ!ꢈ-ꢃ#ꢌꢃꢆꢈ#ꢌꢅꢈꢌꢉ#ꢊꢌꢅ!ꢈꢉꢍꢅꢉꢁ
ꢑꢁ ꢟꢈꢕꢃꢓꢆꢃ%ꢃꢊꢉꢆ#ꢈ*ꢌꢉꢍꢉꢊ#ꢅꢍꢃ #ꢃꢊꢁ
ꢛꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀ(ꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ
ꢖꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ
ꢚ".+ ꢚꢅ%ꢅꢍꢅꢆꢊꢅꢈꢂꢃꢄꢅꢆ ꢃꢇꢆ0ꢈ$ $ꢉꢋꢋꢘꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ0ꢈ%ꢇꢍꢈꢃꢆ%ꢇꢍꢄꢉ#ꢃꢇꢆꢈꢎ$ꢍꢎꢇ ꢅ ꢈꢇꢆꢋꢘꢁ
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐ(ꢒ)
DS22229B-page 24
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢜꢖꢆMꢆꢜꢄꢓꢓꢔ$%ꢆ!&'ꢚꢆꢎꢎꢆ(ꢔꢅ)ꢆꢗꢍꢏ*ꢘꢛ
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
© 2010 Microchip Technology Inc.
DS22229B-page 25
MCP6401/1R/1U/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22229B-page 26
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
© 2010 Microchip Technology Inc.
DS22229B-page 27
MCP6401/1R/1U/2/4
"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ+ꢐꢄꢈꢆ,ꢈꢄꢊ%ꢆꢜꢔꢆꢂꢃꢄꢅꢆꢇꢄꢌ-ꢄ.ꢃꢆꢕ/ꢜꢖꢆMꢆ 0!0ꢚ&ꢙꢀꢆꢎꢎꢆ(ꢔꢅ)ꢆꢗꢒ+,ꢜꢛ
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
DS22229B-page 28
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
12ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢂꢖꢆMꢆꢜꢄꢓꢓꢔ$%ꢆ!&'ꢚꢆꢎꢎꢆ(ꢔꢅ)ꢆꢗꢍꢏ*ꢘꢛ
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
D
N
E
E1
NOTE 1
1
2
3
e
h
b
α
h
c
φ
A2
A
L
A1
β
L1
3ꢆꢃ#
ꢏꢙ44ꢙꢏ"ꢗ"ꢚꢕ
ꢂꢃꢄꢅꢆ ꢃꢇꢆꢈ4ꢃꢄꢃ#
ꢏꢙ5
56ꢏ
ꢏꢔ7
5$ꢄ8ꢅꢍꢈꢇ%ꢈ1ꢃꢆ
1ꢃ#ꢊꢌ
5
ꢅ
ꢀꢖ
ꢀꢁꢑꢒꢈ)ꢕ*
6,ꢅꢍꢉꢋꢋꢈ:ꢅꢃꢓꢌ#
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈꢗꢌꢃꢊ/ꢆꢅ
ꢕ#ꢉꢆ!ꢇ%%ꢈꢈꢟ
ꢔ
M
ꢀꢁꢑ(
ꢐꢁꢀꢐ
M
M
M
ꢀꢁꢒ(
M
ꢐꢁꢑ(
ꢔꢑ
ꢔꢀ
"
6,ꢅꢍꢉꢋꢋꢈ=ꢃ!#ꢌ
9ꢁꢐꢐꢈ)ꢕ*
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ=ꢃ!#ꢌ
6,ꢅꢍꢉꢋꢋꢈ4ꢅꢆꢓ#ꢌ
*ꢌꢉꢄ%ꢅꢍꢈ@ꢇꢎ#ꢃꢇꢆꢉꢋA
.ꢇꢇ#ꢈ4ꢅꢆꢓ#ꢌ
"ꢀ
ꢂ
ꢌ
ꢛꢁꢝꢐꢈ)ꢕ*
;ꢁ9(ꢈ)ꢕ*
ꢐꢁꢑ(
ꢐꢁꢖꢐ
M
M
ꢐꢁ(ꢐ
ꢀꢁꢑꢒ
4
.ꢇꢇ#ꢎꢍꢃꢆ#
.ꢇꢇ#ꢈꢔꢆꢓꢋꢅ
4ꢅꢉ!ꢈꢗꢌꢃꢊ/ꢆꢅ
4ꢅꢉ!ꢈ=ꢃ!#ꢌ
ꢏꢇꢋ!ꢈꢂꢍꢉ%#ꢈꢔꢆꢓꢋꢅꢈꢗꢇꢎ
ꢏꢇꢋ!ꢈꢂꢍꢉ%#ꢈꢔꢆꢓꢋꢅꢈ)ꢇ##ꢇꢄ
4ꢀ
ꢀ
ꢀꢁꢐꢖꢈꢚ".
ꢐꢞ
ꢐꢁꢀꢒ
ꢐꢁꢛꢀ
(ꢞ
M
M
M
M
M
;ꢞ
ꢊ
8
ꢁ
ꢐꢁꢑ(
ꢐꢁ(ꢀ
ꢀ(ꢞ
ꢂ
(ꢞ
ꢀ(ꢞ
ꢜꢔꢊꢃꢉꢝ
ꢀꢁ 1ꢃꢆꢈꢀꢈ,ꢃ $ꢉꢋꢈꢃꢆ!ꢅ&ꢈ%ꢅꢉ#$ꢍꢅꢈꢄꢉꢘꢈ,ꢉꢍꢘ0ꢈ8$#ꢈꢄ$ #ꢈ8ꢅꢈꢋꢇꢊꢉ#ꢅ!ꢈ-ꢃ#ꢌꢃꢆꢈ#ꢌꢅꢈꢌꢉ#ꢊꢌꢅ!ꢈꢉꢍꢅꢉꢁ
ꢑꢁ ꢟꢈꢕꢃꢓꢆꢃ%ꢃꢊꢉꢆ#ꢈ*ꢌꢉꢍꢉꢊ#ꢅꢍꢃ #ꢃꢊꢁ
ꢛꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀ(ꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ
ꢖꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ
ꢚ".+ ꢚꢅ%ꢅꢍꢅꢆꢊꢅꢈꢂꢃꢄꢅꢆ ꢃꢇꢆ0ꢈ$ $ꢉꢋꢋꢘꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ0ꢈ%ꢇꢍꢈꢃꢆ%ꢇꢍꢄꢉ#ꢃꢇꢆꢈꢎ$ꢍꢎꢇ ꢅ ꢈꢇꢆꢋꢘꢁ
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐ9()
© 2010 Microchip Technology Inc.
DS22229B-page 29
MCP6401/1R/1U/2/4
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
DS22229B-page 30
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
12ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢒ3ꢋꢑꢆꢍ3ꢓꢋꢑ-ꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢒꢖꢆMꢆ2&2ꢆꢎꢎꢆ(ꢔꢅ)ꢆꢗꢒꢍꢍꢏꢇꢛ
ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ
ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ
D
N
E
E1
NOTE 1
1
2
e
b
c
φ
A2
A
A1
L
L1
3ꢆꢃ#
ꢏꢙ44ꢙꢏ"ꢗ"ꢚꢕ
ꢂꢃꢄꢅꢆ ꢃꢇꢆꢈ4ꢃꢄꢃ#
ꢏꢙ5
56ꢏ
ꢏꢔ7
5$ꢄ8ꢅꢍꢈꢇ%ꢈ1ꢃꢆ
1ꢃ#ꢊꢌ
5
ꢅ
ꢀꢖ
ꢐꢁ9(ꢈ)ꢕ*
6,ꢅꢍꢉꢋꢋꢈ:ꢅꢃꢓꢌ#
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈꢗꢌꢃꢊ/ꢆꢅ
ꢕ#ꢉꢆ!ꢇ%%ꢈ
6,ꢅꢍꢉꢋꢋꢈ=ꢃ!#ꢌ
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ=ꢃ!#ꢌ
ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ4ꢅꢆꢓ#ꢌ
.ꢇꢇ#ꢈ4ꢅꢆꢓ#ꢌ
ꢔ
M
ꢐꢁ;ꢐ
ꢐꢁꢐ(
M
ꢀꢁꢐꢐ
M
9ꢁꢖꢐꢈ)ꢕ*
ꢖꢁꢖꢐ
(ꢁꢐꢐ
ꢐꢁ9ꢐ
ꢀꢁꢑꢐ
ꢀꢁꢐ(
ꢐꢁꢀ(
ꢔꢑ
ꢔꢀ
"
"ꢀ
ꢂ
ꢖꢁꢛꢐ
ꢖꢁꢝꢐ
ꢐꢁꢖ(
ꢖꢁ(ꢐ
(ꢁꢀꢐ
ꢐꢁꢒ(
4
.ꢇꢇ#ꢎꢍꢃꢆ#
.ꢇꢇ#ꢈꢔꢆꢓꢋꢅ
4ꢅꢉ!ꢈꢗꢌꢃꢊ/ꢆꢅ
4ꢅꢉ!ꢈ=ꢃ!#ꢌ
4ꢀ
ꢀ
ꢀꢁꢐꢐꢈꢚ".
ꢐꢞ
ꢐꢁꢐꢝ
ꢐꢁꢀꢝ
M
M
M
;ꢞ
ꢊ
8
ꢐꢁꢑꢐ
ꢐꢁꢛꢐ
ꢜꢔꢊꢃꢉꢝ
ꢀꢁ 1ꢃꢆꢈꢀꢈ,ꢃ $ꢉꢋꢈꢃꢆ!ꢅ&ꢈ%ꢅꢉ#$ꢍꢅꢈꢄꢉꢘꢈ,ꢉꢍꢘ0ꢈ8$#ꢈꢄ$ #ꢈ8ꢅꢈꢋꢇꢊꢉ#ꢅ!ꢈ-ꢃ#ꢌꢃꢆꢈ#ꢌꢅꢈꢌꢉ#ꢊꢌꢅ!ꢈꢉꢍꢅꢉꢁ
ꢑꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀ(ꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ
ꢛꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ
)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ
ꢚ".+ ꢚꢅ%ꢅꢍꢅꢆꢊꢅꢈꢂꢃꢄꢅꢆ ꢃꢇꢆ0ꢈ$ $ꢉꢋꢋꢘꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ0ꢈ%ꢇꢍꢈꢃꢆ%ꢇꢍꢄꢉ#ꢃꢇꢆꢈꢎ$ꢍꢎꢇ ꢅ ꢈꢇꢆꢋꢘꢁ
ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐ;ꢒ)
© 2010 Microchip Technology Inc.
DS22229B-page 31
MCP6401/1R/1U/2/4
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
DS22229B-page 32
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
APPENDIX A: REVISION HISTORY
Revision B (June 2010)
The following is the list of modifications:
1. Added the MCP6402 and MCP6404 package
information.
2. Updated the ESD protection value on all pins in
Section 1.1 “Absolute Maximum Ratings †”.
3. Added Figure 2-33.
4. Updated Table 3-1.
5. Updated Section 4.1.2 “Input Voltage Limits”.
6. Added Section 4.1.3 “Input Current Limits”.
7. Added Section 4.5 “Unused Op Amps”.
8. Updated Section 5.5 “Analog Demonstration
and Evaluation Boards”.
9. Updated the package markings information and
drawings.
10. Updated the Product Identification System
page.
Revision A (December 2009)
• Original Release of this Document.
© 2010 Microchip Technology Inc.
DS22229B-page 33
MCP6401/1R/1U/2/4
NOTES:
DS22229B-page 34
© 2010 Microchip Technology Inc.
MCP6401/1R/1U/2/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
Device
-X
/XX
a)
b)
c)
d)
MCP6401T-E/LT:
Tape and Reel,
5LD SC70 pkg
Tape and Reel,
5LD SOT-23 pkg
Temperature
Range
Package
MCP6401T-E/OT:
MCP6401RT-E/OT: Tape and Reel,
5LD SOT-23 pkg
Device:
MCP6401T:
Single Op Amp (Tape and Reel)
(SC70, SOT-23)
MCP6401RT: Single Op Amp (Tape and Reel)
MCP6401UT-E/OT: Tape and Reel,
5LD SOT-23 pkg
(SOT-23)
MCP6401UT: Single Op Amp (Tape and Reel)
(SOT-23)
MCP6402:
MCP6402T:
e)
f)
MCP6402-E/SN:
MCP6402T-E/SN:
8LD SOIC pkg
Tape and Reel,
8LD SOIC pkg
Dual Op Amp
Dual Op Amp (Tape and Reel)
(SOIC, 2x3 TDFN)
MCP6404:
MCP6404T:
Quad Op Amp
Quad Op Amp (Tape and Reel)
(SOIC, TSSOP)
g)
MCP6402T-E/MNY: Tape and Reel,
8LD 2x3 TDFN pkg
h)
i)
MCP6404-E/SL:
MCP6404T-E/SL:
14LD SOIC pkg
Tape and Reel,
14LD SOIC pkg
14LD TSSOP pkg
Tape and Reel,
14LD TSSOP pkg.
Temperature Range:
Package:
E
= -40°C to +125°C
j)
MCP6404-E/ST:
MCP6404T-E/ST:
LT
= Plastic Package (SC70), 5-lead
k)
OT = Plastic Small Outline Transistor (SOT-23), 5-lead
SN = Plastic SOIC, (3.90 mm body), 8-lead
MNY* = Plastic Dual Flat, No Lead, (2x3 TDFN), 8-lead
SL
ST
= Plastic SOIC (3.90 mm body), 14-lead
= Plastic TSSOP (4.4mm body), 14-lead
* Y
= Nickel palladium gold manufacturing designator.
Only available on the TDFN package.
© 2010 Microchip Technology Inc.
DS22229B-page 35
MCP6401/1R/1U/2/4
NOTES:
DS22229B-page 36
© 2010 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, dsPIC,
KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,
rfPIC and UNI/O are registered trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,
MXDEV, MXLAB, SEEVAL and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial
Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified
logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code
Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,
32
PICtail, PIC logo, REAL ICE, rfLAB, Select Mode, Total
Endurance, TSHARC, UniWinDriver, WiperLock and ZENA
are trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2010, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
ISBN: 978-1-60932-338-7
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2010 Microchip Technology Inc.
DS22229B-page 37
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4123
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
Boston
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Korea - Seoul
China - Chongqing
Tel: 86-23-8980-9588
Fax: 86-23-8980-9500
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
Cleveland
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
Detroit
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Hsin Chu
Tel: 886-3-6578-300
Fax: 886-3-6578-370
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Santa Clara
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
01/05/10
DS22229B-page 38
© 2010 Microchip Technology Inc.
相关型号:
MCP6401UT-H/OT
OP-AMP, 4500 uV OFFSET-MAX, 1 MHz BAND WIDTH, PDSO5, PLASTIC, SOT-23, 5 PIN
MICROCHIP
©2020 ICPDF网 联系我们和版权申明