MCP6022T-E/SNVAO [MICROCHIP]
Operational Amplifier, 2 Func, 2500uV Offset-Max, CMOS, PDSO8;
| 型号： | MCP6022T-E/SNVAO |
| 厂家： | 
MICROCHIP |
| 描述： | Operational Amplifier, 2 Func, 2500uV Offset-Max, CMOS, PDSO8 运算放大器 |
| 文件： | 总28页 (文件大小：603K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MCP6021/2/3/4
M
Rail-to-Rail Input/Output, 10 MHz Op Amps
Features
Description
• Rail-to-Rail Input/Output
The MCP6021, MCP6022, MCP6023 and MCP6024
from Microchip Technology Inc. are rail-to-rail input and
output op amps with high performance. Key
specifications include: wide bandwidth (10 MHz), low
noise (8.7 nV/√Hz), low input offset voltage and low
distortion (0.00053% THD+N). These features make
these op amps well suited for applications requiring
high performance and bandwidth. The MCP6023 also
offers a chip select pin (CS) that gives power savings
when the part is not in use.
The single MCP6021, single MCP6023 and dual
MCP6022 are available in standard 8-lead PDIP, SOIC
and TSSOP. The quad MCP6024 is offered in 14-lead
PDIP, SOIC and TSSOP packages.
• Wide Bandwidth: 10 MHz (typ.)
• Low Noise: 8.7 nV/√Hz, at 10 kHz (typ.)
• Low Offset Voltage:
- Industrial Temperature: ±500 µV (max.)
- Extended Temperature: ±250 µV (max.)
• Mid-Supply V
: MCP6021 and MCP6023
REF
• Low Supply Current: 1 mA (typ.)
• Total Harmonic Distortion: 0.00053% (typ., G = 1)
• Unity Gain Stable
• Power Supply Range: 2.5V to 5.5V
• Temperature Range:
- Industrial: -40°C to +85°C
- Extended: -40°C to +125°C
The MCP6021/2/3/4 family is available in the Industrial
and Extended temperature ranges. It has a power
supply range of 2.5V to 5.5V.
Typical Applications
• Automotive
• Driving A/D Converters
• Multi-Pole Active Filters
• Barcode Scanners
• Audio Processing
• Communications
• DAC Buffer
• Test Equipment
• Medical Instrumentation
Available Tools
• SPICE Macro Model (at www.microchip.com)
®
• FilterLab software (at www.microchip.com)
PACKAGE TYPES
MCP6023
MCP6024
MCP6021
MCP6022
PDIP SOIC, TSSOP
PDIP SOIC, TSSOP
PDIP SOIC, TSSOP
PDIP SOIC, TSSOP
NC
V
V
V
V
V
V
V
V
V
V
1
2
3
4
5
6
7
14
13
12
11
10
9
CS
V
1
2
3
4
8
7
6
5
OUTA
OUTD
V
V
V
NC
V
V
NC
1
2
3
4
1
2
3
4
8
7
6
5
8
7
6
5
OUTA
DD
V –
–
+
–
IN
INA
IND
–
+
V
V
V
DD
V –
INA
DD
OUTB
IN
V +
+
V
V
IN
INA
IND
V
V
–
+
V +
OUT
REF
INA
OUT
REF
INB
IN
V
V
SS
DD
SS
V
V
SS
INB
SS
V
V
+
+
INB
INC
–
–
INB
INC
V
8
OUTB
OUTC
2003 Microchip Technology Inc.
DS21685B-page 1
MCP6021/2/3/4
Pin Function Table
1.0
ELECTRICAL
CHARACTERISTICS
Name
Function
VIN+, VINA+, VINB+, VINC+, VIND
+
Non-inverting Inputs
Inverting Inputs
Absolute Maximum Ratings †
VIN–, VINA–, VINB–, VINC–, VIND
–
VDD - VSS .........................................................................7.0V
All Inputs and Outputs..................... VSS - 0.3V to VDD + 0.3V
VDD
VSS
CS
Positive Power Supply
Negative Power Supply
Chip Select
Difference Input Voltage ....................................... |VDD - VSS
|
Output Short Circuit Current ..................................continuous
Current at Input Pins ....................................................±2 mA
Current at Output and Supply Pins ............................±30 mA
Storage Temperature ....................................-65°C to +150°C
Junction Temperature..................................................+150°C
ESD Protection on all pins (HBM/MM) ................ ≥ 2 kV / 200V
VREF
Reference Voltage
Outputs
VOUT, VOUTA, VOUTB, VOUTC
VOUTD
,
NC
No Internal Connection
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device. This is
a stress rating only and functional operation of the device at
those or any other conditions above those indicated in the
operational listings of this specification is not implied. Expo-
sure to maximum rating conditions for extended periods may
affect device reliability.
DC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, T = +25°C, V = +2.5V to +5.5V, V = GND,
A
DD
SS
V
= V /2, V
≈ V /2 and R = 10 kΩ to V /2.
DD L DD
CM
DD
OUT
Parameters
Sym
Min
Typ
Max
Units
Conditions
Input Offset
Input Offset Voltage:
Industrial Temperature Parts
Extended Temperature Parts
Extended Temperature Parts
VOS
VOS
VOS
-500
-250
-2.5
—
—
—
+500
+250
+2.5
µV
µV
mV
VCM = 0V
VCM = 0V, VDD = 5.0V
VCM = 0V, VDD = 5.0V
TA = -40°C to +125°C
Input Offset Voltage Temperature Drift ∆VOS/∆TA
—
74
±3.5
90
—
—
µV/°C TA = -40°C to +125°C
Power Supply Rejection Ratio
Input Current and Impedance
Input Bias Current
Industrial Temperature Parts
Extended Temperature Parts
Input Offset Current
PSRR
dB
VCM = 0V
IB
IB
IB
IOS
ZCM
ZDIFF
—
—
—
—
—
—
1
30
640
—
150
5,000
—
—
—
pA
pA
TA = +85°C
pA
TA = +125°C
±1
pA
Ω||pF
Ω||pF
Common-Mode Input Impedance
Differential Input Impedance
Common-Mode
1013||6
1013||3
Common-Mode Input Range
Common-Mode Rejection Ratio
VCMR
CMRR
CMRR
CMRR
VSS-0.3
74
70
—
90
85
90
VDD+0.3
V
—
—
—
dB
dB
dB
VDD = 5V, VCM = -0.3V to 5.3V
VDD = 5V, VCM = 3.0V to 5.3V
VDD = 5V, VCM = -0.3V to 3.0V
74
Voltage Reference (MCP6021 and MCP6023 only)
VREF Accuracy (VREF - VDD/2)
VREF Temperature Drift
∆VREF
∆VREF/∆T
A
-50
—
—
±100
+50
—
mV
µV/°C TA = -40°C to +125°C
Open Loop Gain
DC Open Loop Gain (Large Signal)
AOL
90
110
—
dB
VCM = 0V,
V
OUT = VSS+0.3V to VDD-0.3V
DS21685B-page 2
2003 Microchip Technology Inc.
MCP6021/2/3/4
DC CHARACTERISTICS (CONTINUED)
Electrical Specifications: Unless otherwise indicated, T = +25°C, V = +2.5V to +5.5V, V = GND,
A
DD
SS
V
= V /2, V
≈ V /2 and R = 10 kΩ to V /2.
DD L DD
CM
DD
OUT
Parameters
Sym
Min
Typ
Max
Units
Conditions
0.5V output overdrive
Output
Maximum Output Voltage Swing
Output Short Circuit Current
Power Supply
VOL, VOH
ISC
VSS+15
—
—
VDD-20
—
mV
mA
±30
Supply Voltage
Quiescent Current per Amplifier
VS
IQ
2.5
0.5
—
1.0
5.5
1.35
V
mA
IO = 0
AC CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, TA = 25°C, VDD = +2.5V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
RL = 10 kΩ to VDD/2 and CL = 60 pF.
Parameters
AC Response
Sym
Min
Typ
Max
Units
Conditions
Gain Bandwidth Product
Phase Margin at Unity-Gain
Settling Time, 0.2%
Slew Rate
GBWP
PM
tSETTLE
SR
—
—
—
—
10
65
250
7.0
—
—
—
—
MHz
°
ns
G = 1
G = 1, VOUT = 100 mVp-p
V/µs
Total Harmonic Distortion Plus Noise
f = 1 kHz, G = 1
f = 1 kHz, G = 1, RL = 600Ω@1 KHz THD+N
f = 1 kHz, G = +1 V/V
f = 1 kHz, G = +10 V/V
f = 1 kHz, G = +100 V/V
Noise
THD+N
—
—
—
—
—
0.00053
0.00064
0.0014
0.0009
0.005
—
—
—
—
—
%
%
%
%
%
VOUT = 0.25V + 3.25V, BW = 22 kHz
VOUT = 0.25V + 3.25V, BW = 22 kHz
VOUT = 4VP-P, VDD = 5.0V, BW = 22 kHz
VOUT = 4VP-P, VDD = 5.0V, BW = 22 kHz
VOUT = 4VP-P, VDD = 5.0V, BW = 22 kHz
THD+N
THD+N
THD+N
Input Voltage Noise
Input Voltage Noise Density
Input Current Noise Density
Eni
eni
ini
—
—
—
2.9
8.7
3
—
—
—
µVp-p f = 0.1 Hz to 10 Hz
nV/√Hz f = 10 kHz
fA/√Hz f = 1 kHz
MCP6023 CHIP SELECT (CS) CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, TA = 25°C, VDD = +2.5V to +5.5V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
RL = 10 kΩ to VDD/2 and CL = 60 pF.
Parameters
Sym
Min
Typ
Max
Units
Conditions
DC Characteristics
CS Logic Threshold, Low
CS Input Current, Low
CS Logic Threshold, High
CS Input Current, High
CS Input High, GND Current
Amplifier Output Leakage
Timing
CS Low to Amplifier Output
Turn-on Time
CS High to Amplifier Output
High-Z Turn-off Time
Hysteresis
VIL
ICSL
VIH
ICSH
ISS
0
-1.0
0.8VDD
—
—
0.2VDD
—
V
0.01
—
µA
V
CS = VSS
VDD
2.0
0.01
0.05
0.01
µA
µA
µA
CS = VDD
CS = VDD
CS = VDD
—
2.0
—
—
—
tON
tOFF
—
—
—
2
10
—
—
µs
µs
V
G = 1, VIN = VSS
CS = 0.2VDD to VOUT = 0.45VDD time
,
0.01
0.6
G = 1, VIN = VSS,
CS = 0.8VDD to VOUT = 0.05VDD time
Internal Switch
VHYST
2003 Microchip Technology Inc.
DS21685B-page 3
MCP6021/2/3/4
TEMPERATURE CHARACTERISTICS
Electrical Specifications: Unless otherwise indicated, VDD = +2.5V to +5.5V and VSS = GND.
Parameters
Temperature Ranges
Symbol
Min
Typ
Max
Units
Conditions
Industrial Temperature Range
Extended Temperature Range
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistances
Thermal Resistance, 8L-PDIP
Thermal Resistance, 8L-SOIC
Thermal Resistance, 8L-TSSOP
Thermal Resistance, 14L-PDIP
Thermal Resistance, 14L-SOIC
Thermal Resistance, 14L-TSSOP
TA
TA
TA
TA
-40
-40
-40
-65
—
—
—
—
+85
°C
°C
°C
°C
+125
+125
+150
Note 1
θJA
θJA
θJA
θJA
θJA
θJA
—
—
—
—
—
—
85
163
124
70
120
100
—
—
—
—
—
—
°C/W
°C/W
°C/W
°C/W
°C/W
°C/W
Note 1: The industrial temperature devices operate over this extended temperature range, but with reduced
performance. In any case, the internal junction temperature (T ) must not exceed the absolute maximum
J
specification of 150°C.
CS
t
t
ON
OFF
Amplifier On
Hi-Z
Hi-Z
V
OUT
50 nA (typ.)
50 nA (typ.)
10 nA (typ.)
1 mA (typ.)
10 nA (typ.)
I
SS
I
CS
10 nA (typ.)
FIGURE 1-1:
Timing diagram for the CS
pin on the MCP6023.
DS21685B-page 4
2003 Microchip Technology Inc.
MCP6021/2/3/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated, T = +25°C, V = +2.5V to +5.5V, V = GND, V
= V /2, R = 10 kΩ to V /2,
DD L DD
A
DD
SS
CM
V
≈ V /2 and C = 60 pF.
DD L
OUT
12%
16%
14%
12%
10%
8%
6%
4%
2%
0%
1192 Samples
TA = -40°C to +85°C
I-Temp
Parts
1192 Samples
TA = +25°C
11%
10%
9%
8%
7%
6%
5%
4%
3%
2%
1%
0%
I-Temp
Parts
Input Offset Voltage (µV)
Input Offset Voltage Drift (µV/°C)
FIGURE 2-1:
Input Offset Voltage,
FIGURE 2-4:
Input Offset Voltage Drift,
(Industrial Temperature Parts).
(Industrial Temperature Parts).
26%
24%
438 Samples
VCM = 0V
A = -40°C to +125°C
E-Temp
Parts
24%
22%
20%
18%
16%
14%
12%
10%
8%
438 Samples
VDD = 5.0V
22%
20%
18%
16%
14%
12%
10%
8%
E-Temp
Parts
T
V
CM = 0V
T
A = +25°C
6%
6%
4%
4%
2%
2%
0%
0%
Input Offset Voltage (µV)
Input Offset Voltage Drift (µV/°C)
FIGURE 2-2:
Input Offset Voltage,
FIGURE 2-5:
Input Offset Voltage Drift,
(Extended Temperature Parts).
(Extended Temperature Parts).
500
500
VDD = 5.5V
-40°C
+25°C
+85°C
+125°C
VDD = 2.5V
400
400
-40°C
+25°C
+85°C
+125°C
300
200
100
0
300
200
100
0
-100
-200
-300
-400
-500
-100
-200
-300
-400
-500
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
Common Mode Input Voltage (V)
Common Mode Input Voltage (V)
FIGURE 2-3:
Input Offset Voltage vs.
FIGURE 2-6:
Input Offset Voltage vs.
Common Mode Input Voltage with V = 2.5V.
Common Mode Input Voltage with V = 5.5V.
DD
DD
2003 Microchip Technology Inc.
DS21685B-page 5
MCP6021/2/3/4
Note: Unless otherwise indicated, T = +25°C, V = +2.5V to +5.5V, V = GND, V
= V /2, R = 10 kΩ to V /2,
DD L DD
A
DD
SS
CM
V
≈ V /2 and C = 60 pF.
DD L
OUT
200
150
100
50
100
VCM = VDD/2
50
0
VDD = 5.5V
VDD = 2.5V
-50
0
-100
-150
-200
-250
-300
-50
-100
-150
-200
VDD = 5.0V
VCM = 0V
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Output Voltage (V)
-50
-25
0
25
50
75
100 125
Ambient Temperature (°C)
FIGURE 2-7:
Input Offset Voltage vs.
FIGURE 2-10:
Input Offset Voltage vs.
Temperature.
Output Voltage.
16
1,000
100
10
f = 1 kHz
VDD = 5.0V
14
12
10
8
6
4
2
0
1.E-01
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
1
0.1
1
10
100
1k
10k 100k 1M
Frequency (Hz)
Common Mode Input Voltage (V)
FIGURE 2-8:
Input Noise Voltage Density
FIGURE 2-11:
Input Noise Voltage Density
vs. Frequency.
vs. Common Mode Input Voltage.
100
90
80
70
60
50
40
30
110
105
PSRR+
PSRR-
CMRR
100
95
90
PSRR (VCM = 0V)
85
CMRR
80
75
70
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
20
100
1k
10k
100k
1M
-50
-25
0
25
50
75
100
125
Frequency (Hz)
Ambient Temperature (°C)
FIGURE 2-9:
Common Mode, Power
FIGURE 2-12:
Common Mode, Power
Supply Rejection Ratios vs. Frequency.
Supply Rejection Ratios vs. Temperature.
DS21685B-page 6
2003 Microchip Technology Inc.
MCP6021/2/3/4
Note: Unless otherwise indicated, T = +25°C, V = +2.5V to +5.5V, V = GND, V
= V /2, R = 10 kΩ to V /2,
DD L DD
A
DD
SS
CM
V
≈ V /2 and C = 60 pF.
OUT
DD
10,000
1,000
100
L
10,000
1,000
100
10
IB, TA = +125°C
VDD = 5.5V
VCM = VDD
VDD = 5.5V
IOS, TA = +125°C
IB, TA = +85°C
IB
IOS
10
IOS, TA = +85°C
1
1
25 35 45 55 65 75 85 95 105 115 125
Ambient Temperature (°C)
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Common Mode Input Voltage (V)
FIGURE 2-13:
Input Bias, Offset Currents
FIGURE 2-16:
Input Bias, Offset Currents
vs. Common Mode Input Voltage.
vs. Temperature.
1.2
1.1
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
1.2
1.1
VDD = 5.5V
1.0
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
VDD = 2.5V
+125°C
+85°C
+25°C
-40°C
VCM = VDD - 0.5V
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
-50
-25
0
25
50
75
100 125
Ambient Temperature (°C)
FIGURE 2-14:
Quiescent Current vs.
FIGURE 2-17:
Quiescent Current vs.
Supply Voltage.
Temperature.
120
110
100
90
80
70
60
50
40
30
20
10
0
0
35
30
25
20
15
10
5
-15
-30
-45
-60
-75
-90
-105
-120
-135
-150
-165
-180
-195
-210
Phase
+125°C
+85°C
+25°C
-40°C
Gain
-10
-20
0
1.E+00
1.E+01
1.E+02
1.E+03
1.E+04
1.E+05
1.E+06
1.E+07
1.E+08
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Supply Voltage (V)
1
10 100 1k 10k 100k 1M 10M100M
Frequency (Hz)
FIGURE 2-15:
vs. Supply Voltage.
Output Short-Circuit Current
FIGURE 2-18:
Open-Loop Gain, Phase vs.
Frequency.
2003 Microchip Technology Inc.
DS21685B-page 7
MCP6021/2/3/4
Note: Unless otherwise indicated, T = +25°C, V = +2.5V to +5.5V, V = GND, V
= V /2, R = 10 kΩ to V /2,
DD L DD
A
DD
SS
CM
V
≈ V /2 and C = 60 pF.
DD L
OUT
130
120
110
100
90
120
VDD = 5.5V
115
110
105
100
95
VDD = 5.5V
VDD = 2.5V
VDD = 2.5V
90
1.E+02
1E+03
1.E+04
1E+05
80
-50
-25
0
25
50
75
100
125
100
1k
10k
100k
Load Resistance (:)
Ambient Temperature (°C)
FIGURE 2-19:
DC Open-Loop Gain vs.
FIGURE 2-22:
DC Open-Loop Gain vs.
Load Resistance.
Temperature.
14
105
90
120
VCM = VDD/2
Gain Bandwidth Product
12
10
8
110
100
90
VDD = 5.5V
75
60
Phase Margin, G = +1
45
6
VDD = 2.5V
4
30
15
0
80
2
VDD = 5.0V
70
0
0.00
0.05
0.10
0.15
0.20
0.25
0.30
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Common Mode Input Voltage (V)
Output Voltage Headroom (V);
VDD - VOH or VOL - VSS
FIGURE 2-20:
Small Signal DC Open-Loop
FIGURE 2-23:
Gain Bandwidth Product,
Gain vs. Output Voltage Headroom.
Phase Margin vs. Common Mode Input Voltage.
10
9
100
90
80
70
60
50
40
30
20
10
0
14
12
10
8
105
90
75
60
45
30
15
0
Gain Bandwidth Product
8
7
6
Phase Margin, G = +1
5
4
3
2
1
0
GBWP, VDD = 5.5V
GBWP, VDD = 2.5V
6
PM,
PM,
V
DD = 2.5V
4
VDD = 5.5V
VDD = 5.0V
VCM = VDD/2
2
0
-50 -25
0
25
50
75 100 125
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Output Voltage (V)
Ambient Temperature (°C)
FIGURE 2-21:
Gain Bandwidth Product,
FIGURE 2-24:
Gain Bandwidth Product,
Phase Margin vs. Temperature.
Phase Margin vs. Output Voltage.
DS21685B-page 8
2003 Microchip Technology Inc.
MCP6021/2/3/4
Note: Unless otherwise indicated, T = +25°C, V = +2.5V to +5.5V, V = GND, V
= V /2, R = 10 kΩ to V /2,
DD L DD
A
DD
SS
CM
V
≈ V /2 and C = 60 pF.
DD L
OUT
11
10
9
10
Falling, VDD = 5.5V
Rising, VDD = 5.5V
VDD = 5.5V
VDD = 2.5V
8
7
6
1
5
Falling, VDD = 2.5V
Rising, VDD = 2.5V
4
3
2
1
0
1.E+04
1.E+05
1.E+06
1.E+07
0.1
-50
-25
0
25
50
75
100
125
10k
100k
1M
10M
Frequency (Hz)
Ambient Temperature (°C)
FIGURE 2-25:
Slew Rate vs. Temperature.
FIGURE 2-28:
Maximum Output Voltage
Swing vs. Frequency.
0.1000%
0.1000%
f = 1 kHz
BWMeas = 22 kHz
VDD = 5.0V
G = +100 V/V
G = +10 V/V
G = +1 V/V
0.0100%
0.0010%
0.0001%
0.0100% G = +100 V/V
G = +10 V/V
0.0010%
0.0001%
f = 20 kHz
BWMeas = 80 kHz
VDD = 5.0V
G = +1 V/V
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Output Voltage (VP-P
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
Output Voltage (VP-P
)
)
FIGURE 2-26:
Total Harmonic Distortion
FIGURE 2-29:
Total Harmonic Distortion
plus Noise vs. Output Voltage with f = 1 kHz.
plus Noise vs. Output Voltage with f = 20 kHz.
135
130
125
120
115
6
VIN
VDD = 5V
5
4
G = +1 V/V
VOUT
3
2
1
110
0
G = +1 V/V
1.E+03
1.E+04
1.E+05
1.E+06
105
0.0E+00
1.0E-05
2.0E-05
3.0E-05
4.0E-05
5.0E-05
6.0E-05
7.0E-05
8.0E-05
9.0E-05
1.0E-04
1k
10k
100k
1M
-1
Time (10 µs/div)
Frequency (Hz)
FIGURE 2-27:
The MCP6021/2/3/4 family
FIGURE 2-30:
Channel-to-Channel
shows no phase reversal under overdrive.
Separation vs. Frequency (MCP6022 and
MCP6024 only).
2003 Microchip Technology Inc.
DS21685B-page 9
MCP6021/2/3/4
Note: Unless otherwise indicated, T = +25°C, V = +2.5V to +5.5V, V = GND, V
= V /2, R = 10 kΩ to V /2,
DD L DD
A
DD
SS
CM
V
≈ V /2 and C = 60 pF.
OUT
DD
L
1,000
10
VOL - VSS
9
8
7
6
5
4
3
2
1
0
100
10
1
VDD - VOH
VOL - VSS
VDD - VOH
0.01
0.1
1
10
-50
-25
0
25
50
75
100 125
Output Current Magnitude (mA)
Ambient Temperature (°C)
FIGURE 2-31:
Output Voltage Headroom
FIGURE 2-34:
Output Voltage Headroom
vs. Output Current.
vs. Temperature.
6.E-02
5.E-02
4.E-02
3.E-02
2.E-02
1.E-02
0.E+00
-1.E-02
-2.E-02
-3.E-02
-4.E-02
-5.E-02
-6.E-02
6.E-02
5.E-02
4.E-02
3.E-02
2.E-02
1.E-02
0.E+00
-1.E-02
-2.E-02
-3.E-02
-4.E-02
-5.E-02
-6.E-02
G = +1 V/V
G = -1 V/V
RF = 1 k:
0.E+00
2.E-07
4.E-07
6.E-07
8.E-07
1.E-06
1.E-06
1.E-06
2.E-06
2.E-06
2.E-06
0.E+00
2.E-07
4.E-07
6.E-07
8.E-07
1.E-06
1.E-06
1.E-06
2.E-06
2.E-06
2.E-06
Time (200 ns/div)
Time (200 ns/div)
FIGURE 2-32:
Small-Signal Non-inverting
FIGURE 2-35:
Small-Signal Inverting Pulse
Pulse Response.
Response.
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
G = -1 V/V
G = +1 V/V
RF = 1 k:
0.E+00
5.E-07
1.E-06
2.E-06
2.E-06
3.E-06
3.E-06
4.E-06
4.E-06
5.E-06
5.E-06
0.E+00
5.E-07
1.E-06
2.E-06
2.E-06
3.E-06
3.E-06
4.E-06
4.E-06
5.E-06
5.E-06
0.0
0.0
Time (500 ns/div)
Time (500 ns/div)
FIGURE 2-33:
Large-Signal Non-inverting
FIGURE 2-36:
Large-Signal Inverting Pulse
Pulse Response.
Response.
DS21685B-page 10
2003 Microchip Technology Inc.
MCP6021/2/3/4
Note: Unless otherwise indicated, T = +25°C, V = +2.5V to +5.5V, V = GND, V
= V /2, R = 10 kΩ to V /2,
DD L DD
A
DD
SS
CM
V
≈ V /2 and C = 60 pF.
OUT
DD
L
50
40
50
Representative Part
40
30
30
20
20
VDD = 5.5V
VDD = 2.5V
10
10
0
0
-10
-20
-30
-40
-50
-10
-20
-30
-40
-50
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Power Supply Voltage (V)
-50
-25
0
25
50
75
100 125
Ambient Temperature (°C)
FIGURE 2-37:
V
Accuracy vs. Supply
FIGURE 2-40:
V
Accuracy vs.
REF
REF
Voltage (MCP6021 and MCP6023 only).
Temperature (MCP6021 and MCP6023 only).
1.6
1.6
Op Amp
turns on here
Op Amp
shuts off here
Op Amp
turns on here
Op Amp
shuts off here
1.4
1.2
1.0
0.8
0.6
0.4
1.4
1.2
1.0
0.8
0.6
0.4
Hysteresis
CS swept
high to low
CS swept
high to low
Hysteresis
CS swept
low to high
VDD = 5.5V
G = +1 V/V
VDD = 2.5V
G = +1 V/V
CS swept
low to high
0.2 VIN = 2.75V
0.2 VIN = 1.25V
0.0
0.0
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
Chip Select Voltage (V)
0.0
0.5
1.0
1.5
2.0
2.5
Chip Select Voltage (V)
FIGURE 2-38:
Chip Select (CS) Hysteresis
FIGURE 2-41:
Chip Select (CS) Hysteresis
(MCP6023 only) with V = 2.5V.
(MCP6023 only) with V = 5.5V.
DD
DD
5.5
5.0
VDD = 5.0V
G = +1 V/V
VIN = VSS
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
CS Voltage
VOUT
Output
on
Output
on
Output High-Z
0.0E+00
5.0E-06
1.0E-05
1.5E-05
2.0E-05
2.5E-05
3.0E-05
3.5E-05
Time (5 µs/div)
FIGURE 2-39:
Chip Select (CS) to
Amplifier Output Response Time (MCP6023
only).
2003 Microchip Technology Inc.
DS21685B-page 11
MCP6021/2/3/4
3.3
MCP6023 Chip Select (CS)
3.0
APPLICATIONS INFORMATION
The MCP6023 is a single amplifier with chip select
The MCP6021/2/3/4 family of operational amplifiers
are fabricated on Microchip’s state-of-the-art CMOS
process. They are unity-gain stable and suitable for a
wide range of general-purpose applications.
(CS). When CS is high, the supply current is less than
10 nA (typ) and travels from the CS pin to V , with the
SS
amplifier output being put into a high-impedance state.
When CS is low, the amplifier is enabled. If CS is left
floating, the amplifier will not operate properly.
Figure 1-1 and Figure 2-39 show the output voltage
and supply current response to a CS pulse.
3.1
Rail-to-Rail Input
The MCP6021/2/3/4 amplifier family is designed to not
exhibit phase inversion when the input pins exceed the
supply voltages. Figure 2-27 shows an input voltage
exceeding both supplies with no resulting phase
inversion.
3.4
MCP6021 and MCP6023 Reference
Voltage
The single op amps (MCP6021 and MCP6023) have
The input stage of the MCP6021/2/3/4 family of devices
uses two differential input stages in parallel; one
an internal mid-supply reference voltage connected to
the V
pin (see Figure 3-2). The MCP6021 has CS
REF
operates at low common-mode input voltage (V ),
CM
internally tied to V , which always keeps the op amp
SS
while the other operates at high V . With this topology,
CM
on and always provides a mid-supply reference. With
the MCP6023, taking the CS pin high conserves power
the device operates with V
up to 0.3V past either
+ 0.3V) at 25°C. The
DD
CM
supply rail (V - 0.3V to V
SS
by shutting down both the op amp and the V
REF
amplifier input behaves linearly as long as V
is kept
CM
circuitry. Taking the CS pin low turns on the op amp and
circuitry.
within the specified V
limits. The input offset voltage
CMR
CM
V
REF
is measured at both V
= V - 0.3V and V + 0.3V
SS DD
to ensure proper operation.
Input voltages that exceed the input voltage range
V
DD
(V
) can cause excessive current to flow in or out of
CMR
the input pins. Current beyond ±2 mA introduces
possible reliability problems. Thus, applications that
exceed this rating must externally limit the input current
50 kΩ
50 kΩ
V
REF
with an input resistor (R ), as shown in Figure 3-1.
IN
CS
MCP602X
V
OUT
R
IN
V
SS
V
IN
(CS tied internally to V for MCP6021)
SS
FIGURE 3-2:
Simplified internal V
REF
(Maximum expected V ) - V
IN
DD
R
R
≥
circuit (MCP6021 and MCP6023 only).
IN
IN
2 mA
See Figure 3-3 for a non-inverting gain circuit using the
internal mid-supply reference. The DC-blocking
V
- (Minimum expected V )
SS
IN
≥
2 mA
limits the current flow
capacitor (C ) also reduces noise by coupling the op
B
amp input to the source.
FIGURE 3-1:
into an input pin.
R
IN
R
R
F
G
3.2 Rail-to-Rail Output
The Maximum Output Voltage Swing is the maximum
V
swing possible under
a particular output load.
OUT
C
According to the specification table, the output can
reach within 20 mV of either supply rail when
V
B
REF
V
IN
R = 10 kΩ. See Figure 2-31 and Figure 2-34 for more
L
information concerning typical performance.
FIGURE 3-3:
using V
Non-inverting gain circuit
(MCP6021 and MCP6023 only).
REF
DS21685B-page 12
2003 Microchip Technology Inc.
MCP6021/2/3/4
To use the internal mid-supply reference for an
inverting gain circuit, connect the V pin to the non-
1,000
100
10
REF
GN t +1
inverting input, as shown in Figure 3-4. The capacitor
C helps reduce power supply noise on the output.
B
R
R
G
F
V
V
OUT
IN
V
REF
10
100
1,000
10,000
Normalized Capacitance; CL/GN (pF)
C
B
FIGURE 3-6:
Recommended R
values
ISO
for capacitive loads.
After selecting R
for your circuit, double-check the
FIGURE 3-4:
Inverting gain circuit using
ISO
resulting frequency response peaking and step
response overshoot. Evaluation on the bench and
simulations with the MCP6021/2/3/4 Spice macro
V
(MCP6021 and MCP6023 only).
REF
If you don’t need the mid-supply reference, leave the
pin open.
V
REF
model are very helpful. Modify R ’s value until the
response is reasonable.
ISO
3.5
Capacitive Loads
3.6
Supply Bypass
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases, and the closed loop bandwidth is
reduced. This produces gain-peaking in the frequency
response, with overshoot and ringing in the step
response.
When driving large capacitive loads with these op
amps (e.g., > 60 pF when G = +1), a small series
resistor at the output (R
With this family of operational amplifiers, the power
supply pin (V for single supply) should have a local
DD
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good, high-frequency performance. It also needs a
bulk capacitor (i.e., 1 µF or larger) within 100 mm to
provide large, slow currents. This bulk capacitor can be
shared with other parts.
in Figure 3-5) improves the
ISO
3.7
PCB Surface Leakage
feedback loop’s phase margin (stability) by making the
load resistive at higher frequencies. The bandwidth will
be generally lower than the bandwidth with no
capacitive load.
In applications where low input bias current is critical,
PCB (printed circuit board) surface-leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
12
V
between nearby traces is 10 Ω. A 5V difference would
IN
R
ISO
cause 5 pA of current to flow, which is greater than the
MCP6021/2/3/4 family’s bias current at 25°C (1 pA,
typ).
V
MCP602X
OUT
C
L
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in Figure 3-7.
FIGURE 3-5:
Output resistor R
ISO
stabilizes large capacitive loads.
Figure 3-6 gives recommended
R
values for
Guard Ring
V – V +
IN IN
ISO
different capacitive laods and gains. The x-axis is the
normalized load capacitance (C /G ), where G is the
L
N
N
circuit’s noise gain. For non-inverting gains, G and the
N
gain are equal. For inverting gains, G is 1+|Gain| (e.g.,
N
-1 V/V gives G = +2 V/V).
N
FIGURE 3-7:
Example guard ring layout.
2003 Microchip Technology Inc.
DS21685B-page 13
MCP6021/2/3/4
1. Inverting (Figure 3-7) and Transimpedance
Gain Amplifiers (convert current to voltage, such
as photo detectors).
3.9
Typical Applications
3.9.1
A/D CONVERTER DRIVER AND
ANTI-ALIASING FILTER
a. Connect the guard ring to the non-inverting
input pin (V +). This biases the guard ring
Figure 3-8 shows a third-order Butterworth filter that
can be used as an A/D converter driver. It has a band-
width of 20 kHz and a reasonable step response. It will
work well for conversion rates of 80 ksps and greater (it
has 29 dB attenuation at 60 kHz).
IN
to the same reference voltage as the op
amp’s input (e.g., V /2 or ground).
DD
b. Connect the inverting pin (V –) to the input
IN
with a wire that does not touch the PCB
surface.
2. Non-inverting Gain and Unity-Gain Buffer
1.0 nF
a. Connect the guard ring to the inverting input
MCP602X
14.7 kΩ 33.2 kΩ
8.45 kΩ
pin (V –); this biases the guard ring to the
IN
common mode input voltage.
100 pF
1.2 nF
b. Connect the non-inverting pin (V +) to the
IN
input with a wire that does not touch the
PCB surface.
FIGURE 3-8:
A/D converter driver and
anti-aliasing filter with a 20 kHz cutoff frequency.
3.8
High-Speed PCB Layout
This filter can easily be adjusted to another bandwidth
by multiplying all capacitors by the same factor.
Alternatively, the resistors can all be scaled by another
common factor to adjust the bandwidth.
Due to their speed capabilities, a little extra care in the
PCB (Printed Circuit Board) layout can make a
significant difference in the performance of these op
amps. Good PC board layout techniques will help you
achieve the performance shown in the Electrical
Characteristics and Typical Performance Curves, while
also helping you minimize EMC (Electro-Magnetic
Compatibility) issues.
Use a solid ground plane and connect the bypass local
capacitor(s) to this plane with minimal length traces.
This cuts down inductive and capacitive crosstalk.
Separate digital from analog, low-speed from high-
speed and low power from high power. This will reduce
interference.
Keep sensitive traces short and straight. Separating
them from interfering components and traces. This is
especially important for high-frequency (low rise-time)
signals.
Sometimes it helps to place guard traces next to victim
traces. They should be on both sides of the victim
trace, and as close as possible. Connect the guard
trace to ground plane at both ends, and in the middle
for long traces.
3.9.2
OPTICAL DETECTOR AMPLIFIER
Figure 3-9 shows the MCP6021 op amp used as a
transimpedance amplifier in a photo detector circuit.
The photo detector looks like a capacitive current
source, so the 100 kΩ resistor gains the input signal to
a reasonable level. The 5.6 pF capacitor stabilizes this
circuit and produces a flat frequency response with a
bandwidth of 370 kHz.
5.6 pF
Photo
Detector
100 kΩ
100 pF
MCP6021
V
/2
DD
Use coax cables (or low inductance wiring) to route
signal and power to and from the PCB.
FIGURE 3-9:
Transimpedance amplifier
for an optical detector.
DS21685B-page 14
2003 Microchip Technology Inc.
MCP6021/2/3/4
4.0
DESIGN TOOLS
Microchip provides the basic design tools needed for
the MCP6021/2/3/4 family of op amps.
4.1
SPICE Macro Model
The latest SPICE macro model for the MCP6021/2/3/4
op amps is available on our web site
(www.microchip.com). This model is intended as an
initial design tool that works well in the op amp’s linear
region of operation at room temperature. See the
model file for information on its capabilities.
Bench testing is a very important part of any design and
cannot be replaced with simulations. Also, simulation
results using this macro model need to be validated by
comparing them to the data sheet specs and plots.
®
4.2
FilterLab Software
®
The FilterLab software is an innovative tool that
simplifies analog active filter (using op amps) design.
Available at no cost from our web site (at www.micro-
chip.com), the FilterLab software active filter design
tool provides full schematic diagrams of the filter circuit
with component values. It also outputs the filter circuit
in SPICE format, which can be used with the Macro
Model to simulate actual filter performance.
2003 Microchip Technology Inc.
DS21685B-page 15
MCP6021/2/3/4
5.0
PACKAGING INFORMATION
Package Marking Information
8-Lead PDIP (300 mil)
5.1
Example:
MCP6021
XXXXXXXX
XXXXXNNN
I/P256
0331
YYWW
8-Lead SOIC (150 mil)
Example:
XXXXXXXX
XXXXYYWW
MCP6021
I/SN0331
NNN
256
Example:
8-Lead TSSOP
6021
E331
256
XXXX
YWW
NNN
Legend: XX...X Customer specific information*
Y
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
YY
WW
NNN
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line thus limiting the number of available characters
for customer specific information.
*
Standard device marking consists of Microchip part number, year code, week code, and traceability
code.
DS21685B-page 16
2003 Microchip Technology Inc.
MCP6021/2/3/4
Package Marking Information (Continued)
14-Lead PDIP (300 mil) (MCP6024)
Example:
XXXXXXXXXXXXXX
XXXXXXXXXXXXXX
MCP6024-I/P
XXXXXXXXXXXXXX
YYWWNNN
0331256
14-Lead SOIC (150 mil) (MCP6024)
Example:
MCP6024ISL
XXXXXXXXXX
XXXXXXXXXX
XXXXXXXXXX
YYWWNNN
0331256
Example:
14-Lead TSSOP (MCP6024)
XXXXXX
YYWW
6024E
0331
NNN
256
2003 Microchip Technology Inc.
DS21685B-page 17
MCP6021/2/3/4
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
B
p
eB
Units
Dimension Limits
INCHES*
NOM
MILLIMETERS
MIN
MAX
MIN
NOM
8
MAX
n
p
A
A2
A1
E
E1
D
L
c
B1
B
Number of Pins
Pitch
Top to Seating Plane
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
8
.100
.155
.130
2.54
3.94
3.30
.140
.170
.145
3.56
2.92
4.32
3.68
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
0.38
7.62
6.10
9.14
3.18
0.20
1.14
0.36
7.87
5
.313
.250
.373
.130
.012
.058
.018
.370
10
.325
.260
.385
.135
.015
.070
.022
.430
15
7.94
6.35
9.46
3.30
0.29
1.46
0.46
9.40
10
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
§
eB
α
β
5
10
15
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
DS21685B-page 18
2003 Microchip Technology Inc.
MCP6021/2/3/4
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
h
α
45°
c
A2
A
φ
β
L
A1
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
MAX
n
p
A
A2
A1
E
E1
D
Number of Pins
Pitch
Overall Height
8
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
1.27
1.55
1.42
0.18
6.02
3.91
4.90
0.38
0.62
4
.053
.069
1.35
1.75
Molded Package Thickness
Standoff
.052
.004
.228
.146
.189
.010
.019
0
.061
.010
.244
.157
.197
.020
.030
8
1.32
0.10
5.79
3.71
4.80
0.25
0.48
0
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
§
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
h
L
φ
c
Lead Thickness
Lead Width
.008
.013
0
.009
.017
12
.010
.020
15
0.20
0.33
0
0.23
0.42
12
0.25
0.51
15
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
12
15
0
12
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
2003 Microchip Technology Inc.
DS21685B-page 19
MCP6021/2/3/4
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
α
A
c
A1
A2
φ
β
L
Units
INCHES
NOM
MILLIMETERS*
Dimension Limits
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
Overall Height
8
.026
0.65
A
.043
1.10
0.95
0.15
6.50
4.50
3.10
0.70
8
Molded Package Thickness
Standoff
A2
A1
E
E1
D
.033
.035
.004
.251
.173
.118
.024
4
.006
.010
5
.037
.006
.256
.177
.122
.028
8
.008
.012
10
0.85
0.05
6.25
4.30
2.90
0.50
0
0.09
0.19
0
0.90
0.10
6.38
4.40
3.00
0.60
4
0.15
0.25
5
§
.002
.246
.169
.114
.020
0
Overall Width
Molded Package Width
Molded Package Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
L
φ
c
.004
.007
0
0.20
0.30
10
B
α
β
0
5
10
0
5
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
DS21685B-page 20
2003 Microchip Technology Inc.
MCP6021/2/3/4
14-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
B1
β
eB
p
B
Units
Dimension Limits
INCHES*
NOM
MILLIMETERS
MIN
MAX
MIN
NOM
MAX
n
p
A
A2
A1
E
E1
D
L
c
B1
B
Number of Pins
Pitch
Top to Seating Plane
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
14
14
.100
.155
.130
2.54
3.94
3.30
.140
.170
.145
3.56
4.32
3.68
.115
.015
.300
.240
.740
.125
.008
.045
.014
.310
5
2.92
0.38
7.62
6.10
18.80
3.18
0.20
1.14
0.36
7.87
5
.313
.250
.750
.130
.012
.058
.018
.370
10
.325
.260
.760
.135
.015
.070
.022
.430
15
7.94
6.35
19.05
3.30
0.29
1.46
0.46
9.40
10
8.26
6.60
19.30
3.43
0.38
1.78
0.56
10.92
15
Tip to Seating Plane
Lead Thickness
Upper Lead Width
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
§
eB
α
β
5
10
15
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-005
2003 Microchip Technology Inc.
DS21685B-page 21
MCP6021/2/3/4
14-Lead Plastic Small Outline (SL) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
α
h
45°
c
A2
A
φ
A1
L
β
Units
Dimension Limits
INCHES*
NOM
MILLIMETERS
MIN
MAX
MIN
NOM
14
MAX
n
p
A
A2
A1
E
E1
D
Number of Pins
Pitch
Overall Height
14
.050
.061
.056
.007
.236
.154
.342
.015
.033
4
1.27
.053
.069
1.35
1.32
1.55
1.42
0.18
5.99
3.90
8.69
0.38
0.84
4
1.75
Molded Package Thickness
.052
.004
.228
.150
.337
.010
.016
0
.061
.010
.244
.157
.347
.020
.050
8
1.55
0.25
6.20
3.99
8.81
0.51
1.27
8
Standoff
§
0.10
5.79
3.81
8.56
0.25
0.41
0
Overall Width
Molded Package Width
Overall Length
Chamfer Distance
Foot Length
Foot Angle
Lead Thickness
Lead Width
h
L
φ
c
.008
.014
0
.009
.017
12
.010
.020
15
0.20
0.36
0
0.23
0.42
12
0.25
0.51
15
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
* Controlling Parameter
§ Significant Characteristic
0
12
15
0
12
15
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-065
DS21685B-page 22
2003 Microchip Technology Inc.
MCP6021/2/3/4
14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
α
A
c
φ
A1
A2
β
L
Units
INCHES
NOM
MILLIMETERS*
Dimension Limits
MIN
MAX
MIN
NOM
14
MAX
n
p
Number of Pins
Pitch
Overall Height
14
.026
0.65
A
.043
1.10
0.95
0.15
6.50
4.50
5.10
0.70
8
Molded Package Thickness
A2
A1
E
E1
D
.033
.002
.246
.169
.193
.020
0
.004
.007
0
.035
.004
.251
.173
.197
.024
4
.006
.010
5
.037
.006
.256
.177
.201
.028
8
.008
.012
10
0.85
0.05
6.25
4.30
4.90
0.50
0
0.09
0.19
0
0.90
0.10
6.38
4.40
5.00
0.60
4
0.15
0.25
5
Standoff
§
Overall Width
Molded Package Width
Molded Package Length
Foot Length
Foot Angle
Lead Thickness
Lead Width
Mold Draft Angle Top
Mold Draft Angle Bottom
L
φ
c
B
α
0.20
0.30
10
β
0
5
10
0
5
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-087
2003 Microchip Technology Inc.
DS21685B-page 23
MCP6021/2/3/4
NOTES:
DS21685B-page 24
2003 Microchip Technology Inc.
MCP6021/2/3/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Examples:
PART NO.
X
/XX
a)
b)
c)
MCP6021-I/P:
Industrial temperature,
PDIP package.
Device
Temperature
Range
Package
MCP6021-E/P:
Extended temperature,
PDIP package.
MCP6021-E/SN: Extended temperature,
SOIC package.
Device:
MCP6021
CMOS Single Op Amp
MCP6021T CMOS Single Op Amp
a)
b)
c)
MCP6022-I/P:
MCP6022-E/P:
Industrial temperature,
PDIP package.
Extended temperature,
PDIP package.
(Tape and Reel for SOIC, TSSOP)
CMOS Dual Op Amp
MCP6022T CMOS Dual Op Amp
(Tape and Reel for SOIC and TSSOP)
MCP6022
MCP6022T-E/ST: Tape and Reel,
MCP6023
CMOS Single Op Amp w/ CS Function
Extended temperature,
MCP6023T CMOS Single Op Amp w/ CS Function
(Tape and Reel for SOIC and TSSOP)
TSSOP package.
MCP6024
CMOS Quad Op Amp
a)
b)
c)
MCP6023-I/P:
MCP6023-E/P:
Industrial temperature,
PDIP package.
Extended temperature,
PDIP package.
MCP6024T CMOS Quad Op Amp
(Tape and Reel for SOIC and TSSOP)
MCP6023-E/SN: Extended temperature,
SOIC package.
Temperature Range:
I
=
=
-40°C to +85°C
E
-40×C to +125×C
a)
b)
c)
MCP6024-I/SL: Industrial temperature,
SOIC package.
Package:
P
=
=
=
=
Plastic DIP (300 mil Body), 8-lead, 14-lead
Plastic SOIC (150mil Body), 8-lead
Plastic SOIC (150 mil Body), 14-lead
Plastic TSSOP, 8-lead, 14-lead
MCP6024-E/SL: Extended temperature,
SOIC package.
SN
SL
ST
MCP6024T-E/ST: Tape and Reel,
Extended temperature,
TSSOP package.
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
2003 Microchip Technology Inc.
DS21685B-page 25
MCP6021/2/3/4
NOTES:
DS21685B-page 26
2003 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical com-
ponents in life support systems is not authorized except with
express written approval by Microchip. No licenses are con-
veyed, implicitly or otherwise, under any intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE and PowerSmart are registered trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
AmpLab, FilterLab, microID, MXDEV, MXLAB, PICMASTER,
SEEVAL and The Embedded Control Solutions Company are
registered trademarks of Microchip Technology Incorporated
in the U.S.A.
Application Maestro, dsPICDEM, dsPICDEM.net, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, microPort,
Migratable Memory, MPASM, MPLIB, MPLINK, MPSIM,
PICkit, PICDEM, PICDEM.net, PowerCal, PowerInfo,
PowerMate, PowerTool, rfLAB, rfPIC, Select Mode,
SmartSensor, SmartShunt, SmartTel and Total Endurance are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
Serialized Quick Turn Programming (SQTP) is a service mark
of Microchip Technology Incorporated in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2003, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received QS-9000 quality system
certification for its worldwide headquarters,
design and wafer fabrication facilities in
Chandler and Tempe, Arizona in July 1999
and Mountain View, California in March 2002.
The Company’s quality system processes and
procedures are QS-9000 compliant for its
®
PICmicro 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals,
non-volatile memory and analog products. In
addition, Microchip’s quality system for the
design and manufacture of development
systems is ISO 9001 certified.
2003 Microchip Technology Inc.
DS21685B-page 27
M
WORLDWIDE SALES AND SERVICE
Korea
AMERICAS
ASIA/PACIFIC
168-1, Youngbo Bldg. 3 Floor
Samsung-Dong, Kangnam-Ku
Seoul, Korea 135-882
Corporate Office
Australia
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Suite 22, 41 Rawson Street
Epping 2121, NSW
Australia
Tel: 82-2-554-7200 Fax: 82-2-558-5932 or
82-2-558-5934
Fax: 480-792-7277
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
Singapore
Technical Support: 480-792-7627
Web Address: http://www.microchip.com
200 Middle Road
China - Beijing
#07-02 Prime Centre
Singapore, 188980
Unit 915
Atlanta
Bei Hai Wan Tai Bldg.
No. 6 Chaoyangmen Beidajie
Beijing, 100027, No. China
Tel: 86-10-85282100
Fax: 86-10-85282104
3780 Mansell Road, Suite 130
Alpharetta, GA 30022
Tel: 770-640-0034
Fax: 770-640-0307
Tel: 65-6334-8870 Fax: 65-6334-8850
Taiwan
Kaohsiung Branch
30F - 1 No. 8
Boston
Min Chuan 2nd Road
Kaohsiung 806, Taiwan
Tel: 886-7-536-4818
Fax: 886-7-536-4803
China - Chengdu
2 Lan Drive, Suite 120
Westford, MA 01886
Tel: 978-692-3848
Fax: 978-692-3821
Rm. 2401-2402, 24th Floor,
Ming Xing Financial Tower
No. 88 TIDU Street
Taiwan
Chengdu 610016, China
Tel: 86-28-86766200
Taiwan Branch
Chicago
11F-3, No. 207
333 Pierce Road, Suite 180
Itasca, IL 60143
Fax: 86-28-86766599
Tung Hua North Road
Taipei, 105, Taiwan
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139
China - Fuzhou
Tel: 630-285-0071
Fax: 630-285-0075
Unit 28F, World Trade Plaza
No. 71 Wusi Road
Dallas
Fuzhou 350001, China
Tel: 86-591-7503506
Fax: 86-591-7503521
EUROPE
Austria
4570 Westgrove Drive, Suite 160
Addison, TX 75001
Tel: 972-818-7423
Fax: 972-818-2924
Durisolstrasse 2
China - Hong Kong SAR
A-4600 Wels
Unit 901-6, Tower 2, Metroplaza
223 Hing Fong Road
Austria
Detroit
Tel: 43-7242-2244-399
Fax: 43-7242-2244-393
Denmark
Kwai Fong, N.T., Hong Kong
Tel: 852-2401-1200
Tri-Atria Office Building
32255 Northwestern Highway, Suite 190
Farmington Hills, MI 48334
Tel: 248-538-2250
Fax: 852-2401-3431
Regus Business Centre
Lautrup hoj 1-3
China - Shanghai
Fax: 248-538-2260
Room 701, Bldg. B
Ballerup DK-2750 Denmark
Tel: 45-4420-9895 Fax: 45-4420-9910
Far East International Plaza
No. 317 Xian Xia Road
Shanghai, 200051
Kokomo
France
2767 S. Albright Road
Kokomo, IN 46902
Tel: 765-864-8360
Fax: 765-864-8387
Parc d’Activite du Moulin de Massy
43 Rue du Saule Trapu
Batiment A - ler Etage
91300 Massy, France
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Tel: 86-21-6275-5700
Fax: 86-21-6275-5060
China - Shenzhen
Los Angeles
Rm. 1812, 18/F, Building A, United Plaza
No. 5022 Binhe Road, Futian District
Shenzhen 518033, China
Tel: 86-755-82901380
18201 Von Karman, Suite 1090
Irvine, CA 92612
Germany
Tel: 949-263-1888
Steinheilstrasse 10
D-85737 Ismaning, Germany
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Fax: 949-263-1338
Fax: 86-755-8295-1393
Phoenix
China - Shunde
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7966
Fax: 480-792-4338
Room 401, Hongjian Building
No. 2 Fengxiangnan Road, Ronggui Town
Shunde City, Guangdong 528303, China
Tel: 86-765-8395507 Fax: 86-765-8395571
Italy
Via Quasimodo, 12
20025 Legnano (MI)
Milan, Italy
China - Qingdao
San Jose
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands
2107 North First Street, Suite 590
San Jose, CA 95131
Tel: 408-436-7950
Rm. B505A, Fullhope Plaza,
No. 12 Hong Kong Central Rd.
Qingdao 266071, China
Fax: 408-436-7955
Tel: 86-532-5027355 Fax: 86-532-5027205
P. A. De Biesbosch 14
NL-5152 SC Drunen, Netherlands
Tel: 31-416-690399
India
Toronto
Divyasree Chambers
1 Floor, Wing A (A3/A4)
No. 11, O’Shaugnessey Road
Bangalore, 560 025, India
Tel: 91-80-2290061 Fax: 91-80-2290062
Japan
6285 Northam Drive, Suite 108
Mississauga, Ontario L4V 1X5, Canada
Tel: 905-673-0699
Fax: 31-416-690340
United Kingdom
505 Eskdale Road
Fax: 905-673-6509
Winnersh Triangle
Wokingham
Berkshire, England RG41 5TU
Tel: 44-118-921-5869
Fax: 44-118-921-5820
Benex S-1 6F
3-18-20, Shinyokohama
Kohoku-Ku, Yokohama-shi
Kanagawa, 222-0033, Japan
Tel: 81-45-471- 6166 Fax: 81-45-471-6122
07/28/03
DS21685B-page 28
2003 Microchip Technology Inc.
相关型号：
©2020 ICPDF网 联系我们和版权申明