MCP6002IST [MICROCHIP]

1 MHz Bandwidth Low Power Op Amp; 1 MHz带宽低功耗运算放大器
MCP6002IST
型号: MCP6002IST
厂家: MICROCHIP    MICROCHIP
描述:

1 MHz Bandwidth Low Power Op Amp
1 MHz带宽低功耗运算放大器

运算放大器
文件: 总24页 (文件大小:540K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MCP6001/2/4  
M
1 MHz Bandwidth Low Power Op Amp  
Features  
Description  
• Available in SC-70-5 and SOT-23-5 packages  
• 1 MHz Gain Bandwidth Product (typ.)  
• Rail-to-Rail Input/Output  
The Microchip Technology Inc. MCP6001/2/4 family of  
operational amplifiers (op amps) is specifically  
designed for general-purpose applications. This family  
has a 1 MHz gain bandwidth product and 90° phase  
margin (typ.). It also maintains 45° phase margin (typ.)  
with 500 pF capacitive load. This family operates from  
a single supply voltage as low as 1.8V, while drawing  
100 µA (typ.) quiescent current. Additionally, the  
MCP6001/2/4 supports rail-to-rail input and output  
swing, with a common mode input voltage range of  
• Supply Voltage: 1.8V to 5.5V  
• Supply Current: I = 100 µA (typ.)  
Q
• 90° Phase Margin (typ.)  
Temperature Range:  
- Industrial: -40°C to +85°C  
- Extended: -40°C to +125°C  
• Available in Single, Dual and Quad Packages  
V
+ 300 mV to V - 300 mV. This family of opera-  
SS  
DD  
tional amplifiers is designed with Microchip’s  
advanced CMOS process.  
Applications  
• Automotive  
• Portable Equipment  
• Photodiode Pre-amps  
• Analog Filters  
The MCP6001/2/4 family is available in the industrial  
and extended temperature ranges. It also has a power  
supply range of 1.8V to 5.5V.  
Package Types  
• Notebooks and PDAs  
• Battery-Powered Systems  
MCP6001  
SC-70-5, SOT-23-5  
MCP6002  
PDIP, SOIC, MSOP  
VDD  
VOUT  
VOUTA  
VDD  
5
8
7
6
5
1
2
3
1
2
3
4
Available Tools  
A
VSS  
VIN  
VINA  
+
-
VOUTB  
+
-
Spice Macro Models (at www.microchip.com)  
B
+
VIN–  
VINA  
4
+
-
VINB  
VINB  
+
®
FilterLab Software (at www.microchip.com)  
VSS  
MCP6001R  
Typical Application  
SOT-23-5  
MCP6004  
PDIP, SOIC, TSSOP  
VOUTA  
VSS  
VOUT  
VDD  
1
5
4
V
DD  
2
3
-
V
V
V
V
14  
13  
12  
11  
1
2
3
4
IN  
+
OUTD  
VIN+  
VIN–  
A
D
VINA  
+
V
+
- +  
-
IND  
MCP6001  
OUT  
MCP6001U  
VINA  
+
-
IND  
SOT-23-5  
VDD  
VSS  
V
SS  
VDD  
5
VIN+  
1
VINB  
+
VINC  
+
10  
9
5
6
7
+
VSS  
-
-
+
+
2
3
VINB  
VINC  
B
C
-
R
1
VIN  
VOUT  
4
VOUTB  
VOUTC  
8
R
2
R1  
-----  
Gain = 1 +  
R2  
V
REF  
Non-Inverting Amplifier  
2003 Microchip Technology Inc.  
DS21733D-page 1  
MCP6001/2/4  
1.0  
ELECTRICAL  
PIN FUNCTION TABLE  
CHARACTERISTICS  
Name  
Function  
V +, V +, V +, V +, Non-inverting Inputs  
IND  
IN  
INA  
INB  
INC  
Absolute Maximum Ratings †  
VDD - VSS .........................................................................7.0V  
All Inputs and Outputs ...................... VSS -0.3V to VDD +0.3V  
Difference Input Voltage ....................................... |VDD - VSS  
Output Short Circuit Current ..................................continuous  
Current at Input Pins ....................................................±2 mA  
Current at Output and Supply Pins ............................±30 mA  
Storage Temperature ....................................-65°C to +150°C  
Maximum Junction Temperature (TJ)..........................+150°C  
ESD Protection On All Pins (HBM;MM) ............... ≥ 4 kV; 200V  
V
+
V –, V –, V –, V –, Inverting Inputs  
IN  
IND  
INA  
INB  
INC  
V
V
V
|
Positive Power Supply  
Negative Power Supply  
Outputs  
DD  
SS  
V
V
, V  
OUTC  
, V  
OUTD  
,
OUTB  
OUT OUTA  
, V  
† Notice: Stresses above those listed under “Maximum Rat-  
ings” may cause permanent damage to the device. This is a  
stress rating only and functional operation of the device at  
those or any other conditions above those indicated in the  
operational listings of this specification is not implied. Expo-  
sure to maximum rating conditions for extended periods may  
affect device reliability.  
DC ELECTRICAL SPECIFICATIONS  
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +5.5V, VSS = GND, VCM = VDD/2, RL = 10 kΩ  
to VDD/2, and VOUT ~ VDD/2.  
Parameters  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
Input Offset  
Input Offset Voltage  
Input Offset Drift with Temperature  
VOS  
VOS/TA  
-7.0  
±2.0  
+7.0  
mV  
VCM = VSS  
µV/°C TA= -40°C to +125°C,  
CM = VSS  
V
Power Supply Rejection  
Input Bias Current and Impedance  
Input Bias Current:  
Industrial Temperature  
Extended Temperature  
Input Offset Current  
Common Mode Input Impedance  
Differential Input Impedance  
Common Mode  
PSRR  
86  
dB  
VCM = VSS  
IB  
IB  
IB  
IOS  
ZCM  
ZDIFF  
±1.0  
19  
1100  
±1.0  
1013||6  
1013||3  
pA  
pA  
pA  
pA  
||pF  
||pF  
TA = +85°C  
TA = +125°C  
Common Mode Input Range  
Common Mode Rejection Ratio  
Open-Loop Gain  
VCMR  
CMRR  
V
SS 0.3  
60  
76  
V
DD + 0.3  
V
dB  
VCM = -0.3V to 5.3V, VDD = 5V  
VOUT = 0.3V to VDD - 0.3V,  
DC Open-Loop Gain (large signal)  
AOL  
88  
112  
dB  
VCM = VSS  
Output  
Maximum Output Voltage Swing  
Output Short-Circuit Current  
VOL, VOH VSS + 25  
±6  
±23  
V
DD 25  
mV  
mA  
mA  
VDD = 5.5V  
VDD = 1.8V  
VDD = 5.5V  
ISC  
Power Supply  
Supply Voltage  
Quiescent Current per Amplifier  
VDD  
IQ  
1.8  
50  
100  
5.5  
170  
V
µA  
IO = 0, VDD = 5.5V, VCM = 5V  
DS21733D-page 2  
2003 Microchip Technology Inc.  
MCP6001/2/4  
AC ELECTRICAL SPECIFICATIONS  
Electrical Characteristics: Unless otherwise indicated, T = +25°C, V = +1.8 to 5.5V, V = GND, V  
= V /2,  
DD  
A
DD  
SS  
CM  
V
V /2, R = 10 kto V /2, and C = 60 pF.  
OUT  
DD  
L
DD  
L
Parameters  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
AC Response  
Gain Bandwidth Product  
Phase Margin  
Slew Rate  
GBWP  
PM  
SR  
1.0  
90  
0.6  
MHz  
°
V/µs  
G = +1  
Noise  
Input Noise Voltage  
Input Noise Voltage Density  
Input Noise Current Density  
E
e
6.1  
28  
0.6  
µVp-p f = 0.1 Hz to 10 Hz  
nV/Hz f = 1 kHz  
fA/Hz f = 1 kHz  
ni  
ni  
i
ni  
TEMPERATURE SPECIFICATIONS  
Electrical Characteristics: Unless otherwise indicated, V = +1.8V to +5.5V, and V = GND.  
DD  
SS  
Parameters  
Temperature Ranges  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
Industrial Temperature Range  
Extended Temperature Range  
Operating Temperature Range  
Storage Temperature Range  
T
-40  
-40  
-40  
-65  
+85  
°C  
°C  
°C  
°C  
A
T
+125  
+125  
+150  
A
T
(Note)  
A
T
A
Thermal Package Resistances  
Thermal Resistance, 5L-SC70  
Thermal Resistance, 5L-SOT-23  
Thermal Resistance, 8L-PDIP  
Thermal Resistance, 8L-SOIC (150 mil)  
Thermal Resistance, 8L-SOIC (208 mil)  
Thermal Resistance, 8L-MSOP  
Thermal Resistance, 14L-PDIP  
Thermal Resistance, 14L-SOIC  
Thermal Resistance, 14L-TSSOP  
θ
θ
θ
θ
θ
θ
θ
θ
θ
331  
256  
85  
163  
118  
206  
70  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
°C/W  
JA  
JA  
JA  
JA  
JA  
JA  
JA  
120  
100  
JA  
JA  
Note:  
The industrial temperature devices operate over this extended temperature range, but with reduced perfor-  
mance. In any case, the internal Junction Temperature (T ) must not exceed the Absolute Maximum  
J
specification of +150°C.  
2003 Microchip Technology Inc.  
DS21733D-page 3  
MCP6001/2/4  
2.0  
Note:  
TYPICAL PERFORMANCE CURVES  
The graphs and tables provided following this note are a statistical summary based on a limited number of  
samples and are provided for informational purposes only. The performance characteristics listed herein  
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified  
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.  
Note: Unless otherwise indicated, T = +25°C, V = +1.8V to +5.5V, V = GND, V  
= V /2, V  
V /2,  
OUT DD  
A
DD  
SS  
CM  
DD  
R = 10 kto V /2, and C = 60 pF.  
L
DD  
L
100  
90  
22%  
20%  
18%  
16%  
14%  
12%  
10%  
8%  
1225 Samples  
VCM = VSS  
PSRR (VCM = VSS  
)
80  
6%  
CMRR (VCM = -0.3V to +5.3V)  
4%  
2%  
0%  
70  
-50  
-25  
0
25  
50  
75  
100  
125  
Input Offset Voltage (mV)  
Ambient Temperature (°C)  
FIGURE 2-1:  
Input Offset Voltage  
FIGURE 2-4:  
CMRR, PSRR vs. Ambient  
Histogram.  
Temperature.  
100  
90  
80  
70  
60  
50  
40  
30  
120  
100  
80  
60  
40  
20  
0
0
VCM = VSS  
-30  
-60  
PSRR-  
PSRR+  
Phase  
-90  
-120  
CMRR  
-150  
Gain  
-180  
VCM = VSS  
20 1.E+0  
1
1.E+0  
2
1.E+03  
1.E+0  
4
1.E+05  
-20 1.E-0  
1
1.E+00  
1.E+0  
1
1.E+0  
2
1.E+03  
1.E+04  
1.E+05  
1.E+06  
1.E+07  
-210  
10  
100  
1k  
10k  
100k  
0.1  
1
10  
100  
1k 10k 100k 1M 10M  
Frequency (Hz)  
Frequency (Hz)  
FIGURE 2-2:  
PSRR, CMRR vs.  
FIGURE 2-5:  
Open-Loop Gain, Phase vs.  
Frequency.  
Frequency.  
14%  
55%  
1230 Samples  
605 Samples  
50%  
45%  
40%  
35%  
30%  
25%  
20%  
15%  
10%  
5%  
V
DD = 5.5 V  
V
DD = 5.5 V  
12%  
10%  
8%  
VCM = VDD  
TA = +85°C  
VCM = VDD  
TA = +125°C  
6%  
4%  
2%  
0%  
0%  
Input Bias Current (pA)  
Input Bias Current (pA)  
FIGURE 2-3:  
Input Bias Current at +85°C  
FIGURE 2-6:  
Input Bias Current at +125°C  
Histogram.  
Histogram.  
DS21733D-page 4  
2003 Microchip Technology Inc.  
MCP6001/2/4  
Note: Unless otherwise indicated, T = +25°C, V = +1.8V to +5.5V, V = GND, V  
= V /2, V  
V /2,  
OUT DD  
A
DD  
SS  
CM  
DD  
R = 10 kto V /2, and C = 60 pF.  
L
DD  
L
1,000  
18%  
1225 Samples  
VCM = VSS  
TA = -40°C to +125°C  
16%  
14%  
12%  
10%  
8%  
100  
6%  
4%  
2%  
Eni = 6.1 µVP-P  
,
f = 0.1 to 10 Hz  
0%  
10 1.E-01  
1.E+00  
1.E+01  
1.E+02  
1.E+03  
1.E+04  
1.E+05  
0.1  
1
10  
100  
1k  
10k  
100k  
Frequency (Hz)  
Input Offset Voltage Drift (µV/°C)  
FIGURE 2-7:  
Input Noise Voltage Density  
FIGURE 2-10:  
Input Offset Voltage Drift  
vs. Frequency.  
Histogram.  
0
200  
150  
100  
50  
VDD = 1.8V  
-100  
-200  
-300  
-400  
-500  
-600  
-700  
VDD = 5.5V  
0
VDD = 1.8V  
TA  
TA  
TA  
=
=
=
-40°C  
+25°C  
+85°C  
-50  
-100  
-150  
-200  
TA = +125°C  
VCM = VSS  
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5  
Output Voltage (V)  
Common Mode Input Voltage (V)  
FIGURE 2-8:  
Input Offset Voltage vs.  
FIGURE 2-11:  
Input Offset Voltage vs.  
Common Mode Input Voltage at V = 1.8V.  
Output Voltage.  
DD  
0
35  
30  
25  
20  
15  
VDD = 5.5V  
-100  
-200  
-300  
+ISC, VDD = 5.5V  
-ISC, VDD = 5.5V  
TA  
TA  
TA  
=
=
=
-40°C  
+25°C  
+85°C  
-400  
-500  
-600  
-700  
-ISC, VDD = 1.8V  
10  
5
TA = +125°C  
+ISC, VDD = 1.8V  
-25  
0
-0.5 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0  
-50  
0
25  
50  
75  
100  
125  
Common Mode Input Voltage (V)  
Ambient Temperature (°C)  
FIGURE 2-9:  
Input Offset Voltage vs.  
FIGURE 2-12:  
Output Short-Circuit Current  
Common Mode Input Voltage at V = 5.5V.  
vs. Ambient Temperature.  
DD  
2003 Microchip Technology Inc.  
DS21733D-page 5  
MCP6001/2/4  
Note: Unless otherwise indicated, T = +25°C, V = +1.8V to +5.5V, V = GND, V  
= V /2, V  
V /2,  
OUT DD  
A
DD  
SS  
CM  
DD  
R = 10 kto V /2, and C = 60 pF.  
L
DD  
L
0.08  
0.06  
0.04  
0.02  
0.00  
1.0  
0.9  
0.8  
0.7  
0.6  
0.5  
0.4  
0.3  
0.2  
0.1  
0.0  
G = +1 V/V  
Falling Edge, VDD = 5.5V  
Falling Edge, VDD = 1.8V  
Rising Edge, VDD = 5.5V  
Rising Edge, VDD = 1.8V  
-0.02  
-0.04  
-0.06  
-50  
-25  
0
25  
50  
75  
100  
125  
-0.08  
0.E+0  
0
1.E-06  
2.E-06  
3.E-06  
4.E-06  
5.E-06  
6.E-06  
7.E-06  
8.E-06  
9.E-06  
1.E-05  
Ambient Temperature (°C)  
Time (1 µs/div)  
FIGURE 2-13:  
Slew Rate vs. Ambient  
FIGURE 2-16:  
Small Signal Non-Inverting  
Temperature.  
Pulse Response.  
1,000  
100  
10  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
G = +1 V/V  
V
DD = 5.0V  
VDD - VOH  
VOL - VSS  
1
1.E-05  
1.E-0  
4
1.E-03  
1.E-02  
10µ  
100µ  
1m  
10m  
0.0 0.E+0  
0
1.E-05  
2.E-05  
3.E-05  
4.E-0  
5
5.E-0  
5
6.E-0  
5
7.E-05  
8.E-0  
5
9.E-05  
1.E-04  
Output Current Magnitude (A)  
Time (10 µs/div)  
FIGURE 2-14:  
Output Voltage Headroom  
FIGURE 2-17:  
Large Signal Non-Inverting  
vs. Output Current Magnitude.  
Pulse Response.  
160  
140  
120  
100  
80  
10  
TA = +125°C  
VDD = 5.5V  
TA = 85°C  
TA = 25°C  
TA = -40°C  
VDD = 1.8V  
1
60  
40  
20  
VCM = VDD - 0.5V  
0
0.1 1.E+0  
3
1.E+0  
4
1.E+0  
5
1.E+06  
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5  
Power Supply Voltage (V)  
1k  
10k  
100k  
1M  
Frequency (Hz)  
FIGURE 2-15:  
Output Voltage Swing vs.  
FIGURE 2-18:  
Quiescent Current vs.  
Frequency.  
Power Supply Voltage.  
DS21733D-page 6  
2003 Microchip Technology Inc.  
MCP6001/2/4  
3.0  
APPLICATION INFORMATION  
The MCP6001/2/4 family of op amps is manufactured  
using Microchip’s state-of-the-art CMOS process and  
is specifically designed for low cost, low power and  
general-purpose applications. The low supply voltage,  
low quiescent current and wide bandwidth makes the  
MCP6001/2/4 ideal for battery-powered applications.  
This device has high phase margin, which makes it  
stable for larger capacitive load applications.  
V
R
MCP600X  
+
OUT  
IN  
V
IN  
(Maximum expected VIN) VDD  
IN ------------------------------------------------------------------------------  
2 mA  
R
V
SS (Minimum expected VIN)  
3.1  
Rail-to-Rail Input  
R
IN ---------------------------------------------------------------------------  
2 mA  
The MCP6001/2/4 op amp is designed to prevent  
phase reversal when the input pins exceed the supply  
voltages. Figure 3-1 shows the input voltage exceeding  
the supply voltage without any phase reversal.  
FIGURE 3-2:  
Input Current Limiting  
Resistor (R ).  
IN  
3.2  
Rail-to-Rail Output  
6
The output voltage range of the MCP6001/2/4 op amp  
VIN  
VDD = 5.0V  
G = +2 V/V  
5
4
3
2
1
0
is V - 25 mV (min.) and V + 25 mV (max.) when  
DD  
SS  
DD  
VOUT  
R = 10 kis connected to V /2 and V = 5.5V.  
DD  
L
Refer to Figure 2-14 for more information.  
3.3  
Capacitive Loads  
Driving large capacitive loads can cause stability prob-  
lems for voltage feedback op amps. As the load capac-  
itance increases, the feedback loop’s phase margin  
decreases, and the closed loop bandwidth is reduced.  
This produces gain peaking in the frequency response,  
with overshoot and ringing in the step response. A unity  
gain buffer (G = +1) is the most sensitive to capacitive  
loads, but all gains show the same general behavior.  
-1 0.E+0  
0
1.E-05  
2.E-05  
3.E-0  
5
4.E-05  
5.E-05  
6.E-05  
7.E-05  
8.E-0  
5
9.E-05  
1.E-04  
Time (10 µs/div)  
FIGURE 3-1:  
No Phase Reversal.  
The MCP6001/2/4 Shows  
When driving large capacitive loads with these op  
amps (e.g., > 100 pF when G = +1), a small series  
The input stage of the MCP6001/2/4 op amp uses two  
differential input stages in parallel; one operates at low  
resistor at the output (R  
in Figure 3-3) improves the  
common mode input voltage (V ) and the other at  
ISO  
CM  
feedback loop’s phase margin (stability) by making the  
output load resistive at higher frequencies. It does not,  
however, improve the bandwidth.  
high V . With this topology, the device operates with  
CM  
V
up to 300 mV above V and 300 mV below V  
.
SS  
CM  
DD  
The Input Offset Voltage is measured at  
= V - 300 mV and V + 300 mV to ensure  
V
CM  
SS  
DD  
proper operation.  
Input voltages that exceed the input voltage range  
(V - 0.3V to V + 0.3V at 25°C) can cause exces-  
sive current to flow into or out of the input pins. Current  
beyond ±2 mA can cause reliability problems. Applica-  
tions that exceed this rating must be externally limited  
with a resistor, as shown in Figure 3-2.  
SS  
DD  
R
ISO  
V
MCP600X  
+
OUT  
V
IN  
C
L
FIGURE 3-3:  
Output resistor, R  
ISO  
stabilizes large capacitive loads.  
To select R , check the frequency response peaking  
ISO  
(or step response overshoot) on the bench (or with the  
MCP6001/2/4 Spice macro model). If the response is  
reasonable, you do not need R . Otherwise, start  
ISO  
R
at 1 kand modify its value until the response is  
ISO  
reasonable.  
2003 Microchip Technology Inc.  
DS21733D-page 7  
MCP6001/2/4  
3.4  
Supply Bypass  
3.6  
Application Circuits  
With this family of operation amplifiers, the power sup-  
3.6.1  
UNITY GAIN BUFFER  
ply pin (V for single supply) should have a local  
DD  
The rail-to-rail input and output capability of the  
MCP6001/2/4 op amp is ideal for unity-gain buffer  
applications. The low quiescent current and wide band-  
width makes the device suitable for a buffer configura-  
tion in an instrumentation amplifier circuit, as shown in  
Figure 3-5.  
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm  
for good high frequency performance. It also needs a  
bulk capacitor (i.e., 1 µF or larger) within 100 mm to  
provide large, slow currents. This bulk capacitor can be  
shared with other parts.  
3.5  
PCB Surface Leakage  
In applications where low input bias current is critical,  
PCB (printed circuit board) surface leakage effects  
need to be considered. Surface leakage is caused by  
humidity, dust or other contamination on the board.  
Under low humidity conditions, a typical resistance  
-
R1  
R2  
MCP6002  
+
1/2  
VIN1  
-
VOUT  
MCP6001  
12  
between nearby traces is 10 . A 5V difference would  
+
cause 5 pA, if current-to-flow; this is greater than the  
MCP6001/2/4 family’s bias current at 25°C (1 pA, typ).  
The easiest way to reduce surface leakage is to use a  
guard ring around sensitive pins (or traces). The guard  
ring is biased at the same voltage as the sensitive pin.  
An example of this type of layout is shown in  
Figure 3-4.  
-
R2  
MCP6002  
+
1/2  
VIN2  
R1 = 20 kΩ  
R2 = 10 kΩ  
R1  
VREF  
R1  
VOUT = (VIN2 VIN1) • ----- + VREF  
R2  
V -  
V +  
IN  
IN  
VSS  
FIGURE 3-5:  
Instrumentation Amplifier  
with Unity Gain Buffer Inputs.  
3.6.2  
ACTIVE LOW-PASS FILTER  
The MCP6001/2/4 op amp’s low input bias current  
makes it possible for the designer to use larger resis-  
tors and smaller capacitors for active low-pass filter  
applications. However, as the resistance increases, the  
noise generated also increases. Parasitic capacitances  
and the large value resistors could also modify the fre-  
quency response. These trade-offs need to be  
considered when selecting circuit elements.  
It is possible to have a filter cutoff frequency as high as  
1/10th of the op amp bandwidth (100 kHz). Figure 3-6  
shows a second-order butterworth filter with 100 kHz  
cutoff frequency and a gain of +1V/V.  
Guard Ring  
Example Guard Ring Layout  
FIGURE 3-4:  
for Inverting Gain.  
1. Non-inverting Gain and Unity Gain Buffer:  
a. Connect the non-inverting pin (V +) to the  
IN  
input with a wire that does not touch the pcb  
surface.  
b. Connect the guard ring to the inverting input  
pin (V –). This biases the guard ring to the  
IN  
The component values were selected using  
common mode input voltage.  
®
Microchip’s FilterLab software.  
2. Inverting and Transimpedance Gain Amplifiers  
(convert current to voltage, such as photo detec-  
tors):  
100 pF  
a. Connect the guard ring to the non-inverting  
14.3 k53.6 kΩ  
VIN  
input pin (V +). This biases the guard ring  
IN  
+
to the same reference voltage as the op  
MCP6002  
-
amp (e.g., V /2 or ground).  
DD  
VOUT  
33 pF  
b. Connect the inverting pin (V –) to the input  
IN  
with a wire that does not touch the PCB  
surface.  
FIGURE 3-6:  
Active Second-Order Low-  
Pass Filter.  
DS21733D-page 8  
2003 Microchip Technology Inc.  
MCP6001/2/4  
can be determined. For example, with op amp short-cir-  
3.6.3  
PEAK DETECTOR  
cuit current of I  
= 25 mA and load capacitor of  
SC  
The MCP6001/2/4 op amp has a high input impedance,  
rail-to-rail input and output and low input bias current,  
which makes this device suitable for a peak detector  
applications. Figure 3-7 shows a peak detector circuit  
with clear and sample switches. The peak-detection  
cycle uses a clock (CLK), as shown in Figure 3-7.  
C = 0.1 µF, then:  
1
EQUATION  
dVC1  
ISC = C1 × ------------  
dt  
At the rising edge of CLK, Sample Switch closes to  
dVC1  
dt  
ISC  
-------  
C1  
------------  
=
=
=
begin sampling. The peak voltage stored on C is sam-  
1
pled to C for a sample time defined by t  
. At the  
SAMP  
2
25mA  
--------------  
end of the sample time (falling edge of Sample Signal),  
0.1µF  
Clear Signal goes high and closes the Clear Switch.  
dVC1  
------------  
dt  
250mV  
When the Clear Switch closes, C discharges through  
1
-----------------  
µs  
R for a time defined by t  
. At the end of the clear  
CLEAR  
1
time (falling edge of Clear Signal), op amp A begins to  
This voltage change rate is less than the MCP6001/2/4  
slew rate of 600 mV/µs. When the input voltage swings  
store the peak value of V on C for a time defined by  
IN  
1
t
.
DETECT  
below the voltage across C , D becomes reverse-  
1
1
In order to define the t  
and t  
, it is necessary  
SAMP  
CLEAR  
biased, which opens the feedback loop and rails the  
amplifier. When the input voltage increases, the ampli-  
fier recovers at its slew rate. Based on the rate of volt-  
age change shown in the above equation, it takes an  
extended period of time to charge a 0.1 µF capacitor.  
The capacitors need to be selected so that the circuit is  
not limited by the amplifier slew rate. Therefore, the  
capacitors should be less than 40 µF and a stabilizing  
to determine the capacitor charging and discharging  
period. The capacitor charging time is limited by the  
amplifier source current, while the discharging time (τ)  
is defined using R (τ = R *C ). t  
is the time that  
1
1
1
DETECT  
the input signal is sampled on C , and is dependent on  
1
the input voltage change frequency.  
The op amp output current limit, and the size of the  
resistor (R ) needs to be properly selected. Refer to  
storage capacitors (both C and C ), could create slew-  
ISO  
1
2
Section 3.3, “Capacitive Load and Stability”, for op amp  
stability.  
ing limitations as the input voltage (V ) increases. Cur-  
IN  
rent through a capacitor is dependent on the size of the  
capacitor and the rate of voltage change. From this  
relationship, the rate of voltage change or the slew rate  
V
IN  
D
+
1
R
ISO  
V
C1  
R
V
+
MCP6002  
ISO  
C2  
1/2  
V
+
MCP6002  
OUT  
C
1
R
1
A
– 1/2  
MCP6001  
B
C
2
C
Sample  
Switch  
Clear  
Switch  
tSAMP  
Sample Signal  
tCLEAR  
Clear Signal  
CLK  
tDETECT  
FIGURE 3-7:  
Peak Detector with Clear and Sample CMOS Analog Switches.  
2003 Microchip Technology Inc.  
DS21733D-page 9  
MCP6001/2/4  
4.0  
DESIGN TOOLS  
Microchip provides the basic design tools needed for  
the MCP6001/2/4 family of op amps.  
4.1  
SPICE Macro Model  
The latest Spice macro model for the MCP6001/2/4  
operational amplifiers (op amps) is available on our  
website at www.microchip.com. This model is intended  
as an initial design tool that works well in the op amp’s  
linear region of operation at room temperature. See the  
model file for information on its capabilities.  
Bench testing is a very important part of any design and  
cannot be replaced with simulations. Also, simulation  
results using this macro model need to be validated by  
comparing them to the data sheet specifications and  
characteristic curves.  
®
4.2  
FilterLab Software  
FilterLab is an innovative software tool that simplifies  
analog active filter (using op amps) design. Available at  
no cost from our website at www.microchip.com, the  
FilterLab software active filter software design tool pro-  
vides full schematic diagrams of the filter circuit with  
component values. It also outputs the filter circuit in  
SPICE format, which can be used with the macro  
model to simulate actual filter performance.  
DS21733D-page 10  
2003 Microchip Technology Inc.  
MCP6001/2/4  
5.0  
5.1  
PACKAGING INFORMATION  
Package Marking Information  
5-Lead SC-70 (MCP6001)  
Example:  
XNN  
YWW  
A57  
307  
Example:(MCP6001 I-Temp Pinout)  
5-Lead SOT-23 (MCP6001)  
5
4
5
4
Industrial  
Extended  
Device  
Temp Code Temp Code  
MCP6001  
MCP6001R  
MCP6001U  
Note:  
AANN  
ADNN  
AFNN  
CDNN  
CENN  
CFNN  
AA07  
XXNN  
1
2
3
1
2
3
Applies to 5-Lead SOT-23.  
8-Lead PDIP (300 mil)  
Example:  
XXXXXXXX  
XXXXXNNN  
MCP6002  
I/P057  
0307  
YYWW  
8-Lead SOIC (150 mil)  
Example:  
XXXXXXXX  
XXXXYYWW  
MCP6002  
I/SN0307  
NNN  
057  
Example:  
8-Lead MSOP  
XXXXXX  
YWWNNN  
6002  
307057  
Legend: XX...X Customer specific information*  
YY  
WW  
NNN  
Year code (last 2 digits of calendar year)  
Week code (week of January 1 is week ‘01’)  
Alphanumeric traceability code  
Note: In the event the full Microchip part number cannot be marked on one line, it will  
be carried over to the next line thus limiting the number of available characters  
for customer specific information.  
*
Standard marking consists of Microchip part number, year code, week code, traceability code (facility  
code, mask rev#, and assembly code). For marking beyond this, certain price adders apply. Please  
check with your Microchip Sales Office.  
2003 Microchip Technology Inc.  
DS21733D-page 11  
MCP6001/2/4  
Package Marking Information (Continued)  
14-Lead PDIP (300 mil) (MCP6004)  
Example:  
XXXXXXXXXXXXXX  
XXXXXXXXXXXXXX  
MCP6004-I/P  
0307057  
YYWWNNN  
14-Lead SOIC (150 mil) (MCP6004)  
Example:  
XXXXXXXXXX  
XXXXXXXXXX  
MCP6004ISL  
0307057  
YYWWNNN  
Example:  
14-Lead TSSOP (MCP6004)  
XXXXXX  
YYWW  
6004ST  
0307  
NNN  
057  
DS21733D-page 12  
2003 Microchip Technology Inc.  
MCP6001/2/4  
5-Lead Plastic Package (SC-70)  
E
E1  
D
p
B
n
1
Q1  
A2  
A
c
A1  
L
Units  
INCHES  
NOM  
5
MILLIMETERS*  
Dimension Limits  
MIN  
MAX  
MIN  
NOM  
5
MAX  
n
p
Number of Pins  
Pitch  
.026 (BSC)  
0.65 (BSC)  
Overall Height  
A
.031  
.031  
.000  
.071  
.045  
.071  
.004  
.004  
.004  
.006  
.043  
0.80  
1.10  
Molded Package Thickness  
Standoff  
A2  
A1  
E
.039  
.004  
.094  
.053  
.087  
.012  
.016  
.007  
.012  
0.80  
0.00  
1.80  
1.15  
1.80  
0.10  
0.10  
0.10  
0.15  
1.00  
0.10  
2.40  
1.35  
2.20  
0.30  
0.40  
0.18  
0.30  
Overall Width  
Molded Package Width  
Overall Length  
E1  
D
Foot Length  
L
Q1  
c
Top of Molded Pkg to Lead Shoulder  
Lead Thickness  
Lead Width  
B
*Controlling Parameter  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not  
exceed .005" (0.127mm) per side.  
JEITA (EIAJ) Standard: SC-70  
Drawing No. C04-061  
2003 Microchip Technology Inc.  
DS21733D-page 13  
MCP6001/2/4  
5-Lead Plastic Small Outline Transistor (OT) (SOT23)  
E
E1  
p
B
p1  
D
n
1
α
c
A
A2  
φ
A1  
L
β
Units  
Dimension Limits  
INCHES*  
NOM  
MILLIMETERS  
MIN  
MAX  
MIN  
NOM  
5
MAX  
n
p
p1  
A
A2  
A1  
E
E1  
D
L
φ
c
B
α
β
Number of Pins  
Pitch  
Outside lead pitch (basic)  
Overall Height  
Molded Package Thickness  
5
.038  
.075  
.046  
.043  
.003  
.110  
.064  
.116  
.018  
5
0.95  
1.90  
.035  
.035  
.000  
.102  
.059  
.110  
.014  
0
.057  
0.90  
0.90  
1.18  
1.10  
0.08  
2.80  
1.63  
2.95  
0.45  
5
1.45  
.051  
.006  
.118  
.069  
.122  
.022  
10  
.008  
.020  
10  
1.30  
0.15  
3.00  
1.75  
3.10  
0.55  
10  
0.20  
0.50  
10  
Standoff  
§
0.00  
2.60  
1.50  
2.80  
0.35  
0
Overall Width  
Molded Package Width  
Overall Length  
Foot Length  
Foot Angle  
Lead Thickness  
Lead Width  
.004  
.014  
0
.006  
.017  
5
0.09  
0.35  
0
0.15  
0.43  
5
Mold Draft Angle Top  
Mold Draft Angle Bottom  
0
5
10  
0
5
10  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.010” (0.254mm) per side.  
JEDEC Equivalent: MO-178  
Drawing No. C04-091  
DS21733D-page 14  
2003 Microchip Technology Inc.  
MCP6001/2/4  
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)  
E1  
D
2
n
1
α
E
A2  
A
L
c
A1  
β
B1  
B
p
eB  
Units  
Dimension Limits  
INCHES*  
NOM  
MILLIMETERS  
MIN  
MAX  
MIN  
NOM  
MAX  
n
p
A
A2  
A1  
E
E1  
D
L
c
B1  
B
Number of Pins  
Pitch  
Top to Seating Plane  
Molded Package Thickness  
Base to Seating Plane  
Shoulder to Shoulder Width  
Molded Package Width  
Overall Length  
Tip to Seating Plane  
Lead Thickness  
Upper Lead Width  
Lower Lead Width  
Overall Row Spacing  
Mold Draft Angle Top  
Mold Draft Angle Bottom  
8
8
.100  
.155  
.130  
2.54  
3.94  
3.30  
.140  
.170  
.145  
3.56  
4.32  
3.68  
.115  
.015  
.300  
.240  
.360  
.125  
.008  
.045  
.014  
.310  
5
2.92  
0.38  
7.62  
6.10  
9.14  
3.18  
0.20  
1.14  
0.36  
7.87  
5
.313  
.250  
.373  
.130  
.012  
.058  
.018  
.370  
10  
.325  
.260  
.385  
.135  
.015  
.070  
.022  
.430  
15  
7.94  
6.35  
9.46  
3.30  
0.29  
1.46  
0.46  
9.40  
10  
8.26  
6.60  
9.78  
3.43  
0.38  
1.78  
0.56  
10.92  
15  
§
eB  
α
β
5
10  
15  
5
10  
15  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.010” (0.254mm) per side.  
JEDEC Equivalent: MS-001  
Drawing No. C04-018  
2003 Microchip Technology Inc.  
DS21733D-page 15  
MCP6001/2/4  
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)  
E
E1  
p
D
2
B
n
1
h
α
45°  
c
A2  
A
φ
β
L
A1  
Units  
INCHES*  
NOM  
MILLIMETERS  
Dimension Limits  
MIN  
MAX  
MIN  
NOM  
8
MAX  
n
p
A
A2  
A1  
E
E1  
D
Number of Pins  
Pitch  
Overall Height  
8
.050  
.061  
.056  
.007  
.237  
.154  
.193  
.015  
.025  
4
1.27  
.053  
.069  
1.35  
1.32  
1.55  
1.42  
0.18  
6.02  
3.91  
4.90  
0.38  
0.62  
4
1.75  
Molded Package Thickness  
Standoff  
.052  
.004  
.228  
.146  
.189  
.010  
.019  
0
.061  
.010  
.244  
.157  
.197  
.020  
.030  
8
1.55  
0.25  
6.20  
3.99  
5.00  
0.51  
0.76  
8
§
0.10  
5.79  
3.71  
4.80  
0.25  
0.48  
0
Overall Width  
Molded Package Width  
Overall Length  
Chamfer Distance  
Foot Length  
Foot Angle  
h
L
φ
c
Lead Thickness  
Lead Width  
.008  
.013  
0
.009  
.017  
12  
.010  
.020  
15  
0.20  
0.33  
0
0.23  
0.42  
12  
0.25  
0.51  
15  
B
α
β
Mold Draft Angle Top  
Mold Draft Angle Bottom  
0
12  
15  
0
12  
15  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.010” (0.254mm) per side.  
JEDEC Equivalent: MS-012  
Drawing No. C04-057  
DS21733D-page 16  
2003 Microchip Technology Inc.  
MCP6001/2/4  
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)  
E
E1  
p
D
2
B
n
1
α
A2  
A
c
φ
A1  
(F)  
L
β
Units  
Dimension Limits  
INCHES  
NOM  
MILLIMETERS*  
MIN  
MAX  
MIN  
NOM  
MAX  
n
p
Number of Pins  
Pitch  
8
8
.026 BSC  
0.65 BSC  
Overall Height  
A
A2  
A1  
E
-
-
.043  
-
-
1.10  
Molded Package Thickness  
Standoff  
.030  
.000  
.033  
-
.037  
.006  
0.75  
0.00  
0.85  
-
0.95  
0.15  
Overall Width  
.193 TYP.  
4.90 BSC  
Molded Package Width  
Overall Length  
Foot Length  
E1  
D
.118 BSC  
.118 BSC  
3.00 BSC  
3.00 BSC  
L
.016  
.024  
.037 REF  
.031  
0.40  
0.60  
0.95 REF  
0.80  
Footprint (Reference)  
Foot Angle  
F
φ
c
0°  
.003  
.009  
5°  
-
8°  
.009  
.016  
15°  
0°  
0.08  
0.22  
5°  
-
-
-
-
-
8°  
0.23  
0.40  
15°  
Lead Thickness  
Lead Width  
.006  
B
α
β
.012  
Mold Draft Angle Top  
Mold Draft Angle Bottom  
*Controlling Parameter  
Notes:  
-
-
5°  
15°  
5°  
15°  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not  
exceed .010" (0.254mm) per side.  
JEDEC Equivalent: MO-187  
Drawing No. C04-111  
2003 Microchip Technology Inc.  
DS21733D-page 17  
MCP6001/2/4  
14-Lead Plastic Dual In-line (P) – 300 mil (PDIP)  
E1  
D
2
n
1
α
E
A2  
A
L
c
A1  
B1  
β
eB  
p
B
Units  
Dimension Limits  
INCHES*  
NOM  
MILLIMETERS  
MIN  
MAX  
MIN  
NOM  
14  
MAX  
n
p
A
A2  
A1  
E
E1  
D
L
c
B1  
B
Number of Pins  
Pitch  
Top to Seating Plane  
Molded Package Thickness  
Base to Seating Plane  
Shoulder to Shoulder Width  
Molded Package Width  
Overall Length  
14  
.100  
.155  
.130  
2.54  
3.94  
3.30  
.140  
.170  
.145  
3.56  
2.92  
0.38  
7.62  
6.10  
18.80  
3.18  
0.20  
1.14  
0.36  
7.87  
5
4.32  
3.68  
.115  
.015  
.300  
.240  
.740  
.125  
.008  
.045  
.014  
.310  
5
.313  
.250  
.750  
.130  
.012  
.058  
.018  
.370  
10  
.325  
.260  
.760  
.135  
.015  
.070  
.022  
.430  
15  
7.94  
6.35  
19.05  
3.30  
0.29  
1.46  
0.46  
9.40  
10  
8.26  
6.60  
19.30  
3.43  
0.38  
1.78  
0.56  
10.92  
15  
Tip to Seating Plane  
Lead Thickness  
Upper Lead Width  
Lower Lead Width  
Overall Row Spacing  
Mold Draft Angle Top  
Mold Draft Angle Bottom  
§
eB  
α
β
5
10  
15  
5
10  
15  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.010” (0.254mm) per side.  
JEDEC Equivalent: MS-001  
Drawing No. C04-005  
DS21733D-page 18  
2003 Microchip Technology Inc.  
MCP6001/2/4  
14-Lead Plastic Small Outline (SL) – Narrow, 150 mil (SOIC)  
E
E1  
p
D
2
B
n
1
α
h
45°  
c
A2  
A
φ
A1  
L
β
Units  
Dimension Limits  
INCHES*  
NOM  
MILLIMETERS  
MIN  
MAX  
MIN  
NOM  
MAX  
n
p
A
A2  
A1  
E
E1  
D
Number of Pins  
Pitch  
Overall Height  
14  
14  
.050  
.061  
.056  
.007  
.236  
.154  
.342  
.015  
.033  
4
1.27  
1.55  
1.42  
0.18  
5.99  
3.90  
8.69  
0.38  
0.84  
4
.053  
.069  
1.35  
1.75  
Molded Package Thickness  
.052  
.004  
.228  
.150  
.337  
.010  
.016  
0
.061  
.010  
.244  
.157  
.347  
.020  
.050  
8
1.32  
0.10  
5.79  
3.81  
8.56  
0.25  
0.41  
0
1.55  
0.25  
6.20  
3.99  
8.81  
0.51  
1.27  
8
Standoff  
§
Overall Width  
Molded Package Width  
Overall Length  
Chamfer Distance  
Foot Length  
Foot Angle  
Lead Thickness  
Lead Width  
h
L
φ
c
.008  
.014  
0
.009  
.017  
12  
.010  
.020  
15  
0.20  
0.36  
0
0.23  
0.42  
12  
0.25  
0.51  
15  
B
α
β
Mold Draft Angle Top  
Mold Draft Angle Bottom  
* Controlling Parameter  
§ Significant Characteristic  
0
12  
15  
0
12  
15  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.010” (0.254mm) per side.  
JEDEC Equivalent: MS-012  
Drawing No. C04-065  
2003 Microchip Technology Inc.  
DS21733D-page 19  
MCP6001/2/4  
14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)  
E
E1  
p
D
2
1
n
B
α
A
c
φ
A1  
A2  
β
L
Units  
INCHES  
NOM  
MILLIMETERS*  
Dimension Limits  
MIN  
MAX  
MIN  
NOM  
14  
MAX  
n
p
Number of Pins  
Pitch  
Overall Height  
14  
.026  
0.65  
A
.043  
1.10  
0.95  
0.15  
6.50  
4.50  
5.10  
0.70  
8
Molded Package Thickness  
A2  
A1  
E
E1  
D
L
φ
c
.033  
.002  
.246  
.169  
.193  
.020  
0
.004  
.007  
0
.035  
.004  
.251  
.173  
.197  
.024  
4
.006  
.010  
5
.037  
.006  
.256  
.177  
.201  
.028  
8
.008  
.012  
10  
0.85  
0.05  
6.25  
4.30  
4.90  
0.50  
0
0.09  
0.19  
0
0.90  
0.10  
6.38  
4.40  
5.00  
0.60  
4
0.15  
0.25  
5
Standoff  
§
Overall Width  
Molded Package Width  
Molded Package Length  
Foot Length  
Foot Angle  
Lead Thickness  
Lead Width  
Mold Draft Angle Top  
Mold Draft Angle Bottom  
0.20  
0.30  
10  
B1  
α
β
0
5
10  
0
5
10  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.005” (0.127mm) per side.  
JEDEC Equivalent: MO-153  
Drawing No. C04-087  
DS21733D-page 20  
2003 Microchip Technology Inc.  
MCP6001/2/4  
PRODUCT IDENTIFICATION SYSTEM  
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.  
Examples:  
PART NO.  
Device  
X
/XX  
a)  
b)  
c)  
d)  
e)  
MCP6001T-I/LT: TapeandReel, Industrial  
Temperature Package  
Range  
Temperature, 5LD SC-70 package  
MCP6001T-I/OT: Tape and Reel, Industrial  
Temperature, 5LD SOT-23 package.  
MCP6001RT-I/OT: Tape and Reel, Industrial  
Temperature, 5LD SOT-23 package.  
MCP6001UT-E/OT:Tape and Reel, Extended  
Temperature, 5LD SOT-23 package.  
MCP6001UT-I/OT:Tape and Reel, Industrial  
Temperature, 5LD SOT-23 package.  
Device:  
MCP6001T:  
1 MHz Bandwidth, Low Power Op Amp  
(Tape and Reel) (SC-70, SOT-23)  
1 MHz Bandwidth, Low Power Op Amp  
(Tape and Reel) (SOT-23)  
MCP6001RT:  
MCP6001UT: 1 MHz Bandwidth, Low Power Op Amp  
(Tape and Reel) (SOT-23)  
MCP6002:  
1 MHz Bandwidth, Low Power Op Amp  
1 MHz Bandwidth, Low Power Op Amp  
(Tape and Reel) (SOIC, MSOP)  
MCP6002T:  
a)  
b)  
c)  
d)  
e)  
f)  
MCP6002-I/MS: Industrial Temperature,  
8LD MSOP package.  
MCP6002-I/P:  
8LD PDIP package.  
MCP6002-E/P:  
8LD PDIP package.  
MCP6002-I/SN: Industrial Temperature,  
8LD SOIC package.  
MCP6002T-I/MS: TapeandReel, Industrial  
Temperature, 8LD MSOP package.  
MCP6002T-I/SN: TapeandReel, Industrial  
Temperature, 8LD SOIC package.  
MCP6004:  
1 MHz Bandwidth, Low Power Op Amp  
1 MHz ,Bandwidth Low Power Op Amp  
(Tape and Reel) (SOIC, MSOP)  
Industrial Temperature,  
MCP6004T:  
Extended Temperature,  
Temperature Range:  
Package:  
I
=
=
-40°C to +85°C  
E
-40°C to +125°C  
LT  
=
=
Plastic Package (SC-70), 5-lead (MCP6001 only)  
Plastic Small Outline Transistor (SOT-23), 5-lead  
(MCP6001, MCP6001R, MCP6001U)  
Plastic MSOP, 8-lead  
OT  
MS  
P
=
=
=
=
=
Plastic DIP (300 mil Body), 8-lead, 14-lead  
Plastic SOIC, (150 mil Body), 8-lead  
Plastic SOIC (150 mil Body), 14-lead  
Plastic TSSOP (4.4mm Body), 14-lead  
a)  
b)  
c)  
d)  
e)  
f)  
MCP6004-I/P:  
Industrial Temperature,  
SN  
SL  
ST  
14LD PDIP package.  
MCP6004-I/SL:  
14LD SOIC package.  
Industrial Temperature,,  
MCP6004-E/SL: Extended Temperature,,  
14LD SOIC package.  
MCP6004-I/ST:  
Industrial Temperature,  
14LD TSSOP package.  
MCP6004T-I/SL: TapeandReel, Industrial  
Temperature, 14LD SOIC package.  
MCP6004T-I/ST: TapeandReel, Industrial  
Temperature, 14LD TSSOP package.  
Sales and Support  
Data Sheets  
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and  
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:  
1. Your local Microchip sales office  
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277  
3. The Microchip Worldwide Site (www.microchip.com)  
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.  
Customer Notification System  
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  
2003 Microchip Technology Inc.  
DS21733D-page 21  
MCP6001/2/4  
NOTES:  
DS21733D-page 22  
2003 Microchip Technology Inc.  
Note the following details of the code protection feature on Microchip devices:  
Microchip products meet the specification contained in their particular Microchip Data Sheet.  
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the  
intended manner and under normal conditions.  
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our  
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip's Data  
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  
Microchip is willing to work with the customer who is concerned about the integrity of their code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not  
mean that we are guaranteeing the product as “unbreakable.”  
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our  
products. Attempts to break microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts  
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.  
Information contained in this publication regarding device  
applications and the like is intended through suggestion only  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications.  
No representation or warranty is given and no liability is  
assumed by Microchip Technology Incorporated with respect  
to the accuracy or use of such information, or infringement of  
patents or other intellectual property rights arising from such  
use or otherwise. Use of Microchip’s products as critical  
components in life support systems is not authorized except  
with express written approval by Microchip. No licenses are  
conveyed, implicitly or otherwise, under any intellectual  
property rights.  
Trademarks  
The Microchip name and logo, the Microchip logo, KEELOQ,  
MPLAB, PIC, PICmicro, PICSTART, PRO MATE and  
PowerSmart are registered trademarks of Microchip  
Technology Incorporated in the U.S.A. and other countries.  
FilterLab, microID, MXDEV, MXLAB, PICMASTER, SEEVAL  
and The Embedded Control Solutions Company are  
registered trademarks of Microchip Technology Incorporated  
in the U.S.A.  
Accuron, Application Maestro, dsPIC, dsPICDEM,  
dsPICDEM.net, ECONOMONITOR, FanSense, FlexROM,  
fuzzyLAB, In-Circuit Serial Programming, ICSP, ICEPIC,  
microPort, Migratable Memory, MPASM, MPLIB, MPLINK,  
MPSIM, PICC, PICkit, PICDEM, PICDEM.net, PowerCal,  
PowerInfo, PowerMate, PowerTool, rfLAB, rfPIC, Select  
Mode, SmartSensor, SmartShunt, SmartTel and Total  
Endurance are trademarks of Microchip Technology  
Incorporated in the U.S.A. and other countries.  
Serialized Quick Turn Programming (SQTP) is a service mark  
of Microchip Technology Incorporated in the U.S.A.  
All other trademarks mentioned herein are property of their  
respective companies.  
© 2003, Microchip Technology Incorporated, Printed in the  
U.S.A., All Rights Reserved.  
Printed on recycled paper.  
Microchip received QS-9000 quality system  
certification for its worldwide headquarters,  
design and wafer fabrication facilities in  
Chandler and Tempe, Arizona in July 1999  
and Mountain View, California in March 2002.  
The Company’s quality system processes and  
procedures are QS-9000 compliant for its  
®
PICmicro 8-bit MCUs, KEELOQ® code hopping  
devices, Serial EEPROMs, microperipherals,  
non-volatile memory and analog products. In  
addition, Microchip’s quality system for the  
design and manufacture of development  
systems is ISO 9001 certified.  
2003 Microchip Technology Inc.  
DS21733D-page 23  
M
WORLDWIDE SALES AND SERVICE  
Japan  
AMERICAS  
ASIA/PACIFIC  
Microchip Technology Japan K.K.  
Benex S-1 6F  
Corporate Office  
Australia  
2355 West Chandler Blvd.  
Microchip Technology Australia Pty Ltd  
Marketing Support Division  
Suite 22, 41 Rawson Street  
Epping 2121, NSW  
3-18-20, Shinyokohama  
Kohoku-Ku, Yokohama-shi  
Kanagawa, 222-0033, Japan  
Tel: 81-45-471- 6166 Fax: 81-45-471-6122  
Chandler, AZ 85224-6199  
Tel: 480-792-7200 Fax: 480-792-7277  
Technical Support: 480-792-7627  
Web Address: http://www.microchip.com  
Australia  
Korea  
Tel: 61-2-9868-6733 Fax: 61-2-9868-6755  
Atlanta  
Microchip Technology Korea  
168-1, Youngbo Bldg. 3 Floor  
Samsung-Dong, Kangnam-Ku  
Seoul, Korea 135-882  
China - Beijing  
3780 Mansell Road, Suite 130  
Alpharetta, GA 30022  
Microchip Technology Consulting (Shanghai)  
Co., Ltd., Beijing Liaison Office  
Unit 915  
Tel: 770-640-0034 Fax: 770-640-0307  
Tel: 82-2-554-7200 Fax: 82-2-558-5934  
Boston  
Bei Hai Wan Tai Bldg.  
Singapore  
2 Lan Drive, Suite 120  
Westford, MA 01886  
Tel: 978-692-3848 Fax: 978-692-3821  
No. 6 Chaoyangmen Beidajie  
Beijing, 100027, No. China  
Tel: 86-10-85282100 Fax: 86-10-85282104  
Microchip Technology Singapore Pte Ltd.  
200 Middle Road  
#07-02 Prime Centre  
Chicago  
China - Chengdu  
Singapore, 188980  
333 Pierce Road, Suite 180  
Itasca, IL 60143  
Microchip Technology Consulting (Shanghai)  
Co., Ltd., Chengdu Liaison Office  
Rm. 2401-2402, 24th Floor,  
Tel: 65-6334-8870 Fax: 65-6334-8850  
Taiwan  
Tel: 630-285-0071 Fax: 630-285-0075  
Microchip Technology (Barbados) Inc.,  
Taiwan Branch  
Ming Xing Financial Tower  
Dallas  
No. 88 TIDU Street  
4570 Westgrove Drive, Suite 160  
Addison, TX 75001  
11F-3, No. 207  
Chengdu 610016, China  
Tung Hua North Road  
Taipei, 105, Taiwan  
Tel: 86-28-86766200 Fax: 86-28-86766599  
Tel: 972-818-7423 Fax: 972-818-2924  
China - Fuzhou  
Tel: 886-2-2717-7175 Fax: 886-2-2545-0139  
Detroit  
Microchip Technology Consulting (Shanghai)  
Co., Ltd., Fuzhou Liaison Office  
Unit 28F, World Trade Plaza  
Tri-Atria Office Building  
EUROPE  
Austria  
32255 Northwestern Highway, Suite 190  
Farmington Hills, MI 48334  
Tel: 248-538-2250 Fax: 248-538-2260  
No. 71 Wusi Road  
Microchip Technology Austria GmbH  
Durisolstrasse 2  
Fuzhou 350001, China  
Kokomo  
Tel: 86-591-7503506 Fax: 86-591-7503521  
A-4600 Wels  
2767 S. Albright Road  
Kokomo, IN 46902  
China - Hong Kong SAR  
Austria  
Microchip Technology Hongkong Ltd.  
Unit 901-6, Tower 2, Metroplaza  
223 Hing Fong Road  
Tel: 43-7242-2244-399  
Fax: 43-7242-2244-393  
Denmark  
Tel: 765-864-8360 Fax: 765-864-8387  
Los Angeles  
Kwai Fong, N.T., Hong Kong  
18201 Von Karman, Suite 1090  
Irvine, CA 92612  
Microchip Technology Nordic ApS  
Regus Business Centre  
Lautrup hoj 1-3  
Tel: 852-2401-1200 Fax: 852-2401-3431  
China - Shanghai  
Tel: 949-263-1888 Fax: 949-263-1338  
Microchip Technology Consulting (Shanghai)  
Co., Ltd.  
Ballerup DK-2750 Denmark  
Phoenix  
Tel: 45-4420-9895 Fax: 45-4420-9910  
2355 West Chandler Blvd.  
Chandler, AZ 85224-6199  
Tel: 480-792-7966 Fax: 480-792-4338  
Room 701, Bldg. B  
France  
Far East International Plaza  
No. 317 Xian Xia Road  
Microchip Technology SARL  
Parc d’Activite du Moulin de Massy  
43 Rue du Saule Trapu  
San Jose  
Shanghai, 200051  
Microchip Technology Inc.  
2107 North First Street, Suite 590  
San Jose, CA 95131  
Tel: 86-21-6275-5700 Fax: 86-21-6275-5060  
Batiment A - ler Etage  
China - Shenzhen  
91300 Massy, France  
Microchip Technology Consulting (Shanghai)  
Co., Ltd., Shenzhen Liaison Office  
Tel: 33-1-69-53-63-20 Fax: 33-1-69-30-90-79  
Tel: 408-436-7950 Fax: 408-436-7955  
Germany  
Rm. 1812, 18/F, Building A, United Plaza  
No. 5022 Binhe Road, Futian District  
Shenzhen 518033, China  
Toronto  
Microchip Technology GmbH  
Steinheilstrasse 10  
6285 Northam Drive, Suite 108  
Mississauga, Ontario L4V 1X5, Canada  
Tel: 905-673-0699 Fax: 905-673-6509  
D-85737 Ismaning, Germany  
Tel: 49-89-627-144-0  
Fax: 49-89-627-144-44  
Tel: 86-755-82901380 Fax: 86-755-8295-1393  
China - Qingdao  
Rm. B505A, Fullhope Plaza,  
Italy  
No. 12 Hong Kong Central Rd.  
Qingdao 266071, China  
Microchip Technology SRL  
Via Quasimodo, 12  
20025 Legnano (MI)  
Milan, Italy  
Tel: 86-532-5027355 Fax: 86-532-5027205  
India  
Tel: 39-0331-742611 Fax: 39-0331-466781  
Microchip Technology Inc.  
India Liaison Office  
United Kingdom  
Marketing Support Division  
Divyasree Chambers  
Microchip Ltd.  
505 Eskdale Road  
1 Floor, Wing A (A3/A4)  
No. 11, O’Shaugnessey Road  
Bangalore, 560 025, India  
Tel: 91-80-2290061 Fax: 91-80-2290062  
Winnersh Triangle  
Wokingham  
Berkshire, England RG41 5TU  
Tel: 44-118-921-5869 Fax: 44-118-921-5820  
05/30/03  
DS21733D-page 24  
2003 Microchip Technology Inc.  

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