MCP6002-E/MCVAO_技术文档

MCP6001/1R/1U/2/4

1 MHz, Low-Power Op Amp

Description

Features

• Available in SC-70-5 and SOT-23-5 packages

• Gain Bandwidth Product: 1 MHz (typical)

• Rail-to-Rail Input/Output

The Microchip Technology Inc. MCP6001/2/4 family of

operational amplifiers (op amps) is specifically

designed for general-purpose applications. This family

has a 1 MHz Gain Bandwidth Product (GBWP) and 90°

phase margin (typical). It also maintains 45° phase

margin (typical) with a 500 pF capacitive load. This

family operates from a single supply voltage as low as

1.8V, while drawing 100 µA (typical) quiescent current.

Additionally, the MCP6001/2/4 supports rail-to-rail input

and output swing, with a common mode input voltage

range of V_DD+ 300 mV to V_SS– 300 mV. This family of

op amps is designed with Microchip’s advanced CMOS

process.

• Supply Voltage: 1.8V to 6.0V

• Supply Current: I_Q= 100 µA (typical)

• Phase Margin: 90° (typical)

• Temperature Range:

- Industrial: -40°C to +85°C

- Extended: -40°C to +125°C

• Available in Single, Dual and Quad Packages

Applications

The MCP6001/2/4 family is available in the industrial

and extended temperature ranges, with a power supply

range of 1.8V to 6.0V.

• Automotive

• Portable Equipment

• Photodiode Amplifier

• Analog Filters

Package Types

MCP6001R

MCP6001

• Notebooks and PDAs

• Battery-Powered Systems

SOT-23-5

SC70-5, SOT-23-5

V

1

5

4

V

SS

OUT

1

2

3

5

DD

OUT

Design Aids

V

2

3

DD

SS

+

-

V

+

V

–

IN

V

V –

IN

• SPICE Macro Models

• FilterLab^®Software

4

IN

MCP6002

PDIP, SOIC, MSOP

MCP6001U

• Mindi™ Circuit Designer & Simulator

• Microchip Advanced Part Selector (MAPS)

• Analog Demonstration and Evaluation Boards

• Application Notes

SOT-23-5

V

+

V

5

8

7

6

5

V

1

2

3

4

1

DD

IN

OUTA

DD

+

V

–

+

2

3

-

SS

–

INA

+

OUTB

-

V

OUT

V

4

+

-

V

–

IN

INA

V

INB

Typical Application

+

SS

INB

V_DD

MCP6002

MCP6004

V_IN

PDIP, SOIC, TSSOP

2x3 DFN *

+

V

V_OUT

MCP6001

14

13

12

11

1

2

3

4

OUTA

OUTD

V

1

8

7

V

OUTA

DD

–

V

–

+

V

–

+ -

INA

- +

IND

V

–

2

OUTB

EP

9

INA

V

+

INA

V

IND

V_SS

V

+

V

–

3

4

6

5

INA

INB

DD

+

SS

V

+

SS

INB

V

+

10

9

5

6

7

INB

INC

R₁

-

+

R₂

–

INB

INC

R₁

Gain = 1 + -----

R₂

V

8

OUTB

OUTC

V_REF

* Includes Exposed Thermal Pad (EP); see Table 3-1.

Non-Inverting Amplifier

DS21733J-page 1

MCP6001/1R/1U/2/4

NOTES:

DS21733J-page 2

MCP6001/1R/1U/2/4

† Notice: Stresses above those listed under “Absolute

Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of

the device at those or any other conditions above those

indicated in the operational listings of this specification is not

implied. Exposure to maximum rating conditions for extended

periods may affect device reliability.

1.0

ELECTRICAL

CHARACTERISTICS

Absolute Maximum Ratings †

V_DD– V_SS........................................................................7.0V

Current at Analog Input Pins (V_IN+, V_IN–).....................±2 mA

Analog Inputs (V_IN+, V_IN–) ††........ V_SS– 1.0V to V_DD+ 1.0V

All Other Inputs and Outputs ......... V_SS– 0.3V to V_DD+ 0.3V

†† See Section 4.1.2 “Input Voltage and Current Limits”.

Difference Input Voltage ...................................... |V_DD– V_SS

|

Output Short Circuit Current ................................Continuous

Current at Output and Supply Pins ............................±30 mA

Storage Temperature ...................................–65°C to +150°C

Maximum Junction Temperature (T_J)..........................+150°C

ESD Protection On All Pins (HBM; MM) .............. ≥ 4 kV; 200V

DC ELECTRICAL SPECIFICATIONS

Electrical Characteristics: Unless otherwise indicated, T_A= +25°C, V_DD= +1.8V to +5.5V, V_SS= GND, V_CM= V_DD/2, V_L= V_DD/2,

R_L= 10 kΩ to V_L, and V_OUT≈ V_DD/2 (refer to Figure 1-1).

Parameters

Sym

Min

Typ

Max

Units

Conditions

Input Offset

Input Offset Voltage

V_OS

-4.5

—

+4.5

—

mV

V_CM= V_SS(Note 1)

Input Offset Drift with Temperature

ΔV_OS/ΔT_A

±2.0

µV/°C T_A= -40°C to +125°C,

_CM= V_SS

V

Power Supply Rejection Ratio

Input Bias Current and Impedance

Input Bias Current:

PSRR

—

86

—

dB

V_CM= V_SS

I_B

—

±1.0

19

—

pA

Industrial Temperature

T_A= +85°C

Extended Temperature

I_B

1100

±1.0

10¹³||6

10¹³||3

pA

T_A= +125°C

Input Offset Current

I_OS

Z_CM

Z_DIFF

pA

Common Mode Input Impedance

Differential Input Impedance

Common Mode

Ω||pF

Common Mode Input Range

Common Mode Rejection Ratio

V_CMR

V_SS− 0.3

—

V_DD+ 0.3

—

V

CMRR

60

76

dB

V_CM= -0.3V to 5.3V,

V

_DD= 5V

Open-Loop Gain

DC Open-Loop Gain (Large Signal)

A_OL

88

112

—

dB

V_OUT= 0.3V to V_DD– 0.3V,

_CM= V_SS

V

Output

Maximum Output Voltage Swing

V_OL, V_OH

I_SC

V_SS+ 25

V_DD– 25

mV

V_DD= 5.5V,

0.5V Input Overdrive

Output Short Circuit Current

—

±6

—

mA

V_DD= 1.8V

V_DD= 5.5V

±23

Power Supply

Supply Voltage

V_DD

I_Q

1.8

50

—

6.0

V

Note 2

Quiescent Current per Amplifier

100

170

µA

I_O= 0, V_DD= 5.5V, V_CM= 5V

Note 1: MCP6001/1R/1U/2/4 parts with date codes prior to December 2004 (week code 49) were tested to ±7 mV minimum/

maximum limits.

2: All parts with date codes November 2007 and later have been screened to ensure operation at

V_DD= 6.0V. However, the other minimum and maximum specifications are measured at 1.8V and 5.5V.

DS21733J-page 3

MCP6001/1R/1U/2/4

AC ELECTRICAL SPECIFICATIONS

Electrical Characteristics: Unless otherwise indicated, T_A= +25°C, V_DD= +1.8 to 5.5V, V_SS= GND, V_CM= V_DD/2,

V_L= V_DD/2, V_OUT≈ V_DD/2, R_L= 10 kΩ to V_L, and C_L= 60 pF (refer to Figure 1-1).

Parameters

Sym

Min

Typ

Max

Units

Conditions

AC Response

Gain Bandwidth Product

Phase Margin

GBWP

PM

—

1.0

90

—

MHz

°

G = +1 V/V

Slew Rate

SR

0.6

V/µs

Noise

Input Noise Voltage

Input Noise Voltage Density

Input Noise Current Density

E_ni

e_ni

i_ni

—

6.1

28

—

µVp-p f = 0.1 Hz to 10 Hz

nV/√Hz f = 1 kHz

0.6

fA/√Hz f = 1 kHz

TEMPERATURE SPECIFICATIONS

Electrical Characteristics: Unless otherwise indicated, V_DD= +1.8V to +5.5V and V_SS= GND.

Parameters

Temperature Ranges

Sym

Min

Typ

Max

Units

Conditions

Industrial Temperature Range

Extended Temperature Range

Operating Temperature Range

Storage Temperature Range

T_A

-40

-65

—

+85

°C

+125

+150

Note

Thermal Package Resistances

Thermal Resistance, 5L-SC70

Thermal Resistance, 5L-SOT-23

Thermal Resistance, 8L-PDIP

Thermal Resistance, 8L-SOIC (150 mil)

Thermal Resistance, 8L-MSOP

Thermal Resistance, 8L-DFN (2x3)

Thermal Resistance, 14L-PDIP

Thermal Resistance, 14L-SOIC

Thermal Resistance, 14L-TSSOP

—

θ_JA

331

256

85

°C/W

163

206

68

70

120

100

Note:

The industrial temperature devices operate over this extended temperature range, but with reduced

performance. In any case, the internal Junction Temperature (T_J) must not exceed the Absolute Maximum

specification of +150°C.

DS21733J-page 4

MCP6001/1R/1U/2/4

1.1

Test Circuits

C_F

6.8 pF

The circuit used for most DC and AC tests is shown in

Figure 1-1. This circuit can independently set V_CMand

V_OUT; see Equation 1-1. Note that V_CMis not the

circuit’s common mode voltage ((V_P+ V_M)/2), and that

V_OSTincludes V_OSplus the effects (on the input offset

R_G

100 kΩ

R_F

100 kΩ

V_DD/2

V_P

error, V_OST) of temperature, CMRR, PSRR and A_OL

.

V_DD

V_IN+

EQUATION 1-1:

C_B1

100 nF

C_B2

1 µF

G_DM= R_F⁄ R_G

MCP600X

V_CM= (V_P+ V_DD⁄ 2) ⁄ 2

V_OST= V_IN–– V_IN+

V_IN–

V_OUT= (V_DD⁄ 2) + (V_P– V_M) + V_OST(1 + G_DM

)

V_OUT

V_M

R_L

10 kΩ

C_L

60 pF

R_G

100 kΩ

R_F

100 kΩ

Where:

G_DM= Differential Mode Gain

(V/V)

(V)

V_CM= Op Amp’s Common Mode

C_F

6.8 pF

V_L

Input Voltage

V_OST= Op Amp’s Total Input Offset

(mV)

FIGURE 1-1:

AC and DC Test Circuit for

Voltage

Most Specifications.

DS21733J-page 5

MCP6001/1R/1U/2/4

NOTES:

DS21733J-page 6

MCP6001/1R/1U/2/4

2.0

TYPICAL PERFORMANCE CURVES

Note:

The graphs and tables provided following this note are a statistical summary based on a limited number of

samples and are provided for informational purposes only. The performance characteristics listed herein

are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified

operating range (e.g., outside specified power supply range) and therefore outside the warranted range.

Note: Unless otherwise indicated, T_A= +25°C, V_DD= +1.8V to +5.5V, V_SS= GND, V_CM= V_DD/2, V_OUT≈ V_DD/2,

V_L= V_DD/2, R_L= 10 kΩ to V_L, and C_L= 60 pF.

20%

18%

16%

14%

12%

10%

8%

0

-100

-200

-300

-400

-500

-600

-700

64,695 Samples

V_CM= V_SS

V_DD= 1.8V

T_A= -40°C

T_A= +25°C

6%

T_A= +85°C

4%

T_A= +125°C

2%

0%

5

-4 -3 -2 -1

0

1

2

3

4

5

Input Offset Voltage (mV)

Common Mode Input Voltage (V)

FIGURE 2-1:

Input Offset Voltage.

FIGURE 2-4:

Input Offset Voltage vs.

Common Mode Input Voltage at V = 1.8V.

DD

18%

0

2453 Samples

_A= -40°C to +125°C

V_CM= V_SS

V_DD= 5.5V

16%

14%

12%

10%

8%

T

-100

-200

-300

-400

6%

T_A= -40°C

T

_A= +25°C

4%

-500

-600

-700

T_A= +85°C

2%

T_A= +125°C

0%

-12 -10 -8 -6 -4 -2

0

2

4

6

8

10 12

Input Offset Voltage Drift;

TC₁(µV/°C)

Common Mode Input Voltage (V)

FIGURE 2-2:

Input Offset Voltage Drift.

FIGURE 2-5:

Input Offset Voltage vs.

Common Mode Input Voltage at V = 5.5V.

DD

45%

40%

35%

30%

25%

20%

15%

10%

5%

200

150

100

2453 Samples

T_A= -40°C to +125°C

V

_CM= V_SS

50

0

V_DD= 5.5V

V_DD= 1.8V

-50

-100

-150

-200

0%

V_CM= V_SS

Input Offset Quadratic Temp. Co.;

TC₂(µV/°C²)

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5

Output Voltage (V)

FIGURE 2-3:

Temp. Co.

Input Offset Quadratic

FIGURE 2-6:

Output Voltage.

Input Offset Voltage vs.

DS21733J-page 7

MCP6001/1R/1U/2/4

Note: Unless otherwise indicated, T_A= +25°C, V_DD= +1.8V to +5.5V, V_SS= GND, V_CM= V_DD/2, V_OUT≈ V_DD/2,

V_L= V_DD/2, R_L= 10 kΩ to V_L, and C_L= 60 pF.

14%

12%

10%

8%

100

90

80

70

60

50

40

30

20

V_CM= V_SS

1230 Samples

V_DD= 5.5V

V_CM= V_DD

T_A= +85°C

PSRR–

PSRR+

6%

CMRR

4%

2%

0%

0

3

6

9

12 15 18 21 24 27 30

10

100

1k

1.E+03

Frequency (Hz)

10k

1.E+04

100k

1.E+05

1.E+01

1.E+02

Input Bias Current (pA)

FIGURE 2-7:

Input Bias Current at +85°C.

FIGURE 2-10:

PSRR, CMRR vs.

Frequency.

55%

120

100

80

0

605 Samples

50%

45%

40%

35%

30%

25%

20%

15%

10%

5%

V_DD= 5.5V

-30

V_CM= V_DD

T_A= +125°C

-60

Phase

60

-90

40

-120

-150

-180

-210

Gain

20

0

V_CM= V_SS

0%

-20

0.1

1

10 100 1k 10k 100k 1M 10M

1.E- 1.E+ 1.E+ 1.E+ 1.E+ 1.E+ 1.E+ 1.E+ 1.E+

Frequency (Hz)

Input Bias Current (pA)

01 00 01 02 03 04 05 06 07

FIGURE 2-8:

Input Bias Current at

FIGURE 2-11:

Open-Loop Gain, Phase vs.

+125°C.

Frequency.

100

1,000

V_DD= 5.0V

95

90

85

80

75

70

PSRR (V_CM= V_SS

)

100

CMRR (V_CM= -0.3V to +5.3V)

10

0.1

1

10

100

1k

10k

100k

-50

-25

0

25

50

75

100

125

1.E-01 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0 1.E+0

Ambient Temperature (°C)

0

1Freque2ncy (Hz3)

4

5

FIGURE 2-9:

CMRR, PSRR vs. Ambient

FIGURE 2-12:

Input Noise Voltage Density

Temperature.

vs. Frequency.

DS21733J-page 8

MCP6001/1R/1U/2/4

Note: Unless otherwise indicated, T_A= +25°C, V_DD= +1.8V to +5.5V, V_SS= GND, V_CM= V_DD/2, V_OUT≈ V_DD/2,

V_L= V_DD/2, R_L= 10 kΩ to V_L, and C_L= 60 pF.

0.08

30

G = +1 V/V

0.06

25

T_A= -40°C

0.04

T

_A= +25°C

_A= +85°C

20

15

10

5

0.02

T_A= +125°C

0.00

-0.02

-0.04

-0.06

-0.08

0

0.E+00

1.E-06

2.E-06

3.E-06

4.E-06

5.E-06

6.E-06

7.E-06

8.E-06

9.E-06

1.E-05

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5

Power Supply Voltage (V)

Time (1 µs/div)

FIGURE 2-13:

Output Short Circuit Current

FIGURE 2-16:

Small-Signal, Non-Inverting

vs. Power Supply Voltage.

Pulse Response.

1,000

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

G = +1 V/V

V_DD= 5.0V

V_DD– V_OH

100

10

1

V_OL– V_SS

10µ

100µ

1.E-04

1m

10m

1.E-02

0.E+00

1.E-05

2.E-05

3.E-05

4.E-05

5.E-05

6.E-05

7.E-05

8.E-05

9.E-05

1.E-04

0.0

1.E-05

1.E-03

Time (10 µs/div)

Output Current Magnitude (A)

FIGURE 2-14:

Output Voltage Headroom

FIGURE 2-17:

Large-Signal, Non-Inverting

vs. Output Current Magnitude.

Pulse Response.

180

1.0

0.9

0.8

V_CM= V_DD- 0.5V

160

140

120

100

80

V_DD= 5.5V

Falling Edge

0.7

0.6

0.5

0.4

0.3

0.2

0.1

0.0

T_A= +125°C

V_DD= 1.8V

60

T

_A= +85°C

T_A= +25°C

_A= -40°C

Rising Edge

40

20

0

T

-50

-25

0

25

50

75

100

125

0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5

Power Supply Voltage (V)

Ambient Temperature (°C)

FIGURE 2-15:

Quiescent Current vs.

FIGURE 2-18:

Slew Rate vs. Ambient

Power Supply Voltage.

Temperature.

DS21733J-page 9

MCP6001/1R/1U/2/4

Note: Unless otherwise indicated, T_A= +25°C, V_DD= +1.8V to +5.5V, V_SS= GND, V_CM= V_DD/2, V_OUT≈ V_DD/2,

V_L= V_DD/2, R_L= 10 kΩ to V_L, and C_L= 60 pF.

6

10

V_IN

V_DD= 5.0V

G = +2 V/V

5

4

V_DD= 5.5V

V_DD= 1.8V

V_OUT

3

1

2

1

0

0.1

1k

10k

100k

1.E+05

1M

1.E+06

0.E+00

1.E-05

2.E-05

3.E-05

4.E-05

5.E-05

6.E-05

7.E-05

8.E-05

9.E-05

1.E-04

-1

1.E+03

1.E+04

Frequency (Hz)

Time (10 µs/div)

FIGURE 2-19:

Frequency.

Output Voltage Swing vs.

FIGURE 2-21:

Phase Reversal.

The MCP6001/2/4 Show No

1.E1-00m2

1.E-10m3

100µ

1.E- 4

10µ

1.E- 5

1µ

1.E-06

100n

1.E-07

10n

1.E-08

1n

1.E-09

100p

1.E-10

+125°C

+85°C

+25°C

-40°C

10p

1.E-11

1p

1.E-12

-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0

Input Voltage (V)

FIGURE 2-20:

Measured Input Current vs.

Input Voltage (below V ).

SS

DS21733J-page 10

MCP6001/1R/1U/2/4

3.0

PIN DESCRIPTIONS

Descriptions of the pins are listed in Table 3-1.

TABLE 3-1: PIN FUNCTION TABLE

MCP6001 MCP6001R MCP6001U

MCP6002

MCP6004

MSOP,

PDIP,

SOIC

PDIP,

SOIC,

TSSOP

Symbol

Description

SC70-5,

SOT-23-5

DFN

2x3

SOT-23-5

1

4

1

4

3

1

2

3

8

5

6

1

2

3

8

5

6

1

2

3

4

5

6

V_OUT, V_OUTAAnalog Output (op amp A)

V_IN–, V_INA

V_IN+, V_INA

V_DD

–

+

Inverting Input (op amp A)

Non-inverting Input (op amp A)

Positive Power Supply

3

1

5

2

5

—

V_INB

+

–

Non-inverting Input (op amp B)

Inverting Input (op amp B)

V_INB

—

2

—

5

—

2

7

V_OUTB

V_OUTC

Analog Output (op amp B)

Analog Output (op amp C)

Inverting Input (op amp C)

Non-inverting Input (op amp C)

Negative Power Supply

—

4

—

4

8

9

V_INC

–

+

10

11

12

13

14

—

V_INC

V_SS

—

9

V_IND

+

Non-inverting Input (op amp D)

Inverting Input (op amp D)

Analog Output (op amp D)

V_IND

–

V_OUTD

EP

Exposed Thermal Pad (EP);

must be connected to VSS.

3.1

Analog Outputs

3.4

Exposed Thermal Pad (EP)

The output pins are low-impedance voltage sources.

There is an internal electrical connection between the

Exposed Thermal Pad (EP) and the V_SSpin; they must

be connected to the same potential on the Printed

Circuit Board (PCB).

3.2

Analog Inputs

The non-inverting and inverting inputs are

high-impedance CMOS inputs with low bias currents.

3.3

Power Supply Pins

The positive power supply (V_DD) is 1.8V to 6.0V higher

than the negative power supply (V_SS). For normal

operation, the other pins are at voltages between V_SS

and V_DD

.

Typically, these parts are used in a single (positive)

supply configuration. In this case, V_SSis connected to

ground and V_DDis connected to the supply. V_DDwill

need bypass capacitors.

DS21733J-page 11

MCP6001/1R/1U/2/4

NOTES:

DS21733J-page 12

MCP6001/1R/1U/2/4

V

_DD, and dump any currents onto V_DD. When

4.0

APPLICATION INFORMATION

implemented as shown, resistors R₁and R₂also limit

the current through D₁and D₂.

The MCP6001/2/4 family of op amps is manufactured

using Microchip’s state-of-the-art CMOS process and

is specifically designed for low-cost, low-power and

general-purpose applications. The low supply voltage,

low quiescent current and wide bandwidth makes the

MCP6001/2/4 ideal for battery-powered applications.

This device has high phase margin, which makes it

stable for larger capacitive load applications.

V_DD

D₁D₂

V₁

R₁

MCP600X

4.1

Rail-to-Rail Inputs

V₂

R₂

4.1.1

PHASE REVERSAL

The MCP6001/1R/1U/2/4 op amp is designed to

prevent phase reversal when the input pins exceed the

supply voltages. Figure 2-21 shows the input voltage

exceeding the supply voltage without any phase

reversal.

R₃

V_SS– (minimum expected V₁)

R₁>

2 mA

V_SS– (minimum expected V₂)

R₂>

2 mA

4.1.2

INPUT VOLTAGE AND CURRENT

LIMITS

FIGURE 4-2:

Protecting the Analog

The ESD protection on the inputs can be depicted as

shown in Figure 4-1. This structure was chosen to

protect the input transistors, and to minimize input bias

current (I_B). The input ESD diodes clamp the inputs

when they try to go more than one diode drop below

V_SS. They also clamp any voltages that go too far

above V_DD; their breakdown voltage is high enough to

allow normal operation, and low enough to bypass

quick ESD events within the specified limits.

Inputs.

It is also possible to connect the diodes to the left of

resistors R₁and R₂. In this case, current through the

diodes D₁and D₂needs to be limited by some other

mechanism. The resistors then serve as in-rush current

limiters; the DC current into the input pins (V_IN+ and

V_IN–) should be very small.

A significant amount of current can flow out of the

inputs when the common mode voltage (V_CM) is below

ground (V_SS); see Figure 2-20. Applications that are

high impedance may need to limit the usable voltage

range.

Bond

V_DD

Pad

4.1.3

NORMAL OPERATION

Bond

Pad

Bond

Pad

Input

Stage

The input stage of the MCP6001/1R/1U/2/4 op amps

use two differential CMOS input stages in parallel. One

operates at low common mode input voltage (V_CM),

while the other operates at high V_CM. WIth this

topology, the device operates with V_CMup to 0.3V

V_IN+

V_IN–

Bond

Pad

V_SS

above V_DDand 0.3V below V_SS

.

The transition between the two input stages occurs

when V_CM= V_DD– 1.1V. For the best distortion and

gain linearity, with non-inverting gains, avoid this region

of operation.

FIGURE 4-1:

Structures.

Simplified Analog Input ESD

In order to prevent damage and/or improper operation

of these op amps, the circuit they are in must limit the

currents and voltages at the V_IN+ and V_IN– pins (see

Absolute Maximum Ratings † at the beginning of

Section 1.0 “Electrical Characteristics”). Figure 4-2

shows the recommended approach to protecting these

inputs. The internal ESD diodes prevent the input pins

(V_IN+ and V_IN–) from going too far below ground, and

the resistors R₁and R₂limit the possible current drawn

out of the input pins. Diodes D₁and D₂prevent the

input pins (V_IN+ and V_IN–) from going too far above

4.2

Rail-to-Rail Output

The output voltage range of the MCP6001/2/4 op amps

is V_DD– 25 mV (minimum) and V_SS+ 25 mV

(maximum) when R_L= 10 kΩ is connected to V_DD/2

and V_DD= 5.5V. Refer to Figure 2-14 for more

information.

DS21733J-page 13

MCP6001/1R/1U/2/4

4.3

Capacitive Loads

4.4

Supply Bypass

Driving large capacitive loads can cause stability

problems for voltage feedback op amps. As the load

capacitance increases, the feedback loop’s phase

margin decreases and the closed-loop bandwidth is

reduced. This produces gain peaking in the frequency

response, with overshoot and ringing in the step

response. While a unity-gain buffer (G = +1) is the most

sensitive to capacitive loads, all gains show the same

general behavior.

With this family of operational amplifiers, the power

supply pin (V_DDfor single-supply) should have a local

bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm

for good high-frequency performance. It also needs a

bulk capacitor (i.e., 1 µF or larger) within 100 mm to

provide large, slow currents. This bulk capacitor can be

shared with nearby analog parts.

4.5

Unused Op Amps

When driving large capacitive loads with these op

amps (e.g., > 100 pF when G = +1), a small series

resistor at the output (R_ISOin Figure 4-3) improves the

feedback loop’s phase margin (stability) by making the

output load resistive at higher frequencies. The

bandwidth will be generally lower than the bandwidth

with no capacitance load.

An unused op amp in a quad package (MCP6004)

should be configured as shown in Figure 4-5. These

circuits prevent the output from toggling and causing

crosstalk. Circuits A sets the op amp at its minimum

noise gain. The resistor divider produces any desired

reference voltage within the output voltage range of the

op amp; the op amp buffers that reference voltage.

Circuit B uses the minimum number of components

and operates as a comparator, but it may draw more

current.

–

R_ISO

V_OUT

MCP600X

+

¼ MCP6004 (A)

V_DD

¼ MCP6004 (B)

V_IN

C_L

V_DD

R₁

R₂

FIGURE 4-3:

Output resistor, R

ISO

stabilizes large capacitive loads.

V_REF

Figure 4-4 gives recommended R_ISOvalues for

different capacitive loads and gains. The x-axis is the

normalized load capacitance (C_L/G_N), where G_Nis the

circuit's noise gain. For non-inverting gains, G_Nand the

Signal Gain are equal. For inverting gains, G_Nis

1+|Signal Gain| (e.g., -1 V/V gives G_N= +2 V/V).

R₂

------------------

•

V_REF= V_DD

R₁+ R₂

FIGURE 4-5:

Unused Op Amps.

1000

V_DD= 5.0V

4.6

PCB Surface Leakage

R_L= 100 k

In applications where low input bias current is critical,

Printed Circuit Board (PCB) surface leakage effects

need to be considered. Surface leakage is caused by

humidity, dust or other contamination on the board.

Under low humidity conditions, a typical resistance

between nearby traces is 10¹²Ω. A 5V difference would

cause 5 pA of current to flow; which is greater than the

MCP6001/1R/1U/2/4 family’s bias current at 25°C (typ-

ically 1 pA).

100

G_N= 1

G_N

2

≥

10

10p

100p

1.E-10

Normalized Load Capacitance; C_L/G_N(F)

1n

10n

1.E-11

1.E-09

1.E-08

The easiest way to reduce surface leakage is to use a

guard ring around sensitive pins (or traces). The guard

ring is biased at the same voltage as the sensitive pin.

An example of this type of layout is shown in

Figure 4-6.

FIGURE 4-4:

for Capacitive Loads.

Recommended R

values

ISO

After selecting R_ISOfor your circuit, double-check the

resulting frequency response peaking and step

response overshoot. Modify R_ISO’s value until the

response is reasonable. Bench evaluation and

simulations with the MCP6001/1R/1U/2/4 SPICE

macro model are very helpful.

DS21733J-page 14

MCP6001/1R/1U/2/4

V_IN-

V_IN+

V_SS

–

R₁

R₂

1/2

MCP6002

V_IN1

+

–

V_OUT

MCP6001

+

–

R₂

1/2

MCP6002

Guard Ring

Example Guard Ring Layout

V_IN2

+

R₁= 20 kΩ

R₂= 10 kΩ

R₁

FIGURE 4-6:

for Inverting Gain.

V_REF

1. Non-inverting Gain and Unity-Gain Buffer:

R₁

-----

V_OUT= (V_IN2– V_IN1) •

+ V_REF

a. Connect the non-inverting pin (V_IN+) to the

input with a wire that does not touch the

PCB surface.

R₂

FIGURE 4-7:

with Unity-Gain Buffer Inputs.

Instrumentation Amplifier

b. Connect the guard ring to the inverting input

pin (V_IN–). This biases the guard ring to the

common mode input voltage.

4.7.2

ACTIVE LOW-PASS FILTER

2. Inverting Gain and Transimpedance Gain

Amplifiers (convert current to voltage, such as

photo detectors):

The MCP6001/2/4 op amp’s low input bias current

makes it possible for the designer to use larger

resistors and smaller capacitors for active low-pass

filter applications. However, as the resistance

increases, the noise generated also increases.

Parasitic capacitances and the large value resistors

could also modify the frequency response. These

trade-offs need to be considered when selecting circuit

elements.

a. Connect the guard ring to the non-inverting

input pin (V_IN+). This biases the guard ring

to the same reference voltage as the op

amp (e.g., V_DD/2 or ground).

b. Connect the inverting pin (V_IN–) to the input

with a wire that does not touch the PCB

surface.

Usually, the op amp bandwidth is 100x the filter cutoff

frequency (or higher) for good performance. It is

possible to have the op amp bandwidth 10X higher

than the cutoff frequency, thus having a design that is

more sensitive to component tolerances.

4.7

Application Circuits

4.7.1

UNITY-GAIN BUFFER

The rail-to-rail input and output capability of the

MCP6001/2/4 op amp is ideal for unity-gain buffer

applications. The low quiescent current and wide

bandwidth makes the device suitable for a buffer

configuration in an instrumentation amplifier circuit, as

shown in Figure 4-7.

Figure 4-8 shows a second-order Butterworth filter with

100 kHz cutoff frequency and a gain of +1 V/V; the op

amp bandwidth is only 10x higher than the cutoff

frequency. The component values were selected using

Microchip’s FilterLab^®software.

100 pF

14.3 kΩ 53.6 kΩ

V_IN

+

MCP6002

–

V_OUT

33 pF

FIGURE 4-8:

Active Second-Order

Low-Pass Filter.

DS21733J-page 15

MCP6001/1R/1U/2/4

4.7.3

PEAK DETECTOR

EQUATION 4-1:

dV_C1

------------

dt

The MCP6001/2/4 op amp has a high input impedance,

rail-to-rail input/output and low input bias current, which

makes this device suitable for peak detector

applications. Figure 4-9 shows a peak detector circuit

with clear and sample switches. The peak-detection

cycle uses a clock (CLK), as shown in Figure 4-9.

I_SC= C₁

dV_C1I_SC

------------ = -------

dt C₁

25mA

= --------------

0.1μF

At the rising edge of CLK, Sample Switch closes to

begin sampling. The peak voltage stored on C₁is

sampled to C₂for a sample time defined by t_SAMP. At

the end of the sample time (falling edge of Sample

Signal), Clear Signal goes high and closes the Clear

Switch. When the Clear Switch closes, C₁discharges

through R₁for a time defined by t_CLEAR. At the end of

the clear time (falling edge of Clear Signal), op amp A

begins to store the peak value of V_INon C₁for a time

dV_C1

------------ = 250mV ⁄ μs

dt

This voltage rate of change is less than the MCP6001/2/4

slew rate of 0.6 V/µs. When the input voltage swings

below the voltage across C₁, D₁becomes reverse-

biased. This opens the feedback loop and rails the

amplifier. When the input voltage increases, the amplifier

recovers at its slew rate. Based on the rate of voltage

change shown in the above equation, it takes an

extended period of time to charge a 0.1 µF capacitor. The

capacitors need to be selected so that the circuit is not

limited by the amplifier slew rate. Therefore, the

capacitors should be less than 40 µF and a stabilizing

resistor (R_ISO) needs to be properly selected. (Refer to

Section 4.3 “Capacitive Loads”).

defined by t_DETECT

.

In order to define t_SAMPand t_CLEAR, it is necessary to

determine the capacitor charging and discharging

period. The capacitor charging time is limited by the

^{amplifier source current, while the discharging time (}τ)

is defined using R₁(τ = R₁C₁). t_DETECTis the time that

the input signal is sampled on C₁and is dependent on

the input voltage change frequency.

The op amp output current limit, and the size of the

storage capacitors (both C₁and C₂), could create

slewing limitations as the input voltage (V_IN) increases.

Current through a capacitor is dependent on the size of

the capacitor and the rate of voltage change. From this

relationship, the rate of voltage change or the slew rate

can be determined. For example, with an op amp short

circuit current of I_SC= 25 mA and a load capacitor of

C₁= 0.1 µF, then:

V_IN

D₁

+

R_ISO

V_C1

1/2

R_ISO

V_C2

+

MCP6002

1/2

V_OUT

+

MCP6002

–

C₁

R₁

Op Amp A

MCP6001

–

C₂

Op Amp B

Op Amp C

Sample

Switch

Clear

Switch

t_SAMP

Sample Signal

t_CLEAR

Clear Signal

CLK

t_DETECT

FIGURE 4-9:

Peak Detector with Clear and Sample CMOS Analog Switches.

DS21733J-page 16

MCP6001/1R/1U/2/4

5.4

Microchip Advanced Part Selector

(MAPS)

5.0

DESIGN AIDS

Microchip provides the basic design tools needed for

the MCP6001/1R/1U/2/4 family of op amps.

MAPS is a software tool that helps semiconductor

professionals efficiently identify Microchip devices that

fit a particular design requirement. Available at no cost

from the Microchip web site at www.microchip.com/

maps, the MAPS is an overall selection tool for

Microchip’s product portfolio that includes Analog,

Memory, MCUs and DSCs. Using this tool you can

define a filter to sort features for a parametric search of

devices and export side-by-side technical comparison

reports. Helpful links are also provided for Data sheets,

Purchase, and Sampling of Microchip parts.

5.1

SPICE Macro Model

The latest SPICE macro model for the MCP6001/1R/

1U/2/4 op amps is available on the Microchip web site

at www.microchip.com. The model was written and

tested in official Orcad (Cadence) owned PSPICE. For

the other simulators, it may require translation.

The model covers a wide aspect of the op amp's

electrical specifications. Not only does the model cover

voltage, current, and resistance of the op amp, but it

also covers the temperature and noise effects on the

behavior of the op amp. The model has not been

verified outside of the specification range listed in the

op amp data sheet. The model behaviors under these

conditions can not be guaranteed that it will match the

actual op amp performance.

5.5

Analog Demonstration and

Evaluation Boards

Microchip offers

Demonstration and Evaluation Boards that are

designed to help you achieve faster time to market. For

a

broad spectrum of Analog

a

complete listing of these boards and their

Moreover, the model is intended to be an initial design

tool. Bench testing is a very important part of any

design and cannot be replaced with simulations. Also,

simulation results using this macro model need to be

validated by comparing them to the data sheet

specifications and characteristic curves.

corresponding user’s guides and technical information,

visit the Microchip web site at www.microchip.com/

analogtools.

Some boards that are especially useful are:

• MCP6XXX Amplifier Evaluation Board 1

• MCP6XXX Amplifier Evaluation Board 2

• MCP6XXX Amplifier Evaluation Board 3

• MCP6XXX Amplifier Evaluation Board 4

• Active Filter Demo Board Kit

5.2

FilterLab^®Software

Microchip’s FilterLab^®software is an innovative

software tool that simplifies analog active filter (using

op amps) design. Available at no cost from the

Microchip web site at www.microchip.com/filterlab, the

FilterLab design tool provides full schematic diagrams

of the filter circuit with component values. It also

outputs the filter circuit in SPICE format, which can be

used with the macro model to simulate actual filter

performance.

• 5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2

• 8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,

P/N SOIC8EV

• 14-Pin SOIC/TSSOP/DIP Evaluation Board,

P/N SOIC14EV

5.3

Mindi™ Circuit Designer &

Simulator

Microchip’s Mindi™ Circuit Designer & Simulator aids

in the design of various circuits useful for active filter,

amplifier and power-management applications. It is a

free online circuit designer & simulator available from

the Microchip web site at www.microchip.com/mindi.

This interactive circuit designer & simulator enables

designers to quickly generate circuit diagrams,

simulate circuits. Circuits developed using the Mindi

Circuit Designer & Simulator can be downloaded to a

personal computer or workstation.

DS21733J-page 17

MCP6001/1R/1U/2/4

5.6

Application Notes

The following Microchip Analog Design Note and

Application Notes are available on the Microchip web

site at www.microchip. com/appnotes and are

recommended as supplemental reference resources.

• ADN003: “Select the Right Operational Amplifier

for your Filtering Circuits”, DS21821

• AN722: “Operational Amplifier Topologies and DC

Specifications”, DS00722

• AN723: “Operational Amplifier AC Specifications

and Applications”, DS00723

• AN884: “Driving Capacitive Loads With Op

Amps”, DS00884

• AN990: “Analog Sensor Conditioning Circuits –

An Overview”, DS00990

• AN1177: “Op Amp Precision Design: DC Errors”,

DS01177

• AN1228: “Op Amp Precision Design: Random

Noise”, DS01228

• AN1297: "Microchip 's Op Amp SPICE Macro

Models"

These application notes and others are listed in the

design guide:

• “Signal Chain Design Guide”, DS21825

DS21733J-page 18

MCP6001/1R/1U/2/4

6.0

6.1

PACKAGING INFORMATION

Package Marking Information

5-Lead SC-70 (MCP6001)

Example: (I-Temp)

I-Temp

Code

E-Temp

Code

XXN (Front)

YWW (Back)

AA7 (Front)

432 (Back)

Device

MCP6001

AAN

CDN

Note: Applies to 5-Lead SC-70.

OR

I-Temp

Code

E-Temp

Code

Device

AA74

XXNN

MCP6001

AANN

CDNN

Note: Applies to 5-Lead SC-70.

Example: (E-Temp)

5-Lead SOT-23 (MCP6001/1R/1U)

5

4

5

4

I-Temp

Code

E-Temp

Code

Device

MCP6001

AANN

ADNN

AFNN

CDNN

CENN

CFNN

CD25

XXNN

MCP6001R

MCP6001U

1

2

3

1

2

3

Note: Applies to 5-Lead SOT-23.

8-Lead PDIP (300 mil)

Example:

XXXXXXXX

XXXXXNNN

MCP6002

I/P256

0432

MCP6002

e3

I/P^^256

0746

OR

YYWW

Example:

8-Lead DFN (2 x 3)

XXX

YWW

NN

ABY

944

25

Legend: XX...X Customer-specific information

Y

Year code (last digit of calendar year)

YY

WW

NNN

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code

e

3

Pb-free JEDEC designator for Matte Tin (Sn)

*

This package is Pb-free. The Pb-free JEDEC designator (

can be found on the outer packaging for this package.

)

e

3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

DS21733J-page 19

MCP6001/1R/1U/2/4

Package Marking Information (Continued)

8-Lead SOIC (150 mil)

Example:

XXXXXXXX

XXXXYYWW

MCP6002I

SN0432

MCP6002I

OR

e

3

SN^^0746

NNN

256

Example:

8-Lead MSOP

XXXXXX

YWWNNN

6002I

432256

14-Lead PDIP (300 mil) (MCP6004)

Example:

XXXXXXXXXXXXXX

MCP6004

e

3

I/P^^

0432256

YYWWNNN

OR

MCP6004

e

3

E/P^^

0746256

14-Lead SOIC (150 mil) (MCP6004)

Example:

MCP6004

XXXXXXXXXX

YYWWNNN

MCP6004ISL

e

3

E/SL^^

OR

0746256

0432256

Example:

14-Lead TSSOP (MCP6004)

XXXXXX

YYWW

6004ST

6004STE

0432

OR

NNN

256

DS21733J-page 20

MCP6001/1R/1U/2/4

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ꢑꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ

)ꢕ*+ )ꢉ ꢃꢊꢈꢂꢃꢄꢅꢆ ꢃꢇꢆꢁꢈꢗꢌꢅꢇꢍꢅ#ꢃꢊꢉꢋꢋꢘꢈꢅ&ꢉꢊ#ꢈ,ꢉꢋ$ꢅꢈ ꢌꢇ-ꢆꢈ-ꢃ#ꢌꢇ$#ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢅ ꢁ

ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐ9ꢀ)

DS21733J-page 21

MCP6001/1R/1U/2/4

ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ

ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ

DS21733J-page 22

MCP6001/1R/1U/2/4

ꢀꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢒꢓꢄꢑꢉꢋꢉꢊꢔꢓꢆꢕꢏꢒꢖꢆꢗꢍꢏꢒꢁ !ꢛ

ꢜꢔꢊꢃꢝ .ꢇꢍꢈ#ꢌꢅꢈꢄꢇ #ꢈꢊ$ꢍꢍꢅꢆ#ꢈꢎꢉꢊ/ꢉꢓꢅꢈ!ꢍꢉ-ꢃꢆꢓ 0ꢈꢎꢋꢅꢉ ꢅꢈ ꢅꢅꢈ#ꢌꢅꢈꢏꢃꢊꢍꢇꢊꢌꢃꢎꢈ1ꢉꢊ/ꢉꢓꢃꢆꢓꢈꢕꢎꢅꢊꢃ%ꢃꢊꢉ#ꢃꢇꢆꢈꢋꢇꢊꢉ#ꢅ!ꢈꢉ#ꢈ

ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ

b

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L

L1

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ꢏꢇꢋ!ꢅ!ꢈ1ꢉꢊ/ꢉꢓꢅꢈ=ꢃ!#ꢌ

6,ꢅꢍꢉꢋꢋꢈ4ꢅꢆꢓ#ꢌ

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.ꢇꢇ#ꢈꢔꢆꢓꢋꢅ

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ꢜꢔꢊꢃꢉꢝ

ꢀꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆ ꢈꢂꢈꢉꢆ!ꢈ"ꢀꢈ!ꢇꢈꢆꢇ#ꢈꢃꢆꢊꢋ$!ꢅꢈꢄꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢁꢈꢏꢇꢋ!ꢈ%ꢋꢉ ꢌꢈꢇꢍꢈꢎꢍꢇ#ꢍ$ ꢃꢇꢆ ꢈ ꢌꢉꢋꢋꢈꢆꢇ#ꢈꢅ&ꢊꢅꢅ!ꢈꢐꢁꢀꢑꢒꢈꢄꢄꢈꢎꢅꢍꢈ ꢃ!ꢅꢁ

ꢑꢁ ꢂꢃꢄꢅꢆ ꢃꢇꢆꢃꢆꢓꢈꢉꢆ!ꢈ#ꢇꢋꢅꢍꢉꢆꢊꢃꢆꢓꢈꢎꢅꢍꢈꢔꢕꢏ"ꢈ'ꢀꢖꢁ(ꢏꢁ

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ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐꢝꢀ)

DS21733J-page 23

MCP6001/1R/1U/2/4

"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ#ꢐꢄꢈꢆ$ꢈꢄꢊ%ꢆꢜꢔꢆꢂꢃꢄꢅꢆꢇꢄꢌ&ꢄ'ꢃꢆꢕ(ꢘꢖꢆMꢆ *!*ꢚ+,ꢆꢎꢎꢆ-ꢔꢅ.ꢆꢗ#$ꢜꢛ

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ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ

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EXPOSED PAD

NOTE 1

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TOP VIEW

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ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢀꢑꢛ*

DS21733J-page 24

MCP6001/1R/1U/2/4

"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ#ꢐꢄꢈꢆ$ꢈꢄꢊ%ꢆꢜꢔꢆꢂꢃꢄꢅꢆꢇꢄꢌ&ꢄ'ꢃꢆꢕ(ꢘꢖꢆMꢆ *!*ꢚ+,ꢆꢎꢎꢆ-ꢔꢅ.ꢆꢗ#$ꢜꢛ

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ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ

DS21733J-page 25

MCP6001/1R/1U/2/4

"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ#ꢐꢄꢈꢆ/ꢑꢁꢂꢋꢑꢃꢆꢕꢇꢖꢆMꢆ!ꢚꢚꢆꢎꢋꢈꢆ-ꢔꢅ.ꢆꢗꢇ#/ꢇꢛ

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ꢏꢃꢊꢍꢇꢊꢌꢃꢎ ꢗꢅꢊꢌꢆꢇꢋꢇꢓꢘ ꢂꢍꢉ-ꢃꢆꢓ *ꢐꢖꢜꢐꢀ;)

DS21733J-page 26

MCP6001/1R/1U/2/4

"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢜꢖꢆMꢆꢜꢄꢓꢓꢔ0%ꢆ!+,ꢚꢆꢎꢎꢆ-ꢔꢅ.ꢆꢗꢍꢏ/ꢘꢛ

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ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ

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DS21733J-page 27

MCP6001/1R/1U/2/4

"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢕꢍꢜꢖꢆMꢆꢜꢄꢓꢓꢔ0%ꢆ!+,ꢚꢆꢎꢎꢆ-ꢔꢅ.ꢆꢗꢍꢏ/ꢘꢛ

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DS21733J-page 28

MCP6001/1R/1U/2/4

"ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ(ꢋꢌꢓꢔꢆꢍꢎꢄꢈꢈꢆꢏꢐꢊꢈꢋꢑꢃꢆꢇꢄꢌ&ꢄ'ꢃꢆꢕ(ꢍꢖꢆꢗ(ꢍꢏꢇꢛ

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ꢌ##ꢎ+22---ꢁꢄꢃꢊꢍꢇꢊꢌꢃꢎꢁꢊꢇꢄ2ꢎꢉꢊ/ꢉꢓꢃꢆꢓ

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DS21733J-page 29

MCP6001/1R/1U/2/4

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS21733J-page 30

MCP6001/1R/1U/2/4

12ꢁꢂꢃꢄꢅꢆꢇꢈꢄꢉꢊꢋꢌꢆ#ꢐꢄꢈꢆ/ꢑꢁꢂꢋꢑꢃꢆꢕꢇꢖꢆMꢆ!ꢚꢚꢆꢎꢋꢈꢆ-ꢔꢅ.ꢆꢗꢇ#/ꢇꢛ

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DS21733J-page 31

MCP6001/1R/1U/2/4

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DS21733J-page 32

MCP6001/1R/1U/2/4

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DS21733J-page 33

MCP6001/1R/1U/2/4

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DS21733J-page 34

MCP6001/1R/1U/2/4

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS21733J-page 35

MCP6001/1R/1U/2/4

NOTES:

DS21733J-page 36

MCP6001/1R/1U/2/4

Revision G (November 2007)

APPENDIX A: REVISION HISTORY

The following is the list of modifications:

Revision J (November 2009)

1. Updated notes to Section 1.0 “Electrical

Characteristics”.

The following is the list of modifications:

2. Increased Absolute Maximum Voltage range at

input pins.

1. Added new 2x3 DFN 8-Lead package on

page 1.

3. Increased maximum operating supply voltage

(V_DD).

2. Updated the Temperature Specifications table

with 2x3 DFN thermal resistance information.

4. Added test circuits.

3. Updated Section 1.1 “Test Circuits”.

4. Updated Figure 2-15.

5. Added Figure 2-3 and Figure 2-20.

6. Added Section 4.1.1 “Phase Reversal”,

Section 4.1.2 “Input Voltage and Current

Limits”, Section 4.1.3 “Normal Operation”

and Section 4.5 “Unused Op Amps”.

5. Added the 2x3 DFN column to Table 3-1.

6. Added new Section 3.4 “Exposed Thermal

Pad (EP)”.

7. Updated Section 5.1 “SPICE Macro Model”.

7. Updated Section 5.0 “Design AIDS”,

8. Updated Section 5.5 “Analog Demonstration

and Evaluation Boards”.

8. Updated

Information”

Section 6.0

“Packaging

9. Updated Section 5.6 “Application Notes”.

9. Updated Package Outline Drawings.

10. Updated Section 6.1 “Package Marking

Information” with the new 2x3 DFN package

marking information.

Revision F (March 2005)

11. Updated the package drawings.

The following is the list of modifications:

12. Updated the Product Identification System

section with new 2x3 DFN package information.

1. Updated

Section 6.0

“Packaging

Information” to include old and new packaging

examples.

Revision H (May 2008)

Revision E (December 2004)

The following is the list of modifications:

1. Design Aids: Name change for Mindi

Simulation Tool.

1. V_OSspecification reduced to ±4.5 mV from

±7.0 mV for parts starting with date code

YYWW = 0449

2. Package Types: Correct device labeling error.

3. Section 1.0 “Electrical Characteristics”, DC

Electrical Specifications: Changed “Maximum

Output Voltage Swing” condition from 0.9V Input

Overdrive to 0.5V Input Overdrive.

2. Corrected package markings in Section 6.0

“Packaging Information”.

3. Added Appendix A: Revision History.

4. Section 1.0 “Electrical Characteristics”, AC

Electrical Specifications: Changed Phase

Margin condition from G = +1 to G= +1 V/V.

Revision D (May 2003)

• Undocumented changes.

5. Section 5.0 “Design AIDS”: Name change for

Mindi Simulation Tool.

Revision C (December 2002)

• Undocumented changes.

Revision B (October 2002)

• Undocumented changes.

Revision A (June 2002)

• Original data sheet release.

DS21733J-page 35

MCP6001/1R/1U/2/4

NOTES:

DS21733J-page 36

MCP6001/1R/1U/2/4

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Examples:

PART NO.

Device

X

/XX

a) MCP6001T-I/LT:

b) MCP6001T-I/OT:

Tape and Reel,

Temperature

Range

Package

Industrial Temperature,

5LD SC-70 package

Tape and Reel,

Industrial Temperature,

5LD SOT-23 package.

c) MCP6001RT-I/OT: Tape and Reel,

Industrial Temperature,

5LD SOT-23 package.

d) MCP6001UT-E/OT: Tape and Reel,

Device:

MCP6001T:

MCP6001RT:

Single Op Amp (Tape and Reel)

(SC-70, SOT-23)

Single Op Amp (Tape and Reel) (SOT-23)

MCP6001UT: Single Op Amp (Tape and Reel) (SOT-23)

MCP6002:

MCP6002T:

Dual Op Amp

Dual Op Amp (Tape and Reel)

(SOIC, MSOP)

Quad Op Amp

Quad Op Amp (Tape and Reel)

(SOIC, MSOP)

Extended Temperature,

5LD SOT-23 package.

MCP6004:

MCP6004T:

a) MCP6002-I/MS:

b) MCP6002-I/P:

c) MCP6002-E/P:

d) MCP6002-E/MC:

e) MCP6002-I/SN:

f) MCP6002T-I/MS:

Industrial Temperature,

8LD MSOP package.

Industrial Temperature,

8LD PDIP package.

Extended Temperature,

8LD PDIP package.

Extended Temperature,

8LD DFN package.

Temperature Range:

Package:

I

E

=

-40°C to +85°C

-40°C to +125°C

LT

OT

=

Plastic Package (SC-70), 5-lead (MCP6001 only)

Plastic Small Outline Transistor (SOT-23), 5-lead

(MCP6001, MCP6001R, MCP6001U)

Plastic MSOP, 8-lead

MS

MC

P

SN

SL

ST

=

Industrial Temperature,

8LD SOIC package.

Tape and Reel,

Industrial Temperature,

8LD MSOP package.

Plastic DFN, 8-lead

Plastic DIP (300 mil body), 8-lead, 14-lead

Plastic SOIC, (3.99 mm body), 8-lead

Plastic SOIC (3.99 body), 14-lead

Plastic TSSOP (4.4mm body), 14-lead

g) MCP6002T-E/MC: Tape and Reel,

Extended Temperature,

8LD DFN package.

a) MCP6004-I/P:

b) MCP6004-I/SL:

c) MCP6004-E/SL:

d) MCP6004-I/ST:

e) MCP6004T-I/SL:

Industrial Temperature,

14LD PDIP package.

Industrial Temperature,

14LD SOIC package.

Extended Temperature,

14LD SOIC package.

Industrial Temperature,

14LD TSSOP package.

Tape and Reel,

Industrial Temperature,

14LD SOIC package.

Tape and Reel,

f) MCP6004T-I/ST:

Industrial Temperature,

14LD TSSOP package.

DS21733J-page 37

MCP6001/1R/1U/2/4

NOTES:

DS21733J-page 38

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

•

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights.

Trademarks

The Microchip name and logo, the Microchip logo, dsPIC,

KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro, PICSTART,

rfPIC and UNI/O are registered trademarks of Microchip

Technology Incorporated in the U.S.A. and other countries.

FilterLab, Hampshire, HI-TECH C, Linear Active Thermistor,

MXDEV, MXLAB, SEEVAL and The Embedded Control

Solutions Company are registered trademarks of Microchip

Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, CodeGuard,

dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,

ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial

Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified

logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code

Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit,

PICtail, PIC³²logo, REAL ICE, rfLAB, Select Mode, Total

Endurance, TSHARC, UniWinDriver, WiperLock and ZENA

are trademarks of Microchip Technology Incorporated in the

U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Microchip received ISO/TS-16949:2002 certification for its worldwide

headquarters, design and wafer fabrication facilities in Chandler and

Tempe, Arizona; Gresham, Oregon and design centers in California

and India. The Company’s quality system processes and procedures

are for its PIC^®MCUs and dsPIC^®DSCs, KEELOQ^®code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

DS21733J-page 39

WORLDWIDE SALES AND SERVICE

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

Asia Pacific Office

Suites 3707-14, 37th Floor

Tower 6, The Gateway

Harbour City, Kowloon

Hong Kong

Tel: 852-2401-1200

Fax: 852-2401-3431

India - Bangalore

Tel: 91-80-3090-4444

Fax: 91-80-3090-4080

Austria - Wels

Tel: 43-7242-2244-39

Fax: 43-7242-2244-393

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://support.microchip.com

Web Address:

www.microchip.com

Denmark - Copenhagen

Tel: 45-4450-2828

Fax: 45-4485-2829

India - New Delhi

Tel: 91-11-4160-8631

Fax: 91-11-4160-8632

France - Paris

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

India - Pune

Tel: 91-20-2566-1512

Fax: 91-20-2566-1513

Australia - Sydney

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

Atlanta

Duluth, GA

Tel: 678-957-9614

Fax: 678-957-1455

Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Japan - Yokohama

Tel: 81-45-471- 6166

Fax: 81-45-471-6122

China - Beijing

Tel: 86-10-8528-2100

Fax: 86-10-8528-2104

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

Korea - Daegu

Tel: 82-53-744-4301

Fax: 82-53-744-4302

Boston

China - Chengdu

Tel: 86-28-8665-5511

Fax: 86-28-8665-7889

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Korea - Seoul

China - Hong Kong SAR

Tel: 852-2401-1200

Fax: 852-2401-3431

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

Spain - Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

China - Nanjing

Tel: 86-25-8473-2460

Fax: 86-25-8473-2470

Malaysia - Kuala Lumpur

Tel: 60-3-6201-9857

Fax: 60-3-6201-9859

Cleveland

UK - Wokingham

Tel: 44-118-921-5869

Fax: 44-118-921-5820

Independence, OH

Tel: 216-447-0464

Fax: 216-447-0643

China - Qingdao

Tel: 86-532-8502-7355

Fax: 86-532-8502-7205

Malaysia - Penang

Tel: 60-4-227-8870

Fax: 60-4-227-4068

Dallas

Addison, TX

Tel: 972-818-7423

Fax: 972-818-2924

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

Philippines - Manila

Tel: 63-2-634-9065

Fax: 63-2-634-9069

Detroit

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Farmington Hills, MI

Tel: 248-538-2250

Fax: 248-538-2260

China - Shenzhen

Tel: 86-755-8203-2660

Fax: 86-755-8203-1760

Taiwan - Hsin Chu

Tel: 886-3-6578-300

Fax: 886-3-6578-370

Kokomo

Kokomo, IN

Tel: 765-864-8360

Fax: 765-864-8387

China - Wuhan

Tel: 86-27-5980-5300

Fax: 86-27-5980-5118

Taiwan - Kaohsiung

Tel: 886-7-536-4818

Fax: 886-7-536-4803

Los Angeles

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

China - Xiamen

Tel: 86-592-2388138

Fax: 86-592-2388130

Taiwan - Taipei

Tel: 886-2-2500-6610

Fax: 886-2-2508-0102

Santa Clara

China - Xian

Tel: 86-29-8833-7252

Fax: 86-29-8833-7256

Thailand - Bangkok

Tel: 66-2-694-1351

Fax: 66-2-694-1350

Santa Clara, CA

Tel: 408-961-6444

Fax: 408-961-6445

China - Zhuhai

Tel: 86-756-3210040

Fax: 86-756-3210049

Toronto

Mississauga, Ontario,

Canada

Tel: 905-673-0699

Fax: 905-673-6509

03/26/09

DS21733J-page 40


型号：	MCP6002-E/MCVAO
厂家：	MICROCHIP
描述：	Operational Amplifier, 2 Func, 4500uV Offset-Max, CMOS, PDSO8 光电二极管
文件：	总42页 (文件大小：775K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MCP6002-E/MCVAO [MICROCHIP]

相关型号：

MCP6002-E/MS

MCP6002-E/OT

MCP6002-E/P

MCP6002-E/SL

MCP6002-E/SN

MCP6002-E/SNVAO

MCP6002-E/ST

MCP6002-I/LT

MCP6002-I/MS

MCP6002-I/OT

MCP6002-I/P

MCP6002-I/SL