MCP1827T-1202EET [MICROCHIP]

1.5A, Low Voltage, Low Quiescent Current LDO Regulator; 1.5A ,低电压,低静态电流LDO稳压器
MCP1827T-1202EET
型号: MCP1827T-1202EET
厂家: MICROCHIP    MICROCHIP
描述:

1.5A, Low Voltage, Low Quiescent Current LDO Regulator
1.5A ,低电压,低静态电流LDO稳压器

稳压器
文件: 总32页 (文件大小:1068K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
MCP1827/MCP1827S  
1.5A, Low Voltage, Low Quiescent Current LDO Regulator  
Features  
Description  
• 1.5A Output Current Capability  
The MCP1827/MCP1827S is a 1.5A Low Dropout  
(LDO) linear regulator that provides high current and  
low output voltages. The MCP1827 comes in a fixed or  
adjustable output voltage version, with an output  
voltage range of 0.8V to 5.0V. The 1.5A output current  
capability, combined with the low output voltage  
capability, make the MCP1827 a good choice for new  
sub-1.8V output voltage LDO applications that have  
high current demands. The MCP1827S is a 3-pin fixed  
voltage version. The MCP1827/MCP1827S is based  
upon the MCP1727 LDO device.  
• Input Operating Voltage Range: 2.3V to 6.0V  
• Adjustable Output Voltage Range: 0.8V to 5.0V  
(MCP1827 only)  
• Standard Fixed Output Voltages:  
- 0.8V, 1.2V, 1.8V, 2.5V, 3.0V, 3.3V, 5.0V  
• Other Fixed Output Voltage Options Available  
Upon Request  
• Low Dropout Voltage: 330 mV Typical at 1.5A  
• Typical Output Voltage Tolerance: 0.5%  
• Stable with 1.0 µF Ceramic Output Capacitor  
• Fast response to Load Transients  
The MCP1827/MCP1827S is stable using ceramic  
output capacitors that inherently provide lower output  
noise and reduce the size and cost of the entire  
regulator solution. Only 1 µF of output capacitance is  
needed to stabilize the LDO.  
• Low Supply Current: 120 µA (typ)  
• Low Shutdown Supply Current: 0.1 µA (typ)  
(MCP1827 only)  
Using CMOS construction, the quiescent current  
consumed by the MCP1827/MCP1827S is typically  
less than 120 µA over the entire input voltage range,  
making it attractive for portable computing applications  
that demand high output current. The MCP1827  
versions have a Shutdown (SHDN) pin. When shut  
down, the quiescent current is reduced to less than  
0.1 µA.  
• Fixed Delay on Power Good Output  
(MCP1827 only)  
• Short Circuit Current Limiting and  
Overtemperature Protection  
• 5-Lead Plastic DDPAK, 5-Lead TO-220 Package  
Options (MCP1827)  
• 3-Lead Plastic DDPAK, 3-Lead TO-220 Package  
Options (MCP1827S)  
On the MCP1827 fixed output versions the scaled-  
down output voltage is internally monitored and a  
power good (PWRGD) output is provided when the  
output is within 92% of regulation (typical). The  
PWRGD delay is internally fixed at 200 µs (typical).  
Applications  
• High-Speed Driver Chipset Power  
• Networking Backplane Cards  
• Notebook Computers  
The overtemperature and short circuit current-limiting  
provide additional protection for the LDO during system  
fault conditions.  
• Network Interface Cards  
• Palmtop Computers  
• 2.5V to 1.XV Regulators  
Package Types  
5-LD DDPAK  
5-LD TO-220  
Fixed/Adjustable  
3-LD DDPAK 3-LD TO-220  
MCP1827  
MCP1827S  
MCP1827S  
MCP1827  
1
2
3
1
2 3 4 5  
1
2
3
1 2 3 4 5  
© 2006 Microchip Technology Inc.  
DS22001B-page 1  
MCP1827/MCP1827S  
Typical Application  
MCP1827 Fixed Output Voltage  
PWRGD  
R1  
100 kΩ  
On  
1
2 3 4 5  
SHDN  
VIN  
Off  
VOUT = 1.8V @ 1A  
VOUT  
VIN = 2.3V to 2.8V  
GND  
C1  
C2  
1 µF  
4.7 µF  
MCP1827 Adjustable Output Voltage  
VADJ  
R2  
20 kΩ  
R1  
On  
40 kΩ  
1
2 3 4 5  
SHDN  
VIN  
Off  
VOUT = 1.2V @ 1A  
VOUT  
VIN = 2.3V to 2.8V  
GND  
C1  
C2  
1 µF  
4.7 µF  
DS22001B-page 2  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
Functional Block Diagram - Adjustable Output  
PMOS  
VIN  
VOUT  
Undervoltage  
Lock Out  
(UVLO)  
ISNS  
Cf  
Rf  
SHDN  
ADJ  
+
Driver w/limit  
and SHDN  
EA  
Overtemperature  
Sensing  
SHDN  
VREF  
V
IN  
Reference  
SHDN  
Soft-Start  
Comp  
TDELAY  
GND  
92% of VREF  
© 2006 Microchip Technology Inc.  
DS22001B-page 3  
MCP1827/MCP1827S  
Functional Block Diagram - Fixed Output (5 pin)  
PMOS  
VIN  
VOUT  
Undervoltage  
Lock Out  
Sense  
(UVLO)  
ISNS  
Cf  
Rf  
SHDN  
+
Driver w/limit  
and SHDN  
EA  
Overtemperature  
Sensing  
SHDN  
VREF  
V
IN  
Reference  
SHDN  
Soft-Start  
PWRGD  
Comp  
TDELAY  
GND  
92% of VREF  
DS22001B-page 4  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
Functional Block Diagram - Fixed Output (3-Pin)  
PMOS  
VIN  
VOUT  
Undervoltage  
Lock Out  
Sense  
(UVLO)  
ISNS  
Cf  
Rf  
SHDN  
+
Driver w/limit  
and SHDN  
EA  
Overtemperature  
Sensing  
SHDN  
VREF  
VIN  
Reference  
SHDN  
Soft-Start  
Comp  
TDELAY  
GND  
92% of VREF  
© 2006 Microchip Technology Inc.  
DS22001B-page 5  
MCP1827/MCP1827S  
† Notice: Stresses above those listed under “Maximum Rat-  
ings” may cause permanent damage to the device. This is a  
stress rating only and functional operation of the device at  
those or any other conditions above those indicated in the  
operational listings of this specification is not implied. Expo-  
sure to maximum rating conditions for extended periods may  
affect device reliability.  
1.0  
ELECTRICAL  
CHARACTERISTICS  
Absolute Maximum Ratings †  
VIN....................................................................................6.5V  
Maximum Voltage on Any Pin ..(GND – 0.3V) to (VDD + 0.3)V  
Maximum Power Dissipation......... Internally-Limited (Note 6)  
Output Short Circuit Duration................................Continuous  
Storage temperature .....................................-65°C to +150°C  
Maximum Junction Temperature, TJ ...........................+150°C  
ESD protection on all pins (HBM/MM) ........... ≥ 2 kV; 200V  
AC/DC CHARACTERISTICS  
Electrical Specifications: Unless otherwise noted, VIN = VOUT(MAX) + VDROPOUT(MAX) Note 1, VR=1.8V for Adjustable Output,  
OUT = 1 mA, CIN = COUT = 4.7 µF (X7R Ceramic), TA = +25°C. Boldface type applies for junction temperatures, TJ (Note 7) of -  
40°C to +125°C  
I
Parameters  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
Input Operating Voltage  
Input Quiescent Current  
VIN  
Iq  
2.3  
6.0  
V
Note 1  
IL = 0 mA, VIN = Note 1,  
OUT = 0.8V to 5.0V  
120  
0.1  
220  
µA  
V
Input Quiescent Current for  
SHDN Mode  
ISHDN  
IOUT  
1.5  
3
µA  
A
SHDN = GND  
Maximum Output Current  
VIN = 2.3V to 6.0V  
V
R = 0.8V to 5.0V, Note 1  
Line Regulation  
ΔVOUT  
(VOUT x ΔVIN  
/
0.05  
±0.5  
2.2  
0.16  
1.0  
%/V  
%
(Note 1) VIN 6V  
)
Load Regulation  
ΔVOUT/VOUT  
-1.0  
IOUT = 1 mA to 1.5A,  
V
IN = Note 1, (Note 4)  
Output Short Circuit Current  
IOUT_SC  
A
VIN = Note 1, RLOAD < 0.1Ω,  
Peak Current  
Adjust Pin Characteristics (Adjustable Output Only)  
Adjust Pin Reference Voltage  
VADJ  
0.402  
0.410  
0.418  
V
VIN = 2.3V to VIN = 6.0V,  
I
OUT = 1 mA  
Adjust Pin Leakage Current  
IADJ  
-10  
±0.01  
40  
+10  
nA  
VIN = 6.0V, VADJ = 0V to 6V  
Adjust Temperature Coefficient  
TCVOUT  
ppm/°C Note 3  
Fixed-Output Characteristics (Fixed Output Only)  
Note 1: The minimum VIN must meet two conditions: VIN 2.3V and VIN VOUT(MAX) + VDROPOUT(MAX).  
2: VR is the nominal regulator output voltage for the fixed cases. VR = 1.2V, 1.8V, etc. VR is the desired set point output  
voltage for the adjustable cases. VR = VADJ * ((R1/R2)+1). Figure 4-1.  
3: TCVOUT = (VOUT-HIGH – VOUT-LOW) *106 / (VR * ΔTemperature). VOUT-HIGH is the highest voltage measured over the  
temperature range. VOUT-LOW is the lowest voltage measured over the temperature range.  
4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is  
tested over a load range from 1 mA to the maximum specified output current.  
5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its  
nominal value that was measured with an input voltage of VIN = VOUTMAX + VDROPOUT(MAX)  
.
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction  
temperature and the thermal resistance from junction to air. (i.e., TA, TJ, θJA). Exceeding the maximum allowable power  
dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained  
junction temperatures above 150°C can impact device reliability.  
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the  
desired junction temperature. The test time is small enough such that the rise in the junction temperature over the  
ambient temperature is not significant.  
DS22001B-page 6  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
AC/DC CHARACTERISTICS (CONTINUED)  
Electrical Specifications: Unless otherwise noted, VIN = VOUT(MAX) + VDROPOUT(MAX) Note 1, VR=1.8V for Adjustable Output,  
OUT = 1 mA, CIN = COUT = 4.7 µF (X7R Ceramic), TA = +25°C. Boldface type applies for junction temperatures, TJ (Note 7) of -  
40°C to +125°C  
I
Parameters  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
Voltage Regulation  
VOUT  
VR - 2.5%  
VR  
VR + 2.5%  
V
Note 2  
±0.5%  
Dropout Characteristics  
Dropout Voltage  
V
IN-VOUT  
330  
600  
mV  
V
Note 5, IOUT = 1.5A,  
IN(MIN) = 2.3V  
V
Power Good Characteristics  
PWRGD Input Voltage Operat-  
ing Range  
VPWRGD_VIN  
1.0  
6.0  
TA = +25°C  
1.2  
6.0  
TA = -40°C to +125°C  
For VIN < 2.3V, ISINK = 100 µA  
PWRGD Threshold Voltage  
VPWRGD_TH  
%VOUT Falling Edge  
VOUT < 2.5V Fixed, VOUT = Adj.  
(Referenced to VOUT  
)
89  
90  
1.0  
92  
92  
95  
94  
VOUT >= 2.5V Fixed  
PWRGD Threshold Hysteresis  
PWRGD Output Voltage Low  
VPWRGD_HYS  
VPWRGD_L  
2.0  
0.2  
3.0  
0.4  
%VOUT  
V
IPWRGD SINK = 1.2 mA,  
ADJ = 0V  
PWRGD Leakage  
PWRGD  
_
1
nA  
µs  
VPWRGD = VIN = 6.0V  
Rising Edge  
LK  
PWRGD Time Delay  
TPG  
200  
RPULLUP = 10 kΩ  
Detect Threshold to PWRGD  
Active Time Delay  
TVDET-PWRGD  
200  
µs  
VADJ or VOUT = VPWRGD_TH +  
20 mV to VPWRGD_TH - 20 mV  
Shutdown Input  
Logic High Input  
VSHDN-HIGH  
VSHDN-LOW  
SHDNILK  
45  
%VIN  
%VIN  
µA  
VIN = 2.3V to 6.0V  
VIN = 2.3V to 6.0V  
Logic Low Input  
15  
SHDN Input Leakage Current  
-0.1  
±0.001  
+0.1  
VIN = 6V, SHDN =VIN  
SHDN = GND  
,
AC Performance  
Output Delay From SHDN  
TOR  
eN  
100  
2.0  
µs  
SHDN = GND to VIN  
V
OUT = GND to 95% VR  
Output Noise  
µV/Hz IOUT = 200 mA, f = 1 kHz, COUT  
= 10 µF (X7R Ceramic), VOUT  
2.5V  
=
Note 1: The minimum VIN must meet two conditions: VIN 2.3V and VIN VOUT(MAX) + VDROPOUT(MAX).  
2: VR is the nominal regulator output voltage for the fixed cases. VR = 1.2V, 1.8V, etc. VR is the desired set point output  
voltage for the adjustable cases. VR = VADJ * ((R1/R2)+1). Figure 4-1.  
3: TCVOUT = (VOUT-HIGH – VOUT-LOW) *106 / (VR * ΔTemperature). VOUT-HIGH is the highest voltage measured over the  
temperature range. VOUT-LOW is the lowest voltage measured over the temperature range.  
4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is  
tested over a load range from 1 mA to the maximum specified output current.  
5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its  
nominal value that was measured with an input voltage of VIN = VOUTMAX + VDROPOUT(MAX)  
.
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction  
temperature and the thermal resistance from junction to air. (i.e., TA, TJ, θJA). Exceeding the maximum allowable power  
dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained  
junction temperatures above 150°C can impact device reliability.  
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the  
desired junction temperature. The test time is small enough such that the rise in the junction temperature over the  
ambient temperature is not significant.  
© 2006 Microchip Technology Inc.  
DS22001B-page 7  
MCP1827/MCP1827S  
AC/DC CHARACTERISTICS (CONTINUED)  
Electrical Specifications: Unless otherwise noted, VIN = VOUT(MAX) + VDROPOUT(MAX) Note 1, VR=1.8V for Adjustable Output,  
I
OUT = 1 mA, CIN = COUT = 4.7 µF (X7R Ceramic), TA = +25°C. Boldface type applies for junction temperatures, TJ (Note 7) of -  
40°C to +125°C  
Parameters  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
Power Supply Ripple Rejection  
Ratio  
PSRR  
60  
dB  
f = 100 Hz, COUT = 10 µF,  
I
OUT = 10 mA,  
INAC = 30 mV pk-pk,  
IN = 0 µF  
V
C
Thermal Shutdown Temperature  
Thermal Shutdown Hysteresis  
TSD  
150  
10  
°C  
°C  
IOUT = 100 µA, VOUT = 1.8V,  
IN = 2.8V  
V
ΔTSD  
IOUT = 100 µA, VOUT = 1.8V,  
IN = 2.8V  
V
Note 1: The minimum VIN must meet two conditions: VIN 2.3V and VIN VOUT(MAX) + VDROPOUT(MAX).  
2: VR is the nominal regulator output voltage for the fixed cases. VR = 1.2V, 1.8V, etc. VR is the desired set point output  
voltage for the adjustable cases. VR = VADJ * ((R1/R2)+1). Figure 4-1.  
3: TCVOUT = (VOUT-HIGH – VOUT-LOW) *106 / (VR * ΔTemperature). VOUT-HIGH is the highest voltage measured over the  
temperature range. VOUT-LOW is the lowest voltage measured over the temperature range.  
4: Load regulation is measured at a constant junction temperature using low duty-cycle pulse testing. Load regulation is  
tested over a load range from 1 mA to the maximum specified output current.  
5: Dropout voltage is defined as the input-to-output voltage differential at which the output voltage drops 2% below its  
nominal value that was measured with an input voltage of VIN = VOUTMAX + VDROPOUT(MAX)  
.
6: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable junction  
temperature and the thermal resistance from junction to air. (i.e., TA, TJ, θJA). Exceeding the maximum allowable power  
dissipation will cause the device operating junction temperature to exceed the maximum +150°C rating. Sustained  
junction temperatures above 150°C can impact device reliability.  
7: The junction temperature is approximated by soaking the device under test at an ambient temperature equal to the  
desired junction temperature. The test time is small enough such that the rise in the junction temperature over the  
ambient temperature is not significant.  
TEMPERATURE SPECIFICATIONS  
Electrical Specifications: Unless otherwise indicated, all limits apply for VIN = 2.3V to 6.0V.  
Parameters  
Temperature Ranges  
Sym  
Min  
Typ  
Max  
Units  
Conditions  
Operating Junction Temperature Range  
Maximum Junction Temperature  
Storage Temperature Range  
TJ  
TJ  
TA  
-40  
+125  
+150  
+150  
°C  
°C  
°C  
Steady State  
Transient  
-65  
Thermal Package Resistances  
Thermal Resistance, 5LD DDPAK  
Thermal Resistance, 3LD DDPAK  
Thermal Resistance, 5LD TO-220  
Thermal Resistance, 3LD TO-220  
θJA  
θJA  
θJA  
θJA  
31.2  
31.4  
29.3  
29.4  
°C/W 4-Layer JC51 Standard Board  
°C/W 4-Layer JC51 Standard Board  
°C/W 4-Layer JC51 Standard Board  
°C/W 4-Layer JC51 Standard Board  
DS22001B-page 8  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
2.0  
TYPICAL PERFORMANCE CURVES  
Note:  
The graphs and tables provided following this note are a statistical summary based on a limited number of  
samples and are provided for informational purposes only. The performance characteristics listed herein  
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified  
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.  
NOTE: Unless otherwise indicated, VIN = VOUT + 0.6V, IOUT = 1 mA and TA = +25°C.  
150  
140  
130  
120  
110  
100  
90  
0.1  
0.09  
0.08  
0.07  
0.06  
0.05  
0.04  
0.03  
0.02  
0.01  
0
VOUT = 1.2V adj  
VIN = 2.3V to 6.0V  
IOUT = 1 mA  
130°C  
90°C  
IOUT = 1000 mA  
IOUT = 100 mA  
25°C  
IOUT = 500 mA  
-45°C  
VOUT = 1.2V Adj  
IOUT = 0 mA  
2
3
4
5
6
-45  
-20  
5
30  
55  
80  
105  
130  
Input Voltage (V)  
Temperature (°C)  
FIGURE 2-1:  
Quiescent Current vs. Input  
FIGURE 2-4:  
Line Regulation vs.  
Voltage (1.2V Adjustable).  
Temperature (1.2V Adjustable).  
0.15  
200  
190  
180  
170  
160  
150  
IOUT = 1.0 mA to 1500 mA  
VIN=5.0V  
VOUT = 3.3V  
0.10  
0.05  
0.00  
VOUT = 0.8V  
VOUT = 5.0V  
VOUT = 1.8V  
140  
130  
120  
110  
100  
VIN=3.3V  
-0.05  
-0.10  
-0.15  
VOUT = 1.2V Adj  
VIN=2.3V  
500  
0
250  
750  
1000  
1250  
1500  
-45  
-20  
5
30  
55  
80  
105 130  
Load Current (mA)  
Temperature (°C)  
FIGURE 2-2:  
Ground Current vs. Load  
FIGURE 2-5:  
Load Regulation vs.  
Current (1.2V Adjustable).  
Temperature (Adjstable Version).  
0.411  
140  
135  
130  
125  
IOUT = 0 mA  
VOUT = 1.2V Adj  
VIN = 6.0V  
VIN = 5.0V  
0.410  
0.410  
0.409  
120  
VIN=5.0V  
VIN = 2.3V  
VIN=2.5V  
115  
110  
105  
100  
VIN=4.0V  
0.409  
0.408  
IOUT = 1.0 mA  
-45  
-20  
5
30  
55  
80  
105  
130  
-45 -20  
5
30  
55  
80  
105 130  
Temperature (°C)  
Temperature (°C)  
FIGURE 2-3:  
Junction Temperature (1.2V Adjustable).  
Quiescent Current vs.  
FIGURE 2-6:  
Temperature.  
Adjust Pin Voltage vs.  
© 2006 Microchip Technology Inc.  
DS22001B-page 9  
MCP1827/MCP1827S  
NOTE: Unless otherwise indicated, VIN = VOUT + 0.6V, IOUT = 1 mA and TA = +25°C.  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
150  
140  
130  
120  
110  
100  
90  
VOUT = 5.0V Adj  
VOUT = 0.8V  
OUT = 0 mA  
I
+130°C  
+85°C  
+25°C  
-45°C  
VOUT = 2.5V Adj  
80  
2
3
4
5
6
0
250  
500  
750  
1000 1250 1500  
Input Voltage (V)  
Load Current (mA)  
FIGURE 2-7:  
Dropout Voltage vs. Load  
FIGURE 2-10:  
Quiescent Current vs. Input  
Current (Adjustable Version).  
Voltage (0.8V Fixed).  
0.42  
150  
IOUT = 1.5A  
VOUT = 2.5V  
140 IOUT = 0 mA  
0.40  
0.38  
+130°C  
+90°C  
+25°C  
130  
120  
110  
100  
90  
VOUT = 5.0V Adj  
0.36  
0.34  
0.32  
0.30  
VOUT = 3.3V Adj  
-45°C  
VOUT = 2.5V Adj  
80  
3
3.5  
4
4.5  
5
5.5  
6
-45  
-20  
5
30  
55  
80  
105 130  
Input Voltage (V)  
Temperature (°C)  
FIGURE 2-8:  
Dropout Voltage vs.  
FIGURE 2-11:  
Quiescent Current vs. Input  
Temperature (Adjustable Version).  
Voltage (2.5V Fixed).  
370  
250.00  
200.00  
150.00  
100.00  
50.00  
VOUT = 3.3V Fixed  
VIN = 3.9V  
VIN = 4.5V  
360  
350  
340  
330  
320  
310  
300  
VOUT=0.8V  
VOUT=2.5V  
VIN = 5.0V  
VIN = 2.3V for VR=0.8V  
VIN = 3.1V for VR=2.5V  
0.00  
-45  
-20  
5
30  
55  
80  
105 130  
0
250  
500  
750  
1000 1250 1500  
Temperature (°C)  
Load Current (mA)  
FIGURE 2-9:  
Power Good (PWRGD)  
FIGURE 2-12:  
Ground Current vs. Load  
Time Delay vs. Temperature (Adjustable  
Version).  
Current.  
DS22001B-page 10  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
NOTE: Unless otherwise indicated, VIN = VOUT + 0.6V, IOUT = 1 mA and TA = +25°C.  
130  
125  
120  
115  
110  
105  
100  
95  
0.045  
0.040  
0.035  
0.030  
0.025  
0.020  
0.015  
IOUT = 0 mA  
VR = 2.5V  
IN = 3.1 to 6.0V  
V
IOUT = 1 mA  
IOUT = 100 mA  
VOUT = 0.8V  
IOUT = 1000 mA  
IOUT = 500 mA  
IOUT = 1500 mA  
VOUT = 2.5V  
-45  
-20  
5
30  
55  
80  
105  
130  
-45  
-20  
5
30  
55  
80  
105  
130  
Temperature (°C)  
Temperature (°C)  
FIGURE 2-13:  
Quiescent Current vs.  
FIGURE 2-16:  
Line Regulation vs.  
Temperature.  
Temperature (2.5V Fixed).  
0.30  
0.30  
VR = 0.8V  
VIN = 2.3V  
VOUT = 0.8V  
0.20  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
0.10  
0.00  
VIN = 6.0V  
VIN = 4.0V  
VIN = 2.3V  
-0.10  
-0.20  
-0.30  
IOUT = 1 mA to 1500 mA  
-45  
-20  
5
30  
55  
80  
105  
130  
-45  
-20  
5
30  
55  
80  
105 130  
Temperature (°C)  
Temperature (°C)  
FIGURE 2-14:  
I
vs. Temperature.  
FIGURE 2-17:  
Temperature (V  
Load Regulation vs.  
< 2.5V Fixed).  
SHDN  
OUT  
0.10  
0.08  
0.06  
0.04  
0.00  
-0.05  
-0.10  
-0.15  
-0.20  
-0.25  
-0.30  
-0.35  
-0.40  
-0.45  
IOUT = 1 mA to 1500 mA  
IOUT = 1 mA  
VOUT = 2.5V  
VOUT = 5.0V  
IOUT = 1A  
IOUT = 100 mA  
IOUT = 500mA  
VOUT = 0.8V  
VIN = 2.3V to 6.0V  
0.02  
0.00  
-45  
-20  
5
30  
55  
80  
105  
130  
-45  
-20  
5
30  
55  
80  
105  
130  
Temperature (°C)  
Temperature (°C)  
FIGURE 2-15:  
Temperature (0.8V Fixed).  
Line Regulation vs.  
FIGURE 2-18:  
Temperature (V  
Load Regulation vs.  
2.5V Fixed).  
OUT  
© 2006 Microchip Technology Inc.  
DS22001B-page 11  
MCP1827/MCP1827S  
NOTE: Unless otherwise indicated, VIN = VOUT + 0.6V, IOUT = 1 mA and TA = +25°C.  
0.40  
10.000  
1.000  
0.100  
0.010  
Temperature = 25°C  
COUT=1 ȝF ceramic X7R  
CIN=10 ȝF ceramic  
0.35  
0.30  
0.25  
0.20  
0.15  
0.10  
0.05  
0.00  
VR=0.8V, VIN=2.3V  
VOUT = 2.5V  
IOUT=200 mA  
VOUT = 5.0V  
VR=3.3V, VIN=4.1V  
0
250  
500  
750 1000 1250 1500  
0.01  
0.1  
1
10  
100  
1000  
Frequency (kHz)  
Load Current (mA)  
FIGURE 2-19:  
Dropout Voltage vs. Load  
FIGURE 2-22:  
Output Noise Voltage  
Current.  
Density vs. Frequency.  
0.45  
0.40  
0.35  
0
-10  
-20  
-30  
-40  
IOUT = 1.5A  
VOUT = 5.0V  
VR=1.2V Adj  
C
OUT=10 μF ceramic X7R  
-50  
-60  
-70  
-80  
VIN=3.1V  
0.30  
0.25  
CIN=0 μF  
VOUT = 2.5V  
IOUT=10 mA  
-45  
-20  
5
30  
55  
80  
105  
130  
0.01  
0.1  
1
10  
100  
1000  
Frequency (kHz)  
Temperature (°C)  
FIGURE 2-20:  
Dropout Voltage vs.  
FIGURE 2-23:  
Power Supply Ripple  
Temperature.  
Rejection (PSRR) vs. Frequency (V  
Adj.).  
= 1.2V  
OUT  
0
-10  
-20  
-30  
3.00  
2.50  
2.00  
1.50  
1.00  
0.50  
0.00  
-40  
VR=1.2V Adj  
-50  
-60  
-70  
-80  
C
OUT=22 μF ceramic X7R  
VIN=3.1V  
IN=0 μF  
IOUT=10 mA  
C
VOUT = 2.5V  
Temperature = 25°C  
3.0  
3.5  
4.0  
4.5  
5.0  
5.5  
6.0  
0.01  
0.1  
1
10  
100  
1000  
Frequency (kHz)  
Input Voltage (V)  
FIGURE 2-21:  
Short Circuit Current vs.  
FIGURE 2-24:  
Power Supply Ripple  
Input Voltage.  
Rejection (PSRR) vs. Frequency (V  
= 1.2V  
OUT  
Adj.).  
DS22001B-page 12  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
NOTE: Unless otherwise indicated, VIN = VOUT + 0.6V, IOUT = 1 mA and TA = +25°C.  
0
-10  
-20  
-30  
-40  
-50  
-60  
-70  
-80  
VR=3.3V Fixed  
OUT=10 μF ceramic X7R  
VIN=3.9V  
C
CIN=0 μF  
IOUT=10 mA  
0.01  
0.1  
1
10  
100  
1000  
Frequency (kHz)  
FIGURE 2-25:  
Rejection (PSRR) vs. Frequency (V  
Fixed).  
Power Supply Ripple  
FIGURE 2-28:  
Shutdown.  
2.5V (Adj.) Startup from  
Power Good (PWRGD)  
Dynamic Line Response  
= 3.3V  
OUT  
0
-10  
-20  
-30  
-40  
VR=3.3V Fixed  
-50  
-60  
-70  
-80  
COUT=22 μF ceramic X7R  
IN=3.9V  
IN=0 μF  
IOUT=10 mA  
V
C
0.01  
0.1  
1
10  
100  
1000  
Frequency (kHz)  
FIGURE 2-29:  
Timing.  
FIGURE 2-26:  
Rejection (PSRR) vs. Frequency (V  
Fixed).  
Power Supply Ripple  
= 3.3V  
OUT  
FIGURE 2-30:  
FIGURE 2-27:  
2.5V (Adj.) Startup from V .  
IN  
(3.3V Fixed).  
© 2006 Microchip Technology Inc.  
DS22001B-page 13  
MCP1827/MCP1827S  
NOTE: Unless otherwise indicated, VIN = VOUT + 0.6V, IOUT = 1 mA and TA = +25°C.  
FIGURE 2-31:  
Dynamic Load Response  
FIGURE 2-32:  
Dynamic Load Response  
(3.3V Fixed, 10 mA to 1500 mA).  
(3.3V Fixed, 100 mA to 1500 mA).  
DS22001B-page 14  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
3.0  
PIN DESCRIPTION  
The descriptions of the pins are listed in Table 3-1.  
TABLE 3-1:  
PIN FUNCTION TABLE  
3-Pin Fixed  
Output  
5-Pin Fixed  
Output  
Adjustable  
Output  
Name  
Description  
1
1
2
1
2
SHDN  
VIN  
Shutdown Control Input (active-low)  
Input Voltage Supply  
2
3
3
GND  
VOUT  
PWRGD  
ADJ  
Ground  
3
4
4
Regulated Output Voltage  
Power Good Output  
Pad  
5
5
Pad  
Voltage Adjust/Sense Input  
Exposed Pad of the Package (ground potential)  
Pad  
EP  
3.1  
Input Voltage Supply (VIN)  
3.4  
Power Good Output (PWRGD)  
Connect the unregulated or regulated input voltage  
source to VIN. If the input voltage source is located  
several inches away from the LDO, or the input source  
is a battery, it is recommended that an input capacitor  
be used. A typical input capacitance value of 1 µF to  
10 µF should be sufficient for most applications.  
The PWRGD output is an open-drain output used to  
indicate when the LDO output voltage is within 92%  
(typically) of its nominal regulation value. The PWRGD  
threshold has a typical hysteresis value of 2%. The  
PWRGD output is delayed by 200 µs (typical) from the  
time the LDO output is within 92% + 3% (max  
hysteresis) of the regulated output value on power-up.  
This delay time is internally fixed.  
3.2  
Shutdown Control Input (SHDN)  
The SHDN input is used to turn the LDO output voltage  
on and off. When the SHDN input is at a logic-high  
level, the LDO output voltage is enabled. When the  
SHDN input is pulled to a logic-low level, the LDO  
output voltage is disabled. When the SHDN input is  
pulled low, the PWRGD output also goes low and the  
LDO enters a low quiescent current shutdown state  
where the typical quiescent current is 0.1 µA.  
3.5  
Output Voltage Adjust Input (ADJ)  
For adjustable applications, the output voltage is  
connected to the ADJ input through a resistor divider  
that sets the output voltage regulation value. This  
provides the user the capability to set the output  
voltage to any value they desire within the 0.8V to 5.0V  
range of the device.  
3.3  
Ground (GND)  
3.6  
Regulated Output Voltage (VOUT)  
Connect the GND pin of the LDO to a quiet circuit  
ground. This will help the LDO power supply rejection  
ratio and noise performance. The ground pin of the  
LDO only conducts the quiescent current of the LDO  
(typically 120 µA), so a heavy trace is not required.  
For applications have switching or noisy inputs tie the  
GND pin to the return of the output capacitor. Ground  
planes help lower inductance and voltage spikes  
caused by fast transient load currents and are  
recommended for applications that are subjected to  
fast load transients.  
The VOUT pin is the regulated output voltage of the  
LDO. A minimum output capacitance of 1.0 µF is  
required for LDO stability. The MCP1827/MCP1827S is  
stable with ceramic, tantalum and aluminum-electro-  
lytic capacitors. See Section 4.3 “Output Capacitor”  
for output capacitor selection guidance.  
3.7  
Exposed Pad (EP)  
The DDPAK and TO-220 package have an exposed tab  
on the package. A heat sink may be mount to the tab to  
aid in the removal of heat from the package during  
operation. The exposed tab is at the ground potential of  
the LDO.  
© 2006 Microchip Technology Inc.  
DS22001B-page 15  
MCP1827/MCP1827S  
EQUATION 4-2:  
R1 = R2  
4.0  
DEVICE OVERVIEW  
VOUT VADJ  
--------------------------------  
VADJ  
The MCP1827/MCP1827S is a high output current,  
Low Dropout (LDO) voltage regulator. The low dropout  
voltage of 330 mV typical at 1.5A of current makes it  
ideal for battery-powered applications. Unlike other  
high output current LDOs, the MCP1827/MCP1827S  
only draws a maximum of 220 µA of quiescent current.  
The MCP1827 has a shutdown control input and a  
power good output.  
Where:  
VOUT  
VADJ  
=
=
LDO Output Voltage  
ADJ Pin Voltage  
(typically 0.41V)  
4.2  
Output Current and Current  
Limiting  
4.1  
LDO Output Voltage  
The 5-pin MCP1827 LDO is available with either a fixed  
output voltage or an adjustable output voltage. The  
output voltage range is 0.8V to 5.0V for both versions.  
The 3-pin MCP1827S LDO is available as a fixed  
voltage device.  
The MCP1827/MCP1827S LDO is tested and ensured  
to supply a minimum of 1.5A of output current. The  
MCP1827/MCP1827S has no minimum output load, so  
the output load current can go to 0 mA and the LDO will  
continue to regulate the output voltage to within  
tolerance.  
4.1.1  
ADJUST INPUT  
The MCP1827/MCP1827S also incorporates an output  
current limit. If the output voltage falls below 0.7V due  
to an overload condition (usually represents a shorted  
load condition), the output current is limited to 2.2A  
(typical). If the overload condition is a soft overload, the  
MCP1827/MCP1827S will supply higher load currents  
of up to 3A. The MCP1827/MCP1827S should not be  
operated in this condition continuously as it may result  
in failure of the device. However, this does allow for  
device usage in applications that have higher pulsed  
load currents having an average output current value of  
1.5A or less.  
The adjustable version of the MCP1827 uses the ADJ  
pin (pin 5) to get the output voltage feedback for output  
voltage regulation. This allows the user to set the  
output voltage of the device with two external resistors.  
The nominal voltage for ADJ is 0.41V.  
Figure 4-1 shows the adjustable version of the  
MCP1827. Resistors R1 and R2 form the resistor  
divider network necessary to set the output voltage.  
With this configuration, the equation for setting VOUT is:  
EQUATION 4-1:  
Output overload conditions may also result in an over-  
temperature shutdown of the device. If the junction  
temperature rises above 150°C, the LDO will shut  
down the output voltage. See Section 4.8 “Overtem-  
perature Protection” for more information on  
overtemperature shutdown.  
R1 + R2  
------------------  
VOUT = VADJ  
R2  
Where:  
VOUT  
VADJ  
=
=
LDO Output Voltage  
ADJ Pin Voltage  
(typically 0.41V)  
4.3  
Output Capacitor  
The MCP1827/MCP1827S requires a minimum output  
capacitance of 1 µF for output voltage stability. Ceramic  
capacitors are recommended because of their size,  
cost and environmental robustness qualities.  
MCP1827-ADJ  
V
OUT  
On  
R
1
C2  
1 µF  
1
2
3
4
5
Off  
SHDN  
ADJ  
Aluminum-electrolytic and tantalum capacitors can be  
used on the LDO output as well. The Equivalent Series  
Resistance (ESR) of the electrolytic output capacitor  
must be no greater than 1 ohm. The output capacitor  
should be located as close to the LDO output as is  
practical. Ceramic materials X7R and X5R have low  
temperature coefficients and are well within the  
acceptable ESR range required. A typical 1 µF X7R  
0805 capacitor has an ESR of 50 milli-ohms.  
V
IN  
C
R
1
2
GND  
4.7 µF  
FIGURE 4-1:  
Typical adjustable output  
voltage application circuit.  
The allowable resistance value range for resistor R2 is  
from 10 kΩ to 200 kΩ. Solving the equation for R1  
yields the following equation:  
Larger LDO output capacitors can be used with the  
MCP1827/MCP1827S  
to  
improve  
dynamic  
performance and power supply ripple rejection  
performance. A maximum of 22 µF is recommended.  
Aluminum-electrolytic capacitors are not recom-  
mended for low-temperature applications of < -25°C.  
DS22001B-page 16  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
4.4  
Input Capacitor  
Low input source impedance is necessary for the LDO  
output to operate properly. When operating from  
batteries, or in applications with long lead length  
(> 10 inches) between the input source and the LDO,  
some input capacitance is recommended. A minimum  
of 1.0 µF to 4.7 µF is recommended for most  
applications.  
V
PWRGD_TH  
V
OUT  
T
PG  
V
OH  
T
VDET_PWRGD  
For applications that have output step load  
requirements, the input capacitance of the LDO is very  
important. The input capacitance provides the LDO  
with a good local low-impedance source to pull the  
transient currents from in order to respond quickly to  
the output load step. For good step response  
performance, the input capacitor should be of  
equivalent (or higher) value than the output capacitor.  
The capacitor should be placed as close to the input of  
the LDO as is practical. Larger input capacitors will also  
help reduce any high-frequency noise on the input and  
output of the LDO and reduce the effects of any  
inductance that exists between the input source  
voltage and the input capacitance of the LDO.  
PWRGD  
V
OL  
FIGURE 4-2:  
Power Good Timing.  
V
IN  
T
OR  
70 µs  
30 µs  
4.5  
Power Good Output (PWRGD)  
T
PG  
SHDN  
The PWRGD output is used to indicate when the output  
voltage of the LDO is within 92% (typical value, see  
Section 1.0 “Electrical Characteristics” for Minimum  
and Maximum specifications) of its nominal regulation  
value.  
V
OUT  
As the output voltage of the LDO rises, the PWRGD  
output will be held low until the output voltage has  
exceeded the power good threshold plus the hysteresis  
value. Once this threshold has been exceeded, the  
power good time delay is started (shown as TPG in the  
Electrical Characteristics table). The power good time  
delay is fixed at 200 µs (typical). After the time delay  
period, the PWRGD output will go high, indicating that  
the output voltage is stable and within regulation limits.  
PWRGD  
FIGURE 4-3:  
Shutdown.  
Power Good Timing from  
If the output voltage of the LDO falls below the power  
good threshold, the power good output will transition  
low. The power good circuitry has a 170 µs delay when  
detecting a falling output voltage, which helps to  
increase noise immunity of the power good output and  
avoid false triggering of the power good output during  
fast output transients. See Figure 4-2 for power good  
timing characteristics.  
4.6  
Shutdown Input (SHDN)  
The SHDN input is an active-low input signal that turns  
the LDO on and off. The SHDN threshold is a  
percentage of the input voltage. The typical value of  
this shutdown threshold is 30% of VIN, with minimum  
and maximum limits over the entire operating  
temperature range of 45% and 15%, respectively.  
When the LDO is put into Shutdown mode using the  
SHDN input, the power good output is pulled low  
immediately, indicating that the output voltage will be  
out of regulation. The timing diagram for the power  
good output when using the shutdown input is shown in  
Figure 4-3.  
The SHDN input will ignore low-going pulses (pulses  
meant to shut down the LDO) that are up to 400 ns in  
pulse width. If the shutdown input is pulled low for more  
than 400 ns, the LDO will enter Shutdown mode. This  
small bit of filtering helps to reject any system noise  
spikes on the shutdown input signal.  
The power good output is an open-drain output that can  
be pulled up to any voltage that is equal to or less than  
the LDO input voltage. This output is capable of sinking  
1.2 mA (VPWRGD < 0.4V maximum).  
On the rising edge of the SHDN input, the shutdown  
circuitry has a 30 µs delay before allowing the LDO  
output to turn on. This delay helps to reject any false  
turn-on signals or noise on the SHDN input signal. After  
© 2006 Microchip Technology Inc.  
DS22001B-page 17  
MCP1827/MCP1827S  
the 30 µs delay, the LDO output enters its soft-start  
period as it rises from 0V to its final regulation value. If  
the SHDN input signal is pulled low during the 30 µs  
delay period, the timer will be reset and the delay time  
will start over again on the next rising edge of the  
SHDN input. The total time from the SHDN input going  
high (turn-on) to the LDO output being in regulation is  
typically 100 µs. See Figure 4-4 for a timing diagram of  
the SHDN input.  
4.8  
Overtemperature Protection  
The MCP1827/MCP1827S LDO has temperature-  
sensing circuitry to prevent the junction temperature  
from exceeding approximately 150°C. If the LDO  
junction temperature does reach 150°C, the LDO  
output will be turned off until the junction temperature  
cools to approximately 140°C, at which point the LDO  
output will automatically resume normal operation. If  
the internal power dissipation continues to be  
excessive, the device will again shut off. The junction  
temperature of the die is a function of power  
dissipation, ambient temperature and package thermal  
resistance. See Section 5.0 “Application Circuits/  
Issues” for more information on LDO power  
dissipation and junction temperature.  
T
OR  
400 ns (typ)  
70 µs  
30 µs  
SHDN  
V
OUT  
FIGURE 4-4:  
Shutdown Input Timing  
Diagram.  
4.7  
Dropout Voltage and Undervoltage  
Lockout  
Dropout voltage is defined as the input-to-output  
voltage differential at which the output voltage drops  
2% below the nominal value that was measured with a  
VR  
+ 0.6V differential applied. The MCP1827/  
MCP1827S LDO has a very low dropout voltage  
specification of 330 mV (typical) at 1.5A of output  
current. See Section 1.0 “Electrical Characteristics”  
for maximum dropout voltage specifications.  
The MCP1827/MCP1827S LDO operates across an  
input voltage range of 2.3V to 6.0V and incorporates  
input Undervoltage Lockout (UVLO) circuitry that keeps  
the LDO output voltage off until the input voltage  
reaches a minimum of 2.18V (typical) on the rising  
edge of the input voltage. As the input voltage falls, the  
LDO output will remain on until the input voltage level  
reaches 2.04V (typical).  
Since the MCP1827/MCP1827S LDO undervoltage  
lockout activates at 2.04V as the input voltage is falling,  
the dropout voltage specification does not apply for  
output voltages that are less than 1.9V.  
For high-current applications, voltage drops across the  
PCB traces must be taken into account. The trace  
resistances can cause significant voltage drops  
between the input voltage source and the LDO. For  
applications with input voltages near 2.3V, these PCB  
trace voltage drops can sometimes lower the input  
voltage enough to trigger  
undervoltage lockout.  
a shutdown due to  
DS22001B-page 18  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
In addition to the LDO pass element power dissipation,  
there is power dissipation within the MCP1827/  
MCP1827S as a result of quiescent or ground current.  
The power dissipation as a result of the ground current  
can be calculated using the following equation:  
5.0  
5.1  
APPLICATION CIRCUITS/  
ISSUES  
Typical Application  
The MCP1827/MCP1827S is used for applications that  
require high LDO output current and a power good  
output.  
EQUATION 5-2:  
PI(GND) = VIN(MAX) × IVIN  
Where:  
V
= 2.5V @ 1.5A  
OUT  
PI(GND  
=
Power dissipation due to the  
quiescent current of the LDO  
MCP1827-2.5  
R
On  
1
C
10 µF  
1
3
2 4  
5
2
10 kΩ  
Off  
VIN(MAX)  
IVIN  
=
=
Maximum input voltage  
SHDN  
Current flowing in the VIN pin  
with no LDO output current  
(LDO quiescent current)  
V
IN  
C
3.3V  
1
4.7 µF  
PWRGD  
GND  
The total power dissipated within the MCP1827/  
MCP1827S is the sum of the power dissipated in the  
LDO pass device and the P(IGND) term. Because of the  
CMOS construction, the typical IGND for the MCP1827/  
MCP1827S is 120 µA. Operating at a maximum of  
3.465V results in a power dissipation of 0.49 milli-  
Watts. For most applications, this is small compared to  
the LDO pass device power dissipation and can be  
neglected.  
FIGURE 5-1:  
Typical Application Circuit.  
5.1.1  
APPLICATION CONDITIONS  
Package Type = TO-220-5  
Input Voltage Range = 3.3V ± 5%  
IN maximum = 3.465V  
IN minimum = 3.135V  
VDROPOUT (max) = 0.550V  
OUT (typical) = 2.5V  
OUT = 1.5A maximum  
V
V
The maximum continuous operating junction  
temperature specified for the MCP1827/MCP1827S is  
+125°C. To estimate the internal junction temperature  
of the MCP1827/MCP1827S, the total internal power  
dissipation is multiplied by the thermal resistance from  
junction to ambient (RθJA) of the device. The thermal  
resistance from junction to ambient for the TO-220-5  
package is estimated at 29.3° C/W.  
V
I
PDISS (typical) = 1.2W  
Temperature Rise = 35.2°C  
5.2  
Power Calculations  
EQUATION 5-3:  
TJ(MAX) = PTOTAL × RθJA + TAMAX  
5.2.1  
POWER DISSIPATION  
The internal power dissipation within the MCP1827/  
MCP1827S is a function of input voltage, output  
voltage, output current and quiescent current.  
Equation 5-1 can be used to calculate the internal  
power dissipation for the LDO.  
TJ(MAX) = Maximum continuous junction  
temperature  
PTOTAL = Total device power dissipation  
RθJA = Thermal resistance from junction to  
ambient  
EQUATION 5-1:  
TAMAX = Maximum ambient temperature  
PLDO = (VIN(MAX)) VOUT(MIN)) × IOUT(MAX))  
Where:  
PLDO  
=
LDO Pass device internal  
power dissipation  
VIN(MAX)  
=
=
Maximum input voltage  
VOUT(MIN)  
LDO minimum output voltage  
© 2006 Microchip Technology Inc.  
DS22001B-page 19  
MCP1827/MCP1827S  
The maximum power dissipation capability for a  
package can be calculated given the junction-to-  
ambient thermal resistance and the maximum ambient  
temperature for the application. Equation 5-4 can be  
used to determine the package maximum internal  
power dissipation.  
5.3  
Typical Application  
Internal power dissipation, junction temperature rise,  
junction temperature and maximum power dissipation  
is calculated in the following example. The power  
dissipation as a result of ground current is small  
enough to be neglected.  
EQUATION 5-4:  
5.3.1  
POWER DISSIPATION EXAMPLE  
(TJ(MAX) TA(MAX)  
)
PD(MAX) = ---------------------------------------------------  
RθJA  
Package  
Package Type = TO-220-5  
PD(MAX) = Maximum device power dissipation  
Input Voltage  
TJ(MAX) = maximum continuous junction  
temperature  
V
IN = 3.3V ± 5%  
LDO Output Voltage and Current  
TA(MAX) = maximum ambient temperature  
V
OUT = 2.5V  
OUT = 1.5A  
RθJA = Thermal resistance from junction to  
I
ambient  
Maximum Ambient Temperature  
A(MAX) = 60°C  
Internal Power Dissipation  
T
EQUATION 5-5:  
TJ(RISE) = PD(MAX) × RθJA  
PLDO(MAX) = (VIN(MAX) – VOUT(MIN)) x IOUT(MAX)  
PLDO = ((3.3V x 1.05) – (2.5V x 0.975))  
x 1.5A  
TJ(RISE) = Rise in device junction temperature  
over the ambient temperature  
PLDO = 1.54 Watts  
PD(MAX) = Maximum device power dissipation  
RθJA = Thermal resistance from junction to  
5.3.1.1  
Device Junction Temperature Rise  
ambient  
The internal junction temperature rise is a function of  
internal power dissipation and the thermal resistance  
from junction-to-ambient for the application. The  
thermal resistance from junction-to-ambient (RθJA) is  
derived from EIA/JEDEC standards for measuring  
thermal resistance. The EIA/JEDEC specification is  
JESD51. The standard describes the test method and  
board specifications for measuring the thermal  
resistance from junction to ambient. The actual thermal  
EQUATION 5-6:  
TJ = TJ(RISE) + TA  
TJ = Junction temperature  
TJ(RISE) = Rise in device junction temperature  
over the ambient temperature  
TA = Ambient temperature  
resistance for a particular application can vary  
depending on many factors such as copper area and  
thickness. Refer to AN792, “A Method to Determine  
How Much Power a SOT23 Can Dissipate in an Appli-  
cation” (DS00792), for more information regarding this  
subject.  
TJ(RISE) = PTOTAL x RθJA  
TJRISE = 1.54 W x 29.3° C/W  
TJRISE = 45.12°C  
DS22001B-page 20  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
5.3.1.2  
Junction Temperature Estimate  
To estimate the internal junction temperature, the  
calculated temperature rise is added to the ambient or  
offset temperature. For this example, the worst-case  
junction temperature is estimated below:  
TJ = TJRISE + TA(MAX)  
TJ = 45.12°C + 60.0°C  
TJ = 105.12°C  
As you can see from the result, this application will be  
operating within the maximum operating junction  
temperature of 125°C.  
5.3.1.3  
Maximum Package Power  
Dissipation at 60°C Ambient  
Temperature  
TO-220-5 (29.3° C/W RθJA):  
PD(MAX) = (125°C – 60°C) / 29.3° C/W  
PD(MAX) = 2.218W  
DDPAK-5 (31.2°C/Watt RθJA):  
PD(MAX) = (125°C – 60°C)/ 31.2° C/W  
PD(MAX) = 2.083W  
From this table you can see the difference in maximum  
allowable power dissipation between the TO-220-5  
package and the DDPAK-5 package.  
© 2006 Microchip Technology Inc.  
DS22001B-page 21  
MCP1827/MCP1827S  
6.0  
6.1  
PACKAGING INFORMATION  
Package Marking Information  
3-Lead DDPAK (MCP1827S)  
Example:  
XXXXXXXXX  
XXXXXXXXX  
YYWWNNN  
MCP1827S  
0.8EEB^
0630256  
e
3
1
2
3
1
2
3
3-Lead TO-220 (MCP1827S)  
Example:  
MCP1827S  
XXXXXXXXX  
XXXXXXXXX  
YYWWNNN  
e
3
ADJAB^
0630256  
1
2
3
1
2
3
5-Lead DDPAK (Fixed) (MCP1827)  
Example:  
MCP1827  
e3  
1.0EET
XXXXXXXXX  
XXXXXXXXX  
YYWWNNN  
0630256  
1 2 3 4 5  
Example:  
1 2 3 4 5  
5-Lead TO-220 (Adj) (MCP1827)  
MCP1827  
08EATe3  
0630256  
XXXXXXXXX  
XXXXXXXXX  
YYWWNNN  
1 2 3 4 5  
1 2 3 4 5  
Legend: XX...X Customer-specific information  
Y
YY  
WW  
NNN  
Year code (last digit of calendar year)  
Year code (last 2 digits of calendar year)  
Week code (week of January 1 is week ‘01’)  
Alphanumeric traceability code  
e
3
Pb-free JEDEC designator for Matte Tin (Sn)  
*
This package is Pb-free. The Pb-free JEDEC designator (  
can be found on the outer packaging for this package.  
)
e3  
Note: In the event the full Microchip part number cannot be marked on one line, it will  
be carried over to the next line, thus limiting the number of available  
characters for customer-specific information.  
DS22001B-page 22  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
3-Lead Plastic (EB) DDPAK  
Note:  
For the most current package drawings, please  
see the Microchip Packaging Specification located  
at http://www.microchip.com/packaging  
E
L3  
E1  
D2  
D
D1  
1
b
e
BOTTOM VIEW  
TOP VIEW  
b1  
α
(5X)  
c2  
A
φ
A1  
c
L
Units  
INCHES  
*
MILLIMETERS  
Dimension Limits  
MIN  
NOM  
MAX  
MIN  
NOM  
3
MAX  
Number of Pins  
Pitch  
3
e
A
1.00 BSC  
2.54 BSC  
4.50  
Overall Height  
Standoff  
.170  
.000  
.385  
.177  
.005  
.398  
.183  
4.32  
4.65  
§
A1  
E
.010  
.410  
0.00  
9.78  
0.13  
0.25  
Overall Width  
10.11  
6.50 REF  
8.89  
10.41  
Exposed Pad Width  
Molded Package Length  
Overall Length  
Exposed Pad Length  
Lead Thickness  
Pad Thickness  
Lower Lead Width  
Upper Lead Width  
Foot Length  
E1  
D
.256 REF  
.330  
.549  
.350  
.577  
.370  
.605  
8.38  
9.40  
D1  
13.94  
14.66  
7.70 REF  
0.51  
15.37  
D2  
c
.303 REF  
.014  
.045  
.026  
.049  
.068  
.045  
--  
.020  
--  
.026  
.055  
.037  
.051  
.110  
.067  
0.36  
1.14  
0.66  
1.24  
1.73  
1.14  
--  
0.66  
1.40  
0.94  
1.30  
2.79  
1.70  
c2  
b
--  
.032  
.050  
--  
0.81  
b1  
L
1.27  
--  
Pad Length  
L3  
φ
--  
--  
Foot Angle  
--  
8°  
7°  
--  
8°  
7°  
α
Mold Draft Angle  
3°  
--  
3°  
--  
*
Controlling Parameter  
§
Significant Characteristic  
Notes:  
Dimensions D and E do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side.  
BSC: Basic Dimension. Theoretically, exact value shown without tolerances.  
See ASME Y14.5M  
REF: Reference Dimension, usually without tolerance, for information purposes only.  
See ASME Y14.5M  
Revised 07-19-05  
JEDEC equivalent: TO-252  
Drawing No. C04-011  
© 2006 Microchip Technology Inc.  
DS22001B-page 23  
MCP1827/MCP1827S  
3-Lead Plastic Transistor Outline (AB) (TO-220)  
Note:  
For the most current package drawings, please  
see the Microchip Packaging Specification located  
at http://www.microchip.com/packaging  
A
E
φP  
A1  
E3  
E/2  
E1  
Q
H1  
D3  
D4  
D2  
α
D
5X  
D1  
L1  
BOTTOM: VARIANT A  
BOTTOM: VARIANT B  
L
b2  
PIN 1  
PIN n  
b
c
e
A2  
e1  
Units  
INCHES*  
NOM  
3
MILLIMETERS  
NOM  
Dimension Limits  
MIN  
MAX  
MIN  
MAX  
n
e
Number of Pins  
Pitch  
3
.100 BSC  
2.54 BSC  
Overall Pin Pitch  
Overall Height  
Tab Thickness  
Base to Lead  
Overall Width  
e1  
A
A1  
A2  
E
.200 BSC  
5.08 BSC  
.140  
-
.190  
3.56  
-
4.83  
.020  
.080  
.380  
.270  
.251  
.100  
.560  
.330  
.480  
.243  
.303  
.230  
.139  
.500  
-
-
.055  
.120  
.420  
.350  
.261  
.120  
.650  
.361  
.507  
.253  
.313  
.270  
.156  
.580  
.250  
8°  
0.51  
2.03  
9.65  
6.86  
6.38  
2.54  
14.22  
8.38  
12.19  
6.17  
7.70  
5.84  
3.53  
12.70  
2.10  
0
-
1.40  
3.05  
10.67  
8.89  
6.63  
3.05  
16.51  
9.17  
12.88  
6.43  
7.95  
6.86  
3.96  
14.73  
6.35  
8°  
-
-
-
-
Exposed Tab Width  
E1  
-
-
– (SEE BOTTOM VARIANT B)  
Hole Center to Tab Edge  
Overall Length  
E3  
.256  
6.50  
Q
-
-
D
-
-
Molded Package Length  
Exposed Tab Length  
– (SEE BOTTOM VARIANT B)  
– (SEE BOTTOM VARIANT B)  
Tab Length  
D1  
D2  
D3  
D4  
H1  
-
-
-
-
.248  
6.30  
.308  
7.82  
-
-
Mounting Hole Diameter  
Lead Length  
φP  
L
-
-
-
-
Lead Shoulder  
L1  
-
-
-
-
Foot Angle  
α
0
c
Lead Thickness  
.012  
.015  
.045  
-
.024  
.040  
.070  
0.30  
0.38  
1.14  
-
0.61  
1.02  
1.78  
Lead Width  
b
.027  
.057  
0.69  
1.45  
Shoulder Width  
b2  
*Controlling Parameter  
Notes:  
Dimensions D1 and E do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side.  
BSC: Basic Dimension. Theoretically exact value shown without tolerances.  
See ASME Y14.5M  
Drawing No. C04-158  
DS22001B-page 24  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
5-Lead Plastic (ET) DDPAK  
Note:  
For the most current package drawings, please  
see the Microchip Packaging Specification located  
at http://www.microchip.com/packaging  
E
L3  
E1  
D2  
D
D1  
1
e
b
BOTTOM VIEW  
α
TOP VIEW  
(5X)  
c2  
A
Φ
A1  
c
L
Units  
Dimension Limits  
INCHES  
NOM  
*
MILLIMETERS  
MIN  
MAX  
MIN  
NOM  
5
MAX  
Number of Pins  
Pitch  
5
e
A
.067 BSC  
1.70 BSC  
4.50  
Overall Height  
Standoff  
.170  
.000  
.385  
.177  
.183  
4.32  
0.00  
9.78  
4.65  
§
A1  
E
.005  
.398  
.010  
.410  
0.13  
0.25  
Overall Width  
10.11  
6.50 REF  
8.89  
10.41  
Exposed Pad Width  
Molded Package Length  
Overall Length  
Exposed Pad Length  
Lead Thickness  
Pad Thickness  
Lead Width  
E1  
D
.256 REF  
.330  
.549  
.350  
.577  
.370  
.605  
8.38  
9.40  
D1  
13.94  
14.66  
7.75 REF  
0.51  
15.37  
D2  
c
.303 REF  
.014  
.045  
.026  
.068  
.045  
--  
.020  
--  
.026  
.055  
.037  
.110  
.067  
0.36  
1.14  
0.66  
1.73  
1.14  
--  
0.66  
1.40  
0.94  
2.79  
1.70  
c2  
b
--  
.032  
.089  
--  
0.81  
Foot Length  
L
2.26  
Pad Length  
L3  
Φ
α
--  
Foot Angle  
--  
8°  
7°  
--  
8°  
7°  
Mold Draft Angle  
3°  
--  
3°  
--  
*
Controlling Parameter  
§
Significant Characteristic  
Notes:  
Dimensions D and E do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254mm) per side.  
BSC: Basic Dimension. Theoretically exact value shown without tolerances.  
See ASME Y14.5M  
REF: Reference Dimension, usually without tolerance, for information purposes only.  
See ASME Y14.5M  
JEDEC equivalent: TO-252  
Drawing No. C04-012  
Revised 07-19-05  
© 2006 Microchip Technology Inc.  
DS22001B-page 25  
MCP1827/MCP1827S  
5-Lead Plastic Transistor Outline (AT) (TO-220)  
Note:  
For the most current package drawings, please  
see the Microchip Packaging Specification located  
at http://www.microchip.com/packaging  
L
H1  
Q
β
e3  
e1  
E
e
EJECTOR PIN  
ØP  
(5°)  
α
C1  
A
J1  
F
D
Units  
e
INCHES  
MIN  
.060  
.263  
.030  
.160  
.385  
.560  
.234  
.045  
.103  
.146  
.540  
.090  
.014  
.025  
3°  
*
MILLIMETERS  
MIN  
Dimension Limits  
MAX  
.072  
.273  
.040  
.190  
.415  
.590  
.258  
.055  
.113  
.156  
.560  
.115  
.022  
.040  
7°  
MAX  
1.83  
6.93  
1.02  
4.83  
10.54  
14.99  
6.55  
1.40  
2.87  
3.96  
14.22  
2.92  
0.56  
1.02  
7°  
Lead Pitch  
1.52  
Overall Lead Centers  
Space Between Leads  
Overall Height  
e1  
e3  
A
6.68  
0.76  
4.06  
Overall Width  
E
9.78  
Overall Length  
D
14.22  
5.94  
Flag Length  
H1  
F
Flag Thickness  
Through Hole Center  
Through Hole Diameter  
Lead Length  
1.14  
Q
P
2.62  
3.71  
L
J1  
C1  
β
13.72  
2.29  
Base to Bottom of Lead  
Lead Thickness  
Lead Width  
0.36  
0.64  
α
Mold Draft Angle  
3°  
*
Controlling Parameter  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010" (0.254 mm) per side.  
JEDEC equivalent: TO-220  
Drawing No. C04-036  
Revised 08-01-05  
DS22001B-page 26  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
APPENDIX A: REVISION HISTORY  
Revision B (September 2006)  
• Correction to maximum Dropout Voltage in  
Section 1.0.  
• Added additional graphs in Section 2.0.  
• Added disclaimer to package outline drawings.  
Revision A (July 2006)  
• Original Release of this Document.  
© 2006 Microchip Technology Inc.  
DS22001B-page 27  
MCP1827/MCP1827S  
NOTES:  
DS22001B-page 28  
© 2006 Microchip Technology Inc.  
MCP1827/MCP1827S  
PRODUCT IDENTIFICATION SYSTEM  
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.  
Examples:  
PART NO.  
Device  
XX  
X
X
X/  
XX  
a)  
b)  
c)  
d)  
e)  
f)  
MCP1827-0802E/AT: 0.8V LDO Regulator  
Output Feature Tolerance Temp. Package  
Voltage  
5LD TO-220  
MCP1827-1002E/ET: 1.0V LDO Regulator  
5LD DDPAK  
Code  
MCP1827-1202E/AT: 1.2V LDO Regulator  
5LD TO-220  
Device:  
MCP1827: 1.5A Low Dropout Regulator  
MCP1827T: 1.5A Low Dropout Regulator  
Tape and Reel  
MCP1827S: 1.5A Low Dropout Regulator  
MCP1827ST: 1.5A Low Dropout Regulator  
Tape and Reel  
MCP1827-1802E/AT: 1.8V LDO Regulator  
5LD TO-220  
MCP1827-2502E/ET: 2.5V LDO Regulator  
5LD DDPAK  
MCP1827-3002E/ET: 3.0V LDO Regulator  
5LD DDPAK  
Output Voltage *:  
08  
12  
18  
25  
30  
33  
50  
=
=
=
=
=
=
=
0.8V “Standard”  
1.2V “Standard”  
1.8V “Standard”  
2.5V “Standard”  
3.0V “Standard”  
3.3V “Standard”  
5.0V “Standard”  
g)  
h)  
i)  
MCP1827-3302E/AT 3.3V LDO Regulator  
5LD TO-220  
MCP1827-5002E/ET: 5.0V LDO Regulator  
5LD DDPAK  
MCP1827-ADJE/AT: ADJ LDO Regulator  
5LD TO-220  
*Contact factory for other output voltage options  
Extra Feature Code:  
Tolerance:  
0
2
E
=
=
=
Fixed  
a)  
b)  
c)  
d)  
e)  
f)  
MCP1827S-0802E/EB:0.8V LDO Regulator  
3LD DDPAK  
2.0% (Standard)  
-40°C to +125°C  
MCP1827S-0802E/AB:0.8V LDO Regulator  
3LD TO-220  
Temperature:  
MCP1827S-1002E/EB:1.0V LDO Regulator  
3LD DDPAK  
MCP1827S-1202E/AB 1.2V LDO Regulator  
3LD TO-220  
Package Type:  
AB  
AT  
EB  
ET  
=
=
=
=
Plastic Transistor Outline, TO-220, 3-lead  
Plastic Transistor Outline, TO-220, 5-lead  
Plastic, DDPAK, 3-lead  
MCP1827S-1802E/EB 1.8V LDO Regulator  
3LD DDPAK  
Plastic, DDPAK, 5-lead  
MCP1827S-2502E/EB 2.5V LDO Regulator  
3LD DDPAK  
g)  
h)  
i)  
MCP1827S-2502E/EB 3.0V LDO Regulator  
3LD DDPAK  
MCP1827S-3302E/AB 3.3V LDO Regulator  
3LD TO-220  
MCP1827S-5002E/EB 5.0V LDO Regulator  
3LD DDPAK  
j)  
MCP1827S-ADJE/AB ADJ LDO Regulator  
3LD TO-220  
© 2006 Microchip Technology Inc.  
DS22001B-page 29  
MCP1827/MCP1827S  
NOTES:  
DS22001B-page 30  
© 2006 Microchip Technology Inc.  
Note the following details of the code protection feature on Microchip devices:  
Microchip products meet the specification contained in their particular Microchip Data Sheet.  
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the  
intended manner and under normal conditions.  
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our  
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data  
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  
Microchip is willing to work with the customer who is concerned about the integrity of their code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not  
mean that we are guaranteeing the product as “unbreakable.”  
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our  
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts  
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.  
Information contained in this publication regarding device  
applications and the like is provided only for your convenience  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications.  
MICROCHIP MAKES NO REPRESENTATIONS OR  
WARRANTIES OF ANY KIND WHETHER EXPRESS OR  
IMPLIED, WRITTEN OR ORAL, STATUTORY OR  
OTHERWISE, RELATED TO THE INFORMATION,  
INCLUDING BUT NOT LIMITED TO ITS CONDITION,  
QUALITY, PERFORMANCE, MERCHANTABILITY OR  
FITNESS FOR PURPOSE. Microchip disclaims all liability  
arising from this information and its use. Use of Microchip  
devices in life support and/or safety applications is entirely at  
the buyer’s risk, and the buyer agrees to defend, indemnify and  
hold harmless Microchip from any and all damages, claims,  
suits, or expenses resulting from such use. No licenses are  
conveyed, implicitly or otherwise, under any Microchip  
intellectual property rights.  
Trademarks  
The Microchip name and logo, the Microchip logo, Accuron,  
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,  
PRO MATE, PowerSmart, rfPIC, and SmartShunt are  
registered trademarks of Microchip Technology Incorporated  
in the U.S.A. and other countries.  
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,  
SEEVAL, SmartSensor and The Embedded Control Solutions  
Company are registered trademarks of Microchip Technology  
Incorporated in the U.S.A.  
Analog-for-the-Digital Age, Application Maestro, CodeGuard,  
dsPICDEM, dsPICDEM.net, dsPICworks, ECAN,  
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,  
In-Circuit Serial Programming, ICSP, ICEPIC, Linear Active  
Thermistor, Mindi, MiWi, MPASM, MPLIB, MPLINK, PICkit,  
PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal,  
PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB,  
rfPICDEM, Select Mode, Smart Serial, SmartTel, Total  
Endurance, UNI/O, WiperLock and ZENA are trademarks of  
Microchip Technology Incorporated in the U.S.A. and other  
countries.  
SQTP is a service mark of Microchip Technology Incorporated  
in the U.S.A.  
All other trademarks mentioned herein are property of their  
respective companies.  
© 2006, Microchip Technology Incorporated, Printed in the  
U.S.A., All Rights Reserved.  
Printed on recycled paper.  
Microchip received ISO/TS-16949:2002 certification for its worldwide  
headquarters, design and wafer fabrication facilities in Chandler and  
Tempe, Arizona, Gresham, Oregon and Mountain View, California. The  
Company’s quality system processes and procedures are for its  
PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial  
EEPROMs, microperipherals, nonvolatile memory and analog  
products. In addition, Microchip’s quality system for the design and  
manufacture of development systems is ISO 9001:2000 certified.  
© 2006 Microchip Technology Inc.  
DS22001B-page 31  
WORLDWIDE SALES AND SERVICE  
AMERICAS  
ASIA/PACIFIC  
ASIA/PACIFIC  
EUROPE  
Corporate Office  
Asia Pacific Office  
Suites 3707-14, 37th Floor  
Tower 6, The Gateway  
Habour City, Kowloon  
Hong Kong  
Tel: 852-2401-1200  
Fax: 852-2401-3431  
India - Bangalore  
Tel: 91-80-4182-8400  
Fax: 91-80-4182-8422  
Austria - Wels  
Tel: 43-7242-2244-3910  
Fax: 43-7242-2244-393  
2355 West Chandler Blvd.  
Chandler, AZ 85224-6199  
Tel: 480-792-7200  
Fax: 480-792-7277  
Technical Support:  
http://support.microchip.com  
Web Address:  
www.microchip.com  
Denmark - Copenhagen  
Tel: 45-4450-2828  
Fax: 45-4485-2829  
India - New Delhi  
Tel: 91-11-4160-8631  
Fax: 91-11-4160-8632  
France - Paris  
Tel: 33-1-69-53-63-20  
Fax: 33-1-69-30-90-79  
India - Pune  
Tel: 91-20-2566-1512  
Fax: 91-20-2566-1513  
Australia - Sydney  
Tel: 61-2-9868-6733  
Fax: 61-2-9868-6755  
Atlanta  
Germany - Munich  
Tel: 49-89-627-144-0  
Fax: 49-89-627-144-44  
Japan - Yokohama  
Tel: 81-45-471- 6166  
Fax: 81-45-471-6122  
Alpharetta, GA  
Tel: 770-640-0034  
Fax: 770-640-0307  
China - Beijing  
Tel: 86-10-8528-2100  
Fax: 86-10-8528-2104  
Italy - Milan  
Tel: 39-0331-742611  
Fax: 39-0331-466781  
Korea - Gumi  
Tel: 82-54-473-4301  
Fax: 82-54-473-4302  
Boston  
China - Chengdu  
Tel: 86-28-8665-5511  
Fax: 86-28-8665-7889  
Westborough, MA  
Tel: 774-760-0087  
Fax: 774-760-0088  
Netherlands - Drunen  
Tel: 31-416-690399  
Fax: 31-416-690340  
Korea - Seoul  
China - Fuzhou  
Tel: 86-591-8750-3506  
Fax: 86-591-8750-3521  
Tel: 82-2-554-7200  
Fax: 82-2-558-5932 or  
82-2-558-5934  
Chicago  
Itasca, IL  
Tel: 630-285-0071  
Fax: 630-285-0075  
Spain - Madrid  
Tel: 34-91-708-08-90  
Fax: 34-91-708-08-91  
China - Hong Kong SAR  
Tel: 852-2401-1200  
Fax: 852-2401-3431  
Malaysia - Penang  
Tel: 60-4-646-8870  
Fax: 60-4-646-5086  
Dallas  
Addison, TX  
Tel: 972-818-7423  
Fax: 972-818-2924  
UK - Wokingham  
Tel: 44-118-921-5869  
Fax: 44-118-921-5820  
China - Qingdao  
Tel: 86-532-8502-7355  
Fax: 86-532-8502-7205  
Philippines - Manila  
Tel: 63-2-634-9065  
Fax: 63-2-634-9069  
Detroit  
Farmington Hills, MI  
Tel: 248-538-2250  
Fax: 248-538-2260  
China - Shanghai  
Tel: 86-21-5407-5533  
Fax: 86-21-5407-5066  
Singapore  
Tel: 65-6334-8870  
Fax: 65-6334-8850  
Kokomo  
Kokomo, IN  
Tel: 765-864-8360  
Fax: 765-864-8387  
China - Shenyang  
Tel: 86-24-2334-2829  
Fax: 86-24-2334-2393  
Taiwan - Hsin Chu  
Tel: 886-3-572-9526  
Fax: 886-3-572-6459  
China - Shenzhen  
Tel: 86-755-8203-2660  
Fax: 86-755-8203-1760  
Taiwan - Kaohsiung  
Tel: 886-7-536-4818  
Fax: 886-7-536-4803  
Los Angeles  
Mission Viejo, CA  
Tel: 949-462-9523  
Fax: 949-462-9608  
China - Shunde  
Tel: 86-757-2839-5507  
Fax: 86-757-2839-5571  
Taiwan - Taipei  
Tel: 886-2-2500-6610  
Fax: 886-2-2508-0102  
Santa Clara  
Santa Clara, CA  
Tel: 408-961-6444  
Fax: 408-961-6445  
China - Wuhan  
Tel: 86-27-5980-5300  
Fax: 86-27-5980-5118  
Thailand - Bangkok  
Tel: 66-2-694-1351  
Fax: 66-2-694-1350  
Toronto  
Mississauga, Ontario,  
Canada  
Tel: 905-673-0699  
Fax: 905-673-6509  
China - Xian  
Tel: 86-29-8833-7250  
Fax: 86-29-8833-7256  
08/29/06  
DS22001B-page 32  
© 2006 Microchip Technology Inc.  

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