DSC11230AE2-T [MICROCHIP]
Low-Jitter Precision LVDS Oscillator;
| 型号： | DSC11230AE2-T |
| 厂家： | 
MICROCHIP |
| 描述： | Low-Jitter Precision LVDS Oscillator |
| 文件： | 总26页 (文件大小：490K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DSC1103/23
Low-Jitter Precision LVDS Oscillator
Features
General Description
• Low RMS Phase Jitter: <1 ps (typ.)
The DSC1103 and DSC1123 series of high
performance oscillators utilizes a proven silicon MEMS
technology to provide excellent jitter and stability over
a wide range of supply voltages and temperatures. By
eliminating the need for quartz or SAW technology,
MEMS oscillators significantly enhance reliability and
accelerate product development, while meeting
stringent clock performance criteria for a variety of
communications, storage, and networking applications.
• High Stability: ±10 ppm, ±20 ppm, ±25 ppm,
±50 ppm
• Wide Temperature Range:
- Ext. Industrial –40°C to +105°C
- Industrial –40°C to +85°C
- Ext. Commercial –20°C to +70°C
• High Supply Noise Rejection: –50 dBc
• Wide Frequency Range:
DSC1103 has a standby feature allowing it to
completely power-down when EN pin is pulled low. For
DSC1123, only the outputs are disabled when EN is
low. Both oscillators are available in industry standard
packages, including the smallest 2.5 mm x 2.0 mm,
and are drop-in replacements for standard 6-pin LVDS
crystal oscillators.
- 2.3 MHz – 460 MHz
• Small Industry Standard Footprints
- 2.5 mm x 2.0 mm
- 3.2 mm x 2.5 mm
- 5.0 mm x 3.2 mm
- 7.0 mm x 5.0 mm
• Excellent Shock and Vibration Immunity
- Qualified to MIL-STD-883
• High Reliability
Block Diagram
- 20x better MTF than quartz-based devices
• Low Current Consumption
• Supply Range of 2.25V to 3.63V
• Standby and Output Enable Functions
• Lead Free and RoHS-Compliant
Pin 1
Pin 6
VDD
Temp. Sensor &
Compensation
Circuitry
Enable
Pin 2
NC
Pin 5
Output
MEMS
Oscillator
Divider
Driver
PLL
Applications
• Storage Area Networks
Pin 3
GND
Pin 4
Output
- SATA, SAS, Fibre Channel
• Passive Optical Networks
- EPON, 10G-EPON, GPON, 10G-PON
• HD/SD/SDI Video and Surveillance
• PCI Express Gen 1/Gen 2/Gen 3
• Display Port
2017-2018 Microchip Technology Inc.
DS20005745B-page 1
DSC1103/23
1.0
ELECTRICAL CHARACTERISTICS
Absolute Maximum Ratings †
Supply Voltage .......................................................................................................................................... –0.3V to +4.0V
Input Voltage .......................................................................................................................................–0.3V to VDD+0.3V
ESD Protection (HBM) ...............................................................................................................................................4 kV
ESD Protection (MM) ................................................................................................................................................400V
ESD Protection (CDM) ............................................................................................................................................1.5 kV
† Notice: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of the device at those or any other conditions above those indicated
in the operational sections of this specification is not intended. Exposure to maximum rating conditions for extended
periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
Specifications: VDD = 3.3V; TA = +25°C unless otherwise specified.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Supply Voltage (Note 1)
VDD
2.25
—
3.63
V
—
DSC1103, EN pin low; all
outputs disabled.
—
—
—
0.095
22
Supply Current
IDD
mA
DSC1123, EN pin low; all
outputs disabled.
20
—
—
—
—
—
—
—
—
—
—
±10
±20
±25
±50
±5
Includes frequency
variations due to initial
tolerance, temp., and power
supply voltage.
Frequency Stability
∆f
ppm
Aging - First Year
∆fY1
ppm One year at +25°C
Year two and beyond at
Aging - After First Year
Start-up Time (Note 2)
∆fY2+
—
—
<±1
ppm/yr
+25°C
tSU
VIH
VIL
tDA
—
—
—
—
—
—
—
5
ms
T = +25°C
Input logic high
Input logic low
—
0.75 x VDD
—
Input Logic Levels
V
—
—
—
—
0.25 x VDD
Output Disable Time (Note 3)
Output Enable Time
5
5
ns
ms
ns
DSC1103
DSC1123
tEN
20
Enable Pull-Up Resistor
(Note 4)
RPU
—
40
—
kΩ
Pull-up resistor exist.
LVDS Outputs
Supply Current
IDD
VOS
—
1.125
—
29
—
32
1.4
50
—
mA
V
Output enabled, RL = 100ꢀ
R = 100ꢀ Differential
—
Output Offset Voltage
Delta Offset Voltage
Peak-to-Peak Output Swing
∆VOS
VPP
—
mV
mV
—
350
Single-Ended
Note 1: VDD pin should be filtered with a 0.1 µF capacitor.
2: tSU is time to 100 ppm stable output frequency after VDD is applied and outputs are enabled.
3: See the Output Waveform section and the Test Circuit for more information.
4: Output is enabled if pad is floated or not connected.
DS20005745B-page 2
2017-2018 Microchip Technology Inc.
DSC1103/23
ELECTRICAL CHARACTERISTICS (CONTINUED)
Specifications: VDD = 3.3V; TA = +25°C unless otherwise specified.
Parameters
Sym.
Min.
Typ.
Max.
Units
Conditions
Output Transition Rise/Fall
Time (Note 3)
20% to 80%
RL = 50ꢀ, CL = 2 pF
tR/tF
—
200
—
ps
–20°C to +70°C &
–40°C to +85°C
2.3
—
460
Frequency
f0
MHz
3.3
48
—
—
—
460
52
–40°C to +105°C
Differential
—
Output Duty Cycle
Period Jitter
SYM
JPER
%
2.5
—
psRMS
200 kHz to 20 MHz
@156.25 MHz
—
—
—
0.28
0.4
—
—
2
100 kHz to 20 MHz
@156.25 MHz
Integrated Phase Noise
JPH
psRMS
12 kHz to 20 MHz
@156.25 MHz
1.7
Note 1:
VDD pin should be filtered with a 0.1 µF capacitor.
2: tSU is time to 100 ppm stable output frequency after VDD is applied and outputs are enabled.
3: See the Output Waveform section and the Test Circuit for more information.
4: Output is enabled if pad is floated or not connected.
2017-2018 Microchip Technology Inc.
DS20005745B-page 3
DSC1103/23
TEMPERATURE SPECIFICATIONS (Note 1)
Parameters
Temperature Ranges
Sym.
Min.
Typ.
Max.
Units
Conditions
TA
TA
TA
TJ
TS
—
–20
–40
–40
—
—
—
—
—
—
—
+70
+85
°C
°C
°C
°C
°C
°C
Ordering Option E
Ordering Option I
Ordering Option L
—
Operating Temperature Range
+105
+150
+150
+260
Junction Temperature
Storage Temperature Range
Soldering Temperature
–55
—
—
40 sec. max.
Note 1: The maximum allowable power dissipation is a function of ambient temperature, the maximum allowable
junction temperature, and the thermal resistance from junction to air (i.e., TA, TJ, JA). Exceeding the
maximum allowable power dissipation will cause the device operating junction temperature to exceed the
maximum +150°C rating. Sustained junction temperatures above +150°C can impact the device reliability.
DS20005745B-page 4
2017-2018 Microchip Technology Inc.
DSC1103/23
2.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 2-1.
TABLE 2-1:
PIN FUNCTION TABLE
Pin Number Pin Number Pin Number Pin Number Pin Number
Pin
Name
Description
7x5 with Pad 7x5 w/o Pad
5x3.2
3.2x2.5
2x2.5
1
2
1
2
1
2
1
2
1
2
EN
NC
Enable
Do not connect
Ground
3
3
3
3
3
GND
OUT
OUT–
VDD
PAD
4
4
4
4
4
LVDS clock output +
LVDS clock output –
Supply voltage
Tie to Ground
5
5
5
5
5
6
6
6
6
6
PAD
—
—
—
—
TABLE 2-2:
OUTPUT ENABLE MODES
EN Pin
DSC1103
DSC1123
High
NC
Outputs Active
Outputs Active
Standby
Outputs Active
Outputs Active
Outputs Disabled
Low
2017-2018 Microchip Technology Inc.
DS20005745B-page 5
DSC1103/23
3.0
NOMINAL PERFORMANCE PARAMETERS
Unless otherwise specified, T = +25°C, VDD = 3.3V.
0
50 mV
-10
100 mV
-20
-30
-40
-50
-60
-70
-80
0.1
1
10
100
1000
10000
Supply Noise Frequency (kHz)
FIGURE 3-1:
Power Supply Rejection
Ratio.
2.5
2.0
1.5
1.0
0.5
156MHz-LVDS
212MHz-LVDS
320MHz-LVDS
410MHz-LVDS
0.0
0
200
400
600
800
1000
Low-end of integration BW: x kHz to 20 MHz
FIGURE 3-2:
Phase Jitter (Integrated
Phase Noise).
DS20005745B-page 6
2017-2018 Microchip Technology Inc.
DSC1103/23
4.0
TERMINATION SCHEME
VDD
0.1uF
6
5
2
3
100
100
4
FIGURE 4-1:
Typical Termination Scheme.
5.0
OUTPUT WAVEFORM
tR
tF
Output
Output
80
%
350 mV
50%
20%
tEN
1/fo
tDA
VIH
Enable
VIL
FIGURE 5-1:
Output Waveform.
2017-2018 Microchip Technology Inc.
DS20005745B-page 7
DSC1103/23
6.0
TEST CIRCUIT
FIGURE 6-1:
Test Circuit.
7.0
RECOMMENDED BOARD LAYOUT
Via to GND layer
Supply bypass
capacitor
Via to GND layer
FIGURE 7-1:
DSC1103/23 Recommended Board Layout.
DS20005745B-page 8
2017-2018 Microchip Technology Inc.
DSC1103/23
8.0
SOLDER REFLOW PROFILE
20-40
Sec
260
°C
217
200
°
°
C
C
60-150
Sec
ReŇow
60-180
Sec
150
25
°
C
C
Cool
Pre heat
°
Time
8 min max
MSL 1 @ 260°C refer to JSTD-020C
Ramp-Up Rate (200°C to Peak Temp)
Preheat Time 150°C to 200°C
Time Maintained above 217°C
Peak Temperature
3°C/sec. max.
60-180 sec.
60-150 sec.
255°C to 260°C
20-40 sec.
Time within 5°C of Actual Peak
Ramp-Down Rate
6°C/sec. max.
8 minutes max.
Time 25°C to Peak Temperature
2017-2018 Microchip Technology Inc.
DS20005745B-page 9
DSC1103/23
9.0
PACKAGE MARKING INFORMATION
6-Lead VDFN 2.5 mm x 2.0 mm Package Outline and Recommended Land Pattern
6-Lead Very Thin Dual Flatpack No-Leads (J7A) - 2.5x2.0 mm Body [VDFN]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
X1
X2
1
2
Y
G2 C
6
G1
SILK SCREEN
E
RECOMMENDED LAND PATTERN
Units
MILLIMETERS
Dimension Limits
MIN
NOM
MAX
Contact Pitch
E
X1
X2
Y
0.825 BSC
Contact Pad Width (X4)
Contact Pad Width (X2)
Contact Pad Length (X6)
Contact Pad Spacing
0.65
0.25
0.85
C
1.45
Space Between Contacts (X4)
Space Between Contacts (X3)
G1
G2
0.38
0.60
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing C04-3005A
DS20005745B-page 10
2017-2018 Microchip Technology Inc.
DSC1103/23
6-Lead Very Thin Dual Flatpack No-Leads (J7A) - 2.5x2.0 mm Body [VDFN]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
E
N
(DATUM A)
(DATUM B)
NOTE 1
2X
0.05 C
1
TOP2VIEW
2X
0.05 C
0.10 C
A
C
A1
SEATING
PLANE
6X
0.08 C
SIDE VIEW
2X b2
1
2
L2
5X L1
N
4X b1
0.10
0.05
C A B
C
e
BOTTOM VIEW
Microchip Technology Drawing C04-1005A Sheet 1 of 2
2017-2018 Microchip Technology Inc.
DS20005745B-page 11
DSC1103/23
6-Lead Very Thin Dual Flatpack No-Leads (J7A) - 2.5x2.0 mm Body [VDFN]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Number of Terminals
Pitch
Overall Height
Standoff
Overall Length
Overall Width
Terminal Width
Terminal Width
Terminal Length
Terminal Length
N
6
e
0.825 BSC
0.85
A
A1
D
0.80
0.00
0.90
0.05
0.02
2.50 BSC
2.00 BSC
0.65
0.25
0.70
E
b1
b2
L1
L2
0.60
0.20
0.60
0.70
0.30
0.80
0.665
0.765
0.865
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-1005A Sheet 2 of 2
DS20005745B-page 12
2017-2018 Microchip Technology Inc.
DSC1103/23
6-Lead VDFN 3.2 mm x 2.5 mm Package Outline and Recommended Land Pattern
6-Lead Very Thin Plastic Dual Flatpack No-Lead (H5A) - 3.2x2.5 mm Body [VDFN]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
X2
G
6
C
Y
1
2
X1
SILK SCREEN
E
RECOMMENDED LAND PATTERN
Units
MILLIMETERS
Dimension Limits
MIN
0.25
NOM
1.05 BSC
1.60
MAX
Contact Pitch
E
C
X1
X2
Y
Contact Pad Spacing
Contact Pad Width (X4)
Contact Pad Width (X2)
Contact Pad Length (X6)
1.00
0.60
0.85
Space Between Contacts (X4)
G1
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-3007A
2017-2018 Microchip Technology Inc.
DS20005745B-page 13
DSC1103/23
6-Lead Very Thin Plastic Dual Flatpack No-Lead (H5A) - 3.2x2.5 mm Body [VDFN]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
E
N
(DATUM A)
(DATUM B)
NOTE 1
2X
0.05 C
2X
1
2
TOP VIEW
0.05 C
0.10 C
0.08 C
A1
C
A
SEATING
PLANE
6X
SIDE VIEW
2X b2
1
2
NOTE 1
L
N
4X b1
L1
e
0.07
0.05
C A B
C
BOTTOM VIEW
Microchip Technology Drawing C04-1007A Sheet 1 of 2
DS20005745B-page 14
2017-2018 Microchip Technology Inc.
DSC1103/23
6-Lead Very Thin Plastic Dual Flatpack No-Lead (H5A) - 3.2x2.5 mm Body [VDFN]
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Number of Terminals
Pitch
Overall Height
Standoff
Overall Length
Overall Width
Terminal Width
Terminal Width
Terminal Length
Terminal Pullback
N
6
e
1.05 BSC
0.85
0.02
3.20 BSC
2.50 BSC
0.90
0.50
0.70
0.10 REF
A
A1
D
0.80
0.00
0.90
0.05
E
b1
b2
L
0.85
0.45
0.65
0.95
0.55
0.75
L1
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-1007A Sheet 2 of 2
2017-2018 Microchip Technology Inc.
DS20005745B-page 15
DSC1103/23
6-Lead CDFN 5.0 mm x 3.2 mm Package Outline and Recommended Land Pattern
DS20005745B-page 16
2017-2018 Microchip Technology Inc.
DSC1103/23
6-Lead VDFN 7.0 mm x 5.0 mm Package Outline and Recommended Land Pattern
6-Lead Very Thin Plastic Quad Flat, No Lead Package (H8A) - 7x5 mm Body [VDFN]
With 2.8x1.8 mm Exposed Pad
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
X2
EV
6
ØV
C
Y2
EV
G
Y1
1
2
X1
E
SILK SCREEN
RECOMMENDED LAND PATTERN
Units
Dimension Limits
E
MILLIMETERS
NOM
2.54 BSC
MIN
MAX
Contact Pitch
Optional Center Pad Width
Optional Center Pad Length
Contact Pad Spacing
X2
Y2
C
2.90
1.90
3.70
Contact Pad Width (X6)
Contact Pad Length (X6)
Contact Pad to Center Pad (X2)
Thermal Via Diameter (X6)
Thermal Via Pitch
X1
Y1
G
V
EV
1.50
1.35
0.20
0.33
1.20
Notes:
1. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during
reflow process
Microchip Technology Drawing C04-3010A
2017-2018 Microchip Technology Inc.
DS20005745B-page 17
DSC1103/23
6-Lead Very Thin Plastic Quad Flat, No Lead Package (H8A) - 7x5 mm Body [VDFN]
With 2.8x1.8 mm Exposed Pad
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
D
A
B
E
N
(DATUM A)
(DATUM B)
NOTE 1
2X
0.20 C
2X
1
2
0.20 C
TOP VIEW
A1
0.10 C
0.08 C
C
A
SEATING
PLANE
6X
SIDE VIEW
0.10
C A B
D2
2
1
0.10
C A B
NOTE 1
E2
6X L
(K)
6X b
N
0.10
0.05
C A B
C
e
BOTTOM VIEW
Microchip Technology Drawing C04-1010A Sheet 1 of 2
DS20005745B-page 18
2017-2018 Microchip Technology Inc.
DSC1103/23
6-Lead Very Thin Plastic Quad Flat, No Lead Package (H8A) - 7x5 mm Body [VDFN]
With 2.8x1.8 mm Exposed Pad
Note: For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
Units
Dimension Limits
MILLIMETERS
NOM
MIN
MAX
Number of Terminals
Pitch
N
e
6
2.54
Overall Height
Standoff
Overall Length
Exposed Pad Length
Overall Width
Exposed Pad Width
Terminal Width
Terminal Length
A
A1
D
D2
E
E2
b
L
0.80
0.00
0.85
0.02
7.00 BSC
2.80
5.00 BSC
1.80
0.90
0.05
2.70
2.90
1.70
1.35
1.00
1.90
1.45
1.20
1.40
1.10
Terminal-to-Exposed-Pad
K
0.20 REF
Notes:
1. Pin 1 visual index feature may vary, but must be located within the hatched area.
2. Package is saw singulated
3. Dimensioning and tolerancing per ASME Y14.5M
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
REF: Reference Dimension, usually without tolerance, for information purposes only.
Microchip Technology Drawing C04-1010A Sheet 2 of 2
2017-2018 Microchip Technology Inc.
DS20005745B-page 19
DSC1103/23
6-Lead CDFN 7.0 mm x 5.0 mm Package Outline and Recommended Land Pattern
DS20005745B-page 20
2017-2018 Microchip Technology Inc.
DSC1103/23
APPENDIX A: REVISION HISTORY
Revision A (March 2017)
• Converted Micrel data sheet DSC1103/23 to
Microchip DS20005745A.
• Minor text changes throughout.
• Updated Package Marking Information to MCHP-
standard drawings where available.
Revision B (October 2018)
• Added ±20 ppm stability references throughout
document.
• Added Section 7.0, Recommended Board Layout.
2017-2018 Microchip Technology Inc.
DS20005745B-page 21
DSC1103/23
NOTES:
DS20005745B-page 22
2017-2018 Microchip Technology Inc.
DSC1103/23
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, contact your local Microchip representative or sales office.
Examples:
X
xxx.xxxx
X
X
PART NO.
X
3
X
a) DSC1103AE1-125.0000: Low-Jitter Precision LVDS
Oscillator, Enable/Standby,
Package
Frequency
Temp. Stability
Range
Enable Device
Modes (Last
Digit)
Packing
Device
(First 2
Digits)
7x5 VDFN, –20°C to +70°C,
±50 ppm, 125 MHz, 100/Tube
b) DSC1123BI2-400.0000T: Low-Jitter Precision LVDS
Oscillator, Enable/Disable,
5x3.2 CDFN, –40°C to +85°C,
±25 ppm, 400 MHz,
Device:
DSC11x3:
Low-Jitter Precision LVDS Oscillator
Enable Modes:
0
2
=
=
Enable/Standby
Enable/Disable
1,000/Reel
c) DSC1103CL5-074.2500: Low-Jitter Precision LVDS
Oscillator, Enable/Standby,
3.2x2.5 VDFN,
Package:
A
B
C
D
N
=
=
=
=
=
7.0 mm x 5.0 mm VDFN
5.0 mm x 3.2 mm CDFN
3.2 mm x 2.5 mm VDFN
2.5 mm x 2.0 mm VDFN
–40°C to +105°C, ±10 ppm,
74.25 MHz, 100/Tube
7.0 mm x 5.0 mm CDFN (no center pad)
d) DSC1123DE1-082.5000T:Low-Jitter Precision LVDS
Oscillator, Enable/Disable,
2.5x2.0 VDFN,
Temperature
Range:
E
I
L
=
=
=
–20°C to +70°C
–40°C to +85°C
–40°C to +105°C
–20°C to +70°C, ±50 ppm,
82.5 MHz, 1,000/Reel
e) DSC1103NI2-056.0000: Low-Jitter Precision LVDS
Oscillator, Enable/Standby,
Stability:
1
2
3
5
=
=
=
=
±50 ppm
±25 ppm
±20 ppm
±10 ppm
7x5 CDFN (no center pad),
–40°C to +85°C, ±25 ppm,
56 MHz, 100/Tube
Frequency Code:
Packing:
xxx.xxxx = 2.3 MHz to 460 MHz (user-defined)
Note 1:
Tape and Reel identifier only appears in the
catalog part number description. This identifier is
used for ordering purposes and is not printed on
the device package. Check with your Microchip
Sales Office for package availability with the
Tape and Reel option.
T
=
1,000/Reel
(blank) = 100/Tube
2017-2018 Microchip Technology Inc.
DS20005745B-page 23
DSC1103/23
NOTES:
DS20005745B-page 24
2017-2018 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR,
AVR logo, AVR Freaks, BitCloud, chipKIT, chipKIT logo,
CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo,
JukeBlox, KeeLoq, Kleer, LANCheck, LINK MD, maXStylus,
maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip
Designer, QTouch, SAM-BA, SpyNIC, SST, SST Logo,
SuperFlash, tinyAVR, UNI/O, and XMEGA are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
and other countries.
ClockWorks, The Embedded Control Solutions Company,
EtherSynch, Hyper Speed Control, HyperLight Load, IntelliMOS,
mTouch, Precision Edge, and Quiet-Wire are registered
trademarks of Microchip Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any
Capacitor, AnyIn, AnyOut, BodyCom, CodeGuard,
CryptoAuthentication, CryptoAutomotive, CryptoCompanion,
CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average
Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, INICnet, Inter-Chip Connectivity,
JitterBlocker, KleerNet, KleerNet logo, memBrain, Mindi, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB,
MPLINK, MultiTRAK, NetDetach, Omniscient Code Generation,
PICDEM, PICDEM.net, PICkit, PICtail, PowerSmart, PureSilicon,
QMatrix, REAL ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O,
SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan,
WiperLock, Wireless DNA, and ZENA are trademarks of
Microchip Technology Incorporated in the U.S.A. and other
countries.
SQTP is a service mark of Microchip Technology Incorporated in
the U.S.A.
Microchip received ISO/TS-16949:2009 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
Silicon Storage Technology is a registered trademark of Microchip
Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology
Germany II GmbH & Co. KG, a subsidiary of Microchip
Technology Inc., in other countries.
All other trademarks mentioned herein are property of their
respective companies.
QUALITYꢀMANAGEMENTꢀꢀSYSTEMꢀ
CERTIFIEDꢀBYꢀDNVꢀ
© 2017-2018, Microchip Technology Incorporated, All Rights
Reserved.
ISBN: 978-1-5224-3790-1
== ISO/TSꢀ16949ꢀ==ꢀ
2017-2018 Microchip Technology Inc.
DS20005745B-page 25
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DS20005745B-page 26
2017-2018 Microchip Technology Inc.
08/15/18
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