DSC1104AI2-10.0000 [MICROCHIP]
IC,MISCELLANEOUS CLOCK GENERATOR,LLCC,6PIN,PLASTIC;
| 型号： | DSC1104AI2-10.0000 |
| 厂家： | 
MICROCHIP |
| 描述： | IC,MISCELLANEOUS CLOCK GENERATOR,LLCC,6PIN,PLASTIC 局域网 |
| 文件： | 总5页 (文件大小：622K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DSC1104 DSC1124
Low-Jitter Precision HCSL Oscillator
General Description
Features
The DSC1104 & DSC1124 series of high
performance oscillators utilizes a proven
silicon MEMS technology to provide excellent
jitter and stability over a wide range of
Low RMS Phase Jitter: <1 ps (typ)
High Stability: ±10, ±25, ±50 ppm
Wide Temperature Range
o Industrial: -40° to 85° C
supply voltages and temperatures.
By
eliminating the need for quartz or SAW
technology, MEMS oscillators significantly
enhance reliability and accelerate product
development, while meeting stringent clock
performance criteria for a variety of
communications, storage, and networking
applications.
o Ext. commercial: -20° to 70° C
High Supply Noise Rejection: -50 dBc
Short Lead Time: 2 Weeks
Wide Freq. Range: 10 to 460 MHz
Small Industry Standard Footprints
o 3.2x2.5, 5.0x3.2, and 7.0x5.0 mm
DSC1104 has a standby feature allowing it to
completely power-down when EN pin is
pulled low; whereas for DSC1124, only the
outputs are disabled when EN is low. Both
oscillators are available in industry standard
packages, including the small 3.2x2.5 mm2,
and are “drop-in” replacements for standard
6-pin HCSL quartz crystal oscillators.
Excellent Shock & Vibration Immunity
o Qualified to MIL-STD-883
High Reliability
o 20x better MTF than quartz oscillators
Low Current Consumption
Supply Range of 2.25 to 3.6 V
Standby & Output Enable Function
Lead Free & RoHS Compliant
LVPECL & LVDS Versions Available
Block Diagram
Applications
Storage Area Networks
o SATA, SAS, Fibre Channel
Passive Optical Networks
o EPON, 10G-EPON, GPON, 10G-PON
Ethernet
o 1G, 10GBASE-T/KR/LR/SR, and FCoE
HD/SD/SDI Video & Surveillance
PCI Express: Gen 1 & Gen 2
DisplayPort
Output Enable Modes
EN Pin
High
NC
DSC1104
Outputs Active
Outputs Active
Standby
DSC1124
Outputs Active
Outputs Active
Outputs Disabled
Low
All Rights Reserved. No part of this document may be copied or reproduced in any form without the prior written permission of Discera, Inc. Discera Inc. may update or make
changes to the contents, products, programs or services described at any time without notice. This document neither states nor implies any kind of warranty, including, but not
limited to implied warranties of merchantability or fitness for a particular use.
Page 1 |
MK-Q-B-P-D-110410-04-2
Low-Jitter Precision HCSL Oscillator
DSC1104 DSC1124
Absolute Maximum Ratings
Ordering Code
Item
Min
-0.3
-0.3
-
Max
+4.0
Unit Condition
Supply Voltage
Input Voltage
Junction Temp
Storage Temp
Soldering Temp
V
V
Enable Modes
0: Enable/Standby
2: Enable/Disable
Temp Range
E: -20 to 70
I: -40 to 85
Packing
T: Tape & Reel
: Tube
VDD+0.3
+150
°C
°C
°C
V
-55
-
+150
DSC11 0 4 C I 5
156.2500
T
+260
40sec max.
ESD
HBM
MM
-
Package
Stability
1: ±50ppm
2: ±25ppm
5: ±10ppm
Freq (MHz)
156.2500
4000
400
A: 7.0x5.0mm
B: 5.0x3.2mm
C: 3.2x2.5mm
CDM
1500
Note: 1000+ years of data retention on internal memory
Specifications
Parameter
Condition
Min.
Typ.
Max.
Unit
Supply Voltage1
VDD
IDD
2.25
3.6
V
EN pin low – outputs are disabled
Supply Current
DSC1104
DSC1124
0.095
22
mA
20
Includes frequency variations due
to initial tolerance, temp. and
power supply voltage
±10
±25
±50
Frequency Stability
Δf
ppm
Aging
Startup Time2
Δf
tSU
1 year @25°C
T=25°C
±5
5
ppm
ms
Input Logic Levels
Input logic high
Input logic low
VIH
VIL
0.75xVDD
-
-
V
0.25xVDD
Output Disable Time3
Output Enable Time
Enable Pull-Up Resistor4
tDA
5
ns
DSC1104
DSC1124
5
20
ms
ns
tEN
Pull-up resistor exist
HCSL Outputs
40
40
kΩ
Supply Current
IDD
Output Enabled, RL=50Ω
42
mA
V
Output Logic Levels
Output logic high
Output logic low
VOH
VOL
RL=50Ω
0.725
-
-
0.1
Pk to Pk Output Swing
Output Transition time3
Rise Time
Single-Ended
750
mV
ps
20% to 80%
RL=50Ω, CL= 2pF
tR
tF
200
400
Fall Time
Frequency
f0
Single Frequency
Differential
10
48
460
52
MHz
%
Output Duty Cycle
Period Jitter
SYM
JPER
2.5
psRMS
200kHz to 20MHz @156.25MHz
100kHz to 20MHz @156.25MHz
12kHz to 20MHz @156.25MHz
0.25
0.37
1.7
Integrated Phase Noise
JPH
psRMS
2
Notes:
1.
Pin 6 VDD should be filtered with 0.1uf capacitor.
2.
3.
4.
tsu is time to 100ppm of output frequency after VDD is applied and outputs are enabled.
Output Waveform and Test Circuit figures below define the parameters.
Output is enabled if pad is floated or not connected.
All Rights Reserved. No part of this document may be copied or reproduced in any form without the prior written permission of Discera, Inc. Discera Inc. may update or make
changes to the contents, products, programs or services described at any time without notice. This document neither states nor implies any kind of warranty, including, but not
limited to implied warranties of merchantability or fitness for a particular use.
Page 2 |
MK-Q-B-P-D-110410-04-2
Low-Jitter Precision HCSL Oscillator
DSC1104 DSC1124
Nominal Performance Parameters (Unless specified otherwise: T=25° C, VDD=3.3 V)
2.5
2.0
1.5
1.0
0.5
0.0
0
-10
-20
-30
-40
-50
-60
-70
-80
50MHz-HCSL
106MHz-HCSL
156MHz-HCSL
212MHz-HCSL
50-mV
100-mV
0
200
400
600
800
1000
0.1
1
10
100
1000
10000
Low-end of integration BW: x kHz to 20 MHz
Supply Noise Frequency (kHz)
Phase jitter (integrated phase noise)
Power supply rejection ratio
Output Waveform
tR
tF
Output
80%
50%
20%
675 mV
Output
tEN
1/fo
tDA
VIH
Enable
VIL
Typical Termination Scheme
VDD
0.1uF
Rs = 0 Ω for test
6
Rs
2
3
5
4
100 Ω
Rs
50 Ω
50 Ω
Rs serves to match the trace
impedances. Depending on
board layout, the value may
range from 0 to 30 ohms.
All Rights Reserved. No part of this document may be copied or reproduced in any form without the prior written permission of Discera, Inc. Discera Inc. may update or make
changes to the contents, products, programs or services described at any time without notice. This document neither states nor implies any kind of warranty, including, but not
limited to implied warranties of merchantability or fitness for a particular use.
Page 3 |
MK-Q-B-P-D-110410-04-2
Low-Jitter Precision HCSL Oscillator
DSC1104 DSC1124
Test Circuit
Solder Reflow Profile
20-40
Sec
260°C
MSL 1 @ 260°C refer to JSTD-020C
Ramp-Up Rate (200°C to Peak Temp) 3°C/Sec Max.
217°C
200°C
60-150
Sec
Preheat Time 150°C to 200°C
Time maintained above 217°C
Peak Temperature
Time within 5°C of actual Peak
Ramp-Down Rate
60-180 Sec
60-150 Sec
255-260°C
20-40 Sec
6°C/Sec Max.
8 min Max.
Reflow
60-180
Sec
150°C
Cool
Pre heat
Time 25°C to Peak Temperature
25°C
Time
8 min max
Package Dimensions
7.0 x 5.0 mm Plastic Package
No.
1
2
Pin terminal
Enable
nc
3
GND
4
Output
5
6
Output
VDD
All Rights Reserved. No part of this document may be copied or reproduced in any form without the prior written permission of Discera, Inc. Discera Inc. may update or make
changes to the contents, products, programs or services described at any time without notice. This document neither states nor implies any kind of warranty, including, but not
limited to implied warranties of merchantability or fitness for a particular use.
Page 4 |
MK-Q-B-P-D-110410-04-2
Low-Jitter Precision HCSL Oscillator
DSC1104 DSC1124
5.0 x 3.2 mm Plastic Package
3.2 x 2.5 mm Plastic Package
DISCERA, Inc.
Phone: +1 (408) 432-8600
●
1961 Concourse Drive,
San Jose, California
95131
●
●
USA
●
Fax: +1 (408) 432-8609
●
Email: sales@discera.com
www.discera.com
All Rights Reserved. No part of this document may be copied or reproduced in any form without the prior written permission of Discera, Inc. Discera Inc. may update or make
changes to the contents, products, programs or services described at any time without notice. This document neither states nor implies any kind of warranty, including, but not
limited to implied warranties of merchantability or fitness for a particular use.
Page 5 |
MK-Q-B-P-D-110410-04-2
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