DM320108-BNDL [MICROCHIP]
BUNDLE SAMA5D2-PTC-EK + QT1-XPRO;
| 型号： | DM320108-BNDL |
| 厂家： | 
MICROCHIP |
| 描述： | BUNDLE SAMA5D2-PTC-EK + QT1-XPRO |
| 文件： | 总66页 (文件大小：2374K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
SAMA5D2-PTC-EK
SAMA5D2-PTC-EK User's Guide
Scope
This user's guide describes how to use the SAMA5D2 PTC Evaluation Kit (SAMA5D2-PTC-EK).
The SAMA5D2-PTC-EK is used to evaluate the capabilities of the Peripheral Touch Controller (PTC)
designed for the SAMA5D2 series of embedded MPUs. Refer to the Configuration Summary table in the
SAMA5D2 Series Datasheet for the list of MPUs featuring PTC.
DS50002709A-page 1
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Table of Contents
Scope.............................................................................................................................. 1
1. Introduction................................................................................................................3
1.1. Document Layout......................................................................................................................... 3
1.2. Recommended Reading...............................................................................................................3
2. Product Overview...................................................................................................... 4
2.1. SAMA5D2-PTC-EK Features.......................................................................................................4
2.2. SAMA5D2-PTC-EK Content.........................................................................................................5
2.3. Evaluation Kit Specifications........................................................................................................ 5
2.4. Power Sources.............................................................................................................................5
3. Board Components....................................................................................................6
3.1. Board Overview............................................................................................................................6
3.2. Function Blocks............................................................................................................................9
3.3. External Interfaces..................................................................................................................... 31
3.4. Debugging Capabilities.............................................................................................................. 35
3.5. PIO Usage on Expansion Connectors........................................................................................40
4. Installation and Operation........................................................................................48
4.1. System and Configuration Requirements...................................................................................48
4.2. Board Setup............................................................................................................................... 48
5. Appendix A. Schematics and Layouts.....................................................................49
6. Revision History.......................................................................................................62
6.1. Rev. A - 12/2017.........................................................................................................................62
The Microchip Web Site................................................................................................ 63
Customer Change Notification Service..........................................................................63
Customer Support......................................................................................................... 63
Microchip Devices Code Protection Feature................................................................. 63
Legal Notice...................................................................................................................64
Trademarks................................................................................................................... 64
Quality Management System Certified by DNV.............................................................65
Worldwide Sales and Service........................................................................................66
DS50002709A-page 2
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Introduction
1.
Introduction
1.1
Document Layout
The document is organized as follows:
•
•
•
Chapter 1. "Introduction"
Chapter 2. "Product Overview" – Important information about the SAMA5D2-PTC-EK board
Chapter 3. "Board Components" – Specifications of the SAMA5D2-PTC-EK and high-level
description of the major components and interfaces
•
•
Chapter 4. "Installation and Operation" – Instructions on how to get started with the SAMA5D2-
PTC-EK
Appendix A. "Schematics and Layouts" – SAMA5D2-PTC-EK schematics and layout diagrams
1.2
Recommended Reading
The following Microchip document is available and recommended as a supplemental reference resource:
•
SAMA5D2 Series Datasheet. Lit. Number DS60001476
DS50002709A-page 3
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Product Overview
2.
Product Overview
2.1
SAMA5D2-PTC-EK Features
The SAMA5D2-PTC-EK follows the Microchip MPU strategy for low cost evaluation kits with maximum
reuse capability, and is built on the SAMA5D2 Xplained Ultra (XULT) hardware and software ecosystem.
This board is mainly dedicated to evaluating the Peripheral Touch Controller capabilities.
Table 2-1.ꢀSAMA5D2-PTC-EK Features
Characteristics
Specifications
Components
Processor
SAMA5D27-CU (289-ball BGA) 14x14mm
body, 0.8mm pitch
–
Clock speed
Memory
MPU: 24 MHz, 32.768 KHz
PHY: Crystal 25 MHz
–
Two 16-bit, 2-Gbit DDR2
One 4-Gbit Nand Flash
Winbond W972GG6KB-25
Micron MT29F4G08
One QSPI Flash
Microchip SST26VF064B
Microchip SST26VF032B
Microchip 24AA02E48
One Serial Data Flash (optional)
One EEPROM
Display
One LCD interface connector
RGB, 18 bits
SD/MMC
One standard SD card interface
One microSD card interface
With 3.3V/1.8V power switch
–
USB
One USB host type A
One USB device type MicroAB
With 5V power switch
–
One USB HSIC
One ETH PHY
Connector not mounted
Micrel KSZ8081RN
Ethernet
Debug Port
One JLINK-OB/ JLINK-CDC
One JTAG interface
Embedded JLINK-OB and JLINK-
CDC (ATSAM3U4C TFBGA100)
Board Monitor
Expansion
One RGB (Red, Green, Blue) LED
Four push button switches
–
DisableBoot, Reset, WakeUp, User
Free
One set of XPRO WINGS connectors
One ITO FLEX connector
Dedicated PTC QTouch
Optional
One Port B connector
One PIOBU connector
One mikroBUS connector
Optional
Optional
–
DS50002709A-page 4
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Product Overview
Characteristics
Specifications
Components
Board Supply
From USB A and USB JLINK-OB
5VDC
Backup Power Supply SuperCap
ELNA DSK-3R3H204T614-H2L
2.2
2.3
SAMA5D2-PTC-EK Content
The SAMA5D2-PTC-EK evaluation kit includes the following:
•
•
The SAMA5D2-PTC-EK board
A USB cable
Evaluation Kit Specifications
Table 2-2.ꢀEvaluation Kit Specifications
Characteristic
Board
Specification
SAMA5D2-PTC-EK
USB-powered
Board supply voltage
Temperature
Operating: 0°C to +70°C
Storage: –40°C to +85°C
Relative humidity
Main board dimensions
RoHS status
0 to 90% (non-condensing)
135 × 90 × 20 mm
Compliant
Board identification
SAMA5D2 Peripheral Touch Controller Evaluation Kit
2.4
Power Sources
Several options are available to power up the SAMA5D2-PTC-EK board:
•
•
USB powering through the USB Micro-AB connector (J4 - default configuration)
Powering through the USB Micro-AB connector on the JLlink-OB Embedded Debugger interface
(J9)
Table 2-3.ꢀElectrical Characteristics
Electrical Parameter
Input voltage
Value
5VCC
6VCC
1.2A
Maximum input voltage
Maximum 3.3VDC current available
I/O voltage
3.3V only
DS50002709A-page 5
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
3.
Board Components
This section covers the specifications of the SAMA5D2-PTC-EK and provides a high-level description of
the board's major components and interfaces. This document is not intended to provide a detailed
documentation about the processor or about any other component used on the board. It is expected that
the user will refer to the appropriate documents of these devices to access detailed information.
3.1
Board Overview
The fully-featured SAMA5D2-PTC-EK board integrates multiple peripherals and interface connectors, as
shown in the figure below.
3.1.1
Default Jumper Settings
The figure below shows the default jumper settings. Jumpers in red are configuration items and current
measurement points. Jumpers in blue are not populated.
DS50002709A-page 6
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-1.ꢀDefault Jumper Settings
The following table describes the functionality of the jumpers.
Table 3-1.ꢀSAMA5D2-PTC-EK Jumper Settings
Jumper Default Function
JP1
JP2
JP3
JP4
JP5
JP6
JP7
JP8
JP9
JP10
JP11
Closed VDD_MAIN_5V current measurement
Closed VDDOSC, VDDUTMII, VDDANA, VDDAUDIOPLL current measurement
Closed VDDISC + VDDIOP0/1/2 current measurement
Closed VDDIODDR_MPU current measurement
Closed VDDCORE current measurement
Closed VDDBU current measurement
Open
PIOBU1, PIOBU7
Closed Disables NAND_CS (open=disable)
Open
Open
Open
Enables JTAG-CDC (closed=disable)
Enables JTAG-OB (closed=disable)
Erases SAM3U Flash Code (closed = erase)
DS50002709A-page 7
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Jumper Default Function
Warning:ꢀ This jumper is reserved for factory configuration and should
WARNING
never be used by the end user.
JP12
JP13
JP14
Closed Powers mikroBUS extension (3.3V)
Open
1-2
Disables QSPI
Enables 3.3V JLINK-OB, connected to shutdown circuitry
Enables 3.3V JLINK-OB, always ON
2-3
3.1.2
Connectors on Board
The following table describes the interface connectors on the SAMA5D2-PTC-EK.
Table 3-2.ꢀSAMA5D2-PTC-EK Board Interface Connectors
Connector
Interfaces to
J1
PIOBU, tamper and analog comparator connector (not populated)
JTAG, 10-pin IDC connector
J2
J3
USB Host B. Supports USB host using a type A connector
USB A Device. Supports USB device using a type Micro-AB connector
USB-C HSIC header (not populated)
Standard SDMMC connector
J4
J5
J6
J7
microSD connector
J8
Ethernet 10/100 RJ45
J9
USB-A MicroAB, JLink-OB port
J10
J11, J12
J13
J14
J15 A&B
J16
PCB connector for factory-programming the JLINK-OB/SAM3U
Xplained Pro expansion connectors (PTC-dedicated add-on boards)
PIOs PortB connector
ITO connector
mikroBUS connector
Expansion TFT LCD connector for display module
DS50002709A-page 8
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
3.2
Function Blocks
Figure 3-2.ꢀSAMA5D2-PTC-EK Block Diagram
DDR2
SDRAM
QSPI
Flash
Nand
Flash
USB A&B
USB-B
Connector
GPIO
SAMA5D2-PTC-EK
POWER
REGULATORS
3v3, 2v5,1v8, 1v2
Power
5v
DDR2
SDRAM
Serial
EEprom
SPI
Flash
System Supplies
Power
Switch
PortB[0-7]
VBUS
VDDBU
Cap
PIOBU Connector
USB-A
Connector
5v
USB
Detection
POWER
MONITOR
Leds
SHDN
ETH
RJ45
PHY
UART
JTAG
DEBUG
Interface
SAMA5D27
LCD (18bits)
Tri
State
USB
Connector
5v
JLINK-OB
TWI/SPI
JLINK-CDC
FPC Connector
ITO Connector
RGB
Leds
JLINK Power
5v/3v3
JTAG
Switch
PTC
GPIO
SDHC0
SDHC1
Reset, Wkup
DisBoot, User
Push
Button
JLINK-OB
JTAG Interface
Function Select
MPU JTAG
Interface
MikroBUS
Interface
SD Card
Connector
XPRO (1&2)
PTC Interface
uSD
Connector
3.2.1
3.2.2
Processor
The SAMA5D2 Series is a high-performance, power-efficient embedded MPU based on the ARM®
Cortex®-A5 processor.
Please refer to the SAMA5D2 Series datasheet for more information.
Power Supply Topology and Power Distribution
3.2.2.1 Input Power Options
Two options are available to power the SAMA5D2-PTC-EK board. The USB-powered operation is the
default configuration and comes from the USB device ports (J4-J9) connected to a PC or a 5VDC supply.
Such USB power source is sufficient to supply the board in most applications. It is important to note that
when the USB-powered operation is used, the USB port down the way has a limited powering capability.
If the USB-B Host port (J3) is required to provide full powering capabilities to the target application, it is
recommended to use an external DC supply instead of a USB power source.
The following figure is a schematic of the power options.
DS50002709A-page 9
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-3.ꢀInput Powering
JPR1
Jumper
JP1
Header 1X2
U1A
U4A
VDD_MAIN_5V
VBUS_JLINK
DMP2160UFD
DMP2160UFD
1
7
6
7
6
1
C1
R1
100nF
C0402
10K
R0402
C12
100nF
C0402
R5
100K
R0402
GND_POWER
GND_POWER
GND_POWER
U1B
U4B
VBUS_USBA
DMP2160UFD
DMP2160UFD
4
8
3
8
3
4
C2
100nF
C0402
R2
100K
R0402
R6
DNP
R0402
GND_POWER
GND_POWER
Note:ꢀ USB-powered operation eliminates additional wires and batteries. It is the preferred mode of
operation for any project that requires only a 5V source at up to 500 mA.
Jumper JP1 is used to perform MAIN_5V current measurements on the SAMA5D2-PTC-EK board.
3.2.2.2 Power Supply Requirements and Restrictions
Detailed information on the device power supplies is provided in tables “SAMA5D2 Power Supplies” and
“Power Supply Connections” in the SAMA5D2 Series datasheet.
3.2.2.3 Power-up and Power-down Considerations
Power-up and power-down considerations are described in section “Power Considerations” of the
SAMA5D2 Series datasheet.
Caution:ꢀ The power-up and power-down sequences provided in the SAMA5D2 Series
CAUTION
datasheet must be respected for reliable operation of the device.
3.2.2.4 Power Management
The board power management uses three types of regulators:
•
One dual synchronous step-down DC-DC regulator (U2 MIC2230) generates the 3.3V/800mA and
1.8V/800mA power lines and utilizes a high-efficiency, fixed-frequency (2.5 MHz), current-mode
PWM control architecture that requires a minimum number of external components.
•
•
One ultra low-dropout linear regulator (U3 MIC47053) generates the 1.25V/500mA from the 1.8V
source.
One high-performance single 2.5V/150mA is used as a VDDFUSE generator (U5 MIC5366).
The main regulators are enabled through a Field Effect Transistor (FET) scheme. The processor can
assert SHDN (a VDDBU-powered I/O) to shut down the regulators to enter Backup mode. All regulators
on the board are also shut down by the action of the SHDN signal.
A 3.3V battery (supercap) is implemented to permanently maintain VDDBU voltage (note: jumper JP6
must be in place). The board can be woken up by action on the PB4 button, which drives the WKUP
signal (also a VDDBU-powered I/O).
The figure below shows the power management scheme.
DS50002709A-page 10
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-4.ꢀBoard Power Management
VDD_MAIN_5V
C3
C5
10uF
C0603
1uF
C0603
R8
100K
R0402
U2
3
11
7
9
AVIN
VIN
EN2
VDD_MAIN_5V
R9
GND_POWER
EN_1
2
EN1
C10
390pF
C0402
EN_VDD_1V25
L2
FPWM#
10
4
FPWM#
SW1
PGOOD
SW2
VDD_1V8
L1
VDD_3V3
LQH43CN2R2M03L
L1812
8
LQH43CN2R2M03L
L1812
100K
R0402
12
1
OUT1
AGND
OUT2
PGND
C11
C13
5
6
10uF
C0603
4.7nF
C0402
FPWM#
C4
10uF
C0603
MIC2230-GSYML
MLF3x3mm
R10
DNP
R0402
VDD_3V3
GND_POWER
VDD_MAIN_5V
GND_POWER
R248
20K
C7
100nF
C0402
U3
R0402
EN_VDD_1V25
1
2
3
4
8
BIAS
EN
7
GND
IN1
PGOOD
VDD_1V8
VDD_3V3
6
5
R249
4.7K
R0402
ADJ
VDD_1V25
R250
3.3K
R251
10K
IN2
OUT
R0402
R0402
GND_POWER
R11
C6
10uF
C0603
100K
R0402
9
MIC47053YMT
C9
1uF
NRST
C0603
VDD_MAIN_5V
GND_POWER
GND_POWER
GND_POWER
VDD_3V3
GND_POWER
Q4
SOT-23
BC847C
R12
220K
R0402
1
R4
10K
R0402
VDD_MAIN_5V
EN_1
D1
R3
100K
R0402
C8
100nF
C0402
PMEG6010CEGWX
sod123
3
C14
STARTB
Q3
BSS138
SOT23_123
2.2uF
C0603
3
2
3
2
GND_POWER
STARTB
1
R13
39K
R0402
Q1
Q2
BSS138
SOT23_123
BSS138
SOT23_123
2
1
1
SHDN
GND_POWER
GND_POWER
GND_POWER
3.2.2.5 Supply Group Configuration
The main regulators provide all power supplies required by the SAMA5D2 device:
•
•
•
•
•
•
1.25V VDDCORE, VDDPLLA, VDDUTMIC, VDDHSIC
1.8V VDDIODDR, VDDSDHC1V8
2.5V VDDFUSE
3.3V VDDIOP0, VDDIOP1, VDDIOP2, VDDISC
3.3V VDDOSC, VDDUTMI, VDDANA, VDDAUDIOPLL
3.3V VDDBU
DS50002709A-page 11
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-5.ꢀPower Lines Distribution
JP3
Header 1X2
VDD_3V3
VDDIOP2
VDDIOP1
VDDIOP0
VDDISC
JP4
Header 1X2
L3
1
2
VDD_1V8
VDDIODDR
VDDSDHC1V8
BLM18PG181SN1D
R0603
1
L4
2
For DDR2
For MPU
L14
BLM18PG181SN1D
BLM18PG181SN1D
R0603
1
1
2
L5
2
BLM18PG181SN1D
R0603
L6
1
2
JP5
Header 1X2
BLM18PG181SN1D
R0603
VDD_1V25
VDDCORE
VDDPLLA
VDDUTMIC
VDDHSIC
VDDOSC
VDDUTMII
VDDANA
JP2
R16
L8
Header 1X2
2R2
MLZ1608N100L
R0603
L0603
R15
L7
MLZ1608N100L
L0603
R17
L12
1
2
0R
2R2
R0603
R0603
BLM18PG181SN1D
R0603
L10
1
2
R18
L13
1
2
0R
BLM18PG181SN1D
R0603
R0603
BLM18PG181SN1D
R0603
VDDAUDIOPLL
L11
1
2
R19
L9
2R2
R0603
MLZ1608N100L
L0603
BLM18PG181SN1D
R0603
Figure 3-6.ꢀProcessor Power Lines Supplies
VDDCORE
(1V2)
VDDCORE
C19
C27
C31
C33
C35
C43
C47
C49
C51
C58
C60
10uF
C0603
10uF
C0603
100nF
C0402
100nF
C0402
100nF
C0402
100nF
C0402
100nF
C0402
100nF
C0402
1nF
C0402
1nF
C0402
1nF
C0402
U6G
VDDCORE
(1V2) D7
D9
E7
E9
H4
K12
M5
M9
VDDCORE_1
VDDCORE_2
VDDCORE_3
VDDCORE_4
VDDCORE_5
VDDCORE_6
GNDCORE_1
GNDCORE_2
GNDCORE_3
GNDCORE_4
GNDCORE_5
GNDCORE_6
GND_POWER
VDDBU
H3
K13
N5
VDDANA
(3V3)
VDDBU
(3V3)
VDDANA
N9
C21
C37
C45
100nF
C0402
100nF
C0402
100nF
C0402
VDDIODDR (1V8) D11
D14
E11
E12
E14
H14
J14
L14
VDDDDR_1
VDDDDR_2
VDDDDR_3
VDDDDR_4
VDDDDR_5
VDDDDR_6
VDDDDR_7
GNDDDR_1
GNDDDR_2
GNDDDR_3
GNDDDR_4
GNDDDR_5
GNDDDR_6
GNDDDR_7
D12
D15
E15
H15
J15
L15
GND_POWER
VDDIOP0
GND_POWER
VDDIOP1
VDDIOP2
(3V3) VDDIOP0
(3V3) VDDIOP1
(3V3)VDDIOP2
VDDBU
(3V3) N7
(3V3) K3
L5
N6
L3
K5
VDDBU
GNDBU
GNDANA
GNDADC
C22
100nF
C0402
C29
100nF
C0402
C38
C46
C53
100nF
C0402
VDDANA
100nF
C0402
100nF
C0402
VDDANA
VDDADC
VDDIOP0
VDDIOP1
VDDIOP2
(3V3) E6
F7
F6
G7
GND_POWER
GND_POWER
GND_POWER
VDDAUDIOPLL
VDDIOP0_1
VDDIOP0_2
GNDIOP0_1
GNDIOP0_2
VDDHSIC
(1V2) VDDHSIC
VDDFUSE
(2V5) VDDFUSE
(3V3) N13
R14
M13
P14
VDDIOP1_1
VDDIOP1_2
GNDIOP1_1
GNDIOP1_2
(3V3) VDDAUDIOPLL
C23
100nF
C0402
C39
100nF
C0402
C54
4.7uF
C0805
C57
100nF
C0402
(3V3) F10
F9
VDDIOP2
GNDIOP2
VDDHSIC
VDDFUSE
(1V2) R9
(2V5) M12
VDDHSIC
T5
T4
VDDFUSE
GNDDPLL
GND_POWER
GND_POWER
GND_POWER
VDDSDHC
VDDAUDIOPLL (3V3) T3
VDDAUDIOPLL
GNDAUDIOPLL
VDDUTMIC
(1V2)
VDDUTMII
(3V3) VDDUTMII
VDDUTMIC
(3V3 or 1V8) VDDSDHC
VDDUTMIC (1V2) P7
R7
P9
VDDUTMIC
VDDUTMII
VDDSDMMC
VDDPLLA
VDDOSC
GNDUTMIC
GNDUTMII
GNDSDMMC
GNDPLLA
GNDOSC
C24
4.7uF
C0805
C30
100nF
C0402
C40
100nF
C0402
C55
100nF
C0402
VDDUTMII
(3V3) P8
VDDSDHC (3V3 or 1V8)P11
R11
U5
T6
GNDUTMII
VDDPLLA
VDDOSC
VDDISC
(1V2) U4
(3V3) T7
(3V3) F4
GND_POWER
GND_POWER
VDDOSC
GND_POWER
VDDISC
VDDPLLA
(1V2)
G4
VDDISC
GNDISC
VDDPLLA
(3V3) VDDOSC
(3V3) VDDISC
R20
1R-1%
R0603
R21
1R-1%
R0603
ATSAMA5D27C-CN
bga289p8
GND_POWER
C56
100nF
C0402
C26
100nF
C0402
C42
100nF
C0402
VDDIODDR
VDDIODDR
(1V8)
C25
C41
4.7uF
C0805
4.7uF
C0805
C20
10uF
C0603
C28
10uF
C0603
C32
100nF
C0402
C34
100nF
C0402
C36
100nF
C0402
C44
100nF
C0402
C48
100nF
C0402
C50
100nF
C0402
C52
1nF
C0402
C59
1nF
C0402
C61
1nF
C0402
GND_POWER
GND_POWER
GND_POWER
GND_POWER
3.2.2.6 VDDFUSE
The SAMA5D2-PTC-EK board embeds a 2.5V regulator for fuse box programming.
DS50002709A-page 12
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-7.ꢀVDDFUSE Regulator
VDD_3V3
VDDFUSE
U5
4
2
1
3
VIN
VOUT
EN
C15
1uF
EN_1 12
GND
C16
C0603
MIC5366-2.5YMT
MLF1x1mm
1uF
C0603
GND_POWER
3.2.2.7 Backup Power Supply
The SAMA5D2-PTC-EK board requires a power source in order to permanently power the backup part of
the SAMA5D2 device (refer to SAMA5D2 Series datasheet). The super capacitor C17 sustains such
permanent power to VDDBU when all system power sources are off.
Figure 3-8.ꢀVDDBU Powering Options
JP6
Header 1X2
VDD_3V3
D3
BAT54C
VDDBU
1
2
3
D2
R14
100R-1%
R0402
SOT23_123
PMEG6010CEGWX
sod123
C18
100nF
C0402
+
C17
0.2F/3.3V
c117x68
GND_POWER
GND_POWER
(Super)-Capacitor
energy storage
3.2.3
Reset Circuitry
The reset sources for the SAMA5D2-PTC-EK board are:
•
•
•
Power-on reset from the power management unit,
Push button reset BP3,
JTAG or JLINK-OB reset from an in-circuit emulator.
Figure 3-9.ꢀMain Reset Control
VDD_3V3
R11
100K
R0402
NRST
PowerGood VDD_1V25
VDD_MAIN_5V
Q4
SOT-23
BC847C
R12
220K
R0402
1
D1
PMEG6010CEGWX
sod123
3
2
C14
2.2uF
C0603
Q3
BSS138
SOT23_123
STARTB
1
R13
39K
R0402
GND_POWER
3.2.4
Shutdown Circuitry
The SHDN signal, output of Shutdown Controller (SHDN), drives the shutdown request to the power
supply. This output signal is supplied by VDDBU, which is present in Backup mode.
The Shutdown Controller manages the main power supply and is connected to the ENABLE input pin of
the DC/DC converter providing the main power supplies of the system.
DS50002709A-page 13
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-10.ꢀShutdown Controller
VDD_3V3
R4
10K
R0402
VDD_MAIN_5V
EN_1
R3
C8
100K
R0402
100nF
C0402
STARTB
3
3
2
GND_POWER
Q1
Q2
BSS138
SOT23_123
BSS138
SOT23_123
1
1
SHDN
2
GND_POWER
GND_POWER
3.2.5
Push Button Switches
The SAMA5D2-PTC-EK features four push buttons:
•
•
•
One board reset push button (BP3). When pressed and released, it causes a power-on reset of the
board.
One wakeup push button (BP4) connected to the SAMA5D2 WKUP pin, used to exit the processor
from low-power mode.
One disable boot push button (BP2) used to devalidate the boot memories (refer to CS Disable).
Figure 3-11.ꢀSystem Push Buttons
BP2
Tact Switch
R145
r0402
100R-1%
DIS BOOT
DISABLE_BOOT
FSM2JSML
Tact Switch
BP3
BP4
R146
r0402
100R-1%
100R-1%
RESET
NRST
FSM2JSML
Tact Switch
R147
r0402
WAKE UP
WKUP
FSM2JSML
GND_POWER
VDDBU
R238
R0402
10K
•
One user push button (BP1) connected to PIO PB10.
Figure 3-12.ꢀUser Push Button
BP1
Tact Switch
R144
R0402
0R
PA10_USER_BT
FSM2JSML
USER BUTTON
GND_POWER
3.2.6
Clock Circuitry
The embedded microcontroller generates its necessary clocks based on two crystal oscillators: one slow
clock (SLCK) oscillator running at 32.768 KHz and one main clock oscillator running at 24 MHz.
The SAMA5D2-PTC-EK board includes four clock sources:
•
The two clocks mentioned above are alternatives for the SAMA5D2 processor (24 MHz, 32.768
kHz)
•
•
One crystal oscillator for the Ethernet RMII chip (25 MHz)
One crystal oscillator for the JLink-OB microcontroller (12 MHz)
DS50002709A-page 14
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-13.ꢀMPU Clock Circuitry
XIN
XOUT32
XIN32
R123
DNP
R0402
XOUT
R122
DNP
R0402
Y1
1
2
4
3
32.768KHz CL=12.5pF
4
3
1
2
C97
20pF
C0402
C99
C96
24MHz CL=10pF
x4s32x25
C98
20pF
C0402
20pF
C0402
20pF
C0402
Y2
X4S70X15
GND_POWER
GND_POWER
GND_POWER
GND_POWER
3.2.7
Memory
3.2.7.1 Memory Organization
The SAMA5D2 features a DDR/SDR memory interface and an External Bus Interface (EBI) to enable
interfacing to a wide range of external memories and to almost any kind of parallel peripheral.
This section describes the memory devices mounted on the SAMA5D2-PTC-EK board:
•
•
•
•
•
Two DDR2 SDRAMs
One NAND Flash
One QSPI Flash
One SPI Flash (optional)
One serial EEPROM
Additional memory can be added to the board by:
•
•
Installing an SD or MMC card in the SD/MMC0 or SD/MMC1 slot,
Using the USB-B port.
Support is dependent upon driver support in the OS.
3.2.7.2 DDR2/SDRAMs
Two DDR2/SDRAMs (W972GG6KB-25-2 Gbits = 16 Mbits x 16 x 8 banks) are used as main system
memory, totalling 4 Gbits of SDRAM on the board. The memory bus is 32 bits wide and operates with a
frequency of up to 166 MHz.
The figure below illustrates the implementation for the DDR2 memories.
DS50002709A-page 15
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-14.ꢀDDR2 SDRAMs
U7
U8
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DDR_BA0
DDR_BA1
DDR_BA2
DDR_BA0
DDR_BA1
DDR_BA2
L2
L3
L1
L2
L3
L1
BA0
BA1
BA2
BA0
BA1
BA2
DDR_DQS0+
DDR_DQS0-
DDR_DQS1+
DDR_DQS1-
DDR_DQS2+
DDR_DQS2-
DDR_DQS3+
DDR_DQS3-
F7
E8
B7
A8
F7
E8
B7
A8
LDQS_P
NU/LDQS_N
UDQS_P
LDQS_P
NU/LDQS_N
UDQS_P
DDR_CKE
DDR_CLK+
DDR_CLK-
DDR_CKE
DDR_CLK+
DDR_CLK-
K2
J8
K8
K2
J8
K8
CKE
CKE
CK_P NU/UDQS_N
CK_N
LDM
RAS
CAS
WE
CK_P NU/UDQS_N
CK_N
LDM
RAS
CAS
WE
VDD_1V8
R0402
R0402
VDD_1V8
R0402
R0402
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
F3
B3
F3
B3
DDR_RAS
DDR_CAS
DDR_WE
DDR_CS
DDR_RAS
DDR_CAS
DDR_WE
DDR_CS
K7
L7
K3
L8
R29
R30
DNP
0R
K7
L7
K3
L8
R31
R32
DNP
0R
UDM
UDM
K9
K9
ODT
ODT
CS
CS
R7
R3
E2
A2
A1
E1
J9
M9
R1
R7
R3
E2
A2
A1
E1
J9
M9
R1
VDD_1V8
VDD_1V8
NC4
NC3
NC2
NC1
VDD1
VDD2
VDD3
VDD4
VDD5
NC4
NC3
NC2
NC1
VDD1
VDD2
VDD3
VDD4
VDD5
GND_POWER
GND_POWER
A3
E3
J3
N1
P9
A3
E3
J3
N1
P9
VSS1
VSS2
VSS3
VSS4
VSS5
VSS1
VSS2
VSS3
VSS4
VSS5
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
J1
J2
J1
J2
VDDL
VREF
VDDL
VREF
DDR_VREF
DDR_VREF
J7
J7
VSSDL
VSSDL
W972GG6KB-25
bga84-32-1509e
C72
100nF
C0402
C75
1nF
C0402
W972GG6KB-25
bga84-32-1509e
C94
100nF
C0402
C95
1nF
C0402
GND_POWER
GND_POWER
GND_POWER
GND_POWER
3.2.7.3 DDR_CAL Analog Input
One specific analog input, DDR_CAL, is used to calibrate all DDR I/Os.
Table 3-3.ꢀCalibration Cell DDR_CAL Value
Memory
Resistor value
LPDDR2/LPDDR3
DDR3L
24K
23K
22K
21K
DDR3
DDR2/LPDDR1
DS50002709A-page 16
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-15.ꢀDDR Signals and CAL Analog Input
U6E
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
F12
C17
B17
B16
C16
G14
F14
F11
C14
D13
C15
A16
A17
G11
B12
A12
C12
A13
A14
C13
A15
B15
G17
G16
H17
K17
K16
J13
K14
K15
B8
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_BA0
DDR_BA1
DDR_BA2
H12
H13
F17
DDR_BA0
DDR_BA1
DDR_BA2
B9
C9
A9
A10
D10
B11
A11
J12
H10
J11
K11
L13
L11
L12
M17
DDR_RAS
DDR_CAS
F13
G12
DDR_RAS
DDR_CAS
DDR_CLK+
DDR_CLK-
DDR_CKE
E17
D17
F16
DDR_CLK
DDR_CLKN
DDR_CKE
R25
100K
R0402
GND_POWER
DDR_CS
DDR_WE
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
G13
F15
C11
G15
C8
DDR_CS
DDR_WE
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
E13
H11
DDR_CAL
VDDIODDR
21K-1%
DDR_DQS0+
DDR_DQS0-
22pF
C64
C0402
B13
B14
DDR_DQS0
DDR_DQSN0
R24
R0402
R23
100K
DDR_DQS1+
DDR_DQS1-
J17
J16
DDR_DQS1
DDR_DQSN1
R0402
DDR_DQS2+
DDR_DQS2-
GND_POWER
DDR_RESETN
C10
B10
DDR_DQS2
DDR_DQSN2
E16
DDR_RESETN
DDR_VREF
DDR_DQS3+
DDR_DQS3-
H16
D16
L17
L16
DDR_VREFB0
DDR_VREFCM
DDR_DQS3
DDR_DQSN3
C62
C63
100nF
C0402
100nF
C0402
ATSAMA5D27C-CN
bga289p8
GND_POWER
3.2.7.4 NAND FLASH
The SAMA5D2-PTC-EK has native support for NAND Flash memory through its NAND Flash Controller.
The board implements one MT29F4G08ABA 4Gb x 16 NAND Flash connected to chip select three
(NCS3) of the microcontroller.
Caution:ꢀ The NAND Flash interface is shared with the SDMMC1 and QSPI interfaces.
CAUTION
The figure below illustrates the NAND Flash memory implementation.
Figure 3-16.ꢀNAND Flash
3V3_NAND
R175
100K
R176
10K
R180
100K
U13
16
17
8
18
9
29
30
31
32
41
42
43
44
NAND_CLE_PB1
NAND_ALE_PB0
NAND_REn_PB2
NAND_WEn_PA30
NAND_IO0_PA22
NAND_IO1_PA23
NAND_IO2_PA24
NAND_IO3_PA25
NAND_IO4_PA26
NAND_IO5_PA27
NAND_IO6_PA28
NAND_IO7_PA29
CLE
ALE
RE#
WE#
CE#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
NAND_CS_PA31
R179
NAND_WPn
0R
7
NAND_RDY_PC8
R/B#
WP#
19
45
46
47
NC19
NC20
NC21
R177
DNP
1
2
3
4
5
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
JP8
Header 1X2
38
35
20
21
DNU4
DNU3
DNU2
DNU1
6
3V3_NAND
10
11
14
15
22
23
24
26
27
28
33
40
VDD_3V3
3V3_NAND
NC9
12
34
37
39
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
VCC_1
VCC_2
VCC_3
VCC_4
R174
0R
C112
100nF
C113
100nF
C114
100nF
C115
100nF
13
25
36
48
VSS_1
VSS_2
VSS_3
VSS_4
MT29F4G08ABADAWP
DS50002709A-page 17
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Table 3-4.ꢀNAND Flash Signal Descriptions
PIO
Mnemonic
NAND_D0
NAND_D1
NAND_D2
NAND_D3
NAND_D4
NAND_D5
NAND_D6
NAND_D7
NANDWE
NCS3
Shared PIO
Signal Description
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
PB00
PB01
PB02
PC08
SDMMC1-QSPI
Data 0
Data 1
Data 2
Data 3
Data 4
Data 5
Data 6
Data 7
–
QSPI
QSPI
QSPI
QSPI
QSPI
SDMMC1
–
SDMMC1
–
–
–
–
–
Chip Select
–
NANDALE
NANDCLE
NANDOE
NANRDY
–
–
–
3.2.7.5 NAND Flash CS Disable
On-board jumper JP8 controls the selection (CS#) of the NAND Flash memory.
3.2.8
Additional Memories
3.2.8.1 Serial Flash
The SAMA5D2 includes two high-speed Serial Peripheral Interface (SPI) controllers. The SPI is a full
duplex synchronous bus supporting a single master and multiple slave devices. The SPI bus consists of
the following items:
•
•
•
•
a serial clock line (generated by the master)
a data output line from the master
a data input line to the master
one or more active low chip select signals (output from the master)
One SPI port is used to interface with the on-board serial Flash.
The following figure illustrates the implementation of an SPI Flash memory.
Figure 3-17.ꢀSerial Flash
VDD_3V3
U16
5
2
6
8
SPI0_MOSI_PA15
SPI0_MISO_PA16
SPI0_SPCK_PA14
SI
SO
SCK
VCC
3
7
C119
100nF
C0402
WP
HOLD
SPI0_CS0_PA17
1
CS
4
GND
SST26VF032B-104I/SM
soic8jg
GND_POWER
DS50002709A-page 18
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Note:ꢀ The serial Flash is optional and not mounted on board.
3.2.8.2 QSPI Serial Flash
The SAMA5D2 provides two Quad Serial Peripheral Interfaces (QSPI).
A QSPI is a synchronous serial data link that provides communication with external devices in Master
mode.
The QSPI can be used in SPI mode to interface with serial peripherals (such as ADCs, DACs, LCD
controllers, CAN controllers and sensors), or in Serial Memory mode to interface with serial Flash
memories.
The QSPI allows the system to execute code directly from a serial Flash memory (XIP, or Execute In
place, technology) without code shadowing to RAM. The serial Flash memory mapping is seen in the
system as other memories (ROM, SRAM, DRAM, etc.).
With the support of the Quad SPI protocol, the QSPI allows the system to use high-performance serial
Flash memories which are small and inexpensive, instead of larger and more expensive parallel Flash
memories.
The figure below illustrates the implementation of a QSPI Flash memory.
Figure 3-18.ꢀQSPI Serial Flash
VDD_3V3
JP13
R242
10K
Header 1X2
QSPI0_CS_PA23
VDD_3V3
VDD_3V3
R186
10K
R187
10K
R0402
R0402
C120
U14
100nF
C0402
5
2
3
7
8
4
1
6
QSPI0_IO0_PA24
QSPI0_IO1_PA25
QSPI0_IO2_PA26
QSPI0_IO3_PA27
SI/SIO0
SO/SIO1 GND
SIO2
SIO3
VCC
CS#
SCLK
QSPI0_SCK_PA22
GND_POWER
SST26VF064B-104I/SM
soic8jg
A jumper (JP13) is used to disable the QSPI Flash.
Table 3-5.ꢀSPI and QSPI Signal Descriptions
PIO
Mnemonic
PIO Shared
Signal Description
SPI clock
PA14 SPI0_SPCK
PA15 SPI0_MOSI
PA16 SPI0_MISO
PA17 SPI0_NPCS0
_
_
_
_
_
Master out - Slave in
Master in - Slave out
Chip select
_
_
_
PA22 QSPI0_SCK
PA23 QSPI0_CS
PA24 QSPI0_IO0
PA25 QSPI0_IO1
SDMMC1-Nand Flash
Nand Flash
QSPI clock
Chip select
Data0
Nand Flash
Nand Flash
Data1
DS50002709A-page 19
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
PIO
Mnemonic
PIO Shared
Nand Flash
Nand Flash
Signal Description
Data2
PA26 QSPI0_IO2
PA27 QSPI0_IO3
Data3
3.2.8.3 CS Disable
On-board push button PB2 controls the selection (CS#) of the bootable memory components (QSPI and
serial Flash) using a non-inverting 3-state buffer.
Figure 3-19.ꢀCS Disable
VDD_3V3
C117
100nF
R178
10K
R184
10K
U11
1
2
3
5
4
VCC
QSPI0_CS_PA23
QSPI0_NPCS_PA23
BOOT_DIS
GND
QSPI Flash CS
NL17SZ126DFT2G
GND_POWER
DISABLE_BOOT
C116
100nF
R185
10K
U12
1
2
3
5
VCC
SPI0_CS0_PA17
SPI Flash CS
4
SPI0_NPCS0_PA17
GND
NL17SZ126DFT2G
GND_POWER
The rule of operation is:
•
PB2 (DISABLE_BOOT) and PB3 (RESET) pressed = booting from QSPI or optional serial Flash is
disabled.
Refer to the SAMA5D2 Series datasheet for more information on standard boot strategies and
sequencing.
3.2.8.4 Serial EEPROM with Unique MAC Address
The SAMA5D2-PTC-EK board embeds one Microchip 24AA02E48 I²C serial EEPROM connected on the
TWI1 interface.
The TWI interface is I2C-compatible and similarly uses only two lines, namely serial data (SDA) and serial
clock (SCL). According to the standard, the TWI clock rate is limited to 400 kHz in Fast mode and 100
kHz in Normal mode, but configurable baud rate generator permits the output data rate to be adapted to a
wide range of core clock frequencies. The TWI is used in Master mode.
The 24AA02E48 features 2048 bits of Serial Electrically-Erasable Programmable Read-Only Memory
(EEPROM) organized as 256 words of eight bits each and is accessed via an I2C-compatible (2-wire)
serial interface. In addition, the 24AA02E48 incorporates an easy and inexpensive method to obtain a
globally unique MAC or EUI address (EUI-48).
The EUI-48 addresses can be assigned as the actual physical address of a system hardware device or
node, or it can be assigned to a software instance. These addresses are factory-programmed by
Microchip and guaranteed unique. They are permanently write-protected in an extended memory block
located outside the standard 2-Kbit memory array.
Caution:ꢀ The EEPROM device is used as a “software label” to store board information such as
CAUTION
chip type, manufacturer name and production date, using the last two 16-byte blocks in
memory. The information contained in these blocks should not be modified.
DS50002709A-page 20
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Table 3-6.ꢀEEPROM PIOs Signal Descriptions
PIO
PC6
PC7
Mnemonic
TWD1
Shared
XPRO
XPRO
Signal Description
TWI Data
TWI Clock
TWCL1
The figure below illustrates the implementation for the EEPROM.
Figure 3-20.ꢀEEPROM 24AA02E48
VDD_3V3
U15
1
2
3
8
4
A0
A1
A2
VCC
C118
100nF
C0402
TWD1
TWCK1
5
6
7
TWD1_PC6
TWCK1_PC7
SDA
SCL
WP
GND
24AA02E48
8MA2
R188
10K
GND_POWER
R0402
GND_POWER
3.2.9
Secure Digital Multimedia Card (SDMMC) Interface
The SD (Secure Digital) Card is a non-volatile memory card format used as a mass storage memory in
mobile devices.
3.2.9.1 Secure Digital Multimedia Card (SDMMC) Controller
The SAMA5D2-PTC-EK board has two Secure Digital Multimedia Card (SDMMC) interfaces that support
the MultiMedia Card (e.MMC) Specification V4.41, the SD Memory Card Specification V3.0, and the
SDIO V3.0 specification. It is compliant with the SD Host Controller Standard V3.0 Specification.
•
•
The SDMMC0 interface is connected to a standard SD card interface.
The SDMMC1 interface is connected to a microSD card interface.
3.2.9.2 SDMMC0 Card Connector
A standard MMC/SD card connector, connected to SDMMC0, is mounted on the top side of the board.
The SDMMC0 communication is based on a 12-pin interface (clock, command, data (8) and power lines
(2)). A card detection switch is included.
The figure below illustrates the implementation for the SDMMC0 interface.
Figure 3-21.ꢀSDMMC0 Standard SD Socket
VDD_3V3
VDDSDHC
R171
R154
0R
R0402
0R
R0402
C110 10uF
C0603
R155
68k
R157
68k
R158
68k
R159
68k
R161
68k
R163
68k
R165
68k
R167
68k
R169
10k
R172
10k
R173
10k
C111 100nF
C0402
GND_POWER
R0603
R0603
R0603
R0603
R0603
R0603
R0603
R0603
R0402
R0402
R0402
(MCI0_WP)
(MCI0_CD)
SDMMC0_WP_PA12
SDMMC0_CD_PA13
J6
16
15
14
(MCI0_DA1)
(MCI0_DA0)
8
7
6
5
4
3
2
1
9
SDMMC0_DAT1_PA3
SDMMC0_DAT0_PA2
(MCI0_CK)
SDMMC0_CK_PA0
GND_POWER
13
12
11
10
(MCI0_CDA)
(MCI0_DA3)
(MCI0_DA2)
SDMMC0_CMD_PA1
SDMMC0_DAT3_PA5
SDMMC0_DAT2_PA4
7SDMM-B0-2211
con_kingconn_7sdmm_2211
(MCI0_DA4)
(MCI0_DA5)
(MCI0_DA6)
(MCI0_DA7)
SDMMC0_DAT4_PA6
SDMMC0_DAT5_PA7
SDMMC0_DAT6_PA8
SDMMC0_DAT7_PA9
DS50002709A-page 21
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-22.ꢀStandard SD Socket J6 Location
The table below describes the pin assignment of SD/MMC connector J6.
Table 3-7.ꢀStandard SD Socket J6 Pin Assignment
Pin No
Mnemonic
MCI0_DA3
MCI0_CDA
GND
Signal Description
SDMMC0_DAT3_PA5
SDMMC0_CMD_PA1
GND
1
2
3
4
VCC
VDDSDHC (3.3V or 1.8V)
SDMMC0_CK_PA0
5
MCI0_CK
MCI0_CD
MCI0_DA0
MCI0_DA1
MCI0_DA2
MCI0_DA4
MCI0_DA5
MCI0_DA6
MCI0_DA7
6
SDMMC0_CD_PA13 (card detect)
SDMMC0_DAT0_PA2
SDMMC0_DAT1_PA3
SDMMC0_DAT2_PA4
SDMMC0_DAT4_PA6
SDMMC0_DAT5_PA7
SDMMC0_DAT6_PA8
SDMMC0_DAT7_PA9
7
8
9
10
11
12
13
DS50002709A-page 22
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Pin No
14
Mnemonic
MCI0_WP
GND
Signal Description
SDMMC0_WP_PA12
GND
15
16
GND
GND
3.2.9.3 SDMMC0 VDDHC Voltage Switching
The board uses an ADG849 to switch the power line VDDSDHC_3V3 or VDDSDHC_1V8 through the
command line SDMMC0_VDDSEL_PA11.
Figure 3-23.ꢀSDMMC0 VDDSDHC Voltage Switching
VDD_3V3 VDDSDHC1V8
VDDSDHC
R151
R152
DNP
R0402
DNP
R0402
VDD_3V3
C107
100nF
C0402
U9
6
GND_POWER
S2
4
5
S1
D
1
SDMMC0_VDDSEL_PA11
IN
ADG849YKSZ-REEL
SC70
R150
10k
R0402
GND_POWER
Table 3-8.ꢀSDMMC1 Power Command
PIO
Mnemonic
SDMMC0_VDDSEL
Signal Description
PA11
Selects 3.3V or 1.8V
3.2.9.4 SDMMC1 Card Connector
A microSD card connector, connected to SDMMC1, is mounted on the top side of the board. The
SDMMC1 communication is based on a 9-pin interface (clock, command, card detect, four data and
power lines). A card detection switch is included. The microSD connector can be used to connect any
microSD card for mass storage.
Figure 3-24.ꢀSDMMC1 microSD Socket
VDD_3V3
R160
10k
R162
68k
R164
68k
R166
68k
R168
68k
R170
10k
R0402
R0603
R0603
R0603
R0603
R0402
(MCI1_CD)
SDMMC1_CD_PA30
J7
10
8
SW2
(MCI1_DA1)
(MCI1_DA0)
SDMMC1_DAT1_PA19
SDMMC1_DAT0_PA18
7
6
5
4
11
12
13
14
(MCI1_CK)
SDMMC1_CK_PA22
(MCI1_CDA)
(MCI1_DA3)
(MCI1_DA2)
3
2
1
SDMMC1_CMD_PA28
SDMMC1_DAT3_PA21
SDMMC1_DAT2_PA20
PJS008-2120-0 GND_POWER
Micro_SD_PJS008
9
C108
10uF
C0603
C109
100nF
C0402
GND_POWER
DS50002709A-page 23
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-25.ꢀmicroSD Socket J7 Location
The table below describes the pin assignment of microSD connector J7.
Table 3-9.ꢀmicroSD Socket J7 Pin Assignment
Pin No
Mnemonic
SDMMC1_DAT2
SDMMC1_DAT3
SDMMC1_CDA
VCC
PIO
PA20
PA21
PA28
–
Shared
Signal Description
Data bit 2
1
2
–
–
–
–
–
–
–
–
–
–
–
Data bit 3
3
Command
4
3.3V supply voltage
Clock
5
SDMMC1_CK
GND
PA22
–
6
Common ground
Data bit 0
7
SDMMC1_DAT0
SDMMC1_DAT1
SW1
PA18
PA19
GND
PA30
–
8
Data bit 1
9
Not used
10
11
SDMMC1_CD
GND
Card detection switch
Common ground
DS50002709A-page 24
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Pin No
12
Mnemonic
GND
PIO
–
Shared
Signal Description
Common ground
Common ground
Common ground
–
–
–
13
GND
–
14
GND
–
3.2.10 Communication Interfaces
The SAMA5D2-PTC-EK board is equipped with Ethernet and USB host/device communication interfaces.
This section describes the signals and connectors related to the ETH and USB communication interfaces.
3.2.10.1 Ethernet 10/100 (GMAC) Port
The SAMA5D2-PTC-EK board features a Micrel PHY device (KSZ8081) operating at 10/100 Mb/s. The
board supports RMII interface modes. The Ethernet interface consists of two pairs of low-voltage
differential pair signals designated from GRX± and GTX± plus control signals for link activity indicators.
These signals can be used to connect to a 10/100 Base-T RJ45 connector integrated on the SAMA5D2-
PTC-EK board.
An individual 48-bit MAC address (Ethernet hardware address) is allocated to each product. This number
is stored in the Microchip 24AA02E48 I2C serial EEPROM (refer to Serial EEPROM with Unique MAC
Address).
Additionally, for monitoring and control purposes, a LED functionality is carried on the RJ45 connectors to
indicate activity, link, and speed status.
For more information about the Ethernet controller device, refer to the Micrel KSZ8081RN controller
manufacturer's datasheet.
Figure 3-26.ꢀEthernet Interface
VDD_3V3
R197
1K
R198
1K
R199
10K
R200
10K
R203
10K
R0402
R0402
R0402
R0402
R0402
U17
19
ETH_GTXCK_PB14
top/bot
top/bot
top/bot
top/bot
RXC/B-CAST_OFF
TX+
TX-
7
6
5
TXP
25
24
23
13
14
15
16
18
20
29
28
ETH_GTX1_PB21
ETH_GTX0_PB20
ETH_GTXEN_PB15
TXD1
TXD0
TXEN
TXM
RXP
RXD3/PHYAD0
RXD2/PHYAD1
RXD1/PHYAD2
RXD0/DUPLEX
RXDV/CONFIG2
RXER/ISO
ETH_GRX1_PB19
ETH_GRX0_PB18
ETH_GRXDV_PB16
ETH_GRXER_PB17
RX+
CRS/CONFIG1
COL/CONFIG0
RX-
4
2
RXM
C123
C124
2.2uF
C0603
100nF
C0402
12
11
21
ETH_GMDC_PB22
ETH_GMDIO_PB23
ETH_INT_PB24
VDD_1V2
MDC
MDIO
INTRP/NAND
1
33
22
26
27
10
VDD_3V3
GND
PADDLE
TXC
TXD2
TXD3
REXT
VDDA_3V3
L19
BLM18PG181SN1D
3
1
2
VDDA_3V3
R0603
R194
6.49K 1%
R0402
C127
10uF
C0603
C129
100nF
C0402
VDD_3V3
GND_POWER
ETH_XO
ETH_XI
8
9
GND_POWER
XO
XI
R192
10K
R0402
R193
10K
R0402
17
32
GND_POWER
VDDIO
C128
10uF
C0603
C130
100nF
C0402
ETH_LED0
ETH_LED1
30
31
LED0/NWAYEN
LED1/SPEED
GND_POWER
R196
0R
R0402
NRST
RESET
KSZ8081RNB
qfn32_1p5h
DS50002709A-page 25
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Table 3-10.ꢀEthernet PHY 10/100 Signal Descriptions
PIO
Mnemonic
Shared
Signal Description
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
ETH_GTXCK
ETH_GTXEN
ETH_GRXDV
ETH_GRXER
ETH_GRX0
ETH_GRX1
ETH_GTX0
_
_
_
_
_
_
_
_
_
_
_
Transmit clock
Transmit enable
Receive data valid
Receive error
Receive data 0
Receive data 1
Transmit data 0
ETH_GTX1
Transmit data 1
ETH_GMDC
ETH_GMDIO
ETH_GTX_INT
Management data clock
Management data in/out
Interrupt (open drain)
Figure 3-27.ꢀEthernet PHY Connector J8
J8
13F-64GYD2PL2NL
TX+
1
TD+
CT
1
4
2
TX+
TX-
2
3
6
TX-
RX+
RX-
TD-
RD+
CT
3
5
6
RX+
RX-
RD-
C121
C122
100nF
C0402
100nF
C0402
75 75
75
75
4
5
7
8
NC
7
8
1nF
GND_ETH
13
14
15
16
Right yellow LED
Left Green LED
EARTH_ETH
EARTH_ETH
rj45_13f-64gy_P12_4
ACT ETH_LED1
LINK ETH_LED0
VDD_3V3
R189
510R
R0402
R190
510R
R0402
DS50002709A-page 26
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-28.ꢀEthernet RJ45 Connector J8 Location
The table below describes the pin assignment of Ethernet connector J8.
Table 3-11.ꢀEthernet RJ45 Connector J8 Pin Assignment
Pin No
Mnemonic
TX+
Signal Description
1
2
Transmit
TX-
Transmit
3
RX+
Receive
4
Decoupling capacitor
Decoupling capacitor
RX-
–
5
–
6
Receive
7
NC
–
8
EARTH / GND
ACT LED
ACT LED
LINK LED
LINK LED
EARTH / GND
Common ground
LED activity
LED activity
LED link connection
LED link connection
Common ground
9
10
11
12
13
DS50002709A-page 27
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Pin No
14
Mnemonic
EARTH / GND
NC
Signal Description
Common ground
15
–
–
16
NC
3.2.10.2 USB Host/Device A, B
The USB (Universal Serial Bus) is a hot-pluggable general-purpose high-speed I/O standard for computer
peripherals. The standard defines connector types, cabling, and communication protocols for
interconnecting a wide variety of electronic devices. The USB 2.0 Specification defines data transfer rates
as high as 480 Mbps (also known as High Speed USB). A USB host bus connector uses 4 pins: a power
supply pin (5V), a differential pair (D+ and D- pins) and a ground pin.
The SAMA5D2-PTC-EK board features three USB communication ports named USB-A to USB-C:
•
USB-A device interface
–
–
–
One USB device standard micro-AB connector.
This port has a VBUS detection function made through the R148-R149 resistor bridge.
The USB-A port is used as a primary power source and as a communication link for the
board, and derives power from the PC over the USB cable. In most cases, this port is limited
to 500 mA.
•
•
USB-B (host port B high- and full-speed interface)
–
–
One USB host type A connector.
The USB-B host port is equipped with a 500 mA high-side power switch to enable powering
devices connected to it.
UBC-C (High-Speed Inter-Chip/HSIC port)
–
–
One USB high-speed host port with an HSIC interface.
The port is connected to a single 2-pin jumper.
3.2.10.3 USB-A Interface
DS50002709A-page 28
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-29.ꢀUSB-A Type microAB Connector J4 Location
3.2.10.4 USB-A VBUS Detection
The USB-A port (J4) features a VBUS detection function provided by the R148-R149 resistor bridge.
The figure below shows the USB implementation on the USBA port.
Figure 3-30.ꢀUSB-A Power and VBUS Detection
VBUS_USBA
R148
C103
100K
R0402
USBA_VBUS_5V_PB11
20pF
C0402
R149
200K
R0402
9
1
2
3
4
5
GND_POWER
VBUS
DM
DP
ID
GND
GND_POWER
USBA_DM
USBA_DP
10
J4
GND_POWER
USBMICRO5_6A
MicroUSB AB Connector
EARTH_USB_A
Table 3-12.ꢀUSB-A PIO Signal Descriptions
PIO
Mnemonic
Shared
Signal Description
PB11
USBA_VBUS_5V
-
VBUS insertion detection
3.2.10.5 USB-B Interface
The figure below shows the USB implementation on the USB-B port.
DS50002709A-page 29
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-31.ꢀUSB-B Interface
5
SH1
USBB_VBUS_5V
1
2
3
4
VBUS
DM
DP
USBB_DM
USBB_DP
GND
A
GND_POWER
SH2
6
J3
Single USB Type A
USB4_2AL
EARTH_USB_B
Figure 3-32.ꢀUSB-B Type A Connector J3 Location
Table 3-13.ꢀUSB-B PIO Signal Descriptions
PIO
Mnemonic
Shared
Signal Description
PB12 USBB_EN_5V
PB13 USBB_OVCUR
–
–
Power switch enable (active high)
Indicates overcurrent (open drain)
USB-B Power Switch
The USB-B Host port is equipped with a 500 mA high-side power switch for self-powered and bus-
powered applications. If the client device is bus-powered, the carrier can supply a 5V, 500mA power to
the client device. The USBB_EN_5V_PB12 signal controls the power switch and current limiter, the Micrel
MIC2025, which in turn supplies power to a bus-powered client device. Per the USB specification, bus-
powered USB 2.0 devices are limited to a maximum of 500 mA. The MIC2025 limits the current and
indicates an overcurrent with the USBB_OVCUR_PB13 signal.
DS50002709A-page 30
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
The table below describes the pin assignment of the USB-A and USB-B connectors.
Table 3-14.ꢀUSB-A and USB-B Connector Signal Descriptions
Pin No
Mnemonic
VBUS
DM
Signal Description
5V power
1
2
3
4
5
Data minus
DP
Data plus
ID
On-the-go identification
Common ground
GND
3.2.10.6 HSIC
High-Speed Inter-Chip (HSIC) is a standard for USB chip-to-chip interconnect with a 2-signal (strobe,
data) source synchronous serial interface using 240 MHz DDR signaling to provide only high-speed 480
Mbps data rate.
The interface operates at high speed, 480 Mbps, and is fully compatible with existing USB software
stacks. It meets all data transfer needs through a single unified USB software stack.
The HSIC interface is not used on the board and is connected to two-point jumper J5 (not mounted).
Figure 3-33.ꢀHSIC Interface
1
2
HSIC_DATA
HSIC_STRB
DNP
J5
3.3
External Interfaces
3.3.1
LCD TFT Interface
This section describes the signals and connectors related to the LCD interface.
3.3.1.1 LCD Interface
The SAMA5D2-PTC-EK board provides a connector with 18 bits of data and control signals to the LCD
interface. Other signals are used to control the LCD and are available on connector J16: TWI, SPI, two
GPIOs for interrupt, 1-wire and power supply lines.
This connector is used to connect LCD display series 43xx or 70xx from PDA.
3.3.1.2 LCD Expansion Header
J16 is a 1.27-mm pitch, 50-pin header. It gives access to the LCD signals.
DS50002709A-page 31
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-34.ꢀLCD Expansion Header Interface
J16
ID
GND1
D0
D1
D2
D3
GND2
D4
D5
D6
D7
GND3
D8
R234
100R-1%
R0402
1
2
3
4
5
6
7
8
9
SPI_CS_PB31
LCD_D2_PC10
LCD_D3_PC11
LCD_D4_PC12
LCD_D5_PC13
LCD_D6_PC14
LCD_D7_PC15
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
D9
LCD_D10_PC16
LCD_D11_PC17
D10
D11
GND4
D12
D13
D14
D15
GND5
D16
D17
D18
D19
GND6
D20
D21
D22
D23
GND7
PCLK/CMD
VSYNC/CS
HSYNC/WE
DE/RE
SPI_SCK
SPI_MOSI
SPI_MISO
SPI_CS
ENABLE
TWI_SDA
TWI_SCL
IRQ1
LCD_D12_PC18
LCD_D13_PC19
LCD_D14_PC20
LCD_D15_PC21
LCD_D18_PC22
LCD_D19_PC23
LCD_D20_PC24
LCD_D21_PC25
LCD_D22_PC26
LCD_D23_PC27
LCD_PCLK_PD0
LCD_VSYNC_PC30
LCD_HSYNC_PC31
LCD_DE_PD1
SPI_SCK_PB30
SPI_MOSI_PB28
SPI_MISO_PB29
SPI_CS_PB31
LCD_EN_PC29
TWI_SDA_PB28
TWI_SCL_PB29
LCD_IRQ1_PC9
LCD_IRQ2_PD2
LCD_PWM_PC28
NRST
IRQ2
PWM
RESET
VCC1
VCC2
GND8
VDD_MAIN_5V
VDD_3V3
R230
DNP
R0603
XF2M-5015-1A
FPC50-0p5mm
R231
0R
R0603
GND_POWER
3.3.1.3 LCD Power
In order to operate correctly with various LCD modules, two voltage lines are available: 3.3V and 5VCC
(default). The selection is made with 0R resistors R230 and R231.
DS50002709A-page 32
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
3.3.1.4 LCD Connector JX
Figure 3-35.ꢀLCD Connector J16 Location
The table below describes the pin assignment of LCD FPC connector J16.
Table 3-15.ꢀLCD Connector J16 Signal Descriptions
Pin No
Signal
ID
PIO
PB31
_
Signal
_
RGB Interface Function
1
2
ID LCD module
GND
GND
GND
D0
3
LCDDAT0
LCDDAT1
LCDDAT2
LCDDAT3
GND
–
–
4
–
D1
–
5
PC10
PC11
_
D2
Data line
Data line
GND
6
D3
7
GND
D4
8
LCDDAT4
LCDDAT5
LCDDAT6
PC12
PC13
PC14
Data line
Data line
Data line
9
D5
10
D6
DS50002709A-page 33
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Pin No
11
Signal
LCDDAT7
GND
PIO
PC15
_
Signal
D7
RGB Interface Function
Data line
GND
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
GND
D8
LCDDAT8
LCDDAT9
LCDDAT10
LCDDAT11
GND
–
–
–
D9
–
PC16
PC17
GND
PC18
PC19
PC20
PC21
_
D10
Data line
Data line
GND
D11
GND
D12
LCDDAT12
LCDDAT13
LCDDAT14
LCDDAT15
GND
Data line
Data line
Data line
Data line
GND
D13
D14
D15
GND
D16
LCDDAT16
LCDDAT17
LCDDAT18
LCDDAT19
GND
–
–
–
D17
–
PC22
PC23
_
D18
Data line
Data line
GND
D19
GND
D20
LCDDAT20
LCDDAT21
LCDDAT22
LCDDAT23
GND
PC24
PC25
PC26
PC27
_
Data line
Data line
Data line
Data line
GND
D21
D22
D23
GND
PCLK
VSYNC/CS
HSYNC/WE
LCDPCK
LCDVSYNC
LCDHSYNC
LCDDEN
SPI_SPCK
SPI_MOSI
SPI_MISO
SPI_NPCS0
LCDDISP
TWD
PD0
PC30
PC31
PD1
PB30
PB28
PB29
PB31
PC29
PB28
Pixel clock
Vertical sync
Horizontal sync
DATA_ENABLE Data enable
SPI_SCK
SPI_MOSI
SPI_MISO
SPI_CS
–
(Shared with TWI)
(Shared with TWI)
–
ENABLE
TWI_SDA
Display enable signal
I2C data line (maXTouch)
DS50002709A-page 34
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Pin No
43
Signal
TWCK
PIO
PB29
PC9
PD2
PC28
–
Signal
TWI_SCL
IRQ1
RGB Interface Function
I2C clock line (maXTouch)
maXTouch interrupt line
Interrupt line for other I2C devices
Backlight control
44
GPIO
45
GPIO
IRQ2
46
LCDPWM
RESET
PWM
47
RESET
VCC
Reset for both display and maXTouch
3.3V or 5V supply (0R)
3.3V or 5V supply (0R)
GND
48
Main_5V/3V3
Main_5V/3V3
GND
VCC
VCC
_
49
VCC
50
GND
3.3.2
RGB LED
The SAMA5D2-PTC-EK board features one RGB LED which can be controlled by the user. The three
LED cathodes are controlled via GPIO PWM or timer/counter pins.
Figure 3-36.ꢀRGB LED Indicators
3
Q5
BSS138
SOT23_123
LED
R181
100R-1%
R0402
1
LED_RED_PB10
D4
2
VDD_3V3
R239
R240
R241
2.2K-1%
R0402
1
4
3
Red
GND_POWER
3
2
Q7
1K
R0402
2
Green
Blue
Anode
BSS138
SOT23_123
R182
100R-1%
R0402
1
LED_GREEN_PB8
1K
R0402
R243
10K
CLV1A-FKB-CJ1M1F1BB7R4S3
GND_POWER
3
2
GND_POWER
Q6
BSS138
SOT23_123
R183
100R-1%
R0402
1
LED_BLUE_PB6
R244
10K
GND_POWER
GND_POWER
Table 3-16.ꢀ RGB LED PIOS
Signal
PIO
PB10
PB8
PB6
Function
LED_RED
TIOB3
PWML3
PWML2
LED_GREEN
LED_BLUE
3.4
Debugging Capabilities
The SAMA5D2-PTC-EK includes two main debugging interfaces to provide debug-level access to the
SAMA5D2:
•
•
One UART through USB JLINK-CDC
Two JTAG interfaces, one connected directly to the MPU using connector J2 and one through the
JLINK-OB interface USB port J9
DS50002709A-page 35
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
3.4.1
Debug JTAG
This section describes the signals and connectors related to the JTAG interface.
A 10-pin JTAG header is provided on the SAMA5D2-PTC-EK board to facilitate software development
and debugging using various JTAG emulators. The interface signals have a voltage level of 3.3V.
Figure 3-37.ꢀJTAG Interface
VDD_3V3
R140
100K
R0402
R141
100K
R0402
R142
100K
R0402
VDD_3V3
J2
1
3
5
7
9
2
4
6
8
CON_JTAG_Pin2
CON_JTAG_Pin4
CON_JTAG_Pin6
CON_JTAG_Pin8
NRST
R138
DNP
R0402
RTCKIN
10
R143
100R-1% R0402
R236
10K
Header 2X5
FTSH-105-01-F-DV-P-TR
R0402
GND_POWER
GND_POWER
Figure 3-38.ꢀJTAG Connector J2 Location
The table below describes the pin assignment of JTAG connector J2.
DS50002709A-page 36
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Table 3-17.ꢀJTAG/ICE Connector J2 Pin Assignment
Pin No Mnemonic Signal Description
1
2
3
VTref. 3.3V power
This is the target reference voltage (main 3.3V).
JTAG mode set input into target CPU
Common ground
TMS TEST MODE SELECT
GND
TCK TEST CLOCK - Output timing signal,
for synchronizing test logic and control
register access
4
JTAG clock signal into target CPU
5
6
GND
Common ground
TDO JTAG TEST DATA OUTPUT - Serial
data input from the target
JTAG data output from target CPU
Some targets with a slow system clock must
synchronize the JTAG inputs to internal clocks. In
the present case, such synchronization is
unneeded and TCK is merely looped back into
RTCK.
RTCK - Input return test clock signal from
the target
7
8
TDI TEST DATA INPUT - Serial data output
line, sampled on the rising edge of the TCK JTAG data input into target CPU
signal
9
GND
Common ground
10
nRST RESET
Active-low reset signal. Target CPU reset signal.
3.4.2
Embedded Debugger (JLINK-OB) Interface
The SAMA5D2-PTC-EK includes a built-in SEGGER J-Link-On-Board device. The functionality is
implemented with an ATSAM3U4C microcontroller in an LFBGA100 package. The ATSAM3U4C provides
the functions of JTAG and a bridge USB/Serial debug port (CDC). One two-colored LED (D6) mounted
near the SAM3 chip (U20) shows the status of the J-Link-On-Board device.
J-Link-OB-ATSAM3U4C was designed in order to provide an efficient, low-cost, on-board alternative to
the standard J-Link.
The USB JLINK-OB port is used as a secondary power source and as a communication link for the
board, and derives power from the PC over the USB cable. This port is limited in most cases to 500 mA.
A single PC USB port is sufficient to power the board.
DS50002709A-page 37
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-39.ꢀJLINK-OB Interface
ENSPI
U20
TDI
TDO/TRACESWO
TCK/SWCLK
TMS/SWDIO
TDI_3U
B9
B8
A7
C7
J10
H9
H10
G8
G10
G9
F8
F10
E10
E9
TRSTIN
TRSTOUT
PA0/PGMNCMD
PA1/PGMRDY
PA2/PGMNOE
PA3/PGMNVALID
PA4/PGMM0
PA5/PGMM1
PA6/PGMM2
PA7/PGMM3
PA8/PGMD0
PA9/PGMD1
PA10/PGMD2
PA11/PGMD3
PA12/PGMD4
PA13/PGMD5
PA14/PGMD6
PA15/PGMD7
PA16/PGMD8
PA17/PGMD9
PA18/PGMD10
PA19/PGMD11
PA20/PGMD12
PA21/PGMD13
PA22/PGMD14
PA23/PGMD15
PA24
TDO_3U
TCK_3U
TMS_3U
TRESIN
TRESOUT
NRST_3U
ERASE_3U
D6
ERASE
VDD_3V3_3U
J3
K4
VDD_3V3_3U
ADVREF
AD12BVREF
R210
100R-1%
R0402
E8
R208
D5
R209
RX_3U
TX_3U
TDIIN
10K
R0402
100R-1%
R0402
B7
C8
D9
D10
H5
K6
H6
J6
K7
H7
J7
K8
J8
H4
K9
H8
K10
J9
NRST
C136 10nF
GND_POWER
NRSTB
PMEG6010CEGWX
sod123
C0402
TMSIN
D7
C9
TST
JTAGSEL
R213
R214
C132 10nF
DNP
TCKOUT
TMSOUT
GND_POWER
VDD_3V3_3U
VDD_3V3_3U
GND_POWER
C0402
R0402
6.8K-1%
R0402
A1
VBG
TDIOUT
TDOIN
TCKIN
C137 10pF
A10
B10
XIN32
XOUT32
C0402
ENSPI
Y4
VCC
TCKOUT
PA25_3U
PA26_3U
EDBG_XIN
R215
4
2
3
1
R245
0R
A2
A3
Out
NC
XIN
XOUT
PA25
PA26
PA27
C156
100nF
C0402
H3
GND
100K
D8
VDD_3V3_3U
FWUP
ASE-12.000MHz-LC-T
R0402
LED1_3U
LED2_3U
E3
E1
PA28
GND_POWER
D2
D1
C1
C2
DHSDM
DFSDM
DFSDP
DHSDP
R211
R212
39R R0402
39R R0402
PA29
VBUS_JLINK
J4
F4
PA30
PA31
RTCKIN
9
1
VBUS
2
EDBG_USB_DM
EDBG_USB_DP
ATSAM3U4CA-CU
TFBGA100
DM
3
4
5
DP
ID
10
GND
VDD_3V3_3U
VDD_OUT_3U
VDD_3V3_3U
J9
MicroUSB AB Connector
GND_POWER
USBMICRO5_6A
EARTH_USB_EDBG
VDD_3V3_3U
D6
JP11
Header 1X2
LED1_3U
LED2_3U
VDD_3V3_3U
R216
R217
150R-1%
R0402
2
4
1
3
RED
1
3
ERASE_3U
150R-1%
R0402
Green
KPTB-1615
3.4.2.1 Disabling JLINK-OB (ATSAM3U4C)
Jumper JP10 disables the J-Link-OB-ATSAM3U4C JTAG functionality. When the jumper is installed, it
grounds pin 26 of the ATSAM3U4C that is normally pulled high. A quad analog switch is used to select
the JTAG interface.
•
•
Jumper JP10 not installed: J-Link-OB-ATSAM3U4C is enabled and fully functional.
Jumper JP10 installed: J-Link-OB-ATSAM3U4C is disabled and an external JTAG controller can be
used through the 10-pin JTAG port J2.
Jumper JP10 disables only the J-Link functionality. The debug serial com port that is emulated through a
Communication Device Class (CDC) of the same USB connector remains operational (if JP9 is open).
Figure 3-40.ꢀEnabling/Disabling JLINK-OB and JLINK-CDC
VDD_3V3_3U
JP9
Header 1X2
R224
10K
R0402
PA25_3U
JTAG-CDC disable
GND_POWER
VDD_3V3_3U
JP10
Header 1X2
R225
10K
R0402
PA26_3U
JTAG-OB disable
GND_POWER
DS50002709A-page 38
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-41.ꢀJTAG Switch
VDD_3V3_3U
U22
TDIOUT R218
TDIIN
150R-1%
R0402
15
16
1
13
12
11
CON_JTAG_Pin4
NOA
NCD
COMD
NOD
JTAG_TDI_PD28
CON_JTAG_Pin8
PA26_3U
JTAG_TCK_PD27
R222 150R-1% TCKOUT
R0402
COMA
NCA
TCKIN
PA26_3U
2
10
ABIN
CDIN
TDOIN
3
4
5
9
8
7
CON_JTAG_Pin2
JTAG_TMS_PD30
NOB
NCC
COMC
NOC
JTAG_TDO_PD29
CON_JTAG_Pin6
COMB
NCB
R223
150R-1% TMSOUT
R0402
NLAS3899BMNTWG
WQFN-16
TMSIN
GND_POWER
3.4.3
Hardware UART via CDC
In addition to the J-Link-OB functionality, the ATSAM3U4C microcontroller provides a bridge to a debug
serial port (UART DBGU) of the SOM's processor. The port is made accessible over the same USB
connection used by JTAG by implementing Communication Device Class (CDC), which allows terminal
communication with the target device.
This feature is enabled only if the SAM3U/PA25 (pin K10) is not grounded. The pin is normally pulled high
and controlled by jumper JP9.
•
•
Jumper JP9 not installed: the J-Link-CDC is enabled and fully functional.
Jumper JP9 installed: the J-Link-CDC device is disabled.
The USB Communications Device Class (CDC) enables to convert the USB device into a serial
communication device. The target device running USB-Device CDC is recognized by the host as a serial
interface (USB2COM, virtual COM port) without the need to install a special host driver (since the CDC is
standard). All PC software using a COM port work without modifications with this virtual COM port. Under
Windows, the device shows up as a COM port; under Linux, as a /dev/ACMx device. This enables the
user to use host software which was not designed to be used with USB, such as a terminal program.
Table 3-18.ꢀDebug COM Port PIOs Signal Descriptions
PIO
Mnemonic
URXD0
Shared
Signal Description
Receive data
PB26
PB27
-
-
UTXD0
Transmit data
DS50002709A-page 39
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-42.ꢀJLINK-OB and CDC USB Connector J9 Location
The table below describes the pin assignment of USB connector J9.
Table 3-19.ꢀUSB Connector J9 Pin Assignment
Pin No
Mnemonic
VBUS
DM
Signal Description
5V power
1
2
3
4
5
Data minus
DP
Data plus
ID
Not used
GND
Common ground
3.4.3.1 Board Edge Connector
This connector is used to upgrade or download code to the ATSAM3U4C microcontroller JLINK-OB.
3.5
PIO Usage on Expansion Connectors
3.5.1
PIOBU Interface
The SAMA5D2-PTC-EK board features eight tamper pins for static or dynamic intrusion detection, UART
reception, and two analog pins for comparison.
DS50002709A-page 40
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
For a description of intrusion detection, refer to the SAMA5D2 datasheet, chapter "Security Module".
Figure 3-43.ꢀPIOBU Connector
J1
DNP
PIOBU0 R124
PIOBU2 R125
PIOBU4 R126
PIOBU6 R127
330R R0402
330R R0402
330R R0402
330R R0402
1
3
5
7
9
2
4
6
8
R129
R130
R131
R132
330R R0402
330R R0402
PIOBU3
PIOBU5
RXD
0R
0R
R0402
R0402
ACN
ACP
R128
0R
R0402
10
FTSH-105-01-F-DV-P-TR
GND_POWER
Figure 3-44.ꢀPIOBU Connector J1 Location
The table below describes the pin assignment of PIOBU connector J1.
Table 3-20.ꢀ PIOBU Connector J1 Pin Assignment
Signal
PIOBU0
PIOBU2
PIOBU4
PIOBU6
ACP
Pin No.
Signal
PIOBU3
PIOBU5
RXD
1
3
5
7
9
2
4
6
8
ACN
10
GND
3.5.2
mikroBUS Interface
The SAMA5D2-PTC-EK hosts a pair of 8-pin female headers as mikroBus interface. The mikroBUS
interface defines the main board sockets and add-on boards used for interfacing microprocessors with
DS50002709A-page 41
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
integrated modules with proprietary pin configuration and silkscreen markings. The pinout consists of
three groups of communication pins (SPI, UART and TWI), four additional pins (PWM, interrupt, analog
input and reset) and two power groups (+3.3V and GND on the left, and 5V and GND on the right 1x8
header).
Figure 3-45.ꢀmikroBUS Interface
J15A
J15B
PD25
RST
PWM
INT
RX
TX
SCL
SDA
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
AN-AD6
MBUS_RST_PC05
NPCS0_PC04
SPCK_PC01
PWM_PD20
INT_PD19
RX_PD23
TX_PD24
TWCK0_PD22
NPCS0
SPCK
MISO
MOSI
3V3
MISO_PC03
MOSI_PC02
VDD_3V3
TWD0_PD21
VDD_MAIN_5V
+5v
R229
DNP
R0402
SSQ-108-01-G-S SSQ-108-01-G-S
JP12
Header 1X2
GND_POWER
Figure 3-46.ꢀmikroBUS Connector J15 Location
The table below describes the pin assignment of mikroBUS1 connector J15.
Table 3-21.ꢀmikroBUS Connector J15 Pin Assignment
SAMA5D27
SAMA5D27
Function
Function
Analog input
Reset
PIO
MBUS Signal
AN
Pin No.
MBUS Signal
PWM
PIO
PD25
PC05
PC04
1
2
3
1
2
3
PD20
PD19
PD23
PWM
Interrupt
RST
INT
SPI chip select
SPI_NPCS
UART_RX
UART receive
DS50002709A-page 42
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
SAMA5D27
Function
SAMA5D27
PIO
PC01
PC03
PC02
–
MBUS Signal
SPI_SPCK
SPI_MISO
SPI_MOSI
3V3 Supply
GND
Pin No.
MBUS Signal
UART_TX
TWI_SCL
TWI_SDA
5V Supply
GND
PIO
PD24
PD22
PD21
_
Function
UART transmit
TWI clock
TWI data
SPI clock
SPI MISO
SPI MOSI
3.3VCC
4
5
6
7
8
4
5
6
7
8
5VDD
GROUND
–
_
GROUND
3.5.3
XPRO Interface
The SAMA5D2-PTC-EK board hosts two connectors to interface XPRO QT boards. The QTouch Xplained
Pro are extension boards that enable evaluation of Self-capacitance and Mutual capacitance modes
using the Peripheral Touch Controller (PTC). The boards show how easy it is to design a capacitive touch
board solution using the PTC without the need for any external components.
Nevertheless, the PTC IO pins available on XPRO connectors can be used as GPIO pins. Each of these
can be configured as an input or output pin according to the PIO peripheral functions.
The GPIO voltage levels depend on the VDDIOP level supported by the SAMA5D2, 3.3V in this case.
Figure 3-47.ꢀXPRO EXT1 Connector
J11
1
3
5
7
9
11
13
15
17
19
2
4
6
8
PD11
PD13
PB9
PD15
PC6
PD12
PD14
PC0
PTC_YLINE0
PTC_YLINE2
XPRO1_GPIO_PB9
PTC_YLINE4
PTC_YLINE1
PTC_YLINE3
XPRO1_GPIO_PC0
PTC_YLINE5
10 PD16
12 PC7
14
16 PD18
18 PD17
20
XPRO_PC6
XPRO_PC7
R226
0R
PD17
PD26
PTC_YLINE6
XPRO1_GPIO_PD26
PTC_YLINE7
PTC_YLINE6
R227
R235
DNP
0R
VDD_3V3
Header 2X10
XPRO2_GPIO_PD31
GND_POWER
DS50002709A-page 43
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-48.ꢀXPRO EXT1 Connector J11 Location
The table below describes the pin assignment of XPRO EXT1 connector J11.
Table 3-22.ꢀ XPRO EXT1 Connector J11 Pin Assignment
SAMA5D27
SAMA5D27
Function
Function
_
Pin
Not used
PD11
PD13
PA10
PD15
PC6
XPRO Signal Pin No.
XPRO Signal
GND
Pin
–
ID
1
3
5
7
9
2
4
6
8
GROUND
PTC_YLINE1
PTC_YLINE3
GPIO
PTC_YLINE0
PTC_YLINE2
GPIO
ADC(+)
ADC(-)
PD12
PD14
PC0
PD16
PC7
_
GPIO
GPIO
PWM(+)
IRQ/GPIO
TWI_SDA
UART_RX
SPI_SS_A
SPI_MISO
GND
PWM(-)
PTC_YLINE4
XPRO_TWD
_
10 SPI_SS_B/GPIO
PTC_YLINE5
XPRO_TWCK
–
11 12
13 14
15 16
17 18
19 20
TWI_SCL
UART_TX
SPI_MOSI
SPI_SCK
VCC 3V3
_
PTC_YLINE6
GPIO
PD17
PD26
–
PD18
PTC_YLINE7
PD31 or PD17 PTC_YLINE6
GROUND
–
3.3V Supply
DS50002709A-page 44
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-49.ꢀXPRO EXT2 Connector
XPRO1
R235
R228
0R
J12
1
3
5
2
4
6
8
PD3
PD5
PD7
PD9
PD4
PD6
PD8
PTC_XLINE0
PTC_XLINE2
PTC_XLINE4
PTC_XLINE6
PTC_XLINE1
PTC_XLINE3
PTC_XLINE5
PTC_XLINE7
7
9
10 PD10
12 PD31
11
13
15
17
19
0R
XPRO2_GPIO_PD31
14
16
18
20
PB25
XPRO2_GPIO_PB25
VDD_3V3
Header 2X10
GND_POWER
Figure 3-50.ꢀXPRO EXT2 Connector J12 Location
The table below describes the pin assignment of XPRO EXT2 connector J12.
Table 3-23.ꢀ XPRO EXT2 Connector J12 Pin Assignment
SAMA5D27
SAMA5D27
XPRO
Signal
XPRO
Signal
Function
Pio
Pin No.
Pio
Function
_
Not used
ID
1
3
2
4
GND
–
GROUND
PTC_XLIN
E0
PTC_XLIN
E1
PD3
PD5
ADC(+)
ADC(-)
PD4
PD6
PTC_XLIN
E2
PTC_XLIN
E3
GPIO
5
6
GPIO
DS50002709A-page 45
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
SAMA5D27
SAMA5D27
XPRO
Signal
XPRO
Signal
Function
Pio
Pin No.
Pio
Function
PTC_XLIN
E4
PTC_XLIN
E5
PD7
PWM(+)
7
9
8
PWM(-)
PD8
PTC_XLIN
E6
SPI_SS_B/
GPIO
PTC_XLIN
E7
PD9
IRQ/GPIO
10
PD10
–
–
–
–
TWI_SDA
UART_RX
SPI_SS_A
SPI_MISO
11
13
15
17
12
14
16
18
TWI_SCL
UART_TX
SPI_MOSI
SPI_SCK
PD31
GPIO
–
–
–
–
–
–
GPIO
–
PB25
–
3.3V
Supply
GROUND
–
GND
19
20
VCC 3V3
–
3.5.4
Miscellaneous PIOB[0-7]
PIOs PB00 to PB07 are available on connector J13 and can be used as GPIO pins. Each of these can be
configured as an input or output pin according to the PIO peripheral functions.
Figure 3-51.ꢀPIOs PB[0-7] Connector
VDD_3V3
J13
1
2
3
4
5
6
7
8
9
PB_PORT_0
PB_PORT_1
PB_PORT_2
PB_PORT_3
PB_PORT_4
PB_PORT_5
PB_PORT_6
PB_PORT_7
10
PIOB[0-7] connector
GND_POWER
DS50002709A-page 46
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Board Components
Figure 3-52.ꢀPIOB[0-7] Connector J13 Location
The table below describes the pin assignment of PIOs PB[0-7] connector J13.
Table 3-24.ꢀPIOs PB[0-7] Connector J13 Pin Assignment
Pin No
PIO
_
Mnemonic
VDD_3V3
GPIO
Shared
Signal Description
Main 3.3V
1
2
_
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
_
NAND Flash
PIO port B
3
GPIO
NAND Flash
PIO port B
4
GPIO
NAND Flash
PIO port B
5
GPIO
_
PIO port B
6
GPIO
_
PIO port B
7
GPIO
_
PIO port B
8
GPIO
LED_BLUE
PIO port B
9
GPIO
_
_
PIO port B
10
GND
Common ground
DS50002709A-page 47
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Installation and Operation
4.
Installation and Operation
4.1
System and Configuration Requirements
The SAMA5D2-PTC-EK requires the following:
•
•
Personal Computer
USB cable
4.2
Board Setup
Follow these steps before using the SAMA5D2-PTC-EK:
1. Unpack the board, taking care to avoid electrostatic discharge.
2. Check the default jumper settings.
3. Connect the USB Micro-AB cable to connector J9.
4. Connect the other end of the cable to a free port of your PC.
5. Open a terminal (console 115200, N, 8, 1) on your Personal Computer.
6. Reset the board. A startup message appears on the console.
DS50002709A-page 48
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
5.
Appendix A. Schematics and Layouts
This appendix contains the following schematics and layouts for the SAMA5D2-PTC-EK board:
•
•
•
•
•
•
•
•
•
•
•
•
•
Title and Revision History
Block Diagram
Power Domains
MPU Power
DDR2-SDRAM
PIOA & PIOB
PIOC & PIOD
System
USB & TF
Memories & RGB LED
Ethernet 10/100M
JLINK-OB
EXT Connectors
Figure 5-1.ꢀTitle and Revision History
5
4
3
2
1
Schematic: A5D2-PTC-EK
Revision History
SHEET
SHEET NAME
DATE
REVISION
RevA-20160107
DESCRIPTION
01
Title Revision History
&
Init edit
D
C
B
A
D
C
B
A
06 Jan 2017
07-MAR-17
03-OCT-17
02
Block Diagram
Power domains
MPU_POWER
RevA
RevB
RevA release
RevB release
03
04
05
DDR2-SDRAM
PIOA&PIOB
06
07
PIOC&PIOD
08
SYSTEM
09
USB&TF
10
MEMORIES&RGBLED
Ethernet_10/100M
JLINK-OB
11
12
13
EXT_CONNECTORS
B
A
RevB
RevA
THR 03-OCT-17 XXX XX-XXX-XX
ZhouB 07-MAR-17 XXX XX-XXX-XX
A
REV
INIT EDIT ZhouB
XXX XX-XXX-XX
06-JAN-17
DATE
MODIF.
DES.
VER.
DATE
SAMA5D2-PTC-EK
SCALE
REV.
SHEET
1/1
1
13
01) Title
& Revision History
B
5
4
3
2
1
DS50002709A-page 49
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
Figure 5-2.ꢀBlock Diagram
5
4
3
2
1
Push
Reset
5V INPUT
Buttons
Force PwrOn
Sheet
9
POWER
Sheet
D
C
B
A
D
C
B
A
USB
OTG
A
Sheet
8
USB TO UART
5V INPUT
5V
& 3V3
3
USB
Host
B
C
USB
DEVICE
USB A,B,C
Power rails
Sheet 10
USB
HSIC
Atmel
SAMA5D27
Sheet 12
JLINK-OB
Cortex(R)-A5 Processor
User LEDs
QSPI Flash
NAND Flash
JTAG
PIO
Sheet
5
JTAG
Connector
Sheet 4: MPU_POWER
Sheet 5: DDR2-SDRAM
Sheet 6: PIOA
Sheet 7: PIOC
2Gb
DDR2
SDRAM
Sheet
8
EBI
&
&
PIOB
PIOD
Sheet 8: SYSTEM
ANALOG Reference
PIO A,B,C,D
SPI
Ethernet
SDCARD
CON
QSPI Flash
Sheet 10
Data
24AA02E48
Sheet 10
LCD CON
PTC PORT
Sheet 13
10/100M bps
Flash
Sheet 13
Sheet 10
Sheet 11
Sheet 13
Sheet 09
B
A
RevB
RevA
THR 03-OCT-17 XXX XX-XXX-XX
ZhouB 07-MAR-17 XXX XX-XXX-XX
A
REV
INIT EDIT ZhouB
XXX XX-XXX-XX
06-JAN-17
DATE
MODIF.
DES.
VER.
DATE
SAMA5D2-PTC-EK
02) Block Diagram
SCALE
REV.
SHEET
1/1
2
13
B
5
4
3
2
1
DS50002709A-page 50
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
Figure 5-3.ꢀPower Domains
5
4
3
2
1
JPR1
Jumper
Switching Power lines
POWER SUPPLY
VDDBU Power Supply
JP1
Header 1X2
JP6
U1A
U4A
VDD_MAIN_5V
VDD_3V3
Header 1X2
VBUS_JLINK
C1
DMP2160UFD
DMP2160UFD
D3
BAT54C
VDDBU
1
7
6
7
6
1
1
2
3
R1
10K
R0402
D2
R14
100R-1%
R0402
SOT23_123
100nF
C0402
C12
100nF
C0402
D
C
B
A
D
C
B
A
PMEG6010CEGWX
sod123
C18
100nF
C0402
+
C17
0.2F/3.3V
c117x68
R5
100K
R0402
GND_POWER
GND_POWER
GND_POWER
GND_POWER
GND_POWER
JP4
(Super)-Capacitor
energy storage
Header 1X2
U1B
DMP2160UFD
U4B
VDD_1V8
VDDIODDR
VDDSDHC1V8
VBUS_USBA
DMP2160UFD
4
8
3
8
3
4
For DDR2
For MPU
L14
C2
100nF
C0402
R2
100K
R0402
1
2
VDD_3V3
VDDFUSE
U5
BLM18PG181SN1D
R0603
R6
DNP
R0402
4
2
1
3
JP5
VIN
VOUT
EN
Header 1X2
C15
1uF
C0603
EN_1 12
GND
GND_POWER
GND_POWER
C16
VDD_1V25
VDDCORE
MIC5366-2.5YMT
MLF1x1mm
1uF
C0603
VDD_MAIN_5V
Fixed output 1V8, 3v3,
VDDPLLA
VDDUTMIC
VDDHSIC
C3
10uF
C0603
C5
1uF
C0603
R8
100K
R0402
R15
L7
U2
GND_POWER
MLZ1608N100L
L0603
2R2
R0603
3
11
7
9
AVIN
VIN
EN2
VDD_MAIN_5V
R9
GND_POWER
L10
1
2
EN_1
2
EN1
C10
390pF
C0402
BLM18PG181SN1D
R0603
EN_VDD_1V25
L2
FPWM#
10
4
FPWM#
SW1
PGOOD
SW2
VDD_1V8
L1
VDD_3V3
LQH43CN2R2M03L
L1812
8
LQH43CN2R2M03L
L1812
L11
1
2
100K
R0402
12
5
1
BLM18PG181SN1D
R0603
OUT1
AGND
OUT2
PGND
C11
10uF
C0603
C13
4.7nF
C0402
6
FPWM#
JP3
Header 1X2
C4
10uF
C0603
VDD_3V3
VDDIOP2
2
MIC2230-GSYML
MLF3x3mm
R10
DNP
R0402
L3
1
VDDIOP1
VDDIOP0
VDDISC
BLM18PG181SN1D
R0603
VDD_3V3
GND_POWER
VDD_MAIN_5V
GND_POWER
L4
1
2
R248
20K
R0402
BLM18PG181SN1D
R0603
Fixed output 1V2
C7
100nF
C0402
U3
L5
1
2
EN_VDD_1V25
1
2
3
4
8
7
6
5
BIAS
GND
IN1
EN
PGOOD
ADJ
BLM18PG181SN1D
R0603
L6
1
2
VDD_1V8
VDD_3V3
R249
4.7K
R0402
VDD_1V25
R250
3.3K
BLM18PG181SN1D
R0603
R251
10K
R0402
IN2
OUT
R0402
GND_POWER
R11
100K
R0402
C6
10uF
C0603
VDDOSC
9
MIC47053YMT
C9
1uF
C0603
JP2
Header 1X2
R16
2R2
R0603
L8
NRST 8,11,12,13
MLZ1608N100L
VDD_MAIN_5V
VDDUTMII
VDDANA
L0603
GND_POWER
GND_POWER
GND_POWER
VDD_3V3
GND_POWER
R17
0R
R0603
L12
1
2
Q4
SOT-23
BC847C
R12
1
220K
R0402
BLM18PG181SN1D
R0603
R4
10K
R0402
R18
0R
R0603
L13
1
2
VDD_MAIN_5V
BLM18PG181SN1D
R0603
VDDAUDIOPLL
EN_1
D1
R3
C8
100nF
C0402
PMEG6010CEGWX
sod123
R19
2R2
R0603
L9
100K
R0402
MLZ1608N100L
L0603
3
C14
STARTB
Q3
BSS138
SOT23_123
2.2uF
C0603
3
2
3
2
GND_POWER
STARTB
1
R13
39K
Q1
Q2
BSS138
BSS138
SOT23_123
R0402
2
1
1
SOT23_123
B
A
RevB
RevA
THR 03/10/17
ZhouB 07-MAR-17 XXX XX-XXX-XX
XXX XX-XXX-XX
8
SHDN
A
REV
INIT EDIT ZhouB
MODIF.
XXX XX-XXX-XX
06-JAN-17
DATE
DES.
VER.
DATE
SAMA5D2-PTC-EK
03) Power domains
SCALE
REV.
SHEET
1/1
GND_POWER
3
13
GND_POWER
GND_POWER
B
5
4
3
2
1
DS50002709A-page 51
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
Figure 5-4.ꢀMPU Power
5
4
3
2
1
VDDCORE
(1V2)
C27
VDDCORE
C19
C31
C33
C35
C43
C47
C49
C51
C58
C60
10uF
C0603
10uF
C0603
100nF
C0402
100nF
C0402
100nF
C0402
100nF
C0402
100nF
C0402
100nF
C0402
1nF
C0402
1nF
C0402
1nF
C0402
D
D
C
B
A
GND_POWER
U6G
VDDIODDR
(1V8)
VDDIODDR
VDDCORE
(1V2) D7
D9
H3
K13
N5
N9
E7
E9
H4
K12
M5
M9
VDDCORE_1
VDDCORE_2
VDDCORE_3
VDDCORE_4
VDDCORE_5
VDDCORE_6
GNDCORE_1
GNDCORE_2
GNDCORE_3
GNDCORE_4
GNDCORE_5
GNDCORE_6
POWER TEST POINTS
C20
10uF
C0603
C28
10uF
C0603
C32
100nF
C0402
C34
100nF
C0402
C36
100nF
C0402
C44
100nF
C0402
C48
100nF
C0402
C50
100nF
C0402
C52
1nF
C0402
C59
1nF
C0402
C61
1nF
C0402
VDD_MAIN_5V
VDD_1V8
TP1 SMD
TP2 SMD
TP3 SMD
TP4 SMD
TP5 SMD
GND_POWER
VDDBU
VDDIODDR (1V8) D11
D14
E11
E12
E14
H14
J14
L14
VDDDDR_1
VDDDDR_2
VDDDDR_3
VDDDDR_4
VDDDDR_5
VDDDDR_6
VDDDDR_7
GNDDDR_1
GNDDDR_2
GNDDDR_3
GNDDDR_4
GNDDDR_5
GNDDDR_6
GNDDDR_7
D12
D15
E15
H15
J15
L15
VDD_1V25
VDD_3V3
VDDANA
(3V3)
VDDBU
(3V3)
VDDANA
C21
100nF
C0402
C37
100nF
C0402
C45
100nF
C0402
VDDFUSE
VDDBU
(3V3) N7
(3V3) K3
L5
N6
L3
K5
VDDBU
GNDBU
GNDANA
GNDADC
VDDANA
VDDANA
VDDADC
C
B
A
GND_POWER
GND_POWER
VDDIOP1
VDDSDHC1V8
TP6 SMD
VDDIOP0
VDDIOP1
VDDIOP2
(3V3) E6
F7
F6
G7
VDDIOP0_1
VDDIOP0_2
GNDIOP0_1
GNDIOP0_2
VDDIOP0
VDDIOP2
(3V3) VDDIOP0
(3V3) VDDIOP1
(3V3)VDDIOP2
(3V3) N13
R14
M13
P14
VDDCORE
VDDIODDR
VDDBU
TP7 SMD
TP8 SMD
TP9 SMD
TP10 SMD
TP11 SMD
TP12 SMD
TP13 SMD
TP14 SMD
TP15 SMD
TP16 SMD
VDDIOP1_1
VDDIOP1_2
GNDIOP1_1
GNDIOP1_2
C22
100nF
C0402
C29
100nF
C0402
C38
100nF
C0402
C46
100nF
C0402
C53
100nF
C0402
(3V3) F10
F9
VDDIOP2
GNDIOP2
VDDHSIC
VDDFUSE
(1V2) R9
(2V5) M12
VDDHSIC
VDDFUSE
VDDUTMIC
VDDUTMII
VDDSDHC
VDDOSC
VDDHSIC
GND_POWER
GND_POWER
GND_POWER
VDDAUDIOPLL
T5
T4
VDDFUSE
GNDDPLL
VDDAUDIOPLL (3V3) T3
VDDAUDIOPLL
GNDAUDIOPLL
VDDHSIC
(1V2) VDDHSIC
VDDFUSE
(2V5) VDDFUSE
(3V3) VDDAUDIOPLL
VDDUTMIC (1V2) P7
R7
P9
VDDUTMIC
VDDUTMII
VDDSDMMC
VDDPLLA
VDDOSC
GNDUTMIC
GNDUTMII
GNDSDMMC
GNDPLLA
GNDOSC
C23
100nF
C0402
C39
100nF
C0402
C54
4.7uF
C0805
C57
100nF
C0402
VDDUTMII
(3V3) P8
VDDSDHC (3V3 or 1V8)P11
R11
U5
T6
GNDUTMII
VDDPLLA
VDDPLLA
VDDOSC
VDDISC
(1V2) U4
(3V3) T7
(3V3) F4
GND_POWER
GND_POWER
GND_POWER
TP17 SMD
TP18 SMD
TP19 SMD
G4
VDDISC
GNDISC
VDDUTMIC
(1V2)
VDDUTMII
(3V3) VDDUTMII
VDDSDHC
VDDUTMIC
(3V3 or 1V8) VDDSDHC
ATSAMA5D27C-CN
bga289p8
GND_POWER
C24
4.7uF
C0805
C30
100nF
C0402
C40
100nF
C0402
C55
100nF
C0402
GND_POWER
R22
0R
A copper plan
GND_POWER
GND_POWER
GND_POWER
for GNDUTMII cover
all USB compoments
R0603
GND_POWER
GNDUTMII
VDDPLLA
(1V2)
VDDOSC
VDDISC
VDDPLLA
(3V3) VDDOSC
(3V3) VDDISC
R20
1R-1%
R0603
R21
1R-1%
R0603
C56
100nF
C0402
C26
100nF
C0402
C42
100nF
C0402
All 100nF 0402 capacitors close to the the Pin of VDD***.
C25
4.7uF
C0805
C41
4.7uF
C0805
GND_POWER
GND_POWER
GND_POWER
B
A
RevB
RevA
THR 03-OCT-17 XXX XX-XXX-XX
ZhouB 07-MAR-17 XXX XX-XXX-XX
A
REV
INIT EDIT ZhouB
XXX XX-XXX-XX
06-JAN-17
DATE
MODIF.
DES.
VER.
DATE
SAMA5D2-PTC-EK
04) MPU_POWER
SCALE
REV.
SHEET
1/1
4
13
B
5
4
3
2
1
DS50002709A-page 52
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
Figure 5-5.ꢀDDR2-SDRAM
5
4
3
2
1
2 x W972GG6KB-25, DDR2-800, 16 Meg x 16 x 8
U6E
U7
U8
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
F12
C17
B17
B16
C16
G14
F14
F11
C14
D13
C15
A16
A17
G11
B12
A12
C12
A13
A14
C13
A15
B15
G17
G16
H17
K17
K16
J13
K14
K15
B8
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_D0
DDR_D1
DDR_D2
DDR_D3
DDR_D4
DDR_D5
DDR_D6
DDR_D7
DDR_D8
DDR_D9
DDR_D10
DDR_D11
DDR_D12
DDR_D13
DDR_D14
DDR_D15
DDR_A0
DDR_A1
DDR_A2
DDR_A3
DDR_A4
DDR_A5
DDR_A6
DDR_A7
DDR_A8
DDR_A9
DDR_A10
DDR_A11
DDR_A12
DDR_A13
DDR_D16
DDR_D17
DDR_D18
DDR_D19
DDR_D20
DDR_D21
DDR_D22
DDR_D23
DDR_D24
DDR_D25
DDR_D26
DDR_D27
DDR_D28
DDR_D29
DDR_D30
DDR_D31
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
M8
M3
M7
N2
N8
N3
N7
P2
P8
P3
M2
P7
R2
R8
G8
G2
H7
H3
H1
H9
F1
F9
C8
C2
D7
D3
D1
D9
B1
B9
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
A11
A12
A13
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
D
C
B
A
D
C
B
A
DQ9
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DDR_BA0
DDR_BA1
DDR_BA2
DDR_BA0
DDR_BA1
DDR_BA2
DDR_BA0
DDR_BA1
DDR_BA2
H12
H13
F17
L2
L3
L1
L2
L3
L1
DDR_BA0
DDR_BA1
DDR_BA2
BA0
BA1
BA2
BA0
BA1
BA2
B9
C9
A9
DDR_DQS0+
DDR_DQS0-
DDR_DQS1+
DDR_DQS1-
DDR_DQS2+
DDR_DQS2-
DDR_DQS3+
DDR_DQS3-
F7
E8
B7
A8
F7
E8
B7
A8
LDQS_P
NU/LDQS_N
UDQS_P
LDQS_P
NU/LDQS_N
UDQS_P
DDR_CKE
DDR_CLK+
DDR_CLK-
DDR_CKE
DDR_CLK+
DDR_CLK-
A10
D10
B11
A11
J12
H10
J11
K11
L13
L11
L12
M17
K2
J8
K8
K2
J8
K8
CKE
CKE
DDR_RAS
DDR_CAS
F13
G12
DDR_RAS
DDR_CAS
CK_P NU/UDQS_N
CK_N
LDM
RAS
CAS
WE
CK_P NU/UDQS_N
CK_N
LDM
RAS
CAS
WE
VDD_1V8
R0402
R0402
VDD_1V8
R0402
R0402
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
F3
B3
F3
B3
DDR_CLK+
DDR_CLK-
DDR_CKE
DDR_RAS
DDR_CAS
DDR_WE
DDR_CS
DDR_RAS
DDR_CAS
DDR_WE
DDR_CS
E17
D17
F16
K7
L7
K3
L8
R29
R30
DNP
0R
K7
L7
K3
L8
R31
R32
DNP
0R
DDR_CLK
DDR_CLKN
DDR_CKE
UDM
UDM
K9
K9
ODT
ODT
CS
CS
R25
100K
R0402
R7
R3
E2
A2
A1
E1
J9
M9
R1
R7
R3
E2
A2
A1
E1
J9
M9
R1
VDD_1V8
VDD_1V8
NC4
NC3
NC2
NC1
VDD1
VDD2
VDD3
VDD4
VDD5
NC4
NC3
NC2
NC1
VDD1
VDD2
VDD3
VDD4
VDD5
GND_POWER
GND_POWER
GND_POWER
DDR_CS
DDR_WE
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
G13
F15
C11
G15
C8
DDR_CS
DDR_WE
DDR_DQM0
DDR_DQM1
DDR_DQM2
DDR_DQM3
A3
E3
J3
N1
P9
A3
E3
J3
N1
P9
VSS1
VSS2
VSS3
VSS4
VSS5
VSS1
VSS2
VSS3
VSS4
VSS5
E13
H11
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
A9
C1
C3
C7
C9
E9
G1
G3
G7
G9
DDR_CAL
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDQ1
VDDQ2
VDDQ3
VDDQ4
VDDQ5
VDDQ6
VDDQ7
VDDQ8
VDDQ9
VDDQ10
VDDIODDR
21K-1%
DDR_DQS0+
DDR_DQS0-
22pF
C64
C0402
B13
B14
DDR_DQS0
DDR_DQSN0
R24
R0402
R23
100K
DDR_DQS1+
DDR_DQS1-
J17
J16
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
A7
B2
B8
D2
D8
E7
F2
F8
H2
H8
DDR_DQS1
DDR_DQSN1
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
VSSQ1
VSSQ2
VSSQ3
VSSQ4
VSSQ5
VSSQ6
VSSQ7
VSSQ8
VSSQ9
VSSQ10
R0402
DDR_DQS2+
DDR_DQS2-
GND_POWER
DDR_RESETN
C10
B10
DDR_DQS2
DDR_DQSN2
E16
DDR_RESETN
DDR_VREF
DDR_DQS3+
DDR_DQS3-
H16
D16
L17
L16
J1
J2
J1
J2
DDR_VREFB0
DDR_VREFCM
DDR_DQS3
DDR_DQSN3
VDDL
VREF
VDDL
VREF
DDR_VREF
DDR_VREF
C62
100nF
C0402
C63
100nF
C0402
ATSAMA5D27C-CN
bga289p8
J7
J7
VSSDL
VSSDL
GND_POWER
W972GG6KB-25
bga84-32-1509e
C72
100nF
C0402
C75
1nF
C0402
W972GG6KB-25
bga84-32-1509e
C94
100nF
C0402
C95
1nF
C0402
GND_POWER
GND_POWER
GND_POWER
GND_POWER
VDDIODDR
C65
VDD_1V8
DDR_CLK+
C66
R26
4.7uF
C0805
100nF
C0402
2.2K-1%
R0402
C68
10uF
C0603
C70
1uF
C73
1uF
C76
C78
C80
100nF
C0402
C82
100nF
C0402
C84
C86
C88
1nF
C0402
C90
1nF
C0402
C92
1nF
C0402
100nF
C0402
100nF
C0402
100nF
C0402
100nF
C0402
DDR_VREF
C0603
C0603
R28
DNP
GND_POWER
C67
R27
100nF
C0402
2.2K-1%
R0402
DDR_CLK-
GND_POWER
GND_POWER
VDD_1V8
C69
10uF
C0603
C71
C74
C77
C79
C81
100nF
C0402
C83
100nF
C0402
C85
C87
C89
1nF
C0402
C91
1nF
C0402
C93
1nF
C0402
Keep nets as short as possible, therefore, DDR devices have to be placed close as possible of SAMA5D27
The layout DDR should use controlled impedance traces of ZO= 50ohm characteristic impedance.
1uF
1uF
100nF
C0402
100nF
C0402
100nF
C0402
100nF
C0402
C0603
C0603
Address, control and data traces may not exceed 1.3 inches (33.0 mm).
Address, control and data traces must be length-matched to within 0.1 inch (2.54mm).
Address, control and data traces must match the data group trace lengths to within 0.25 inches (6.35mm).
GND_POWER
B
A
RevB
RevA
THR 03-OCT-17 XXX XX-XXX-XX
ZhouB 07-MAR-17 XXX XX-XXX-XX
A
REV
INIT EDIT ZhouB
XXX XX-XXX-XX
06-JAN-17
DATE
MODIF.
DES.
VER.
DATE
SAMA5D2-PTC-EK
05) DDR2-SDRAM
SCALE
REV.
SHEET
1/1
5
13
B
5
4
3
2
1
DS50002709A-page 53
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
Figure 5-6.ꢀPIOA & PIOB
5
4
3
2
1
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
R33
R34
R35
R36
R37
R38
R39
R40
R41
R42
39R
22R
22R
22R
22R
22R
22R
22R
22R
22R
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
PA22
R61
R62
R63
39R
39R
22R
R0402
R0402
R0402
SDMMC0_CK_PA0
9
QSPI0_SCK_PA22 10
SDMMC1_CK_PA22
9
U6A
SDMMC0_CMD_PA1
SDMMC0_DAT0_PA2
SDMMC0_DAT1_PA3
SDMMC0_DAT2_PA4
SDMMC0_DAT3_PA5
SDMMC0_DAT4_PA6
SDMMC0_DAT5_PA7
SDMMC0_DAT6_PA8
SDMMC0_DAT7_PA9
9
U11
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
NAND_IO0_PA22 10
PA00
P10
PA01
T11
9
PA02
R10
PA03
U12
PA23
PA24
PA25
PA26
PA27
PA28
PA30
R64
22R
R0402
QSPI0_NPCS_PA23 10
NAND_IO1_PA23 10
NAND_IO2_PA24 10
QSPI0_IO0_PA24 10
NAND_IO3_PA25 10
QSPI0_IO1_PA25 10
QSPI0_IO2_PA26 10
NAND_IO4_PA26 10
NAND_IO5_PA27 10
QSPI0_IO3_PA27 10
NAND_IO6_PA28 10
PA04
T12
9
9
9
9
9
9
9
PA05
R12
T13
N10
N11
U13
P15
N15
P16
M14
N16
M10
N17
U14
T14
P12
R13
U15
U16
T15
U17
P13
T16
R16
T17
R15
R17
R65
R66
R67
R68
R69
R70
R71
R72
R73
R74
R75
R76
R77
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
D
C
B
A
D
C
B
A
PA06
PA07
PA08
PA09
PA10
PA11
PA12
PA13
PA14
PA15
PA16
PA17
PA18
PA19
PA20
PA21
PA22
PA23
PA24
PA25
PA26
PA27
PA28
PA29
PA30
PA31
PA10_USER_BT
8
PA11
PA12
PA13
PA14
PA15
PA16
SPI0_NPCS0_PA17 10
SDMMC1_DAT0_PA18
SDMMC1_DAT1_PA19
SDMMC1_DAT2_PA20
SDMMC1_DAT3_PA21
9
9
9
9
PA22
PA23
PA24
PA25
PA26
PA27
PA28
SDMMC1_CMD_PA28
SDMMC1_CD_PA30
9
9
NAND_IO7_PA29 10
NAND_CS_PA31 10
PA30
PA11
R44
22R
R0402
SDMMC0_VDDSEL_PA11
9
NAND_WEn_PA30 10
PA12
PA13
R45
R46
22R
22R
R0402
R0402
SDMMC0_WP_PA12
SDMMC0_CD_PA13
9
9
ATSAMA5D27C-CN
bga289p8
PA14
PA15
PA16
R47
R48
R49
39R
22R
22R
R0402
R0402
R0402
SPI0_SPCK_PA14 10
SPI0_MOSI_PA15 10
SPI0_MISO_PA16 10
PB0
PB1
PB2
R78
R79
R80
R81
R82
R83
R84
R85
R86
R87
R88
100R-1% R0402
22R R0402
100R-1% R0402
22R R0402
100R-1% R0402
22R R0402
PB_PORT_0 13
NAND_ALE_PB0 10
PB_PORT_1 13
NAND_CLE_PB1 10
PB_PORT_2 13
NAND_REn_PB2 10
PB_PORT_3 13
PB_PORT_4 13
PB_PORT_5 13
PB_PORT_6 13
LED_BLUE_PB6 10
All resistors on this page connected to PIOs populated close to MPU
PB3
PB4
PB5
PB6
100R-1% R0402
100R-1% R0402
100R-1% R0402
100R-1% R0402
U6B
J8
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB00
PB01
PB02
PB03
PB04
PB05
PB06
PB07
PB08
PB09
PB10
PB11
PB12
PB13
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB25
PB26
PB27
PB28
PB29
PB30
PB31
A8
A7
A6
B6
B7
C7
C6
A5
A4
H8
B5
D6
B4
C5
H7
D5
C4
A3
D4
B3
A2
C3
A1
E5
B2
E4
B1
C2
D3
D2
C1
22R
R0402
PB7
PB9
R89
R43
100R-1% R0402
PB_PORT_7 13
22R
R0402
XPRO1_GPIO_PB9
13
LED_GREEN_PB8 10
PB9
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
R50
R51
R52
R53
R54
R55
R56
R57
R58
R59
R60
39R
22R
22R
22R
22R
22R
22R
22R
22R
22R
22R
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
R0402
ETH_GTXCK_PB14 11
ETH_GTXEN_PB15 11
ETH_GRXDV_PB16 11
ETH_GRXER_PB17 11
ETH_GRX0_PB18 11
ETH_GRX1_PB19 11
ETH_GTX0_PB20 11
ETH_GTX1_PB21 11
ETH_GMDC_PB22 11
ETH_GMDIO_PB23 11
ETH_INT_PB24 11
LED_RED_PB10 10
USBA_VBUS_5V_PB11
USBB_EN_5V_PB12
USBB_OVCUR_PB13
PB28
PB29
R90
R91
R92
R93
R94
DNP
22R
DNP
22R
DNP
R0402
R0402
R0402
R0402
R0402
SPI_MOSI_PB28 13
TWI_SDA_PB28 13
SPI_MISO_PB29 13
TWI_SCL_PB29 13
SPI_SCK_PB30 13
9
9
9
PB14
PB15
PB16
PB17
PB18
PB19
PB20
PB21
PB22
PB23
PB24
PB30
PB31
R95
DNP
R0402
SPI_CS_PB31 13
XPRO2_GPIO_PB25 13
DBGU_URXD0_PB26 12
DBGU_UTXD0_PB27 12
PB28
PB29
PB30
PB31
B
A
A
RevB
RevA
INIT EDIT ZhouB
MODIF.
THR 03-OCT-17 XXX XX-XXX-XX
ZhouB 07-MAR-17 XXX XX-XXX-XX
ATSAMA5D27C-CN
bga289p8
XXX XX-XXX-XX
06-JAN-17
DATE
REV
DES.
VER.
DATE
SAMA5D2-PTC-EK
06) PIOA&PIOB
SCALE
REV.
SHEET
1/1
6
13
B
5
4
3
2
1
DS50002709A-page 54
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
Figure 5-7.ꢀPIOC & PIOD
5
4
3
2
1
All resistors on this page connected to PIOs populated close to MPU
VDD_3V3
U6C
P17
XPRO1_GPIO_PC0 13
SPCK_PC01 13
MOSI_PC02 13
MISO_PC03 13
NPCS0_PC04 13
PC00
N12
PC01
N14
PC02
M15
M11
L10
K10
M16
J10
D1
E3
E2
E1
F3
F5
D
C
B
A
D
C
B
A
PC03
PC04
PC05
PC06
PC07
PC08
PC09
PC10
PC11
PC12
PC13
PC14
PC15
PC16
PC17
PC18
PC19
PC20
PC21
PC22
PC23
PC24
PC25
PC26
PC27
PC28
PC29
PC30
PC31
R97
R99
2.2K-1% 2.2K-1%
R0402
MBUS_RST_PC05 13
TWI1
R0402
22R
PC6
PC7
R0402
R118
R119
PC6
PC7
22R
NAND_RDY_PC8
10
TWD1_PC6 10
XPRO_PC6 13
LCD_IRQ1_PC9 13
LCD_D2_PC10 13
LCD_D3_PC11 13
LCD_D4_PC12 13
LCD_D5_PC13 13
LCD_D6_PC14 13
LCD_D7_PC15 13
LCD_D10_PC16 13
LCD_D11_PC17 13
LCD_D12_PC18 13
LCD_D13_PC19 13
LCD_D14_PC20 13
LCD_D15_PC21 13
LCD_D18_PC22 13
LCD_D19_PC23 13
LCD_D20_PC24 13
LCD_D21_PC25 13
LCD_D22_PC26 13
LCD_D23_PC27 13
R0402
R120
R121
22R
R0402
22R
TWCK1_PC7 10
XPRO_PC7 13
F2
G6
F1
R0402
H6
G2
G3
G1
H2
G5
H1
H5
J9
H9
E8
G8
F8
VDD_3V3
LCD_PWM_PC28 13
LCD_EN_PC29 13
LCD_VSYNC_PC30
LCD_HSYNC_PC31
R96
2.2K-1%
R0402
R98
2.2K-1%
R0402
TWI0
13
13
D8
PD21
PD22
R100
R101
22R
R0402
TWD0_PD21 13
ATSAMA5D27C-CN
bga289p8
22R
R0402
TWCK0_PD22 13
MPU_PD3
R102
R103
R104
R105
R106
R107
R108
R109
R110
R111
R112
R113
R114
R115
R116
R117
0R
0R
0R
0R
0R
0R
0R
0R
0R
0R
0R
0R
0R
0R
0R
0R
PTC_XLINE0 13
PTC_XLINE1 13
PTC_XLINE2 13
PTC_XLINE3 13
PTC_XLINE4 13
PTC_XLINE5 13
PTC_XLINE6 13
PTC_XLINE7 13
PTC_YLINE0 13
PTC_YLINE1 13
PTC_YLINE2 13
PTC_YLINE3 13
PTC_YLINE4 13
PTC_YLINE5 13
PTC_YLINE6 13
PTC_YLINE7 13
U6D
G10
E10
G9
K1
J6
J4
J2
J7
J1
K9
J3
M1
K8
L2
K4
K7
L1
K2
J5
K6
M2
N1
L4
M3
L7
L6
N2
L8
M4
N3
L9
LCD_PCLK_PD0 13
LCD_DE_PD1 13
LCD_IRQ2_PD2 13
PD00
PD01
PD02
PD03
PD04
PD05
PD06
PD07
PD08
PD09
PD10
PD11
PD12
PD13
PD14
PD15
PD16
PD17
PD18
PD19
PD20
PD21
PD22
PD23
PD24
PD25
PD26
PD27
PD28
PD29
PD30
PD31
MPU_PD4
MPU_PD5
MPU_PD6
MPU_PD7
MPU_PD8
MPU_PD9
MPU_PD10
MPU_PD11
MPU_PD12
MPU_PD13
MPU_PD14
MPU_PD15
MPU_PD16
MPU_PD17
MPU_PD18
MPU_PD3
MPU_PD4
MPU_PD5
MPU_PD6
MPU_PD7
MPU_PD8
MPU_PD9
MPU_PD10
MPU_PD11
MPU_PD12
MPU_PD13
MPU_PD14
MPU_PD15
MPU_PD16
MPU_PD17
MPU_PD18
INT_PD19 13
PWM_PD20 13
PD21
PD22
RX_PD23 13
TX_PD24 13
AN-AD6 13
XPRO1_GPIO_PD26 13
JTAG_TCK_PD27 12
JTAG_TDI_PD28 12
JTAG_TDO_PD29 12
JTAG_TMS_PD30 12
XPRO2_GPIO_PD31 13
M7
ATSAMA5D27C-CN
bga289p8
B
A
RevB
RevA
THR 03-OCT-17 XXX XX-XXX-XX
ZhouB 07-MAR-17 XXX XX-XXX-XX
A
REV
INIT EDIT ZhouB
XXX XX-XXX-XX
06-JAN-17
DATE
MODIF.
DES.
VER.
DATE
SAMA5D2-PTC-EK
07) PIOC&PIOD
SCALE
REV.
SHEET
1/1
7
13
B
5
4
3
2
1
DS50002709A-page 55
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
Figure 5-8.ꢀSystem
5
4
3
2
1
D
D
C
B
A
Routing USB
Clock sources
XIN
SAMA5D2 System Pins
Max trace-length mismatch
between USB signals pairs
should be no greater than 3.8mm
R123
DNP
XOUT
R0402
U6F
Y1
XIN
XOUT
U7
U6
T8
R8
Top/Bot
Top/Bot
USBA_DP
USBA_DM
9
9
XIN
XOUT
HHSDPA
HHSDMA
1
2
4
3
90 ohms differential trace
impedance
Routing top or bottom
XIN32
P1
U8
U9
Top/Bot
Top/Bot
USBB_DP
USBB_DM
9
9
XIN32
XOUT32
HHSDPB
HHSDMB
XOUT32 P2
C96
24MHz CL=10pF
x4s32x25
C98
20pF
C0402
BP1
BP2
Tact Switch
20pF
C0402
T9
U10
HSIC_DATA
HSIC_STRB
9
9
HSIC_DATA
HSIC_STRB
R1
P4
R144
R0402
0R
3
8
SHDN
WKUP
6
PA10_USER_BT
SHDN
WKUP
R6
FSM2JSML
Tact Switch
USER BUTTON
VBG
R133
R134
R135
DNP
R0402
0R
T2
U2
P3
VDDBU
3,8,11,12,13 NRST
JTAGSEL
NRST
GND_POWER
R122
GND_POWER
C102
10pF
C0402
R139
5.62K-1%
R0402
R0402
10K
U1
T1
ACP
ACN
R145
r0402
100R-1%
DIS BOOT
10 DISABLE_BOOT
3,8,11,12,13 NRST
ACP
ACN
XOUT32
XIN32
TST
R0402
FSM2JSML
Tact Switch
C
B
A
DNP
R0402
R136
20K-1%
R0402
22pF
T10
R3
N8
R2
R5
R4
P5
P6
M8
PIOBU0
PIOBU1
PIOBU2
PIOBU3
PIOBU4
PIOBU5
PIOBU6
PIOBU7
BP3
BP4
SDCAL
PIOBU0
PIOBU1
PIOBU2
PIOBU3
PIOBU4
PIOBU5
PIOBU6
PIOBU7
GNDUTMII
32.768KHz CL=12.5pF
C100
C0402
R&C
R146
r0402
100R-1%
100R-1%
RESET
as close as possible
4
3
1
2
RXD
N4
U3
M6
RXD
FSM2JSML
Tact Switch
C97
C99
VDDANA
CLK_AUDIO
ADVREFP
20pF
C0402
20pF
C0402
Y2
X4S70X15
R137
0R
R0402
R147
r0402
WAKE UP
8
WKUP
FSM2JSML
C101
100nF
C0402
ATSAMA5D27C-CN
bga289p8
GND_POWER
VDDBU
GND_POWER
GND_POWER
R238
R0402
10K
GND_POWER
VDD_3V3
J1
DNP
JTAG
PIOBU0 R124
PIOBU2 R125
PIOBU4 R126
PIOBU6 R127
330R R0402
330R R0402
330R R0402
330R R0402
1
3
5
7
9
2
4
6
8
R129
R130
R131
R132
330R R0402
330R R0402
R0402
R0402
PIOBU3
PIOBU5
RXD
R140
100K
R0402
R141
100K
R0402
R142
100K
R0402
0R
0R
ACN
VDD_3V3
ACP
R128
0R
R0402
10
J2
FTSH-105-01-F-DV-P-TR
GND_POWER
1
3
5
7
9
2
4
6
8
CON_JTAG_Pin2 12
CON_JTAG_Pin4 12
CON_JTAG_Pin6 12
CON_JTAG_Pin8 12
NRST 3,8,11,12,13
R138
DNP
R0402
12 RTCKIN
10
R143
100R-1% R0402
R236
10K
Header 2X5
FTSH-105-01-F-DV-P-TR
JP7
DNP
2
1
PIOBU7
PIOBU1
R0402
GND_POWER
GND_POWER
B
A
RevB
RevA
THR 03-OCT-17 XXX XX-XXX-XX
ZhouB 07-MAR-17 XXX XX-XXX-XX
A
REV
INIT EDIT ZhouB
XXX XX-XXX-XX
06-JAN-17
DATE
MODIF.
DES.
VER.
DATE
SAMA5D2-PTC-EK
08) SYSTEM
SCALE
REV.
SHEET
1/1
8
13
B
5
4
3
2
1
DS50002709A-page 56
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
Figure 5-9.ꢀUSB & TF
5
4
3
2
1
VDD_3V3
VDDSDHC
R171
R154
0R
R0402
0R
R0402
VBUS_USBA
USB A
MCI0
R148
C103
100K
R0402
C110 10uF
C0603
C111 100nF
C0402
USBA_VBUS_5V_PB11
6
D
C
B
A
D
C
B
A
R155
68k
R0603
R157
68k
R0603
R158
68k
R0603
R159
68k
R0603
R161
68k
R0603
R163
68k
R0603
R165
68k
R0603
R167
68k
R0603
R169
10k
R0402
R172
10k
R0402
R173
10k
R0402
GND_POWER
20pF
C0402
R149
200K
R0402
(MCI0_WP)
(MCI0_CD)
6
6
SDMMC0_WP_PA12
SDMMC0_CD_PA13
9
1
2
3
4
5
GND_POWER
VBUS
DM
DP
ID
GND
GND_POWER
USBA_DM
USBA_DP
8
8
J6
16
15
14
(MCI0_DA1)
(MCI0_DA0)
8
7
6
5
4
3
2
1
9
6
6
SDMMC0_DAT1_PA3
SDMMC0_DAT0_PA2
10
(MCI0_CK)
6
SDMMC0_CK_PA0
GND_POWER
J4
GND_POWER
13
12
11
10
(MCI0_CDA)
(MCI0_DA3)
(MCI0_DA2)
6
6
6
SDMMC0_CMD_PA1
SDMMC0_DAT3_PA5
SDMMC0_DAT2_PA4
USBMICRO5_6A
MicroUSB AB Connector
EARTH_USB_A
7SDMM-B0-2211
con_kingconn_7sdmm_2211
(MCI0_DA4)
(MCI0_DA5)
(MCI0_DA6)
(MCI0_DA7)
6
6
6
6
SDMMC0_DAT4_PA6
SDMMC0_DAT5_PA7
SDMMC0_DAT6_PA8
SDMMC0_DAT7_PA9
USB B
SD/MMCPlus CARD INTERFACE - MCI0
VDD_3V3 VDDSDHC1V8
VDD_3V3
5
MCI1
R160
10k
VDDSDHC
R151
R152
DNP
R0402
DNP
SH1
R0402
R162
68k
R0603
R164
68k
R0603
R166
68k
R0603
R168
68k
R0603
R170
10k
R0402
USBB_VBUS_5V
1
2
3
4
VBUS
DM
DP
R0402
USBB_DM
USBB_DP
8
8
VDD_3V3
C107
100nF
C0402
GND
(MCI1_CD)
6
6
SDMMC1_CD_PA30
A
Micro SD
U9
GND_POWER
J7
SH2
6
6
GND_POWER
10
8
7
6
5
4
3
2
1
SW2
S2
J3
(MCI1_DA1)
(MCI1_DA0)
6
6
SDMMC1_DAT1_PA19
SDMMC1_DAT0_PA18
Single USB Type
USB4_2AL
A
4
5
11
S1
D
12
13
14
1
(MCI1_CK)
6
SDMMC0_VDDSEL_PA11
SDMMC1_CK_PA22
IN
(MCI1_CDA)
(MCI1_DA3)
(MCI1_DA2)
6
6
6
SDMMC1_CMD_PA28
SDMMC1_DAT3_PA21
SDMMC1_DAT2_PA20
ADG849YKSZ-REEL
SC70
EARTH_USB_B
R150
10k
R0402
PJS008-2120-0 GND_POWER
Micro_SD_PJS008
9
C108
10uF
C0603
C109
100nF
C0402
GND_POWER
GND_POWER
USB C
VDD_3V3
1
2
HSIC_DATA
HSIC_STRB
8
8
DNP
J5
MHC50D30 MHC50D30 MHC50D30 MHC50D30
MH1
PTH
MH2
PTH
MH3
PTH
MH4
PTH
R153
10K
R0402
L17
BLM18PG181SN1D
L15
BLM18PG181SN1D
U10
EN: Active High
USBB_VBUS_5V
1
2
8
6
1
Through Holes
USBB_EN_5V_PB12
USBB_OVCUR_PB13
6
OUT_2
EN
1
2
R0603
C104
100nF
C0402
C105
10uF
C0603
2
GND_POWER
6
OUT_1 FLG
VDD_MAIN_5V
R0603
7
5
3
4
R156
10K
R0402
IN_2
IN_1
GND
NC
GND_POWER
GND_POWER
EARTH_USB_A
L16
GND_POWER GND_POWER
BLM18PG181SN1D
C106
100nF
C0402
1
2
MIC2025-1YM-TR
soic8ja
R0603
B
A
A
RevB
RevA
THR 03-OCT-17 XXX XX-XXX-XX
ZhouB 07-MAR-17 XXX XX-XXX-XX
GND_POWER
GND_POWER
GND_POWER
EARTH_USB_B
INIT EDIT ZhouB
XXX XX-XXX-XX
06-JAN-17
DATE
REV
MODIF.
DES.
VER.
DATE
SAMA5D2-PTC-EK
09) USB&TF
SCALE
REV.
SHEET
1/1
9
13
B
5
4
3
2
1
DS50002709A-page 57
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
Figure 5-10.ꢀMemories & RGB LED
5
4
3
2
1
QSPI Flash & SPI Flash CS
VDD_3V3
C117
100nF
VDD_3V3
R178
10K
R184
10K
U11
QSPI Flash
1
2
3
5
4
D
C
B
A
D
C
B
A
VCC
JP13
Header 1X2
QSPI0_CS_PA23
R242
10K
6
QSPI0_NPCS_PA23
BOOT_DIS
GND
QSPI Flash CS
QSPI0_CS_PA23
NL17SZ126DFT2G
VDD_3V3
GND_POWER
8
DISABLE_BOOT
VDD_3V3
C116
100nF
R186
10K
R187
10K
R0402
R0402
R185
10K
U12
C120
100nF
C0402
1
2
3
5
U14
VCC
5
2
3
7
8
4
1
6
6
6
6
6
QSPI0_IO0_PA24
QSPI0_IO1_PA25
QSPI0_IO2_PA26
QSPI0_IO3_PA27
SI/SIO0
SO/SIO1 GND
SIO2
SIO3
VCC
SPI0_CS0_PA17
SPI Flash CS
4
6
SPI0_NPCS0_PA17
CS#
SCLK
QSPI0_SCK_PA22
6
GND
GND_POWER
SST26VF064B-104I/SM
soic8jg
NL17SZ126DFT2G
GND_POWER
3
VDD_3V3
SPI Flash
Q5
LED
BSS138
SOT23_123
R181
100R-1%
R0402
1
6
LED_RED_PB10
D4
2
VDD_3V3
R239
R240
R241
2.2K-1%
R0402
1
4
3
U16
5
Red
GND_POWER
8
3
2
6
6
6
SPI0_MOSI_PA15
SPI0_MISO_PA16
SPI0_SPCK_PA14
SI
2
VCC
SO
6
Q7
BSS138
SOT23_123
1K
2
3
7
C119
100nF
C0402
Green
Blue
Anode
SCK
WP
HOLD
R0402
SPI0_CS0_PA17
R182
100R-1%
R0402
1
1
6
LED_GREEN_PB8
CS
1K
4
GND
R0402
R243
10K
SST26VF032B-104I/SM
soic8jg
CLV1A-FKB-CJ1M1F1BB7R4S3
GND_POWER
GND_POWER
3
2
GND_POWER
Q6
BSS138
SOT23_123
R183
100R-1%
R0402
1
6
LED_BLUE_PB6
NAND Flash
EEPROM+MAC
R244
10K
3V3_NAND
GND_POWER
VDD_3V3
GND_POWER
R175
100K
R176
10K
R180
100K
U15
1
2
3
8
4
A0
A1
A2
VCC
GND
U13
16
17
8
18
9
29
C118
6
6
6
NAND_CLE_PB1
NAND_ALE_PB0
NAND_REn_PB2
NAND_WEn_PA30
NAND_IO0_PA22
NAND_IO1_PA23
NAND_IO2_PA24
NAND_IO3_PA25
NAND_IO4_PA26
NAND_IO5_PA27
NAND_IO6_PA28
NAND_IO7_PA29
6
6
6
6
6
6
6
6
CLE
ALE
RE#
WE#
CE#
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
30
31
32
41
42
43
44
100nF
C0402
TWD1
TWCK1
5
6
7
7
TWD1_PC6
TWCK1_PC7
SDA
SCL
WP
6
7
6
NAND_CS_PA31
24AA02E48
8MA2
R179
NAND_WPn
0R
7
R188
10K
R0402
7
NAND_RDY_PC8
R/B#
WP#
GND_POWER
19
45
46
47
NC19
NC20
NC21
R177
DNP
1
2
3
4
5
NC1
NC2
NC3
NC4
NC5
NC6
NC7
NC8
GND_POWER
JP8
Header 1X2
38
35
20
21
DNU4
DNU3
DNU2
DNU1
6
3V3_NAND
10
11
14
15
22
23
24
26
27
28
33
40
VDD_3V3
3V3_NAND
NC9
12
34
37
39
NC10
NC11
NC12
NC13
NC14
NC15
NC16
NC17
NC18
VCC_1
VCC_2
VCC_3
VCC_4
R174
0R
B
A
RevB
RevA
THR 03-OCT-17 XXX XX-XXX-XX
ZhouB 07-MAR-17 XXX XX-XXX-XX
C112
100nF
C113
100nF
C114
100nF
C115
100nF
13
25
36
48
A
REV
INIT EDIT ZhouB
XXX XX-XXX-XX
06-JAN-17
DATE
VSS_1
VSS_2
VSS_3
VSS_4
MODIF.
DES.
VER.
DATE
SAMA5D2-PTC-EK
SCALE
REV.
SHEET
1/1
10
13
10) MEMORIES&RGBLED
B
MT29F4G08ABADAWP
5
4
3
2
1
DS50002709A-page 58
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
Figure 5-11.ꢀEthernet 10/100M
5
4
3
2
1
D
C
B
A
D
C
B
A
Ethernet
VDD_3V3
100 ohms differential trace
impedance
10Base-T/100Base-TX
Routing top or bottom
R197
1K
R0402
R198
1K
R0402
R199
10K
R0402
R200
10K
R0402
R203
10K
R0402
J8
13F-64GYD2PL2NL
TX+
U17
1
TD+
CT
1
4
2
TX+
TX-
19
ETH_GTXCK_PB14
6
6
top/bot
top/bot
top/bot
top/bot
RXC/B-CAST_OFF
7
TX+
TX-
TXP
25
ETH_GTX1_PB21
ETH_GTX0_PB20
ETH_GTXEN_PB15
6
TXD1
24
6
TXD0
23
2
3
6
TX-
RX+
RX-
TD-
TXEN
6
5
13
14
15
16
18
20
29
28
TXM
RXP
RXD3/PHYAD0
RXD2/PHYAD1
RXD1/PHYAD2
RXD0/DUPLEX
RXDV/CONFIG2
RXER/ISO
ETH_GRX1_PB19
ETH_GRX0_PB18
ETH_GRXDV_PB16
ETH_GRXER_PB17
6
6
RD+
CT
3
5
6
RX+
RX-
RX+
6
6
CRS/CONFIG1
COL/CONFIG0
RD-
RX-
4
2
RXM
C121
100nF
C0402
C122
100nF
C0402
C123
C124
2.2uF
75 75
C0603
100nF
C0402
12
11
21
75
75
ETH_GMDC_PB22 6
ETH_GMDIO_PB23
VDD_1V2
MDC
MDIO
INTRP/NAND
4
5
7
8
NC
7
8
6
ETH_INT_PB24
6
1
33
22
26
27
10
VDD_3V3
GND
1nF
VDDA_3V3
GND_ETH
L19
PADDLE
TXC
13
14
BLM18PG181SN1D
1
3
2
TXD2
TXD3
REXT
VDDA_3V3
R0603
15
16
R194
6.49K 1%
R0402
C127
10uF
C0603
C129
100nF
C0402
Right yellow LED
Left Green LED
EARTH_ETH
EARTH_ETH
VDD_3V3
GND_POWER
ETH_XO
ETH_XI
8
9
GND_POWER
XO
XI
rj45_13f-64gy_P12_4
R192
10K
R0402
R193
10K
R0402
17
32
GND_POWER
VDDIO
C128
10uF
C0603
C130
100nF
C0402
ACT ETH_LED1
LINK ETH_LED0
ETH_LED0
ETH_LED1
30
31
LED0/NWAYEN
LED1/SPEED
VDD_3V3
R189
510R
R0402
GND_POWER
R196
0R
R0402
NRST 3,8,12,13
RESET
R190
510R
R0402
KSZ8081RNB
qfn32_1p5h
L18
ETH_XI
BLM18PG181SN1D
C125 22pF
C0402
1
2
R191
0R
At the De-Assertion of Reset:
PHY ADD[2:0]-pin15/14/13: 001
CONFIG[2:0]-pin18/29/28:001,RMII mode
Duplex Mode-pin16: 1,Half Duplex
Isolate Mode-pin20: 0,Disable
R0603
=
1
R0603
R195
DNP
R0402
Y3
EARTH_ETH
GND_POWER
GND_ETH
Speed Mode-pin31: 1,100Mbps
Nway Auto-Negotiation-p30: 1,Enable
25MHz CL=20pF
x4s32x25
ETH_XO
C126 22pF
C0402
GND_POWER
B
A
RevB
RevA
THR 03-OCT-17 XXX XX-XXX-XX
ZhouB 07-MAR-17 XXX XX-XXX-XX
A
REV
INIT EDIT ZhouB
XXX XX-XXX-XX
06-JAN-17
DATE
MODIF.
DES.
VER.
DATE
SAMA5D2-PTC-EK
11) Ethernet_10/100M
SCALE
REV.
SHEET
1/1
11
13
B
5
4
3
2
1
DS50002709A-page 59
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
Figure 5-12.ꢀJLINK-OB
5
4
3
2
1
VDD_MAIN_5V
VDD_3V3_3U
C153 C154
U21
Max 500mA
@
3.3V
VDD_3V3_3U
6
1
2
VIN
VOUT1
VOUT2
DBGU function switches
C152
2.2uF
C0603
2.2uF
100nF
C0402
3
4
5
7
C0603
C155
100nF
C0402
GND
EN
NC
EP
VDD_3V3_3U
PA25_3U
R246
MIC5528-3.3YMTDFN6
U18
10K
R0402
GND_POWER
VDD_3V3_3U
D
C
B
A
D
C
B
A
VDD_3V3_3U
1
2
3
5
OE
IN
VCC
R247
0R
EN_1
3
6
DBGU_UTXD0_PB27
JPR2
Jumper
RX_3U
4
C142
100nF
C0402
C147
100nF
C0402
GND OUT
NL17SZ125DFT2SC-88A
JP14
U22
TDIOUT R218
TDIIN
150R-1%
R0402
GND_POWER
GND_POWER
15
16
1
13
12
11
CON_JTAG_Pin4
JTAG_TCK_PD27
8
NOA
NCD
COMD
NOD
7
8
JTAG_TDI_PD28
7
COMA
NCA
U19
ENSPI
R222
150R-1% TCKOUT
R0402
CON_JTAG_Pin8
PA26_3U
DBGU_URXD0_PB26
6
1
2
3
5
OE
IN
VCC
TCKIN
TX_3U
PA26_3U
2
10
ABIN
CDIN
JLINK-OB
4
U20
GND OUT
TDOIN
3
4
5
9
8
7
CON_JTAG_Pin2
JTAG_TMS_PD30
8
NOB
NCC
COMC
NOC
NL17SZ125DFT2SC-88A
TDI_3U
GND_POWER
B9
B8
A7
C7
J10
H9
H10
G8
G10
G9
F8
F10
E10
E9
TRSTIN
TRSTOUT
7
JTAG_TDO_PD29
CON_JTAG_Pin6
7
TDI
PA0/PGMNCMD
PA1/PGMRDY
PA2/PGMNOE
PA3/PGMNVALID
PA4/PGMM0
PA5/PGMM1
PA6/PGMM2
PA7/PGMM3
PA8/PGMD0
PA9/PGMD1
PA10/PGMD2
PA11/PGMD3
PA12/PGMD4
PA13/PGMD5
PA14/PGMD6
PA15/PGMD7
PA16/PGMD8
PA17/PGMD9
PA18/PGMD10
PA19/PGMD11
PA20/PGMD12
PA21/PGMD13
PA22/PGMD14
PA23/PGMD15
PA24
COMB
NCB
TDO_3U
TCK_3U
TMS_3U
TDO/TRACESWO
TCK/SWCLK
TMS/SWDIO
8
TRESIN
TRESOUT
NRST_3U
ERASE_3U
D6
R223
150R-1% TMSOUT
R0402
ERASE
VDD_3V3_3U
NLAS3899BMNTWG
WQFN-16
J3
K4
TMSIN
VDD_3V3_3U
ADVREF
AD12BVREF
R210
100R-1%
R0402
E8
R208
R209
RX_3U
TX_3U
TDIIN
10K
100R-1%
R0402
B7
C8
D9
D10
H5
K6
H6
J6
K7
H7
J7
K8
J8
H4
K9
H8
K10
J9
GND_POWER
NRST
R0402
C136 10nF
C0402
GND_POWER
NRSTB
D5
PMEG6010CEGWX
sod123
TRESOUT
TRESIN
R219
R220
150R-1%
R0402
TMSIN
D7
C9
R221
100R-1%
R0402
NRST 3,8,11,13
TST
R213
R214
C132 10nF
C0402
DNP
TCKOUT
TMSOUT
GND_POWER
VDD_3V3_3U
VDD_3V3_3U
GND_POWER
JTAGSEL
R0402
6.8K-1%
R0402
A1
TRSTOUT
TRSTIN
0R
VBG
TDIOUT
TDOIN
TCKIN
C137 10pF
C0402
A10
B10
XIN32
XOUT32
VDD_3V3_3U
ENSPI
Y4
TCKOUT
PA25_3U
PA26_3U
EDBG_XIN
R215
4
2
3
1
R245
0R
A2
A3
VCC
Out
NC
XIN
PA25
PA26
PA27
C156
100nF
C0402
JP9
R224
10K
R0402
XOUT
H3
Header 1X2
GND
VDD_3V3_3U
100K
D8
D6
VDD_3V3_3U
FWUP
ASE-12.000MHz-LC-T
R0402
LED1_3U
LED2_3U
E3
R216
R217
150R-1%
R0402
2
4
1
PA28
PA29
RED
1
3
PA25_3U
GND_POWER
D2
D1
C1
C2
JTAG-CDC disable
DHSDM
DFSDM
DFSDP
DHSDP
R211
R212
39R R0402
39R R0402
E1
150R-1%
R0402
3
Green
GND_POWER
VDD_3V3_3U
J4
F4
PA30
PA31
KPTB-1615
RTCKIN
8
JP10
Header 1X2
R225
10K
R0402
ATSAM3U4CA-CU
TFBGA100
PA26_3U
JTAG-OB disable
GND_POWER
VDD_3V3_3U
VDD_OUT_3U
VDD_3V3_3U
VDD_3V3_3U
(3V3)
VBUS_JLINK
GND_POWER
C134
2.2uF
C0603
C138
2.2uF
C0603
C140
C143
C145
C148
C150
100nF
C0402
JP11
Header 1X2
100nF
C0402
100nF
C0402
100nF
C0402
100nF
C0402
VDD_3V3_3U
9
1
VBUS
2
EDBG_USB_DM
EDBG_USB_DP
DM
3
4
5
DP
ID
PCB connector for SAMTEC MEC1-108-02
ERASE_3U
10
J10
GND
1
3
2
4
GND_POWER
TGTPOWER
GND1
GND2
NRST
NRST_3U
GND_POWER
GND_POWER
VDD_OUT_3U
TDI_3U
7
9
11
13
15
8
J9
TRACE D3
TRACE D2
TRACE D1 SWCLK/TCK
TRACE D0 SDWIO/TMS
TDI
TDO/SWO
TDO_3U
TCK_3U
TMS_3U
10
12
14
16
MicroUSB AB Connector
USBMICRO5_6A
EARTH_USB_EDBG
C135
2.2uF
C0603
C139
2.2uF
C0603
C141
C144
C146
C149
C151
100nF
C0402
VDD_3V3_3U
TRACE_CK
VCC
100nF
C0402
100nF
C0402
100nF
C0402
100nF
C0402
L20
PADS ON PCB
Pin-16
B
A
RevB
RevA
THR 03-OCT-17 XXX XX-XXX-XX
ZhouB 07-MAR-17 XXX XX-XXX-XX
BLM18PG181SN1D
1
2
A
REV
INIT EDIT ZhouB
XXX XX-XXX-XX
06-JAN-17
DATE
MODIF.
DES.
VER.
DATE
R0603
SAMA5D2-PTC-EK
12) JLINK-OB
SCALE
REV.
SHEET
1/1
12
13
GND_POWER
B
EARTH_USB_EDBG
GND_POWER
5
4
3
2
1
DS50002709A-page 60
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Appendix A. Schematics and Layouts
Figure 5-13.ꢀEXT Connectors
5
4
3
2
1
PIOB[0-7] Connector
MikroBUS
LCD-50PIN
VDD_3V3
J15A
J15B
J16
PD25
RST
PWM
INT
RX
TX
SCL
SDA
J13
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
D
C
B
A
D
C
B
A
7
AN-AD6
PWM_PD20
INT_PD19
RX_PD23 7
7
R234
100R-1%
R0402
1
2
3
4
5
6
7
8
9
7
MBUS_RST_PC05
7
13 SPI_CS_PB31
ID
GND1
D0
D1
D2
D3
GND2
D4
D5
D6
D7
GND3
D8
D9
D10
D11
GND4
D12
D13
D14
D15
GND5
D16
D17
D18
D19
GND6
D20
D21
D22
NPCS0
SPCK
MISO
MOSI
3V3
6
6
6
6
6
6
6
6
PB_PORT_0
PB_PORT_1
PB_PORT_2
PB_PORT_3
PB_PORT_4
PB_PORT_5
PB_PORT_6
PB_PORT_7
7
NPCS0_PC04
SPCK_PC01
MISO_PC03
MOSI_PC02
VDD_3V3
7
7
7
TX_PD24
7
TWCK0_PD22
7
7
7
LCD_D2_PC10
LCD_D3_PC11
TWD0_PD21
VDD_MAIN_5V
7
+5v
R229
DNP
R0402
7
7
7
7
LCD_D4_PC12
LCD_D5_PC13
LCD_D6_PC14
LCD_D7_PC15
SSQ-108-01-G-S SSQ-108-01-G-S
10
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
JP12
Header 1X2
PIOB[0-7] connector
GND_POWER
7
7
LCD_D10_PC16
LCD_D11_PC17
GND_POWER
7
7
7
7
LCD_D12_PC18
LCD_D13_PC19
LCD_D14_PC20
LCD_D15_PC21
XPRO EXT1
J11
1
3
5
7
9
11
13
15
17
19
2
4
6
8
PD11
PD13
PB9
PD15
PC6
PD12
PD14
PC0
7,13 PTC_YLINE0
7,13 PTC_YLINE2
XPRO1_GPIO_PB9
7,13 PTC_YLINE4
PTC_YLINE1 7,13
PTC_YLINE3 7,13
XPRO1_GPIO_PC0
PTC_YLINE5 7,13
7
7
LCD_D18_PC22
LCD_D19_PC23
6
7
10 PD16
12 PC7
14
16 PD18
18 PD17
20
7
7
7
7
LCD_D20_PC24
LCD_D21_PC25
LCD_D22_PC26
LCD_D23_PC27
7
XPRO_PC6
XPRO_PC7
7
R226
0R
PD17
PD26
7,13 PTC_YLINE6
XPRO1_GPIO_PD26
PTC_YLINE7 7,13
PTC_YLINE6 7,13
R227
DNP
0R
7
D23
VDD_3V3
GND7
PCLK/CMD
VSYNC/CS
HSYNC/WE
DE/RE
SPI_SCK
SPI_MOSI
SPI_MISO
SPI_CS
ENABLE
TWI_SDA
TWI_SCL
IRQ1
IRQ2
PWM
RESET
VCC1
VCC2
GND8
7
LCD_PCLK_PD0
LCD_VSYNC_PC30
LCD_HSYNC_PC31
Header 2X10
7
7
GND_POWER
7
LCD_DE_PD1
SPI_SCK_PB30
SPI_MOSI_PB28
SPI_MISO_PB29
SPI_CS_PB31
R235
6
6
6
6
7
6
6
7
LCD_EN_PC29
TWI_SDA_PB28
TWI_SCL_PB29
LCD_IRQ1_PC9
LCD_IRQ2_PD2
XPRO EXT2
J12
1
3
2
4
6
8
7
PD3
PD4
PD6
PD8
7,13 PTC_XLINE0
7,13 PTC_XLINE2
7,13 PTC_XLINE4
7,13 PTC_XLINE6
7
LCD_PWM_PC28
3,8,11,12 NRST
PTC_XLINE1 7,13
PTC_XLINE3 7,13
PTC_XLINE5 7,13
PTC_XLINE7 7,13
XPRO2_GPIO_PD31
VDD_MAIN_5V
VDD_3V3
R230
PD5
PD7
PD9
5
7
9
10 PD10
12 PD31
14
16
18
20
11
13
15
17
19
R228
0R
7
PB25
6
XPRO2_GPIO_PB25
DNP
R0603
XF2M-5015-1A
FPC50-0p5mm
VDD_3V3
Header 2X10
GND_POWER
R231
0R
R0603
GND_POWER
XPRO Connectors
J14
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
7,13 PTC_YLINE7
7,13 PTC_YLINE6
7,13 PTC_YLINE5
7,13 PTC_YLINE4
7,13 PTC_YLINE3
7,13 PTC_YLINE2
7,13 PTC_YLINE1
7,13 PTC_YLINE0
VDD_3V3
R232
R233
2.2K-1% 2.2K-1%
close to connecter
7,13 PTC_XLINE0
7,13 PTC_XLINE1
7,13 PTC_XLINE2
7,13 PTC_XLINE3
7,13 PTC_XLINE4
7,13 PTC_XLINE5
7,13 PTC_XLINE6
7,13 PTC_XLINE7
PTC Connector
TWI_SDA_PB28
TWI_SCL_PB29
046288026000846
B
A
RevB
RevA
THR 03-OCT-17 XXX XX-XXX-XX
ZhouB 07-MAR-17 XXX XX-XXX-XX
GND_POWER
A
REV
INIT EDIT ZhouB
XXX XX-XXX-XX
06-JAN-17
DATE
MODIF.
DES.
VER.
DATE
SAMA5D2-PTC-EK
SCALE
REV.
SHEET
1/1
13
13
13) EXT_CONNECTORS
B
5
4
3
2
1
DS50002709A-page 61
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
Revision History
6.
Revision History
6.1
Rev. A - 12/2017
This is the initial released version of this user's guide.
DS50002709A-page 62
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
The Microchip Web Site
Microchip provides online support via our web site at http://www.microchip.com/. This web site is used as
a means to make files and information easily available to customers. Accessible by using your favorite
Internet browser, the web site contains the following information:
•
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To register, access the Microchip web site at http://www.microchip.com/. Under “Support”, click on
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Users of Microchip products can receive assistance through several channels:
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Technical Support
Customers should contact their distributor, representative or Field Application Engineer (FAE) for support.
Local sales offices are also available to help customers. A listing of sales offices and locations is included
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Technical support is available through the web site at: http://www.microchip.com/support
Microchip Devices Code Protection Feature
Note the following details of the code protection feature on Microchip devices:
•
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
Microchip believes that its family of products is one of the most secure families of its kind on the
market today, when used in the intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of
these methods, to our knowledge, require using the Microchip products in a manner outside the
operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is
engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
DS50002709A-page 63
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their
code. Code protection does not mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the
code protection features of our products. Attempts to break Microchip’s code protection feature may be a
violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software
or other copyrighted work, you may have a right to sue for relief under that Act.
Legal Notice
Information contained in this publication regarding device applications and the like is provided only for
your convenience and may be superseded by updates. It is your responsibility to ensure that your
application meets with your specifications. MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED, WRITTEN OR ORAL, STATUTORY
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Microchip disclaims all liability arising from this information and its use. Use of Microchip devices in life
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from such use. No licenses are conveyed, implicitly or otherwise, under any Microchip intellectual
property rights unless otherwise stated.
Trademarks
The Microchip name and logo, the Microchip logo, AnyRate, AVR, AVR logo, AVR Freaks, BeaconThings,
BitCloud, CryptoMemory, CryptoRF, dsPIC, FlashFlex, flexPWR, Heldo, JukeBlox, KeeLoq, KeeLoq logo,
Kleer, LANCheck, LINK MD, maXStylus, maXTouch, MediaLB, megaAVR, MOST, MOST logo, MPLAB,
OptoLyzer, PIC, picoPower, PICSTART, PIC32 logo, Prochip Designer, QTouch, RightTouch, SAM-BA,
SpyNIC, SST, SST Logo, SuperFlash, tinyAVR, UNI/O, and XMEGA are registered trademarks of
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ClockWorks, The Embedded Control Solutions Company, EtherSynch, Hyper Speed Control, HyperLight
Load, IntelliMOS, mTouch, Precision Edge, and Quiet-Wire are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any Capacitor, AnyIn, AnyOut, BodyCom,
chipKIT, chipKIT logo, CodeGuard, CryptoAuthentication, CryptoCompanion, CryptoController,
dsPICDEM, dsPICDEM.net, Dynamic Average Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial
Programming, ICSP, Inter-Chip Connectivity, JitterBlocker, KleerNet, KleerNet logo, Mindi, MiWi,
motorBench, MPASM, MPF, MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach, Omniscient
Code Generation, PICDEM, PICDEM.net, PICkit, PICtail, PureSilicon, QMatrix, RightTouch logo, REAL
ICE, Ripple Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI, SuperSwitcher, SuperSwitcher II, Total
Endurance, TSHARC, USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and ZENA are
trademarks of Microchip Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated in the U.S.A.
Silicon Storage Technology is a registered trademark of Microchip Technology Inc. in other countries.
GestIC is a registered trademark of Microchip Technology Germany II GmbH & Co. KG, a subsidiary of
Microchip Technology Inc., in other countries.
All other trademarks mentioned herein are property of their respective companies.
DS50002709A-page 64
© 2017 Microchip Technology Inc.
SAMA5D2-PTC-EK
©
2017, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved.
ISBN: 978-1-5224-2416-1
Quality Management System Certified by DNV
ISO/TS 16949
Microchip received ISO/TS-16949:2009 certification for its worldwide headquarters, design and wafer
fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California
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DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design and manufacture of development
systems is ISO 9001:2000 certified.
DS50002709A-page 65
© 2017 Microchip Technology Inc.
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Tel: 86-10-8569-7000
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Tel: 86-28-8665-5511
China - Chongqing
Tel: 86-23-8980-9588
China - Dongguan
Tel: 86-769-8702-9880
China - Guangzhou
Tel: 86-20-8755-8029
China - Hangzhou
Tel: 86-571-8792-8115
China - Hong Kong SAR
Tel: 852-2943-5100
China - Nanjing
Tel: 91-20-4121-0141
Japan - Osaka
Fax: 45-4485-2829
Finland - Espoo
Tel: 81-6-6152-7160
Japan - Tokyo
Tel: 358-9-4520-820
France - Paris
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Atlanta
Tel: 81-3-6880- 3770
Korea - Daegu
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Germany - Garching
Tel: 49-8931-9700
Duluth, GA
Tel: 82-53-744-4301
Korea - Seoul
Tel: 678-957-9614
Fax: 678-957-1455
Austin, TX
Tel: 82-2-554-7200
Malaysia - Kuala Lumpur
Tel: 60-3-7651-7906
Malaysia - Penang
Tel: 60-4-227-8870
Philippines - Manila
Tel: 63-2-634-9065
Singapore
Germany - Haan
Tel: 49-2129-3766400
Germany - Heilbronn
Tel: 49-7131-67-3636
Germany - Karlsruhe
Tel: 49-721-625370
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Germany - Rosenheim
Tel: 49-8031-354-560
Israel - Ra’anana
Tel: 512-257-3370
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Tel: 86-25-8473-2460
China - Qingdao
Tel: 86-532-8502-7355
China - Shanghai
Itasca, IL
Tel: 86-21-3326-8000
China - Shenyang
Tel: 86-24-2334-2829
China - Shenzhen
Tel: 86-755-8864-2200
Tel: 65-6334-8870
Taiwan - Hsin Chu
Tel: 886-3-577-8366
Taiwan - Kaohsiung
Tel: 886-7-213-7830
Taiwan - Taipei
Tel: 630-285-0071
Fax: 630-285-0075
Dallas
Addison, TX
Tel: 972-9-744-7705
Italy - Milan
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
China - Suzhou
Tel: 86-186-6233-1526
Tel: 886-2-2508-8600
Thailand - Bangkok
Tel: 66-2-694-1351
Tel: 39-0331-742611
Fax: 39-0331-466781
Italy - Padova
China - Wuhan
Tel: 86-27-5980-5300
China - Xian
Novi, MI
Tel: 248-848-4000
Houston, TX
Vietnam - Ho Chi Minh
Tel: 39-049-7625286
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Norway - Trondheim
Tel: 47-7289-7561
Tel: 86-29-8833-7252
China - Xiamen
Tel: 84-28-5448-2100
Tel: 281-894-5983
Indianapolis
Tel: 86-592-2388138
China - Zhuhai
Noblesville, IN
Tel: 86-756-3210040
Tel: 317-773-8323
Fax: 317-773-5453
Tel: 317-536-2380
Los Angeles
Poland - Warsaw
Tel: 48-22-3325737
Romania - Bucharest
Tel: 40-21-407-87-50
Spain - Madrid
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Tel: 949-462-9523
Fax: 949-462-9608
Tel: 951-273-7800
Raleigh, NC
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
Sweden - Gothenberg
Tel: 46-31-704-60-40
Sweden - Stockholm
Tel: 46-8-5090-4654
UK - Wokingham
Tel: 919-844-7510
New York, NY
Tel: 631-435-6000
San Jose, CA
Tel: 408-735-9110
Tel: 408-436-4270
Canada - Toronto
Tel: 905-695-1980
Fax: 905-695-2078
Tel: 44-118-921-5800
Fax: 44-118-921-5820
DS50002709A-page 66
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