28C16A-20/P [MICROCHIP]
16K (2K x 8) CMOS EEPROM; 16K ( 2K ×8 )的CMOS EEPROM型号: | 28C16A-20/P |
厂家: | MICROCHIP |
描述: | 16K (2K x 8) CMOS EEPROM |
文件: | 总10页 (文件大小:126K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
Obsolete Device
28C16A
16K (2K x 8) CMOS EEPROM
FEATURES
PACKAGE TYPES
A7
A6
• 1
2
24 Vcc
23 A8
• Fast Read Access Time—150 ns
• CMOS Technology for Low Power Dissipation
- 30 mA Active
A6
A5
A4
A3
A2
A1 10
A0 11
NC 12
I/O0 13
5
6
7
8
9
29 A8
28 A9
A5
3
22 A9
A4
4
21 WE
20 OE
19 A10
18 CE
17 I/O7
16 I/O6
15 I/O5
14 I/O4
13 I/O3
27 NC
26 NC
25 OE
24 A10
23 CE
22 I/O7
21 I/O6
A3
5
- 100 µA Standby
A2
6
• Fast Byte Write Time—200 µs or 1 ms
• Data Retention >200 years
• High Endurance - Minimum 104 Erase/Write Cycles
• Automatic Write Operation
- Internal Control Timer
A1
7
A0
8
I/O0
I/O1
I/O2
9
10
11
VSS 12
- Auto-Clear Before Write Operation
- On-Chip Address and Data Latches
• Data polling
• Pin 1 indicator on PLCC on top of package
BLOCK DIAGRAM
• Chip Clear Operation
• Enhanced Data Protection
- VCC Detector
- Pulse Filter
- Write Inhibit
• Electronic Signature for Device Identification
• 5-Volt-Only Operation
• Organized 2Kx8 JEDEC Standard Pinout
• 24-pin Dual-In-Line Package
• 32-pin PLCC Package
I/O0
I/O7
V
SS
Data Protection
Circuitry
Chip Enable/
Output Enable
Control Logic
VCC
CE
OE
Input/Output
WE
Auto Erase/Write
Timing
Data
Poll
Buffers
Program Voltage
Generation
• Available for Extended Temperature Ranges:
- Commercial: 0°C to +70°C
- Industrial: -40°C to +85°C
A0
Y
Y Gating
Decoder
L
a
t
c
h
e
s
DESCRIPTION
16K bit
Cell Matrix
X
Decoder
The Microchip Technology Inc. 28C16A is a CMOS 16K
non-volatile electrically Erasable PROM. The 28C16A
is accessed like a static RAM for the read or write
cycles without the need of external components. Dur-
ing a “byte write”, the address and data are latched
internally, freeing the microprocessor address and data
bus for other operations. Following the initiation of
write cycle, the device will go to a busy state and auto-
matically clear and write the latched data using an
internal control timer. To determine when a write cycle
is complete, the 28C16A uses Data polling. Data poll-
ing allows the user to read the location last written to
when the write operation is complete. CMOS design
and processing enables this part to be used in systems
where reduced power consumption and reliability are
required. A complete family of packages is offered to
provide the utmost flexibility in applications.
A10
2004 Microchip Technology Inc.
DS11125J-page 1
28C16A
TABLE 1-1:
Name
PIN FUNCTION TABLE
Function
1.0
ELECTRICAL CHARACTERISTICS
1.1
MAXIMUM RATINGS*
VCC and input voltages w.r.t. VSS....... -0.6V to + 6.25V
Voltage on OE w.r.t. VSS......................-0.6V to +13.5V
Voltage on A9 w.r.t. VSS ......................-0.6V to +13.5V
Output Voltage w.r.t. VSS.................-0.6V to VCC+0.6V
Storage temperature ..........................-65°C to +125°C
Ambient temp. with power applied .......-50°C to +95°C
A0 - A10
CE
Address Inputs
Chip Enable
OE
Output Enable
Write Enable
WE
I/O0 - I/O7 Data Inputs/Outputs
VCC
VSS
NC
+5V Power Supply
*Notice: Stresses above those listed under “Maximum Ratings”
may cause permanent damage to the device. This is a stress rat-
ing only and functional operation of the device at those or any
other conditions above those indicated in the operation listings of
this specification is not implied. Exposure to maximum rating con-
ditions for extended periods may affect device reliability.
Ground
No Connect; No Internal Connection
NU
Not Used; No External Connection is
Allowed
TABLE 1-2:
READ/WRITE OPERATION DC CHARACTERISTICS
VCC = +5V ±10%
Commercial (C): Tamb = 0°C
to +70°C
Industrial
(I): Tamb = -40°C to +85°C
Parameter
Status
Symbol
Min
Max
Units
Conditions
Input Voltages
Logic ‘1’
Logic ‘0;
VIH
VIL
2.0
-0.1
VCC+1
0.8
V
V
Input Leakage
—
—
ILI
-10
—
10
10
µA
VIN = -0.1V to VCC+1
Input Capacitance
CIN
pF
VIN = 0V; Tamb = 25°C;
f = 1 MHz
Output Voltages
Logic ‘1’
Logic ‘0’
VOH
VOL
2.4
V
V
IOH = -400µA
IOL = 2.1 mA
0.45
10
Output Leakage
—
—
ILO
-10
—
µA
VOUT = -0.1V to VCC+0.1V
Output Capacitance
COUT
12
pF
VIN = 0V; Tamb = 25°C;
f = 1 MHz
Power Supply Current,
Active
TTL input
ICC
—
—
30
mA
f = 5 MHz (Note 1)
VCC = 5.5V;
Power Supply Current,
Standby
TTL input
TTL input
CMOS input ICC(S)CMOS
ICC(S)TTL
ICC(S)TTL
2
3
100
mA
mA
µA
CE = VIH (0°C to +70°C)
CE = VIH (-40°C to +85°C)
CE = VCC-0.3 to VCC+1
OE = VCC
Other inputs equal VCC or VSS
Note 1: AC power supply current above 5 MHz; 1 mA/MHz.
DS11125J-page 2
2004 Microchip Technology Inc.
28C16A
TABLE 1-3:
READ OPERATION AC CHARACTERISTICS
AC Testing Waveform:
Output Load:
VIH = 2.4V; VIL = 0.45V; VOH = 2.0V; Vol = 0.8V
1 TTL Load + 100pF
Input Rise and Fall Times: 20 ns
Ambient Temperature:
Commercial (C): Tamb = 0°C to +70°0°C
Industrial (I):
Tamb = -40°C to +85°C
28C16A-15
Sym
28C16A-20
28C16A-25
Parameter
Units
Conditions
Min
Max
Min
Max
Min
Max
Address to Output Delay
CE to Output Delay
tACC
tCE
—
—
—
0
150
150
70
—
—
—
0
200
200
80
—
—
—
0
250
250
100
70
ns
ns
ns
ns
ns
OE = CE = VIL
OE = VIL
OE to Output Delay
tOE
CE = VIL
CE or OE High to Output Float
tOFF
tOH
50
55
Output Hold from CE or OE,
whichever occurs first
0
—
0
—
0
—
Endurance
—
1M
—
1M
—
1M
—
cycles 25°C, Vcc =
5.0V, Block
Mode (Note)
Note: This parameter is not tested but guaranteed by characterization. For endurance estimates in a specific appli-
cation, please consult the Total Endurance Model which can be obtained on our BBS or website.
FIGURE 1-1: READ WAVEFORMS
VIH
Address
Address Valid
VIL
VIH
VIL
CE
tCE(2)
VIH
VIL
OE
tOFF(1,3)
tOH
tOE(2)
VOH
High Z
High Z
Data
WE
Valid Output
VOL
VIH
VIL
tACC
Notes: (1) tOFF is specified for OE or CE, whichever occurs first
(2) OE may be delayed up to t CE - t OE after the falling edge of CE without impact on t
(3) This parameter is sampled and is not 100% tested
CE
2004 Microchip Technology Inc.
DS11125J-page 3
28C16A
TABLE 1-4:
BYTE WRITE AC CHARACTERISTICS
AC Testing Waveform:
Output Load:
Input Rise/Fall Times:
Ambient Temperature:
VIH = 2.4V and VIL = 0.45V; VOH = 2.0V; VOL = 0.8V
1 TTL Load + 100 pF
20 ns
Commercial (C):
Industrial (I):
Tamb
Tamb
=
=
0°C to +70°C
-40°C to +85°C
Parameter
Symbol
Min
Max
Units
Remarks
Address Set-Up Time
Address Hold Time
Data Set-Up Time
Data Hold Time
tAS
tAH
10
50
50
10
100
50
10
10
—
—
—
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
µs
tDS
—
tDH
—
Write Pulse Width
tWPL
tWPH
tOEH
tOES
tDV
—
Note 1
Write Pulse High Time
OE Hold Time
—
—
OE Set-Up Time
—
Data Valid Time
1000
1
Note 2
Write Cycle Time (28C16A)
Write Cycle Time (28C16AF)
tWC
tWC
—
0.5 ms typical
100 µs typical
—
200
Note 1: A write cycle can be initiated be CE or WE going low, whichever occurs last. The data is latched on the pos-
itive edge of CE or WE, whichever occurs first.
2: Data must be valid within 1000ns max. after a write cycle is initiated and must be stable at least until tDH
after the positive edge of WE or CE, whichever occurs first.
FIGURE 1-2: PROGRAMMING WAVEFORMS
VIH
Address
VIL
tAS
tAH
VIH
VIL
tWPL
tDS
CE, WE
Data In
tDH
tDV
VIH
VIL
tOES
VIH
VIL
OE
tOEH
DS11125J-page 4
2004 Microchip Technology Inc.
28C16A
FIGURE 1-3: DATA POLLING WAVEFORMS
VIH
Last Written
Address Valid
Address Valid
Address
CE
VIL
t ACC
VIH
VIL
tCE
t WPH
VIH
VIL
tWPL
WE
tOE
VIH
VIL
OE
tDV
VIH
VIL
Data In
Valid
True Data Out
Data
I/O7 Out
tWC
FIGURE 1-4: CHIP CLEAR WAVEFORMS
V
V
IH
IL
CE
V
H
OE
V
IH
tS
tH
t
W
V
V
IH
IL
WE
t
W
S
= 10ms
= 1µs
t
=
t
H
= 12.0V ±0.5V
H
V
TABLE 1-5:
Mode
SUPPLEMENTARY CONTROL
CE
OE
WE
A9
VCC
I/OI
Chip Clear
VIL
VIL
*
VH
VIL
VIH
VIL
VIH
*
X
VCC
Extra Row Read
Extra Row Write
Note 1: VH = 12.0V±0.5V
A9 = VH
A9 = VH
VCC
VCC
Data Out
Data In
* Pulsed per programming waveforms.
2004 Microchip Technology Inc.
DS11125J-page 5
28C16A
2.4
Write Mode
2.0
DEVICE OPERATION
The Microchip Technology Inc. 28C16A has four basic
modes of operation—read, standby, write inhibit, and
byte write—as outlined in the following table.
The 28C16A has a write cycle similar to that of a Static
RAM. The write cycle is completely self-timed and ini-
tiated by a low going pulse on the WE pin. On the fall-
ing edge of WE, the address information is latched. On
rising edge, the data and the control pins (CE and OE)
are latched.
Operation
CE
OE
WE
I/O
Mode
Read
L
H
H
X
X
L
L
X
X
L
H
X
X
X
H
L
DOUT
High Z
High Z
High Z
High Z
DIN
2.5
Data Polling
Standby
The 28C16A features Data polling to signal the comple-
tion of a byte write cycle. During a write cycle, an
attempted read of the last byte written results in the
data complement of I/O7 (I/O0 to I/O6 are indetermin-
able). After completion of the write cycle, true data is
available. Data polling allows a simple read/compare
operation to determine the status of the chip eliminating
the need for external hardware.
Write Inhibit
Write Inhibit
Write Inhibit
Byte Write
Byte Clear
X
H
Automatic Before Each “Write”
X = Any TTL level.
2.1 Read Mode
2.6
Electronic Signature for Device
Identification
An extra row of 32 bytes of EEPROM memory is avail-
able to the user for device identification. By raising A9
to 12V ±0.5V and using address locations 7EO to 7FF,
the additional bytes can be written to or read from in the
same manner as the regular memory array.
The 28C16A has two control functions, both of which
must be logically satisfied in order to obtain data at the
outputs. Chip enable (CE) is the power control and
should be used for device selection. Output Enable
(OE) is the output control and is used to gate data to the
output pins independent of device selection. Assuming
that addresses are stable, address access time (tACC)
is equal to the delay from CE to output (tCE). Data is
available at the output tOE after the falling edge of OE,
assuming that CE has been low and addresses have
been stable for at least tACC-tOE.
2.7
Chip Clear
All data may be cleared to 1's in a chip clear cycle by
raising OE to 12 volts and bringing the WE and CE
low. This procedure clears all data, except for the extra
row.
2.2
Standby Mode
The 28C16A is placed in the standby mode by applying
a high signal to the CE input. When in the standby
mode, the outputs are in a high impedance state, inde-
pendent of the OE input.
2.3
Data Protection
In order to ensure data integrity, especially during criti-
cal power-up and power-down transitions, the following
enhanced data protection circuits are incorporated:
First, an internal VCC detect (3.3 volts typical) will inhibit
the initiation of non-volatile programming operation
when VCC is less than the VCC detect circuit trip.
Second, there is a WE filtering circuit that prevents WE
pulses of less than 10 ns duration from initiating a write
cycle.
Third, holding WE or CE high or OE low, inhibits a write
cycle during power-on and power-off (VCC).
DS11125J-page 6
2004 Microchip Technology Inc.
28C16A
28C16A Product Identification System
To order or to obtain information, e.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed
sales offices.
28C16A
F
T
–
15
I
/P
Package:
L = Plastic Leaded Chip Carrier (PLCC)
P = Plastic DIP (600 mil)
Temperature
Range:
Blank = 0°C to +70°C
I = -40°C to +85°C
Access Time:
15 150 ns
20 200 ns
25 250 ns
Shipping:
Option:
Device:
Blank Tube
T
Tape and Reel “L” only
Blank = twc = 1ms
F = twc = 200 µs
28C16A 2K x 8 CMOS EEPROM
2004 Microchip Technology Inc.
DS11125J-page 7
28C16A
NOTES:
DS11125J-page 8
2004 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
use or otherwise. Use of Microchip’s products as critical
components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL,
SmartSensor and The Embedded Control Solutions Company
are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,
SmartTel and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2004, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
2004 Microchip Technology Inc.
DS11125J-page 9
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07/12/04
2004 Microchip Technology Inc.
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