27C64-20SO [MICROCHIP]
64K (8K x 8) CMOS EPROM; 64K （ 8K ×8 ） CMOS EPROM
| 型号： | 27C64-20SO |
| 厂家： | 
MICROCHIP |
| 描述： | 64K (8K x 8) CMOS EPROM |
| 文件： | 总10页 (文件大小：127K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Obsolete Device
27C64
64K (8K x 8) CMOS EPROM
FEATURES
PACKAGE TYPES
• High speed performance
DIP/SOIC
- 120 ns access time available
VPP • 1
28 VCC
27 PGM
26 NC
25 A8
24 A9
23 A11
22 OE
21 A10
20 CE
19 O7
18 O6
17 O5
16 O4
15 O3
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
2
• CMOS Technology for low power consumption
- 20 mA Active current
3
4
5
- 100 µA Standby current
6
• Factory programming available
• Auto-insertion-compatible plastic packages
• Auto ID aids automated programming
• Separate chip enable and output enable controls
• High speed “express” programming algorithm
• Organized 8K x 8: JEDEC standard pinouts
- 28-pin Dual-in-line package
7
8
9
10
11
12
13
VSS 14
- 32-pin PLCC Package
- 28-pin SOIC package
PLCC
- Tape and reel
• Available for the following temperature ranges
- Commercial:
- Industrial:
0°C to +70°C
5
-40°C to +85°C
29
A6
A5
A8
A9
6
28
7
27
A4
A11
DESCRIPTION
8
26
A3
A2
NC
OE
9
25
10
The Microchip Technology Inc. 27C64 is a CMOS 64K
bit (electrically) Programmable Read Only Memory.
The device is organized as 8K words by 8 bits (8K
bytes). Accessing individual bytes from an address
transition or from power-up (chip enable pin going low)
is accomplished in less than 120 ns. CMOS design and
processing enables this part to be used in systems
where reduced power consumption and high reliability
are requirements.
24
A1
A0
NC
O0
A10
CE
O7
O6
11
23
12
22
13
21
A complete family of packages is offered to provide the
most flexibility in applications. For surface mount appli-
cations, PLCC or SOIC packaging is available. Tape
and reel packaging is also available for PLCC or SOIC
packages.
2004 Microchip Technology Inc.
DS11107M-page 1
27C64
TABLE 1-1:
Name
PIN FUNCTION TABLE
Function
1.0
ELECTRICAL CHARACTERISTICS
1.1
Maximum Ratings*
VCC and input voltages w.r.t. VSS....... -0.6V to + 7.25V
A0-A12
CE
Address Inputs
Chip Enable
VPP voltage w.r.t. VSS during
programming ..........................................-0.6V to +14V
OE
Output Enable
Program Enable
Programming Voltage
Data Output
Voltage on A9 w.r.t. VSS ......................-0.6V to +13.5V
Output voltage w.r.t. VSS ................-0.6V to VCC +1.0V
Storage temperature ..........................-65°C to +150°C
Ambient temp. with power applied .....-65°C to +125°C
PGM
VPP
O0 - O7
VCC
*Notice: Stresses above those listed under “Maximum Ratings”
may cause permanent damage to the device. This is a stress rat-
ing only and functional operation of the device at those or any
other conditions above those indicated in the operation listings of
this specification is not implied. Exposure to maximum rating con-
ditions for extended periods may affect device reliability.
+5V Power Supply
Ground
VSS
NC
No Connection; No Internal Connec-
tions
NU
Not Used; No External Connection Is
Allowed
TABLE 1-2:
READ OPERATION DC CHARACTERISTICS
VCC = +5V (±10%)
Commercial: Tamb = 0°C to +70°C
Industrial: Tamb = -40°C to +85°C
Parameter
Part*
Status
Symbol
Min
Max Units
Conditions
Input Voltages
all
Logic "1"
Logic "0"
VIH
VIL
2.0
-0.5
VCC+1
0.8
V
V
Input Leakage
all
all
—
ILI
-10
2.4
10
µA VIN = 0 to VCC
Output Voltages
Logic "1"
Logic "0"
VOH
VOL
V
V
IOH = -400 µA
IOL = 2.1 mA
0.45
10
6
Output Leakage
all
all
—
—
ILO
-10
—
µA VOUT = 0V to VCC
Input Capacitance
CIN
pF VIN = 0V; Tamb = 25°C;
f = 1 MHz
Output Capacitance
all
—
COUT
—
12
pF VOUT = 0V; Tamb = 25°C;
f = 1 MHz
Power Supply Current,
Active
C
I
TTL input
TTL input
ICC1
ICC2
—
—
20
25
mA VCC = 5.5V; VPP = VCC;
mA f = 1 MHz; OE = CE = VIL;
IOUT = 0 mA; VIL = -0.1 to 0.8V;
VIH = 2.0 to VCC; Note 1
Power Supply Current,
Standby
C
I
all
TTL input
TTL input
CMOS input
ICC(S)
—
—
—
—
—
2
3
100
mA
mA
µA CE = VCC ± 0.2V
IPP Read Current
VPP Read Voltage
all
all
Read Mode
Read Mode
IPP
VPP
100
VCC-0.7 VCC
µA VPP = 5.5V
V
* Parts: C=Commercial Temperature Range; I =Industrial Temperature Range.
Note 1: Typical active current increases .5 mA per MHz up to operating frequency for all temperature ranges.
DS11107M-page 2
2004 Microchip Technology Inc.
27C64
TABLE 1-3:
READ OPERATION AC CHARACTERISTICS
AC Testing Waveform:
Output Load:
VIH = 2.4V and VIL = 0.45V; VOH = 2.0V VOL = 0.8V
1 TTL Load + 100 pF
Input Rise and Fall Times: 10 ns
Ambient Temperature: Commercial:
Industrial:
Tamb = 0°C to +70°C
Tamb = -40°C to +85°C
27C64-12 27C64-15 27C64-17 27C64-20 27C64-25
Min Max Min Max Min Max Min Max Min Max
Parameter
Sym
Units Conditions
Address to Output Delay tACC
—
—
—
0
120
120
65
—
—
—
0
150
150
70
—
—
—
0
170
170
70
—
—
—
0
200
200
75
—
—
—
0
250
250
100
60
ns CE = OE = VIL
CE to Output Delay
OE to Output Delay
tCE
tOE
ns
ns
ns
OE = VIL
CE = VIL
CE or OE to O/P High
Impedance
tOFF
50
50
50
55
Output Hold from
tOH
0
—
0
—
0
—
0
—
0
—
ns
Address CE or OE,
whichever occurs first
FIGURE 1-1: READ WAVEFORMS
Note 1: tOFF is specified for OE or CE, whichever occurs first.
2: OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE.
3: This parameter is sampled and is not 100% tested.
2004 Microchip Technology Inc.
DS11107M-page 3
27C64
TABLE 1-4:
PROGRAMMING DC CHARACTERISTICS
Ambient Temperature: Tamb = 25°C ± 5°C
VCC = 6.5V ± 0.25V, VPP = VH = 13.0V ± 0.25V
Parameter
Status
Symbol
Min
Max.
Units
Conditions
Input Voltages
Logic”1”
Logic”0”
VIH
VIL
2.0
-0.1
VCC+1
0.8
V
V
Input Leakage
—
ILI
-10
10
µA
VIN = 0V to VCC
Output Voltages
Logic”1”
Logic”0”
VOH
VOL
2.4
—
—
0.45
V
V
IOH = -400 µA
IOL = 2.1 mA
VCC Current, program & verify
VPP Current, program
—
—
—
ICC2
IPP2
VH
—
—
20
25
mA
mA
V
Note 1
Note 1
A9 Product Identification
11.5
12.5
Note 1: VCC must be applied simultaneously or before VPP and removed simultaneously or after VPP.
TABLE 1-5:
PROGRAMMING AC CHARACTERISTICS
for Program, Program Verify
and Program Inhibit Modes
AC Testing Waveform: VIH=2.4V and VIL=0.45V; VOH=2.0V; VOL=0.8V
Ambient Temperature: Tamb=25°C ±5°C
VCC= 6.5V ± 0.25V, VPP = VH = 13.0V ± 0.25V
Parameter
Symbol
Min Max Units
Remarks
Address Set-Up Time
Data Set-Up Time
Data Hold Time
tAS
tDS
2
2
—
—
µs
µs
µs
µs
ns
µs
µs
µs
µs
µs
ns
tDH
2
—
Address Hold Time
Float Delay (2)
tAH
0
—
tDF
0
130
—
VCC Set-Up Time
Program Pulse Width (1)
CE Set-Up Time
tVCS
tPW
tCES
tOES
tVPS
tOE
2
95
2
105
—
100 µs typical
OE Set-Up Time
2
—
VPP Set-Up Time
Data Valid from OE
2
—
—
100
Note 1: For express algorithm, initial programming width tolerance is 100 µs ±5%.
2: This parameter is only sampled and not 100% tested. Output float is defined as the point where data is no
longer driven (see timing diagram).
DS11107M-page 4
2004 Microchip Technology Inc.
27C64
FIGURE 1-2: PROGRAMMING WAVEFORMS (1)
TABLE 1-6:
MODES
Operation Mode
CE
OE
PGM
VPP
A9
O0 - O7
Read
VIL
VIL
VIL
VIH
VIH
VIL
VIL
VIL
VIH
VIL
X
VIH
VIL
VIH
X
VCC
VH
X
X
DOUT
DIN
Program
Program Verify
Program Inhibit
Standby
VH
X
DOUT
VH
X
High Z
X
X
VCC
VCC
VCC
X
High Z
Output Disable
Identity
VIH
VIL
VIH
VIH
X
High Z
VH
Identity Code
X = Don’t Care
For Read operations, if the addresses are stable, the
address access time (tACC) is equal to the delay from
CE to output (tCE). Data is transferred to the output
after a delay from the falling edge of OE (tOE).
1.2
Read Mode
(See Timing Diagrams and AC Characteristics)
Read Mode is accessed when
a) the CE pin is low to power up (enable) the chip
b) the OE pin is low to gate the data to the output
pins
2004 Microchip Technology Inc.
DS11107M-page 5
27C64
1.3
Standby Mode
1.7
Verify
The standby mode is defined when the CE pin is high
(VIH) and a program mode is not defined.
After the array has been programmed it must be veri-
fied to ensure all the bits have been correctly pro-
grammed. This mode is entered when all the following
conditions are met:
When these conditions are met, the supply current will
drop from 20 mA to 100 µA.
a) VCC is at the proper level,
b) VPP is at the proper VH level,
c) the CE line is low,
1.4
Output Enable
This feature eliminates bus contention in microproces-
sor-based systems in which multiple devices may drive
the bus. The outputs go into a high impedance state
when the following condition is true:
d) the PGM line is high, and
e) the OE line is low.
1.8
Inhibit
• The OE and PGM pins are both high.
When programming multiple devices in parallel with dif-
ferent data, only CE or PGM need be under separate
control to each device. By pulsing the CE or PGM line
low on a particular device in conjunction with the PGM
or CE line low, that device will be programmed; all other
devices with CE or PGM held high will not be pro-
grammed with the data, although address and data will
be available on their input pins (i.e., when a high level
is present on CE or PGM); and the device is inhibited
from programming.
1.5
Erase Mode (U.V. Windowed
Versions)
Windowed products offer the capability to erase the
memory array. The memory matrix is erased to the all
1’s state when exposed to ultraviolet light. To ensure
complete erasure, a dose of 15 watt-second/cm2 is
required. This means that the device window must be
placed within one inch and directly underneath an ultra-
violet lamp with a wavelength of 2537 Angstroms,
intensity of 12,000µW/cm2 for approximately 20 min-
utes.
1.9
Identity Mode
In this mode, specific data is output which identifies the
manufacturer as Microchip Technology Inc. and device
type. This mode is entered when Pin A9 is taken to VH
(11.5V to 12.5V). The CE and OE lines must be at VIL.
A0 is used to access any of the two non-erasable bytes
whose data appears on O0 through O7.
1.6
Programming Mode
The Express Algorithm has been developed to improve
the programming throughput times in a production
environment. Up to ten 100-microsecond pulses are
applied until the byte is verified. No overprogramming
is required. A flowchart of the express algorithm is
shown in Figure 1-3.
Pin
Identity
Input
A0
Output
Programming takes place when:
a) VCC is brought to the proper voltage,
b) VPP is brought to the proper VH level,
c) the CE pin is low,
H
e
x
0 O O O O O O O
7
6
5
4
3
2
1
0
d) the OE pin is high, and
Manufacturer
Device Type*
VIL
VIH
0
0
0
0
1
0
0
0
1
0
0
0
0
1
1
0
29
02
e) the PGM pin is low.
* Code subject to change
Since the erased state is “1” in the array, programming
of “0” is required. The address to be programmed is set
via pins A0-A12 and the data to be programmed is pre-
sented to pins O0-O7. When data and address are sta-
ble, OE is high, CE is low and a low-going pulse on the
PGM line programs that location.
DS11107M-page 6
2004 Microchip Technology Inc.
27C64
FIGURE 1-3: PROGRAMMING EXPRESS ALGORITHM
2004 Microchip Technology Inc.
DS11107M-page 7
27C64
27C64 Product Identification System
To order or to obtain information, e.g., on pricing or delivery, please use the listed part numbers, and refer to the factory or the listed
sales offices.
27C64
–
25
I /P
L
P
SO
=
=
=
Plastic Leaded Chip Carrier
Plastic DIP (600 Mil)
Plastic SOIC (300 Mil)
Package:
Temperature Blank
=
=
0°C to +70°C
–40°C to +85°C
Range:
I
12
15
17
20
25
=
=
=
=
=
120 ns
150 ns
170 ns
200 ns
250 ns
Access
Time:
Device:
27C64
64K (8K x 8) CMOS EPROM
DS11107M-page 8
2004 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is intended through suggestion only
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
No representation or warranty is given and no liability is
assumed by Microchip Technology Incorporated with respect
to the accuracy or use of such information, or infringement of
patents or other intellectual property rights arising from such
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components in life support systems is not authorized except
with express written approval by Microchip. No licenses are
conveyed, implicitly or otherwise, under any intellectual
property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL,
SmartSensor and The Embedded Control Solutions Company
are registered trademarks of Microchip Technology
Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,
SmartTel and Total Endurance are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2004, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
2004 Microchip Technology Inc.
DS11107M-page 9
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07/12/04
2004 Microchip Technology Inc.
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