24LC08BT-E/P 概述
8K IC SERIAL EEPROM 8K IC串行EEPROM EEPROM
24LC08BT-E/P 规格参数
是否无铅: | 不含铅 | 是否Rohs认证: | 符合 |
生命周期: | Active | 零件包装代码: | DIP |
包装说明: | 0.300 INCH, ROHS COMPLIANT, PLASTIC, DIP-8 | 针数: | 8 |
Reach Compliance Code: | compliant | ECCN代码: | EAR99 |
HTS代码: | 8542.32.00.51 | 风险等级: | 5.17 |
最大时钟频率 (fCLK): | 0.4 MHz | JESD-30 代码: | R-PDIP-T8 |
JESD-609代码: | e3 | 长度: | 9.27 mm |
内存密度: | 8192 bit | 内存集成电路类型: | EEPROM |
内存宽度: | 8 | 功能数量: | 1 |
端子数量: | 8 | 字数: | 1024 words |
字数代码: | 1000 | 工作模式: | SYNCHRONOUS |
最高工作温度: | 85 °C | 最低工作温度: | -40 °C |
组织: | 1KX8 | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | DIP | 封装形状: | RECTANGULAR |
封装形式: | IN-LINE | 并行/串行: | SERIAL |
峰值回流温度(摄氏度): | NOT SPECIFIED | 认证状态: | Not Qualified |
座面最大高度: | 5.33 mm | 串行总线类型: | I2C |
最大供电电压 (Vsup): | 5.5 V | 最小供电电压 (Vsup): | 1.7 V |
标称供电电压 (Vsup): | 2.5 V | 表面贴装: | NO |
技术: | CMOS | 温度等级: | INDUSTRIAL |
端子面层: | Matte Tin (Sn) | 端子形式: | THROUGH-HOLE |
端子节距: | 2.54 mm | 端子位置: | DUAL |
处于峰值回流温度下的最长时间: | NOT SPECIFIED | 宽度: | 7.62 mm |
最长写入周期时间 (tWC): | 5 ms | Base Number Matches: | 1 |
24LC08BT-E/P 数据手册
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PDF下载24AA08/24LC08B
8K I2C™ Serial EEPROM
Description:
Device Selection Table
The Microchip Technology Inc. 24AA08/24LC08B
(24XX08*) is a 8 Kbit Electrically Erasable PROM. The
device is organized as four blocks of 256 x 8-bit
memory with a 2-wire serial interface. Low voltage
design permits operation down to 1.8V, with standby
and active currents of only 1 μA and 1 mA,
Part
Number
VCC
Range
Max Clock
Frequency
Temp
Ranges
24AA08
1.8-5.5
2.5-5.5
400 kHz(1)
400 kHz
I
24LC08B
I, E
Note 1: 100 kHz for VCC <2.5V
respectively. The 24XX08 also has a page write
capability for up to 16 bytes of data. The 24XX08 is
available in the standard 8-pin PDIP, surface mount
SOIC, TSSOP, 2x3 DFN and MSOP packages, and is
also available in the 5-lead SOT-23 package.
Features:
• Single supply with operation down to 1.8V
• Low-power CMOS technology:
- 1 mA active current, typical
Block Diagram
- 1 μA standby current, typical (I-temp)
• Organized as 4 blocks of 256 bytes (4 x 256 x 8)
• 2-wire serial interface bus, I2C™ compatible
• Schmitt Trigger inputs for noise suppression
• Output slope control to eliminate ground bounce
• 100 kHz (<2.5V) and 400 kHz (≥2.5V) compatibility
• Self-timed write cycle (including auto-erase)
• Page write buffer for up to 16 bytes
• 2 ms typical write cycle time for page write
• Hardware write-protect for entire memory
• Can be operated as a serial ROM
HV
Generator
WP
I/O
Control
Logic
Memory
Control
Logic
EEPROM
Array
XDEC
Page
Latches
I/O
SCL
YDEC
SDA
• Factory programming (QTP) available
• ESD protection > 4,000V
Sense Amp.
R/W Control
VCC
VSS
• 1,000,000 erase/write cycles
Package Types
• Data retention > 200 years
SOIC, TSSOP
• 8-lead PDIP, SOIC, TSSOP, DFN and MSOP
packages
PDIP, MSOP
A0
1
8
VCC
1
8
7
6
5
A0
A1
A2
VCC
WP
• 5-lead SOT-23 package
2
3
4
A1
A2
2
3
4
7
6
5
WP
• Standard and Pb-free finishes available
• Available for extended temperature ranges:
- Industrial (I): -40°C to +85°C
SCL
SCL
SDA
VSS
SDA VSS
- Automotive (E): -40°C to +125°C
SOT-23-5
DFN
1
VCC
WP
A0
8
7
6
5
WP
Vcc
1
5
4
SCL
2
3
4
A1
SCL
SDA
2
3
A2
VSS
Vss
SDA
Note:
Pins A0, A1 and A2 are not used by the 24XX08. (No
internal connections).
*24XX08 is used in this document as a generic part
number for the 24AA08/24LC08B devices.
© 2005 Microchip Technology Inc.
DS21710D-page 1
24AA08/24LC08B
Package TypeElectrical Characteristics
(†)
Absolute Maximum Ratings
VCC.............................................................................................................................................................................6.5V
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.3V to VCC +1.0V
Storage temperature ...............................................................................................................................-65°C to +150°C
Ambient temperature with power applied................................................................................................-65°C to +125°C
ESD protection on all pins ......................................................................................................................................................≥ 4 kV
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional operation of the device at those or any other conditions
above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating
conditions for extended periods may affect device reliability.
TABLE 1-1:
DC CHARACTERISTICS
VCC = +1.8V to +5.5V
DC CHARACTERISTICS
Industrial (I):
TA = -40°C to +85°C
Automotive (E): TA = -40°C to +125°C
Param.
Symbol
No.
Characteristic
Min
Typ
Max
Units
Conditions
D1
D2
D3
D4
VIH
—
WP, SCL and SDA pins
High-level input voltage
Low-level input voltage
—
—
—
—
—
—
—
—
V
—
0.7 VCC
—
—
VIL
0.3 VCC
—
V
—
VHYS
Hysteresis of Schmitt
Trigger inputs
0.05 VCC
V
(Note)
D5
D6
D7
D8
VOL
ILI
Low-level output voltage
Input leakage current
Output leakage current
—
—
—
—
—
—
—
—
0.40
±1
V
IOL = 3.0 mA, VCC = 2.5V
VIN = .1V to VCC
μA
μA
pF
ILO
±1
VOUT = .1V to VCC
CIN,
Pin capacitance
10
VCC = 5.0V (Note)
COUT
(all inputs/outputs)
TA = 25°C, FCLK = 1 MHz
D9
ICC write Operating current
—
—
0.1
3
1
mA
mA
VCC = 5.5V, SCL = 400 kHz
—
D10
D11
ICC read
0.05
ICCS
Standby current
—
—
0.01
—
1
5
μA
μA
Industrial
Automotive
SDA = SCL = VCC
WP = VSS
Note:
This parameter is periodically sampled and not 100% tested.
DS21710D-page 2
© 2005 Microchip Technology Inc.
24AA08/24LC08B
TABLE 1-2:
AC CHARACTERISTICS
VCC = +1.8V to +5.5V
AC CHARACTERISTICS
Industrial (I):
TA = -40°C to +85°C
Automotive (E):
TA = -40°C to +125°C
Param.
Symbol
No.
Characteristic
Clock frequency
Min
Typ
Max
Units
Conditions
1
2
3
4
FCLK
THIGH
TLOW
TR
—
—
—
—
400
100
kHz 2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA08)
Clock high time
Clock low time
600
4000
—
—
—
—
ns
ns
ns
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA08)
1300
4700
—
—
—
—
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA08)
2.5V ≤ VCC ≤ 5.5V (Note 1)
1.8V ≤ VCC < 2.5V (24AA08)
(Note 1)
SDA and SCL rise time
(Note 1)
—
—
—
—
300
1000
5
TF
SDA and SCL fall time
—
—
—
300
ns
ns
ns
ns
ns
ns
ns
ns
(Note 1)
6
THD:STA Start condition hold time
600
4000
—
—
—
—
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA08)
7
TSU:STA Start condition setup
time
600
4700
—
—
—
—
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA08)
(Note 2)
8
THD:DAT Data input hold time
0
—
—
—
9
TSU:DAT Data input setup time
100
250
—
—
—
—
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA08)
10
11
12
TSU:STO Stop condition setup
time
600
4000
—
—
—
—
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA08)
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA08)
TAA
Output valid from clock
(Note 2)
—
—
—
—
900
3500
TBUF
Bus free time: Time the
bus must be free before
a new transmission can
start
1300
4700
—
—
—
—
2.5V ≤ VCC ≤ 5.5V
1.8V ≤ VCC < 2.5V (24AA08)
13
14
TOF
TSP
Output fall time from VIH 20+0.1CB
—
—
250
250
ns
ns
2.5V ≤ VCC ≤ 5.5V
minimum to VIL
maximum
—
1.8V ≤ VCC < 2.5V (24AA08)
Input filter spike
suppression
—
—
50
(Notes 1 and 3)
(SDA and SCL pins)
15
16
TWC
—
Write cycle time (byte or
page)
—
—
—
5
ms
—
Endurance
1M
—
cycles 25°C, (Note 4)
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved
noise spike suppression. This eliminates the need for a TI specification for standard operation.
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific
application, please consult the Total Endurance™ Model which can be obtained from Microchip’s web site:
www.microchip.com.
© 2005 Microchip Technology Inc.
DS21710D-page 3
24AA08/24LC08B
FIGURE 1-1: BUS TIMING DATA
5
4
2
3
SCL
7
14
8
9
10
6
SDA
IN
12
11
SDA
OUT
FIGURE 1-2: BUS TIMING START/STOP
D4
SCL
6
7
10
SDA
Start
Stop
DS21710D-page 4
© 2005 Microchip Technology Inc.
24AA08/24LC08B
3.4
Data Valid (D)
2.0
FUNCTIONAL DESCRIPTION
The state of the data line represents valid data when,
after a Start condition, the data line is stable for the
duration of the high period of the clock signal.
The 24XX08 supports a bidirectional, 2-wire bus and
data transmission protocol. A device that sends data
onto the bus is defined as a transmitter, while a device
receiving data is defined as a receiver. The bus has to
be controlled by a master device which generates the
Serial Clock (SCL), controls the bus access and
generates the Start and Stop conditions, while the
24XX08 works as slave. Both master and slave can
operate as transmitter or receiver, but the master
device determines which mode is activated.
The data on the line must be changed during the low
period of the clock signal. There is one clock pulse per
bit of data.
Each data transfer is initiated with a Start condition and
terminated with a Stop condition. The number of the
data bytes transferred between the Start and Stop
conditions is determined by the master device and is
theoretically unlimited, although only the last sixteen
will be stored when doing a write operation. When an
overwrite does occur it will replace data in a first-in first-
out (FIFO) fashion.
3.0
BUS CHARACTERISTICS
The following bus protocol has been defined:
• Data transfer may be initiated only when the bus
is not busy.
3.5
Acknowledge
• During data transfer, the data line must remain
stable whenever the clock line is high. Changes in
the data line while the clock line is high will be
interpreted as a Start or Stop condition.
Each receiving device, when addressed, is obliged to
generate an acknowledge after the reception of each
byte. The master device must generate an extra clock
pulse which is associated with this Acknowledge bit.
Accordingly, the following bus conditions have been
defined (Figure 2-1).
Note:
The 24XX08 does not generate any
Acknowledge bits if an internal program-
ming cycle is in progress.
3.1
Bus Not Busy (A)
The device that acknowledges, has to pull down the
SDA line during the acknowledge clock pulse in such a
way that the SDA line is stable low during the high
period of the acknowledge related clock pulse. Of
course, setup and hold times must be taken into
account. During reads, a master must signal an end of
data to the slave by not generating an Acknowledge bit
on the last byte that has been clocked out of the slave.
In this case, the slave (24XX08) will leave the data line
high to enable the master to generate the Stop
condition.
Both data and clock lines remain high.
3.2
Start Data Transfer (B)
A high-to-low transition of the SDA line while the clock
(SCL) is high determines a Start condition. All
commands must be preceded by a Start condition.
3.3
Stop Data Transfer (C)
A low-to-high transition of the SDA line while the clock
(SCL) is high determines a Stop condition. All
operations must be ended with a Stop condition.
FIGURE 3-1:
DATA TRANSFER SEQUENCE ON THE SERIAL BUS
(A)
(B)
(D)
(D)
(C) (A)
SCL
SDA
Start
Condition
Stop
Condition
Address or
Acknowledge
Valid
Data
Allowed
to Change
© 2005 Microchip Technology Inc.
DS21710D-page 5
24AA08/24LC08B
FIGURE 3-2:
CONTROL BYTE
ALLOCATION
3.6
Device Addressing
A control byte is the first byte received following the
Start condition from the master device (Figure 2-2).
The control byte consists of a four-bit control code. For
the 24XX08, this is set as ‘1010’ binary for read and
write operations. The next three bits of the control byte
are the block-select bits (B2, B1, B0). B2 is a “don’t
care” for the 24XX08. They are used by the master
device to select which of the four 256 word-blocks of
memory are to be accessed. These bits are in effect the
three Most Significant bits of the word address.
Start
Read/Write
A
SLAVE ADDRESS
R/W
1
0
1
0
x
B1
B0
x = “don’t care”
The last bit of the control byte defines the operation to
be performed. When set to ‘1’ a read operation is
selected. When set to ‘0’ a write operation is selected.
Following the Start condition, the 24XX08 monitors the
SDA bus, checking the device type identifier being
transmitted and, upon receiving a ‘1010’ code, the
slave device outputs an Acknowledge signal on the
SDA line. Depending on the state of the R/W bit, the
24XX08 will select a read or write operation.
Control
Code
Operation
Block Select
R/W
Read
Write
Block Address
Block Address
1010
1010
1
0
DS21710D-page 6
© 2005 Microchip Technology Inc.
24AA08/24LC08B
4.2
Page Write
4.0
4.1
WRITE OPERATION
Byte Write
The write control byte, word address and the first data
byte are transmitted to the 24XX08 in the same way as
in a byte write. However, instead of generating a Stop
condition, the master transmits up to 16 data bytes to
the 24XX08, which are temporarily stored in the on-
chip page buffer and will be written into memory once
the master has transmitted a Stop condition. Upon
receipt of each word, the four lower-order address
pointer bits are internally incremented by ‘1’. The
higher-order 7 bits of the word address remain
constant. If the master should transmit more than 16
words prior to generating the Stop condition, the
address counter will roll over and the previously
received data will be overwritten. As with the byte write
operation, once the Stop condition is received an
internal write cycle will begin (Figure 3-2).
Following the Start condition from the master, the
device code (4 bits), the block address (3 bits) and the
R/W bit, which is a logic-low, is placed onto the bus by
the master transmitter. This indicates to the addressed
slave receiver that a byte with a word address will
follow once it has generated an Acknowledge bit during
the ninth clock cycle. Therefore, the next byte transmit-
ted by the master is the word address and will be
written into the address pointer of the 24XX08. After
receiving another Acknowledge signal from the
24XX08, the master device will transmit the data word
to be written into the addressed memory location. The
24XX08 acknowledges again and the master
generates a Stop condition. This initiates the internal
write cycle and, during this time, the 24XX08 will not
generate Acknowledge signals (Figure 3-1).
Note:
Page write operations are limited to writing
bytes within a single physical page,
regardless of the number of bytes
actually being written. Physical page
boundaries start at addresses that are
integer multiples of the page buffer size (or
‘page-size’) and end at addresses that are
integer multiples of [page size – 1]. If a
Page Write command attempts to write
across a physical page boundary, the
result is that the data wraps around to the
beginning of the current page (overwriting
data previously stored there), instead of
being written to the next page, as might be
expected. It is therefore necessary for the
application software to prevent page write
operations that would attempt to cross a
page boundary.
FIGURE 4-1: BYTE WRITE
S
S
T
T
A
R
T
BUS ACTIVITY
MASTER
Control
Byte
Word
Address
O
P
Data
SDA LINE
S
P
A
C
K
A
C
K
A
C
K
BUS ACTIVITY
FIGURE 4-2: PAGE WRITE
S
S
T
T
A
R
T
BUS ACTIVITY
MASTER
Control
Byte
Word
Address (n)
O
P
Data (n)
Data (n + 1)
Data (n + 15)
SDA LINE
S
P
A
C
K
A
A
C
K
A
C
K
A
C
C
BUS ACTIVITY
K
K
© 2005 Microchip Technology Inc.
DS21710D-page 7
24AA08/24LC08B
5.0
ACKNOWLEDGE POLLING
6.0
WRITE PROTECTION
Since the device will not acknowledge during a write
cycle, this can be used to determine when the cycle is
complete (this feature can be used to maximize bus
throughput). Once the Stop condition for a Write
command has been issued from the master, the device
initiates the internally-timed write cycle and ACK polling
can then be initiated immediately. This involves the
master sending a Start condition followed by the control
byte for a Write command (R/W = 0). If the device is still
busy with the write cycle, no ACK will be returned. If the
cycle is complete, the device will return the ACK and
the master can then proceed with the next Read or
Write command. See Figure 4-1 for a flow diagram of
this operation.
The 24XX08 can be used as a serial ROM when the
WP pin is connected to VCC. Programming will be
inhibited and the entire memory will be write-protected.
FIGURE 5-1:
ACKNOWLEDGE POLLING
FLOW
Send
Write Command
Send Stop
Condition to
Initiate Write Cycle
Send Start
Send Control Byte
with R/W = 0
Did Device
Acknowledge
(ACK = 0)?
No
Yes
Next
Operation
DS21710D-page 8
© 2005 Microchip Technology Inc.
24AA08/24LC08B
7.3
Sequential Read
7.0
READ OPERATION
Sequential reads are initiated in the same way as a
random read, except that once the 24XX08 transmits
the first data byte, the master issues an acknowledge
as opposed to a Stop condition in a random read. This
directs the 24XX08 to transmit the next sequentially-
addressed 8-bit word (Figure 6-3).
Read operations are initiated in the same way as write
operations, with the exception that the R/W bit of the
slave address is set to ‘1’. There are three basic types
of read operations: current address read, random read
and sequential read.
7.1
Current Address Read
To provide sequential reads, the 24XX08 contains an
internal address pointer that is incremented by one
upon completion of each operation. This address
pointer allows the entire memory contents to be serially
read during one operation.
The 24XX08 contains an address counter that main-
tains the address of the last word accessed, internally
incremented by ‘1’. Therefore, if the previous access
(either a read or write operation) was to address n, the
next current address read operation would access data
from address n + 1. Upon receipt of the slave address
with R/W bit set to ‘1’, the 24XX08 issues an acknowl-
edge and transmits the 8-bit data word. The master will
not acknowledge the transfer but does generate a Stop
condition and the 24XX08 discontinues transmission
(Figure 6-1).
7.4
Noise Protection
The 24XX08 employs a VCC threshold detector circuit
which disables the internal erase/write logic if the VCC
is below 1.5V at nominal conditions.
The SCL and SDA inputs have Schmitt Trigger and
filter circuits which suppress noise spikes to assure
proper device operation, even on a noisy bus.
7.2
Random Read
Random read operations allow the master to access
any memory location in a random manner. To perform
this type of read operation, the word address must first
be set. This is accomplished by sending the word
address to the 24XX08 as part of a write operation.
Once the word address is sent, the master generates a
Start condition following the acknowledge. This
terminates the write operation, but not before the
internal address pointer is set. The master then issues
the control byte again, but with the R/W bit set to a ‘1’.
The 24XX08 will then issue an acknowledge and trans-
mit the 8-bit data word. The master will not acknowl-
edge the transfer but does generate a Stop condition
and the 24XX08 will discontinue transmission
(Figure 6-2).
FIGURE 7-1:
CURRENT ADDRESS READ
S
BUS ACTIVITY
MASTER
T
A
R
Control
Byte
S
T
Data (n)
O
P
T
SDA LINE
S
P
A
C
K
N
O
BUS ACTIVITY
A
C
K
© 2005 Microchip Technology Inc.
DS21710D-page 9
24AA08/24LC08B
FIGURE 7-2:
RANDOM READ
S
S
T
A
R
T
T
A
R
T
S
T
BUS ACTIVITY
MASTER
Control
Byte
Word
Address (n)
Control
Byte
Data (n)
O
P
S
P
S
SDA LINE
A
C
K
A
C
K
A
C
K
N
O
BUS ACTIVITY
A
C
K
FIGURE 7-3:
SEQUENTIAL READ
S
T
BUS ACTIVITY
MASTER
Control
Byte
O
P
Data (n)
Data (n + 1)
Data (n + 2)
Data (n + X)
SDA LINE
P
A
C
K
A
A
A
C
K
N
O
C
C
BUS ACTIVITY
K
K
A
C
K
DS21710D-page 10
© 2005 Microchip Technology Inc.
24AA08/24LC08B
8.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 7-1.
TABLE 8-1:
Name
PIN FUNCTION TABLE
PDIP
SOIC
TSSOP
DFN
MSOP
SOT-23
Description
Not Connected
A0
A1
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
—
—
—
2
Not Connected
A2
Not Connected
VSS
SDA
SCL
WP
VCC
Ground
3
Serial Address/Data I/O
Serial Clock
1
5
Write-Protect Input
+1.8V to 5.5V Power Supply
4
8.1
Serial Address/Data Input/Output
(SDA)
8.3
Write-Protect (WP)
The WP pin must be connected to either VSS or VCC.
SDA is a bidirectional pin used to transfer addresses
and data into and out of the device. Since it is an open-
drain terminal, the SDA bus requires a pull-up resistor
to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for 400 kHz).
If tied to VSS, normal memory operation is enabled
(read/write the entire memory 00-03FFH).
If tied to VCC, write operations are inhibited. The entire
memory will be write-protected. Read operations are
not affected.
For normal data transfer, SDA is allowed to change
only during SCL low. Changes during SCL high are
reserved for indicating Start and Stop conditions.
This feature allows the user to use the 24XX08 as a
serial ROM when WP is enabled (tied to VCC).
8.2
Serial Clock (SCL)
8.4
A0, A1, A2
The SCL input is used to synchronize the data transfer
to and from the device.
The A0, A1 and A2 pins are not used by the 24XX08.
They may be left floating or tied to either VSS or VCC.
© 2005 Microchip Technology Inc.
DS21710D-page 11
24AA08/24LC08B
9.0
9.1
PACKAGING INFORMATION
Package Marking Information
Example:
8-Lead PDIP (300 mil)
24LC08B
I/P13F
XXXXXXXX
T/XXXNNN
0527
YYWW
Example:
8-Lead SOIC (150 mil)
24LC08B
I/SN0527
XXXXXXXX
T/XXYYWW
13F
NNN
Example:
8-Lead TSSOP
4L08
XXXX
TYWW
NNN
I527
13F
TSSOP/MSOP
Marking Codes
Device
Example:
8-Lead MSOP
STD
Pb-free
24AA08
4A08
4L08
G4A8
G4L8
XXXXXT
4L08BI
24LC08B
YWWNNN
Y52713F
Example:
5-Lead SOT-23
SOT-23
Marking Codes
Device
STD
Pb-free
24AA08
24LC08B-I
24LC08B-E
B4
M4
N4
B4
M4
N4
XXNN
M43F
Note:
Pb-free part number using “G”
suffix is marked on carton
DS21710D-page 12
© 2005 Microchip Technology Inc.
24AA08/24LC08B
8-Lead 2x3 DFN
Example:
XXX
YWW
NN
244
527
13
Legend: XX...X Part number or part number code
T
Temperature (I, E)
Y
Year code (last digit of calendar year)
YY
WW
NNN
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code (2 characters for small packages)
Pb-free JEDEC designator for Matte Tin (Sn)
e
3
Note:
For very small packages with no room for the Pb-free JEDEC designator
, the marking will only appear on the outer carton or reel label.
e
3
Note: In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
Note:
Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.
*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.
© 2005 Microchip Technology Inc.
DS21710D-page 13
24AA08/24LC08B
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)
E1
D
2
n
1
α
E
A2
A
L
c
A1
β
B1
B
p
eB
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
8
.100
.155
.130
2.54
Top to Seating Plane
A
.140
.170
3.56
2.92
3.94
3.30
4.32
Molded Package Thickness
Base to Seating Plane
Shoulder to Shoulder Width
Molded Package Width
Overall Length
A2
A1
E
.115
.015
.300
.240
.360
.125
.008
.045
.014
.310
5
.145
3.68
0.38
7.62
6.10
9.14
3.18
0.20
1.14
0.36
7.87
5
.313
.250
.373
.130
.012
.058
.018
.370
10
.325
.260
.385
.135
.015
.070
.022
.430
15
7.94
6.35
9.46
3.30
0.29
1.46
0.46
9.40
10
8.26
6.60
9.78
3.43
0.38
1.78
0.56
10.92
15
E1
D
Tip to Seating Plane
Lead Thickness
L
c
Upper Lead Width
B1
B
Lower Lead Width
Overall Row Spacing
Mold Draft Angle Top
Mold Draft Angle Bottom
§
eB
α
β
5
10
15
5
10
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-001
Drawing No. C04-018
DS21710D-page 14
© 2005 Microchip Technology Inc.
24AA08/24LC08B
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)
E
E1
p
D
2
B
n
1
h
α
45°
c
A2
A
φ
β
L
A1
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
MAX
n
p
Number of Pins
Pitch
8
8
.050
.061
.056
.007
.237
.154
.193
.015
.025
4
1.27
1.55
1.42
0.18
6.02
3.91
4.90
0.38
0.62
4
Overall Height
A
.053
.069
1.35
1.75
Molded Package Thickness
Standoff
A2
A1
E
.052
.004
.228
.146
.189
.010
.019
0
.061
.010
.244
.157
.197
.020
.030
8
1.32
0.10
5.79
3.71
4.80
0.25
0.48
0
1.55
0.25
6.20
3.99
5.00
0.51
0.76
8
§
Overall Width
Molded Package Width
Overall Length
E1
D
Chamfer Distance
Foot Length
h
L
φ
Foot Angle
c
Lead Thickness
Lead Width
.008
.013
0
.009
.017
12
.010
.020
15
0.20
0.33
0
0.23
0.42
12
0.25
0.51
15
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
12
15
0
12
15
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MS-012
Drawing No. C04-057
© 2005 Microchip Technology Inc.
DS21710D-page 15
24AA08/24LC08B
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)
E
E1
p
D
2
1
n
B
α
A
c
A1
A2
φ
β
L
Units
INCHES
NOM
MILLIMETERS*
Dimension Limits
MIN
MAX
MIN
NOM
8
MAX
n
p
Number of Pins
Pitch
8
.026
0.65
Overall Height
A
.043
1.10
0.95
0.15
6.50
4.50
3.10
0.70
8
Molded Package Thickness
Standoff
A2
A1
E
.033
.035
.004
.251
.173
.118
.024
4
.037
.006
.256
.177
.122
.028
8
0.85
0.05
0.90
0.10
6.38
4.40
3.00
0.60
4
§
.002
.246
.169
.114
.020
0
Overall Width
6.25
4.30
2.90
0.50
0
Molded Package Width
Molded Package Length
Foot Length
E1
D
L
φ
Foot Angle
c
Lead Thickness
.004
.007
0
.006
.010
5
.008
.012
10
0.09
0.19
0
0.15
0.25
5
0.20
0.30
10
Lead Width
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
5
10
0
5
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.005” (0.127mm) per side.
JEDEC Equivalent: MO-153
Drawing No. C04-086
DS21710D-page 16
© 2005 Microchip Technology Inc.
24AA08/24LC08B
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)
E
E1
p
D
2
B
n
1
α
A2
A
c
φ
A1
(F)
L
β
Units
Dimension Limits
INCHES
NOM
MILLIMETERS*
MIN
MAX
MIN
NOM
MAX
n
p
Number of Pins
Pitch
8
8
.026 BSC
0.65 BSC
Overall Height
A
A2
A1
E
-
-
.043
-
-
1.10
Molded Package Thickness
Standoff
.030
.033
.037
0.75
0.00
0.85
-
0.95
0.15
.000
-
.006
Overall Width
.193 TYP.
4.90 BSC
Molded Package Width
Overall Length
Foot Length
E1
D
.118 BSC
.118 BSC
3.00 BSC
3.00 BSC
L
.016
.024
.037 REF
.031
0.40
0.60
0.95 REF
0.80
Footprint (Reference)
Foot Angle
F
φ
c
0°
.003
.009
5°
-
8°
.009
.016
15°
0°
0.08
0.22
5°
-
-
-
-
-
8°
0.23
0.40
15°
Lead Thickness
Lead Width
.006
B
α
β
.012
Mold Draft Angle Top
Mold Draft Angle Bottom
*Controlling Parameter
Notes:
-
-
5°
15°
5°
15°
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not
exceed .010" (0.254mm) per side.
JEDEC Equivalent: MO-187
Drawing No. C04-111
© 2005 Microchip Technology Inc.
DS21710D-page 17
24AA08/24LC08B
5-Lead Plastic Small Outline Transistor (OT) (SOT-23)
E
E1
p
B
p1
D
n
1
α
c
A
A2
φ
A1
L
β
Units
INCHES*
NOM
MILLIMETERS
Dimension Limits
MIN
MAX
MIN
NOM
5
MAX
n
p
Number of Pins
5
Pitch
.038
.075
.046
.043
.003
.110
.064
.116
.018
5
0.95
1.90
p1
Outside lead pitch (basic)
Overall Height
A
A2
A1
E
.035
.035
.000
.102
.059
.110
.014
0
.057
0.90
0.90
1.18
1.10
0.08
2.80
1.63
2.95
0.45
5
1.45
Molded Package Thickness
.051
.006
.118
.069
.122
.022
10
1.30
0.15
3.00
1.75
3.10
0.55
10
Standoff
§
0.00
2.60
1.50
2.80
0.35
0
Overall Width
Molded Package Width
Overall Length
E1
D
Foot Length
L
φ
Foot Angle
c
Lead Thickness
Lead Width
.004
.014
0
.006
.017
5
.008
.020
10
0.09
0.35
0
0.15
0.43
5
0.20
0.50
10
B
α
β
Mold Draft Angle Top
Mold Draft Angle Bottom
0
5
10
0
5
10
* Controlling Parameter
§ Significant Characteristic
Notes:
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed
.010” (0.254mm) per side.
JEDEC Equivalent: MO-178
Drawing No. C04-091
DS21710D-page 18
© 2005 Microchip Technology Inc.
24AA08/24LC08B
8-Lead Plastic Dual Flat No Lead Package (MC) 2x3x0.9 mm Body (DFN) – Saw Singulated
p
D
b
n
L
E
E2
EXPOSED
METAL
PAD
2
1
PIN 1
ID INDEX
AREA
D2
(NOTE 2)
BOTTOM VIEW
TOP VIEW
A
A1
A3
EXPOSED
TIE BAR
(NOTE 1)
Units
Dimension Limits
INCHES
NOM
8
MILLIMETERS*
NOM
MIN
MAX
MIN
MAX
n
p
Number of Pins
Pitch
8
.020 BSC
0.50 BSC
0.90
Overall Height
Standoff
A
A1
A3
D
.031
.035
.001
.008 REF.
.039
.002
0.80
0.00
1.00
.000
0.02
0.05
Contact Thickness
Overall Length
0.20 REF.
2.00 BSC
--
.079 BSC
--
(Note 3)
Exposed Pad Length
Overall Width
D2
E
.055
.064
1.39
1.62
.118 BSC
--
3.00 BSC
--
(Note 3)
Exposed Pad Width
Contact Width
E2
b
.047
.008
.012
.071
.012
.020
1.20
0.20
0.30
1.80
0.30
0.50
.010
0.25
Contact Length
L
.016
0.40
*Controlling Parameter
Notes:
1. Package may have one or more exposed tie bars at ends.
2. Pin 1 visual index feature may vary, but must be located within the hatched area.
3. Exposed pad dimensions vary with paddle size.
4. JEDEC equivalent: MO-229
Drawing No. C04-123
Revised 05/24/04
© 2005 Microchip Technology Inc.
DS21710D-page 19
24AA08/24LC08B
APPENDIX A: REVISION HISTORY
Revision C
Corrections to Section 1.0, Electrical Characteristics.
Section 9.1, 24LC08B standard marking code.
Revision D
Added DFN package.
DS21710D-page 20
© 2005 Microchip Technology Inc.
24AA08/24LC08B
THE MICROCHIP WEB SITE
CUSTOMER SUPPORT
Microchip provides online support via our WWW site at
www.microchip.com. This web site is used as a means
to make files and information easily available to
customers. Accessible by using your favorite Internet
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Users of Microchip products can receive assistance
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Customers
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• General Technical Support – Frequently Asked
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Technical support is available through the web site
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In addition, there is
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The Development Systems Information Line
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To register, access the Microchip web site at
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Notification and follow the registration instructions.
© 2005 Microchip Technology Inc.
DS21710D-page 21
24AA08/24LC08B
READER RESPONSE
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.
Please list the following information, and use this outline to provide us with your comments about this document.
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24AA08/24LC08B
DS21710D
Literature Number:
Device:
Questions:
1. What are the best features of this document?
2. How does this document meet your hardware and software development needs?
3. Do you find the organization of this document easy to follow? If not, why?
4. What additions to the document do you think would enhance the structure and subject?
5. What deletions from the document could be made without affecting the overall usefulness?
6. Is there any incorrect or misleading information (what and where)?
7. How would you improve this document?
DS21710D-page 22
© 2005 Microchip Technology Inc.
24AA08/24LC08B
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
X
PART NO.
Device
X
/XX
Examples:
a) 24AA08-I/P: Industrial Temperature,1.8V,
PDIP package
Temperature Package
Range
Lead Finish
b) 24AA08-I/SN: Industrial Temperature,1.8V,
SOIC package
2
24AA08:
24AA08T:
=
=
1.8V, 16 Kbit I C Serial EEPROM
1.8V, 16 Kbit I C Serial EEPROM
c) 24AA08T-I/OT: Industrial Temperature,
1.8V, SOT-23 package, Tape and Reel
2
(Tape and Reel)
2
24LC08B:
=
2.5V, 16 Kbit I C Serial EEPROM
24LC08BT: = 2.5V, 16 Kbit I C Serial EEPROM
(Tape and Reel)
2
d) 24LC08B-I/P: Industrial Temperature, 2.5V,
PDIP package
e) 24LC08B-E/SN: Automotive Temp.,2.5V
SOIC package
Temperature
Range:
I
E
= -40°C to +85°C
= -40°C to +125°C
f)
24LC08BT-I/OT: Industrial Temperature,
2.5V, SOT-23 package, Tape and Reel
g) 24LC08B-I/PG: Industrial Temperature,
2.5V, PDIP package, Pb-free
Package:
P
=
Plastic DIP (300 mil body), 8-lead
Plastic SOIC (150 mil body), 8-lead
Plastic TSSOP (4.4 mm), 8-lead
2x3 DFN, 8-lead
Plastic Micro Small Outline (MSOP), 8-lead
SOT-23, 5-lead (Tape and Reel only)
SN
ST
MC
MS
OT
=
=
=
=
=
h) 24LC08BT-I/SNG: Industrial Temperature,
2.5V, SOIC package, Tape and Reel,
Pb-free
Lead Finish Blank =
Standard 63% / 37% SnPb
Matte Tin (Pure Sn)
G
=
Sales and Support
Data Sheets
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and
recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:
1. Your local Microchip sales office
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277
3. The Microchip Worldwide Site (www.microchip.com)
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.
New Customer Notification System
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.
© 2005 Microchip Technology Inc.
DS21710D-page 23
24AA08/24LC08B
NOTES:
DS21710D-page 24
© 2005 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR WAR-
RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,
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RELATED TO THE INFORMATION, INCLUDING BUT NOT
LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,
MERCHANTABILITY OR FITNESS FOR PURPOSE.
Microchip disclaims all liability arising from this information and
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written approval by Microchip. No licenses are conveyed,
implicitly or otherwise, under any Microchip intellectual property
rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,
PRO MATE, PowerSmart, rfPIC, and SmartShunt are
registered trademarks of Microchip Technology Incorporated
in the U.S.A. and other countries.
AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,
PICMASTER, SEEVAL, SmartSensor and The Embedded
Control Solutions Company are registered trademarks of
Microchip Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial
Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK,
MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail,
PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB,
rfPICDEM, Select Mode, Smart Serial, SmartTel and Total
Endurance are trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2005, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 quality system certification for
its worldwide headquarters, design and wafer fabrication facilities in
Chandler and Tempe, Arizona and Mountain View, California in
October 2003. The Company’s quality system processes and
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2005 Microchip Technology Inc.
DS21710D-page 25
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www.microchip.com
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Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
Denmark - Ballerup
Tel: 45-4450-2828
Fax: 45-4485-2829
India - New Delhi
Tel: 91-11-5160-8631
Fax: 91-11-5160-8632
China - Chengdu
Tel: 86-28-8676-6200
Fax: 86-28-8676-6599
France - Massy
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Japan - Kanagawa
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
Atlanta
China - Fuzhou
Tel: 86-591-8750-3506
Fax: 86-591-8750-3521
Germany - Ismaning
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Korea - Seoul
Alpharetta, GA
Tel: 770-640-0034
Fax: 770-640-0307
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Boston
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
Westford, MA
Tel: 978-692-3848
Fax: 978-692-3821
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
England - Berkshire
Tel: 44-118-921-5869
Fax: 44-118-921-5820
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
Dallas
Addison, TX
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Tel: 972-818-7423
Fax: 972-818-2924
Taiwan - Hsinchu
Tel: 886-3-572-9526
Fax: 886-3-572-6459
China - Shunde
Detroit
Tel: 86-757-2839-5507
Fax: 86-757-2839-5571
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
China - Qingdao
Tel: 86-532-502-7355
Fax: 86-532-502-7205
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
San Jose
Mountain View, CA
Tel: 650-215-1444
Fax: 650-961-0286
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
10/20/04
DS21710D-page 26
© 2005 Microchip Technology Inc.
24LC08BT-E/P 替代型号
型号 | 制造商 | 描述 | 替代类型 | 文档 |
24LC08BT-I/P | MICROCHIP | 8K IC SERIAL EEPROM | 功能相似 |
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24LC08BT-I/MCG | MICROCHIP | 8K IC SERIAL EEPROM | 获取价格 | |
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