24AA128T-I/MSG [MICROCHIP]

16K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8, ROHS COMPLIANT, PLASTIC, MSOP-8;
24AA128T-I/MSG
型号: 24AA128T-I/MSG
厂家: MICROCHIP    MICROCHIP
描述:

16K X 8 I2C/2-WIRE SERIAL EEPROM, PDSO8, ROHS COMPLIANT, PLASTIC, MSOP-8

可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器 时钟 双倍数据速率 光电二极管 内存集成电路
文件: 总26页 (文件大小:330K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
24AA128/24LC128/24FC128  
128K I2CCMOS Serial EEPROM  
Device Selection Table  
Description  
The Microchip Technology Inc. 24AA128/24LC128/  
24FC128 (24XX128*) is a 16K x 8 (128 Kbit) Serial  
Electrically Erasable PROM (EEPROM), capable of  
operation across a broad voltage range (1.8V to 5.5V).  
It has been developed for advanced, low-power  
applications such as personal communications or data  
acquisition. This device also has a page write capabil-  
ity of up to 64 bytes of data. This device is capable of  
both random and sequential reads up to the 128K  
boundary. Functional address lines allow up to eight  
devices on the same bus, for up to 1 Mbit address  
space. This device is available in the standard 8-pin  
plastic DIP, SOIC (150 and 208 mil), TSSOP, MSOP,  
DFN and 14-lead TSSOP packages.  
Part  
Number  
VCC  
Range  
Max. Clock  
Frequency  
Temp.  
Ranges  
24AA128  
1.8-5.5V  
400 kHz(1)  
I
24LC128  
24FC128  
2.5-5.5V  
1.8-5.5V  
400 kHz  
1 MHz(2)  
I, E  
I
Note 1: 100 kHz for VCC < 2.5V.  
2: 400 kHz for VCC < 2.5V.  
Features  
• Low-power CMOS technology:  
- Maximum write current 3 mA at 5.5V  
- Maximum read current 400 µA at 5.5V  
- Standby current 100 nA typical at 5.5V  
Block Diagram  
• 2-wire serial interface bus, I2C™ compatible  
• Cascadable for up to eight devices  
• Self-timed erase/write cycle  
A0 A1 A2WP  
HV Generator  
• 64-byte Page Write mode available  
• 5 ms max write cycle time  
I/O  
Control  
Logic  
Memory  
Control  
Logic  
EEPROM  
Array  
XDEC  
• Hardware write-protect for entire array  
• Output slope control to eliminate ground bounce  
• Schmitt Trigger inputs for noise suppression  
• 1,000,000 erase/write cycles  
Page Latches  
I/O  
SCL  
YDEC  
SDA  
• Electrostatic discharge protection > 4000V  
• Data retention > 200 years  
VCC  
• 8-pin PDIP, SOIC, TSSOP, MSOP and DFN  
packages, 14-lead TSSOP package  
Sense Amp.  
R/W Control  
VSS  
• Standard and Pb-free finishes available  
Temperature ranges:  
- Industrial (I):  
- Automotive (E):  
-40°C to +85°C  
-40°C to +125°C  
Package Types  
PDIP/SOIC  
TSSOP/MSOP *  
TSSOP  
DFN  
14  
1
2
3
4
5
6
7
VCC  
A0  
A1  
A0  
1
8
VCC  
1
2
3
4
A0  
A1  
8
7
6
5
VCC  
WP  
1
2
8
7
A0  
A1  
VCC  
WP  
13  
12  
11  
10  
9
WP  
NC  
NC  
NC  
A1  
A2  
2
3
7
6
WP  
NC  
NC  
NC  
A2  
A2  
SCL  
SDA  
SCL  
3
4
6
5
A2  
SCL  
SDA  
VSS  
SCL  
SDA  
VSS  
4
5
SDA  
VSS  
8
VSS  
Note: * Pins A0 and A1 are no-connects for the MSOP package only.  
*24XX128 is used in this document as a generic part number for the 24AA128/24LC128/24FC128 devices.  
2004 Microchip Technology Inc.  
DS21191M-page 1  
24AA128/24LC128/24FC128  
1.0  
ELECTRICAL CHARACTERISTICS  
(†)  
Absolute Maximum Ratings  
VCC.............................................................................................................................................................................6.5V  
All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V  
Storage temperature ...............................................................................................................................-65°C to +150°C  
Ambient temperature with power applied................................................................................................-40°C to +125°C  
ESD protection on all pins ......................................................................................................................................................≥ 4 kV  
† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the  
device. This is a stress rating only and functional operation of the device at those or any other conditions above those  
indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for  
extended periods may affect device reliability.  
TABLE 1-1:  
DC CHARACTERISTICS  
Electrical Characteristics:  
DC CHARACTERISTICS  
Industrial (I):  
VCC = +1.8V to 5.5V TA = -40°C to +85°C  
Automotive (E): VCC = +2.5V to 5.5V TA = -40°C to 125°C  
Param.  
Sym.  
No.  
Characteristic  
Min.  
Max.  
Units  
Conditions  
D1  
A0, A1, A2, SCL, SDA, and  
WP pins:  
D2  
D3  
VIH  
VIL  
High-level input voltage  
Low-level input voltage  
0.7 VCC  
V
0.3 VCC  
0.2 VCC  
V
V
VCC 2.5V  
VCC < 2.5V  
D4  
D5  
D6  
VHYS  
VOL  
ILI  
Hysteresis of Schmitt Trigger 0.05 VCC  
inputs (SDA, SCL pins)  
0.40  
±1  
V
VCC 2.5V (Note 1)  
Low-level output voltage  
Input leakage current  
Output leakage current  
V
IOL = 3.0 mA @ VCC = 4.5V  
IOL = 2.1 mA @ VCC = 2.5V  
µA  
VIN = VSS or VCC, WP = VSS  
VIN = VSS or VCC, WP = VCC  
D7  
D8  
ILO  
±1  
10  
µA  
VOUT = VSS or VCC  
CIN,  
Pin capacitance  
pF  
VCC = 5.0V (Note 1)  
COUT  
(all inputs/outputs)  
TA = 25°C, fC = 1 MHz  
D9  
ICC Read Operating current  
ICC Write  
400  
3
µA  
mA  
µA  
VCC = 5.5V, SCL = 400 kHz  
VCC = 5.5V  
D10  
ICCS  
Standby current  
1
TA = -40°C to +85°C  
SCL = SDA = VCC = 5.5V  
A0, A1, A2, WP = VSS  
5
µA  
TA = -40°C to 125°C  
SCL = SDA = VCC = 5.5V  
A0, A1, A2, WP = VSS  
Note 1: This parameter is periodically sampled and not 100% tested.  
DS21191M-page 2  
2004 Microchip Technology Inc.  
 
24AA128/24LC128/24FC128  
TABLE 1-2:  
AC CHARACTERISTICS  
Electrical Characteristics:  
AC CHARACTERISTICS  
Param.  
Industrial (I):  
VCC = +1.8V to 5.5V TA = -40°C to +85°C  
Automotive (E): VCC = +2.5V to 5.5V TA = -40°C to 125°C  
Sym.  
Characteristic  
Min.  
Max.  
Units  
Conditions  
No.  
1
2
3
4
FCLK  
Clock frequency  
100  
400  
400  
kHz 1.8V VCC < 2.5V  
2.5V VCC 5.5V  
1.8V VCC < 2.5V 24FC128  
2.5V VCC 5.5V 24FC128  
1000  
THIGH Clock high time  
TLOW Clock low time  
4000  
600  
600  
500  
ns  
ns  
ns  
1.8V VCC < 2.5V  
2.5V VCC 5.5V  
1.8V VCC < 2.5V 24FC128  
2.5V VCC 5.5V 24FC128  
4700  
1300  
1300  
500  
1.8V VCC < 2.5V  
2.5V VCC 5.5V  
1.8V VCC < 2.5V 24FC128  
2.5V VCC 5.5V 24FC128  
TR  
TF  
SDA and SCL rise time  
(Note 1)  
1000  
300  
300  
1.8V VCC < 2.5V  
2.5V VCC 5.5V  
1.8V VCC 5.5V 24FC128  
5
6
SDA and SCL fall time  
(Note 1)  
300  
100  
ns  
ns  
All except, 24FC128  
1.8V VCC 5.5V 24FC128  
THD:ST Start condition hold time  
A
4000  
600  
600  
250  
1.8V VCC < 2.5V  
2.5V VCC 5.5V  
1.8V VCC < 2.5V 24FC128  
2.5V VCC 5.5V 24FC128  
7
TSU:ST Start condition setup time  
A
4700  
600  
600  
250  
ns  
1.8V VCC < 2.5V  
2.5V VCC 5.5V  
1.8V VCC < 2.5V 24FC128  
2.5V VCC 5.5V 24FC128  
8
9
THD:DA Data input hold time  
T
0
ns  
ns  
(Note 2)  
TSU:DA Data input setup time  
T
250  
100  
100  
1.8V VCC < 2.5V  
2.5V VCC 5.5V  
1.8V VCC 5.5V 24FC128  
10  
11  
TSU:ST Stop condition setup time  
O
4000  
600  
600  
250  
ns  
ns  
1.8 V VCC < 2.5V  
2.5 V VCC 5.5V  
1.8V VCC < 2.5V 24FC128  
2.5 V VCC 5.5V 24FC128  
TSU:WP WP setup time  
4000  
600  
600  
1.8V VCC < 2.5V  
2.5V VCC 5.5V  
1.8V VCC 5.5V 24FC128  
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.  
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region  
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.  
3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved  
noise spike suppression. This eliminates the need for a TI specification for standard operation.  
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific  
application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s web site:  
www.microchip.com.  
2004 Microchip Technology Inc.  
DS21191M-page 3  
 
 
 
 
24AA128/24LC128/24FC128  
TABLE 1-2:  
AC CHARACTERISTICS (CONTINUED)  
Electrical Characteristics:  
AC CHARACTERISTICS  
Param.  
Industrial (I): VCC = +1.8V to 5.5V TA = -40°C to +85°C  
Automotive (E): VCC = +2.5V to 5.5V TA = -40°C to 125°C  
Sym.  
Characteristic  
Min.  
Max.  
Units  
Conditions  
No.  
12  
THD:WP WP hold time  
4700  
1300  
1300  
ns  
1.8V VCC < 2.5V  
2.5V VCC 5.5V  
1.8V VCC 5.5V 24FC128  
13  
14  
15  
TAA  
Output valid from clock  
(Note 2)  
3500  
900  
900  
400  
ns  
ns  
ns  
1.8V VCC < 2.5V  
2.5V VCC 5.5V  
1.8V VCC < 2.5V 24FC128  
2.5V VCC 5.5V 24FC128  
TBUF  
TOF  
Bus free time: Time the bus  
must be free before a new  
transmission can start  
4700  
1300  
1300  
500  
1.8V VCC < 2.5V  
2.5V VCC 5.5V  
1.8V VCC < 2.5V 24FC128  
2.5V VCC 5.5V 24FC128  
Output fall time from VIH  
minimum to VIL maximum  
CB 100 pF  
10 + 0.1CB  
250  
250  
All except, 24FC128 (Note 1)  
24FC128 (Note 1)  
16  
17  
18  
TSP  
TWC  
Input filter spike suppression  
(SDA and SCL pins)  
50  
5
ns  
All except, 24FC128 (Notes 1  
and 3)  
Write cycle time (byte or  
page)  
ms  
Endurance  
1,000,000  
cycles 25°C (Note 4)  
Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.  
2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region  
(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.  
3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved  
noise spike suppression. This eliminates the need for a TI specification for standard operation.  
4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific  
application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s web site:  
www.microchip.com.  
FIGURE 1-1:  
BUS TIMING DATA  
5
4
D4  
2
SCL  
7
3
10  
8
9
SDA  
IN  
6
16  
14  
12  
13  
SDA  
OUT  
(protected)  
WP  
11  
(unprotected)  
DS21191M-page 4  
2004 Microchip Technology Inc.  
 
24AA128/24LC128/24FC128  
2.0  
PIN DESCRIPTIONS  
The descriptions of the pins are listed in Table 2-1.  
TABLE 2-1:  
Name  
PIN FUNCTION TABLE  
8-pin  
PDIP  
8-pin  
SOIC  
8-pin  
TSSOP  
14-pin  
TSSOP  
8-pin  
MSOP  
8-pin  
DFN  
Function  
A0  
1
2
1
2
1
2
1
1, 2  
3
1
2
User Configurable Chip Select  
User Configurable Chip Select  
Not Connected  
A1  
2
(NC)  
A2  
3
3
3
3, 4, 5  
3
6
User Configurable Chip Select  
Ground  
VSS  
SDA  
SCL  
(NC)  
WP  
VCC  
4
4
4
7
4
4
5
5
5
8
5
5
Serial Data  
6
6
6
9
10, 11,12  
13  
6
6
Serial Clock  
7
7
7
7
7
Not Connected  
Write-Protect Input  
8
8
8
14  
8
8
+1.8V to 5.5V (24AA128)  
+2.5V to 5.5V (24LC128)  
+1.8V to 5.5V (24FC128)  
2.1  
A0, A1, A2 Chip Address Inputs  
2.3  
Serial Clock (SCL)  
The A0, A1 and A2 inputs are used by the 24XX128 for  
multiple device operations. The levels on these inputs  
are compared with the corresponding bits in the slave  
address. The chip is selected if the compare is true.  
This input is used to synchronize the data transfer to  
and from the device.  
2.4  
Write-Protect (WP)  
For the MSOP package only, pins A0 and A1 are not  
connected.  
This pin can be connected to either VSS, VCC or left  
floating. Internal pull-down circuitry on this pin will keep  
the device in the unprotected state if left floating. If tied  
to VSS or left floating, normal memory operation is  
enabled (read/write the entire memory 0000-3FFF).  
Up to eight devices (two for the MSOP package) may  
be connected to the same bus by using different Chip  
Select bit combinations. If these pins are left uncon-  
nected, the inputs will be pulled down internally to  
VSS. If they are tied to VCC or driven high, the internal  
pull-down circuitry is disabled.  
If tied to VCC, write operations are inhibited. Read  
operations are not affected.  
In most applications, the chip address inputs A0, A1,  
and A2 are hard-wired to logic ‘0’ or logic ‘1’. For  
applications in which these pins are controlled by a  
microcontroller or other programmable device, the chip  
address pins must be driven to logic ‘0’ or logic ‘1’  
before normal device operation can proceed.  
3.0  
FUNCTIONAL DESCRIPTION  
The 24XX128 supports a bidirectional 2-wire bus and  
data transmission protocol. A device that sends data  
onto the bus is defined as a transmitter and a device  
receiving data as a receiver. The bus must be  
controlled by a master device which generates the  
serial clock (SCL), controls the bus access and  
generates the Start and Stop conditions while the  
24XX128 works as a slave. Both master and slave can  
operate as a transmitter or receiver, but the master  
device determines which mode is activated.  
2.2  
Serial Data (SDA)  
This is a bidirectional pin used to transfer addresses  
and data into and out of the device. It is an open drain  
terminal. Therefore, the SDA bus requires a pull-up  
resistor to VCC (typical 10 kfor 100 kHz, 2 kfor  
400 kHz and 1 MHz).  
For normal data transfer, SDA is allowed to change  
only during SCL low. Changes during SCL high are  
reserved for indicating the Start and Stop conditions.  
2004 Microchip Technology Inc.  
DS21191M-page 5  
 
24AA128/24LC128/24FC128  
The data on the line must be changed during the low  
period of the clock signal. There is one bit of data per  
clock pulse.  
4.0  
BUS CHARACTERISTICS  
The following bus protocol has been defined:  
• Data transfer may be initiated only when the bus  
is not busy.  
Each data transfer is initiated with a Start condition and  
terminated with a Stop condition. The number of the  
data bytes transferred between the Start and Stop  
conditions is determined by the master device.  
• During data transfer, the data line must remain  
stable whenever the clock line is high. Changes in  
the data line while the clock line is high will be  
interpreted as a Start or Stop condition.  
4.5  
Acknowledge  
Accordingly, the following bus conditions have been  
defined (Figure 4-1).  
Each receiving device, when addressed, is obliged to  
generate an Acknowledge signal after the reception of  
each byte. The master device must generate an extra  
clock pulse, which is associated with this Acknowledge  
bit.  
4.1  
Bus not Busy (A)  
Both data and clock lines remain high.  
Note: The 24XX128 does not generate any  
Acknowledge bits if an internal  
programming cycle is in progress.  
4.2  
Start Data Transfer (B)  
A high-to-low transition of the SDA line while the clock  
(SCL) is high determines a Start condition. All  
commands must be preceded by a Start condition.  
A device that acknowledges must pull down the SDA  
line during the acknowledge clock pulse in such a way  
that the SDA line is stable low during the high period of  
the acknowledge related clock pulse. Of course, setup  
and hold times must be taken into account. During  
reads, a master must signal an end of data to the slave  
by NOT generating an Acknowledge bit on the last byte  
that has been clocked out of the slave. In this case, the  
slave (24XX128) will leave the data line high to enable  
the master to generate the Stop condition.  
4.3  
Stop Data Transfer (C)  
A low-to-high transition of the SDA line, while the clock  
(SCL) is high, determines a Stop condition. All  
operations must end with a Stop condition.  
4.4  
Data Valid (D)  
The state of the data line represents valid data when,  
after a Start condition, the data line is stable for the  
duration of the high period of the clock signal.  
FIGURE 4-1:  
DATA TRANSFER SEQUENCE ON THE SERIAL BUS  
(A)  
(B)  
(D)  
(D)  
(C) (A)  
SCL  
SDA  
Start  
Condition  
Address or  
Acknowledge  
Valid  
Data  
Allowed  
to Change  
Stop  
Condition  
FIGURE 4-2:  
ACKNOWLEDGE TIMING  
Acknowledge  
Bit  
1
2
3
4
5
6
7
8
9
1
2
3
SCL  
SDA  
Data from transmitter  
Data from transmitter  
Transmitter must release the SDA line at this point,  
allowing the Receiver to pull the SDA line low to  
acknowledge the previous eight bits of data.  
Receiver must release the SDA line  
at this point so the Transmitter can  
continue sending data.  
DS21191M-page 6  
2004 Microchip Technology Inc.  
 
24AA128/24LC128/24FC128  
FIGURE 5-1:  
CONTROL BYTE  
FORMAT  
5.0  
DEVICE ADDRESSING  
A control byte is the first byte received following the  
Start condition from the master device (Figure 5-1).  
The control byte consists of a 4-bit control code. For the  
24XX128, this is set as ‘1010binary for read and write  
operations. The next three bits of the control byte are  
the Chip Select bits (A2, A1, A0). The Chip Select bits  
allow the use of up to eight 24XX128 devices on the  
same bus and are used to select which device is  
accessed. The Chip Select bits in the control byte must  
correspond to the logic levels on the corresponding A2,  
A1 and A0 pins for the device to respond. These bits  
are, in effect, the three Most Significant bits of the word  
address.  
Read/Write Bit  
Chip Select  
Bits  
Control Code  
S
1
0
1
0
A2 A1 A0 R/W ACK  
Slave Address  
Start Bit  
Acknowledge Bit  
5.1  
Contiguous Addressing Across  
Multiple Devices  
For the MSOP package, the A0 and A1 pins are not  
connected. During device addressing, the A0 and A1  
Chip Select bits (Figures 5-1 and 5-2) should be set to  
0’. Only two 24XX128 MSOP packages can be  
connected to the same bus.  
The Chip Select bits A2, A1,and A0 can be used to  
expand the contiguous address space for up to 1 Mbit  
by adding up to eight 24XX128s on the same bus. In  
this case, software can use A0 of the control byte as  
address bit A14; A1 as address bit A15; and A2 as  
address bit A16. It is not possible to sequentially read  
across device boundaries.  
The last bit of the control byte defines the operation to  
be performed. When set to a one, a read operation is  
selected. When set to a zero, a write operation is  
selected. The next two bytes received define the  
address of the first data byte (Figure 5-2). Because  
only A13…A0 are used, the upper two address bits are  
“don’t care” bits. The upper address bits are transferred  
first, followed by the less significant bits.  
For the MSOP package, up to two 24XX128 devices  
can be added for up to 256 Kbit of address space. In  
this case, software can use A2 of the control byte as  
address bit A16. Bits A0 (A14) and A1 (A15) of the  
control byte must always be set to logic ‘0’ for the  
MSOP.  
Following the Start condition, the 24XX128 monitors  
the SDA bus checking the device type identifier being  
transmitted. Upon receiving a ‘1010code and  
appropriate device select bits, the slave device outputs  
an Acknowledge signal on the SDA line. Depending on  
the state of the R/W bit, the 24XX128 will select a read  
or write operation.  
FIGURE 5-2:  
ADDRESS SEQUENCE BIT ASSIGNMENTS  
Control Byte  
Address High Byte  
Address Low Byte  
A
A
13  
A
2
A
1
A
0
A
A
10  
A
9
A
8
A
7
A
0
1
0
1
0
R/W  
X
X
12 11  
Control  
Code  
Chip  
Select  
Bits  
X = don’t care bit  
2004 Microchip Technology Inc.  
DS21191M-page 7  
 
 
24AA128/24LC128/24FC128  
master should transmit more than 64 bytes prior to  
generating the Stop condition, the address counter will  
roll over and the previously received data will be over-  
written. As with the byte write operation, once the Stop  
condition is received, an internal write cycle will begin  
(Figure 6-2). If an attempt is made to write to the array  
with the WP pin held high, the device will acknowledge  
the command, but no write cycle will occur, no data will  
be written and the device will immediately accept a new  
command.  
6.0  
6.1  
WRITE OPERATIONS  
Byte Write  
Following the Start condition from the master, the  
control code (four bits), the Chip Select (three bits) and  
the R/W bit (which is a logic low) are clocked onto the  
bus by the master transmitter. This indicates to the  
addressed slave receiver that the address high byte will  
follow after it has generated an Acknowledge bit during  
the ninth clock cycle. Therefore, the next byte  
transmitted by the master is the high-order byte of the  
word address and will be written into the address  
pointer of the 24XX128. The next byte is the Least  
Significant Address Byte. After receiving another  
Acknowledge signal from the 24XX128, the master  
device will transmit the data word to be written into the  
addressed memory location. The 24XX128 acknowl-  
edges again and the master generates a Stop  
condition. This initiates the internal write cycle and  
during this time, the 24XX128 will not generate  
Acknowledge signals (Figure 6-1). If an attempt is  
made to write to the array with the WP pin held high, the  
device will acknowledge the command, but no write  
cycle will occur, no data will be written, and the device  
will immediately accept a new command. After a byte  
Write command, the internal address counter will point  
to the address location following the one that was just  
written.  
6.3  
Write-Protection  
The WP pin allows the user to write-protect the entire  
array (0000-3FFF) when the pin is tied to VCC. If tied to  
VSS or left floating, the write protection is disabled. The  
WP pin is sampled at the Stop bit for every Write  
command (Figure 1-1). Toggling the WP pin after the  
Stop bit will have no effect on the execution of the write  
cycle.  
Note: Page write operations are limited to  
writing bytes within a single physical  
page, regardless of the number of  
bytes actually being written. Physical  
page boundaries start at addresses  
that are integer multiples of the page  
buffer size (or ‘page size’) and end at  
addresses that are integer multiples of  
[page size - 1]. If a Page Write  
command attempts to write across a  
physical page boundary, the result is  
that the data wraps around to the  
beginning of the current page (over-  
writing data previously stored there),  
instead of being written to the next  
page, as might be expected. It is,  
therefore, necessary for the applica-  
tion software to prevent page write  
operations that would attempt to cross  
a page boundary.  
6.2  
Page Write  
The write control byte, word address, and the first data  
byte are transmitted to the 24XX128 in much the same  
way as in a byte write. The exception is that instead of  
generating a Stop condition, the master transmits up to  
63 additional bytes, which are temporarily stored in the  
on-chip page buffer, and will be written into memory  
once the master has transmitted a Stop condition.  
Upon receipt of each word, the six lower address  
pointer bits are internally incremented by ‘1’. If the  
FIGURE 6-1:  
BYTE WRITE  
S
BUS ACTIVITY  
MASTER  
T
A
R
T
S
Control  
Byte  
Address  
High Byte  
Address  
Low Byte  
T
Data  
O
P
A A A  
SDA LINE  
X X  
S 1 0 1 0  
0
P
2 1 0  
A
C
K
A
C
K
A
C
K
A
C
K
BUS ACTIVITY  
X = don’t care bit  
FIGURE 6-2:  
PAGE WRITE  
S
T
A
R
T
S
T
O
P
Control  
Byte  
Address  
High Byte  
Address  
Low Byte  
BUS ACTIVITY  
MASTER  
Data Byte 0  
Data Byte 63  
A A A  
SDA LINE  
X X  
P
S 1 0 1 0  
0
2 1 0  
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
BUS ACTIVITY  
X = don’t care bit  
DS21191M-page 8  
2004 Microchip Technology Inc.  
 
 
24AA128/24LC128/24FC128  
FIGURE 7-1:  
ACKNOWLEDGE  
POLLING FLOW  
7.0  
ACKNOWLEDGE POLLING  
Since the device will not acknowledge during a write  
cycle, this can be used to determine when the cycle is  
complete (This feature can be used to maximize bus  
throughput). Once the Stop condition for a Write  
command has been issued from the master, the device  
initiates the internally timed write cycle. ACK polling  
can be initiated immediately. This involves the master  
sending a Start condition, followed by the control byte  
for a Write command (R/W = 0). If the device is still  
busy with the write cycle, then no ACK will be returned.  
If no ACK is returned, the Start bit and control byte must  
be resent. If the cycle is complete, then the device will  
return the ACK and the master can then proceed with  
the next Read or Write command. See Figure 7-1 for  
flow diagram.  
Send  
Write Command  
Send Stop  
Condition to  
Initiate Write Cycle  
Send Start  
Send Control Byte  
with R/W = 0  
Did Device  
Acknowledge  
(ACK = 0)?  
No  
Yes  
Next  
Operation  
2004 Microchip Technology Inc.  
DS21191M-page 9  
 
24AA128/24LC128/24FC128  
8.2  
Random Read  
8.0  
READ OPERATION  
Random read operations allow the master to access  
any memory location in a random manner. To perform  
this type of read operation, the word address must first  
be set. This is done by sending the word address to the  
24XX128 as part of a write operation (R/W bit set to  
0). Once the word address is sent, the master gener-  
ates a Start condition following the acknowledge. This  
terminates the write operation, but not before the inter-  
nal address pointer is set. The master then issues the  
control byte again, but with the R/W bit set to a ‘1’. The  
24XX128 will then issue an acknowledge and transmit  
the 8-bit data word. The master will not acknowledge  
the transfer but does generate a Stop condition, which  
causes the 24XX128 to discontinue transmission  
(Figure 8-2). After a random Read command, the  
internal address counter will point to the address  
location following the one that was just read.  
Read operations are initiated in much the same way as  
write operations with the exception that the R/W bit of  
the control byte is set to ‘1’. There are three basic types  
of read operations: current address read, random read  
and sequential read.  
8.1  
Current Address Read  
The 24XX128 contains an address counter that main-  
tains the address of the last word accessed, internally  
incremented by ‘1’. Therefore, if the previous read  
access was to address ‘n’ (nis any legal address), the  
next current address read operation would access data  
from address n + 1.  
Upon receipt of the control byte with R/W bit set to ‘1’,  
the 24XX128 issues an acknowledge and transmits the  
8-bit data word. The master will not acknowledge the  
transfer, but does generate a Stop condition and the  
24XX128 discontinues transmission (Figure 8-1).  
8.3  
Sequential Read  
Sequential reads are initiated in the same way as a  
random read except that after the 24XX128 transmits  
the first data byte, the master issues an acknowledge  
as opposed to the Stop condition used in a random  
read. This acknowledge directs the 24XX128 to  
transmit the next sequentially addressed 8-bit word  
(Figure 8-3). Following the final byte transmitted to the  
master, the master will NOT generate an acknowledge  
but will generate a Stop condition. To provide  
sequential reads, the 24XX128 contains an internal  
address pointer which is incremented by one at the  
completion of each operation. This address pointer  
allows the entire memory contents to be serially read  
during one operation. The internal address pointer will  
automatically roll over from address 3FFF to address  
0000 if the master acknowledges the byte received  
from the array address 3FFF.  
FIGURE 8-1:  
CURRENT ADDRESS  
READ  
S
T
A
R
T
S
T
O
P
BUS ACTIVITY  
MASTER  
Control  
Byte  
Data  
Byte  
A A A  
2 1 0  
SDA LINE  
S 1 0 1 0  
1
P
A
C
K
N
O
BUS ACTIVITY  
A
C
K
FIGURE 8-2:  
RANDOM READ  
S
T
A
R
T
S
BUS ACTIVITY  
MASTER  
T
A
R
T
S
T
O
P
Control  
Byte  
Address  
High Byte  
Address  
Low Byte  
Control  
Byte  
Data  
Byte  
A A A  
2 1 0  
A A A  
2 1 0  
SDA LINE  
X X  
S 1 0 1 0  
0
S 1 0 1 0  
1
P
N
O
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
BUS ACTIVITY  
X = don’t care bit  
FIGURE 8-3:  
SEQUENTIAL READ  
S
Control  
Byte  
BUS ACTIVITY  
MASTER  
T
Data (n)  
Data (n + 1)  
Data (n + X)  
Data (n + 2)  
O
P
P
SDA LINE  
N
O
A
C
K
A
C
K
A
C
K
A
C
K
A
C
K
BUS ACTIVITY  
DS21191M-page 10  
2004 Microchip Technology Inc.  
 
 
 
24AA128/24LC128/24FC128  
9.0  
9.1  
PACKAGING INFORMATION  
Package Marking Information  
8-Lead PDIP (300 mil)  
Example:  
24AA128  
I/P017  
0310  
XXXXXXXX  
T/XXXNNN  
YYWW  
8-Lead SOIC (150 mil)  
Example:  
XXXXXXXX  
T/XXYYWW  
24LC128  
I/SN0310  
NNN  
017  
8-Lead SOIC (208 mil)  
Example:  
XXXXXXXX  
T/XXXXXX  
YYWWNNN  
24LC128  
I/SM  
0310017  
Example:  
8-Lead TSSOP  
XXXX  
TYWW  
4LC  
I301  
NNN  
017  
2004 Microchip Technology Inc.  
DS21191M-page 11  
24AA128/24LC128/24FC128  
Package Marking Information (Continued)  
8-Lead MSOP  
Example:  
XXXXXT  
4L128I  
101017  
YWWNNN  
8-Lead DFN-S  
Example:  
24LC128  
XXXXXXX  
T/XXXXX  
YYWW  
I/MF  
YYWW  
NNN  
NNN  
14-Lead TSSOP  
Example:  
XXXXXXXT  
YYWW  
24LC128I  
0110  
NNN  
017  
Legend: XX...X Customer specific information*  
T
Temperature grade (I, E)  
Y
Year code (last digit of calendar year)  
Year code (last 2 digits of calendar year)  
Week code (week of January 1 is week ‘01’)  
Alphanumeric traceability code  
YY  
WW  
NNN  
Note:In the event the full Microchip part number cannot be marked on one line, it will be  
carried over to the next line thus limiting the number of available characters for customer  
specific information.  
*Standard device marking consists of Microchip part number, year code, week code, and traceability code. For  
device marking beyond this, certain price adders apply. Please check with your Microchip Sales Office.  
TSSOP Package Codes  
MSOP Package Codes  
Part No.  
24AA128  
24LC128  
24FC128  
STD  
4AC  
4LC  
4FC  
Pb-free  
STD  
Pb-free  
G4AC  
G4LC  
G4FC  
G4AC  
G4LC  
G4FC  
4A128  
4L128  
4F128  
DS21191M-page 12  
2004 Microchip Technology Inc.  
24AA128/24LC128/24FC128  
8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)  
E1  
D
2
1
n
α
E
A2  
A
L
c
A1  
β
B1  
B
p
eB  
Units  
INCHES*  
NOM  
MILLIMETERS  
Dimension Limits  
MIN  
MAX  
MIN  
NOM  
8
MAX  
n
p
Number of Pins  
Pitch  
8
.100  
.155  
.130  
2.54  
Top to Seating Plane  
A
.140  
.170  
3.56  
2.92  
3.94  
3.30  
4.32  
Molded Package Thickness  
Base to Seating Plane  
Shoulder to Shoulder Width  
Molded Package Width  
Overall Length  
A2  
A1  
E
.115  
.015  
.300  
.240  
.360  
.125  
.008  
.045  
.014  
.310  
5
.145  
3.68  
0.38  
7.62  
6.10  
9.14  
3.18  
0.20  
1.14  
0.36  
7.87  
5
.313  
.250  
.373  
.130  
.012  
.058  
.018  
.370  
10  
.325  
.260  
.385  
.135  
.015  
.070  
.022  
.430  
15  
7.94  
6.35  
9.46  
3.30  
0.29  
1.46  
0.46  
9.40  
10  
8.26  
6.60  
9.78  
3.43  
0.38  
1.78  
0.56  
10.92  
15  
E1  
D
Tip to Seating Plane  
Lead Thickness  
L
c
Upper Lead Width  
B1  
B
Lower Lead Width  
Overall Row Spacing  
Mold Draft Angle Top  
Mold Draft Angle Bottom  
§
eB  
α
β
5
10  
15  
5
10  
15  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.010” (0.254mm) per side.  
JEDEC Equivalent: MS-001  
Drawing No. C04-018  
2004 Microchip Technology Inc.  
DS21191M-page 13  
24AA128/24LC128/24FC128  
8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)  
E
E1  
p
D
2
B
n
1
h
α
45°  
c
A2  
A
φ
β
L
A1  
Units  
INCHES*  
NOM  
MILLIMETERS  
Dimension Limits  
MIN  
MAX  
MIN  
NOM  
8
MAX  
n
p
Number of Pins  
Pitch  
8
.050  
.061  
.056  
.007  
.237  
.154  
.193  
.015  
.025  
4
1.27  
Overall Height  
A
.053  
.069  
1.35  
1.32  
1.55  
1.42  
0.18  
6.02  
3.91  
4.90  
0.38  
0.62  
4
1.75  
Molded Package Thickness  
Standoff  
A2  
A1  
E
.052  
.004  
.228  
.146  
.189  
.010  
.019  
0
.061  
.010  
.244  
.157  
.197  
.020  
.030  
8
1.55  
0.25  
6.20  
3.99  
5.00  
0.51  
0.76  
8
§
0.10  
5.79  
3.71  
4.80  
0.25  
0.48  
0
Overall Width  
Molded Package Width  
Overall Length  
E1  
D
Chamfer Distance  
Foot Length  
h
L
φ
Foot Angle  
c
Lead Thickness  
Lead Width  
.008  
.013  
0
.009  
.017  
12  
.010  
.020  
15  
0.20  
0.33  
0
0.23  
0.42  
12  
0.25  
0.51  
15  
B
α
Mold Draft Angle Top  
Mold Draft Angle Bottom  
β
0
12  
15  
0
12  
15  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.010” (0.254mm) per side.  
JEDEC Equivalent: MS-012  
Drawing No. C04-057  
DS21191M-page 14  
2004 Microchip Technology Inc.  
24AA128/24LC128/24FC128  
8-Lead Plastic Small Outline (SM) – Medium, 208 mil (SOIC)  
E
E1  
p
D
2
1
n
B
α
c
A2  
A
φ
A1  
L
β
Units  
INCHES*  
NOM  
MILLIMETERS  
Dimension Limits  
MIN  
MAX  
MIN  
NOM  
8
MAX  
n
p
Number of Pins  
Pitch  
8
.050  
.075  
.074  
.005  
.313  
.208  
.205  
.025  
4
1.27  
Overall Height  
A
.070  
.080  
1.78  
1.75  
1.97  
1.88  
0.13  
7.95  
5.28  
5.21  
0.64  
4
2.03  
Molded Package Thickness  
Standoff  
A2  
A1  
E
.069  
.002  
.300  
.078  
.010  
.325  
.212  
.210  
.030  
8
1.98  
0.25  
8.26  
5.38  
5.33  
0.76  
8
§
0.05  
7.62  
5.11  
5.13  
0.51  
0
Overall Width  
Molded Package Width  
Overall Length  
E1  
D
.201  
.202  
.020  
0
Foot Length  
L
φ
Foot Angle  
c
Lead Thickness  
Lead Width  
.008  
.014  
0
.009  
.017  
12  
.010  
.020  
15  
0.20  
0.36  
0
0.23  
0.43  
12  
0.25  
0.51  
15  
B
α
Mold Draft Angle Top  
Mold Draft Angle Bottom  
β
0
12  
15  
0
12  
15  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.010” (0.254mm) per side.  
Drawing No. C04-056  
2004 Microchip Technology Inc.  
DS21191M-page 15  
24AA128/24LC128/24FC128  
8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)  
E
E1  
p
D
2
1
n
B
α
A
c
A1  
A2  
φ
β
L
Units  
INCHES  
NOM  
MILLIMETERS*  
Dimension Limits  
MIN  
MAX  
MIN  
NOM  
8
MAX  
n
p
Number of Pins  
Pitch  
8
.026  
0.65  
Overall Height  
A
.043  
1.10  
0.95  
0.15  
6.50  
4.50  
3.10  
0.70  
8
Molded Package Thickness  
Standoff  
A2  
A1  
E
.033  
.035  
.004  
.251  
.173  
.118  
.024  
4
.037  
.006  
.256  
.177  
.122  
.028  
8
0.85  
0.05  
0.90  
0.10  
6.38  
4.40  
3.00  
0.60  
4
§
.002  
.246  
.169  
.114  
.020  
0
Overall Width  
6.25  
4.30  
2.90  
0.50  
0
Molded Package Width  
Molded Package Length  
Foot Length  
E1  
D
L
φ
Foot Angle  
c
Lead Thickness  
.004  
.007  
0
.006  
.010  
5
.008  
.012  
10  
0.09  
0.19  
0
0.15  
0.25  
5
0.20  
0.30  
10  
Lead Width  
B
α
β
Mold Draft Angle Top  
Mold Draft Angle Bottom  
0
5
10  
0
5
10  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.005” (0.127mm) per side.  
JEDEC Equivalent: MO-153  
Drawing No. C04-086  
DS21191M-page 16  
2004 Microchip Technology Inc.  
24AA128/24LC128/24FC128  
14-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)  
E
E1  
p
D
2
1
n
B
α
A
c
φ
A1  
A2  
β
L
Units  
INCHES  
NOM  
MILLIMETERS*  
Dimension Limits  
MIN  
MAX  
MIN  
NOM  
14  
MAX  
n
p
Number of Pins  
Pitch  
14  
.026  
0.65  
Overall Height  
A
.043  
1.10  
0.95  
0.15  
6.50  
4.50  
5.10  
0.70  
8
Molded Package Thickness  
Standoff  
A2  
A1  
E
.033  
.002  
.246  
.169  
.193  
.020  
0
.035  
.004  
.251  
.173  
.197  
.024  
4
.037  
.006  
.256  
.177  
.201  
.028  
8
0.85  
0.05  
0.90  
0.10  
6.38  
4.40  
5.00  
0.60  
4
§
Overall Width  
6.25  
4.30  
4.90  
0.50  
0
Molded Package Width  
Molded Package Length  
Foot Length  
E1  
D
L
φ
Foot Angle  
c
Lead Thickness  
.004  
.007  
0
.006  
.010  
5
.008  
.012  
10  
0.09  
0.19  
0
0.15  
0.25  
5
0.20  
0.30  
10  
Lead Width  
B
α
Mold Draft Angle Top  
Mold Draft Angle Bottom  
β
0
5
10  
0
5
10  
* Controlling Parameter  
§ Significant Characteristic  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed  
.005” (0.127mm) per side.  
JEDEC Equivalent: MO-153  
Drawing No. C04-087  
2004 Microchip Technology Inc.  
DS21191M-page 17  
24AA128/24LC128/24FC128  
8-Lead Plastic Micro Small Outline Package (MS) (MSOP)  
E
E1  
p
D
2
B
n
1
α
A2  
A
c
φ
A1  
(F)  
L
β
Units  
Dimension Limits  
INCHES  
NOM  
MILLIMETERS*  
MIN  
MAX  
MIN  
NOM  
8
MAX  
n
p
Number of Pins  
Pitch  
8
.026 BSC  
0.65 BSC  
Overall Height  
A
A2  
A1  
E
-
-
.043  
-
-
0.85  
-
1.10  
Molded Package Thickness  
Standoff  
.030  
.000  
.033  
-
.037  
.006  
0.75  
0.95  
0.15  
0.00  
Overall Width  
.193 TYP.  
4.90 BSC  
Molded Package Width  
Overall Length  
Foot Length  
E1  
D
.118 BSC  
.118 BSC  
3.00 BSC  
3.00 BSC  
L
.016  
.024  
.037 REF  
.031  
0.40  
0.60  
0.95 REF  
0.80  
Footprint (Reference)  
Foot Angle  
F
φ
c
0°  
.003  
.009  
5°  
-
8°  
.009  
.016  
15°  
0°  
0.08  
0.22  
5°  
-
-
-
-
-
8°  
0.23  
0.40  
15°  
Lead Thickness  
Lead Width  
.006  
B
α
β
.012  
Mold Draft Angle Top  
Mold Draft Angle Bottom  
*Controlling Parameter  
Notes:  
-
-
5°  
15°  
5°  
15°  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not  
exceed .010" (0.254mm) per side.  
JEDEC Equivalent: MO-187  
Drawing No. C04-111  
DS21191M-page 18  
2004 Microchip Technology Inc.  
24AA128/24LC128/24FC128  
8-Lead Plastic Dual Flat No Lead Package (MF) 6x5 mm Body (DFN-S)  
E
p
B
E1  
n
L
R
D1  
D
D2  
PIN 1  
EXPOSED  
METAL  
PADS  
ID  
1
2
E2  
BOTTOM VIEW  
TOP VIEW  
α
A2  
A3  
A
A1  
Units  
Dimension Limits  
INCHES  
MILLIMETERS*  
MIN  
NOM  
MAX  
MIN  
NOM  
8
MAX  
n
p
Number of Pins  
Pitch  
8
.050 BSC  
1.27 BSC  
0.85  
Overall Height  
A
A2  
A1  
A3  
E
.033  
.039  
1.00  
Molded Package Thickness  
Standoff  
.026  
.0004  
.031  
.002  
0.65  
0.80  
0.05  
.000  
.152  
0.00  
0.01  
0.20 REF.  
Base Thickness  
Overall Length  
.008 REF.  
.194 BSC  
.184 BSC  
.158  
4.92 BSC  
4.67 BSC  
Molded Package Length  
Exposed Pad Length  
Overall Width  
E1  
E2  
D
.163  
3.85  
4.00  
4.15  
.236 BSC  
.226 BSC  
.091  
5.99 BSC  
5.74 BSC  
Molded Package Width  
Exposed Pad Width  
Lead Width  
D1  
D2  
B
.085  
.014  
.020  
.097  
.019  
.030  
2.16  
0.35  
0.50  
2.31  
2.46  
0.47  
0.75  
.016  
0.40  
0.60  
.356  
Lead Length  
L
.024  
Tie Bar Width  
R
.014  
α
Mold Draft Angle Top  
12  
12  
*Controlling Parameter  
Notes:  
Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed .010” (0.254mm) per side.  
JEDEC equivalent: pending  
Drawing No. C04-113  
2004 Microchip Technology Inc.  
DS21191M-page 19  
24AA128/24LC128/24FC128  
APPENDIX A: REVISION HISTORY  
Revision L  
Corrections to Section 1.0, Electrical Characteristics.  
Revision M  
Added 1.8V 400 kHz option for 24FC128.  
DS21191M-page 20  
2004 Microchip Technology Inc.  
24AA128/24LC128/24FC128  
ON-LINE SUPPORT  
SYSTEMS INFORMATION AND  
UPGRADE HOT LINE  
Microchip provides on-line support on the Microchip  
World Wide Web site.  
The Systems Information and Upgrade Line provides  
system users a listing of the latest versions of all of  
Microchip's development systems software products.  
Plus, this line provides information on how customers  
can receive the most current upgrade kits. The Hot Line  
Numbers are:  
The web site is used by Microchip as a means to make  
files and information easily available to customers. To  
view the site, the user must have access to the Internet  
and a web browser, such as Netscape® or Microsoft®  
Internet Explorer. Files are also available for FTP  
download from our FTP site.  
1-800-755-2345 for U.S. and most of Canada, and  
1-480-792-7302 for the rest of the world.  
Connecting to the Microchip Internet  
Web Site  
042003  
The Microchip web site is available at the following  
URL:  
www.microchip.com  
The file transfer site is available by using an FTP  
service to connect to:  
ftp://ftp.microchip.com  
The web site and file transfer site provide a variety of  
services. Users may download files for the latest  
Development Tools, Data Sheets, Application Notes,  
User's Guides, Articles and Sample Programs. A vari-  
ety of Microchip specific business information is also  
available, including listings of Microchip sales offices,  
distributors and factory representatives. Other data  
available for consideration is:  
• Latest Microchip Press Releases  
Technical Support Section with Frequently Asked  
Questions  
• Design Tips  
• Device Errata  
• Job Postings  
• Microchip Consultant Program Member Listing  
• Links to other useful web sites related to  
Microchip Products  
• Conferences for products, Development Systems,  
technical information and more  
• Listing of seminars and events  
2004 Microchip Technology Inc.  
DS21191M-page 21  
24AA128/24LC128/24FC128  
READER RESPONSE  
It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-  
uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation  
can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.  
Please list the following information, and use this outline to provide us with your comments about this document.  
To:  
Technical Publications Manager  
Reader Response  
Total Pages Sent ________  
RE:  
From:  
Name  
Company  
Address  
City / State / ZIP / Country  
Telephone: (_______) _________ - _________  
FAX: (______) _________ - _________  
Application (optional):  
Would you like a reply?  
Y
N
24AA128/24LC128/24FC128  
DS21191M  
Literature Number:  
Device:  
Questions:  
1. What are the best features of this document?  
2. How does this document meet your hardware and software development needs?  
3. Do you find the organization of this document easy to follow? If not, why?  
4. What additions to the document do you think would enhance the structure and subject?  
5. What deletions from the document could be made without affecting the overall usefulness?  
6. Is there any incorrect or misleading information (what and where)?  
7. How would you improve this document?  
DS21191M-page 22  
2004 Microchip Technology Inc.  
24AA128/24LC128/24FC128  
PRODUCT IDENTIFICATION SYSTEM  
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.  
Examples:  
PART NO.  
Device  
X
/XX  
X
a) 24AA128-I/P:  
Industrial Temp.,  
Temperature  
Range  
Package  
Lead  
Finish  
1.8V, PDIP package.  
b) 24AA128T-I/SN: Tape and Reel,  
Industrial Temp., 1.8V, SOIC  
package.  
Device:  
24AA128:  
128 Kbit 1.8V I2C Serial  
EEPROM  
c) 24AA128-I/ST:  
Industrial Temp.,  
24AA128T: 128 Kbit 1.8V I2C Serial  
1.8V, TSSOP package.  
EEPROM (Tape and Reel)  
128 Kbit 2.5V I2C Serial  
EEPROM  
d) 24AA128-I/MS: Industrial Temp.,  
1.8V, MSOP package.  
24LC128:  
24LC128T: 128 Kbit 2.5V I2C Serial  
EEPROM (Tape and Reel)  
24FC128:  
e) 24LC128-E/P:  
Extended Temp.,  
2.5V, PDIP package.  
128 Kbit High Speed I2C Serial  
EEPROM  
f) 24LC128-I/SN: Industrial Temp.,  
2.5V, SOIC package.  
24FC128T: 128 Kbit High Speed I2C Serial  
EEPROM (Tape and Reel)  
g) 24LC128T-I/SN: Tape and Reel,  
Industrial Temp., 2.5V, SOIC  
package.  
Temperature  
Range:  
I
E
=
=
-40°C to +85°C  
-40°C to +125°C  
h) 24LC128-I/MS: Industrial Temp.,  
2.5V, MSOP package.  
i) 24FC128-I/P:  
Industrial Temp.,  
Package:  
P
= Plastic DIP (300 mil body), 8-lead  
1.8V, High Speed, PDIP package.  
SN = Plastic SOIC (150 mil body), 8-lead  
SM = Plastic SOIC (208 mil body), 8-lead  
ST = Plastic TSSOP (4.4 mm), 8-lead  
ST14 = Plastic TSSOP (4.4 mm), 14-lead  
MF = Dual, Flat, No Lead (DFN)(6x5 mm  
body), 8-lead  
j) 24FC128-I/SN: Industrial Temp.,  
1.8V, High Speed, SOIC package.  
k) 24FC128T-I/SN: Tape and Reel,  
Industrial Temp., 1.8V, High Speed,  
SOIC package  
l) 24LC128T-I/STG: Industrial Temp.,  
2.5V, TSSOP package, Tape & Reel,  
Pb-free  
MS = Plastic Micro Small Outline (MSOP),  
8-lead  
Lead Finish  
Blank= Standard 63%/37% Sn/Pb  
m) 24LC128-I/PG: Industrial Temp.,  
2.5V, PDIP package, Pb-free  
G
= Pb-free (Pure Matte Sn)  
Sales and Support  
Data Sheets  
Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and recom-  
mended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:  
1. Your local Microchip sales office  
2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277  
3. The Microchip Worldwide Site (www.microchip.com)  
Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.  
New Customer Notification System  
Register on our web site (www.microchip.com/cn) to receive the most current information on our products.  
2004 Microchip Technology Inc.  
DS21191M-page23  
24AA128/24LC128/24FC128  
NOTES:  
DS21191M-page24  
2004 Microchip Technology Inc.  
Note the following details of the code protection feature on Microchip devices:  
Microchip products meet the specification contained in their particular Microchip Data Sheet.  
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the  
intended manner and under normal conditions.  
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our  
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data  
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.  
Microchip is willing to work with the customer who is concerned about the integrity of their code.  
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not  
mean that we are guaranteeing the product as “unbreakable.”  
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our  
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts  
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.  
Information contained in this publication regarding device  
applications and the like is intended through suggestion only  
and may be superseded by updates. It is your responsibility to  
ensure that your application meets with your specifications.  
No representation or warranty is given and no liability is  
assumed by Microchip Technology Incorporated with respect  
to the accuracy or use of such information, or infringement of  
patents or other intellectual property rights arising from such  
use or otherwise. Use of Microchip’s products as critical  
components in life support systems is not authorized except  
with express written approval by Microchip. No licenses are  
conveyed, implicitly or otherwise, under any intellectual  
property rights.  
Trademarks  
The Microchip name and logo, the Microchip logo, Accuron,  
dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,  
PRO MATE, PowerSmart, rfPIC, and SmartShunt are  
registered trademarks of Microchip Technology Incorporated  
in the U.S.A. and other countries.  
AmpLab, FilterLab, MXDEV, MXLAB, PICMASTER, SEEVAL,  
SmartSensor and The Embedded Control Solutions Company  
are registered trademarks of Microchip Technology  
Incorporated in the U.S.A.  
Analog-for-the-Digital Age, Application Maestro, dsPICDEM,  
dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,  
FanSense, FlexROM, fuzzyLAB, In-Circuit Serial  
Programming, ICSP, ICEPIC, Migratable Memory, MPASM,  
MPLIB, MPLINK, MPSIM, PICkit, PICDEM, PICDEM.net,  
PICLAB, PICtail, PowerCal, PowerInfo, PowerMate,  
PowerTool, rfLAB, rfPICDEM, Select Mode, Smart Serial,  
SmartTel and Total Endurance are trademarks of Microchip  
Technology Incorporated in the U.S.A. and other countries.  
SQTP is a service mark of Microchip Technology Incorporated  
in the U.S.A.  
All other trademarks mentioned herein are property of their  
respective companies.  
© 2004, Microchip Technology Incorporated, Printed in the  
U.S.A., All Rights Reserved.  
Printed on recycled paper.  
Microchip received ISO/TS-16949:2002 quality system certification for  
its worldwide headquarters, design and wafer fabrication facilities in  
Chandler and Tempe, Arizona and Mountain View, California in  
October 2003. The Company’s quality system processes and  
procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping  
devices, Serial EEPROMs, microperipherals, nonvolatile memory and  
analog products. In addition, Microchip’s quality system for the design  
and manufacture of development systems is ISO 9001:2000 certified.  
2004 Microchip Technology Inc.  
DS21191M-page 25  
WORLDWIDE SALES AND SERVICE  
China - Beijing  
Korea  
AMERICAS  
Corporate Office  
2355 West Chandler Blvd.  
Chandler, AZ 85224-6199  
Tel: 480-792-7200  
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Technical Support: 480-792-7627  
Web Address: www.microchip.com  
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Tel: 86-10-85282100  
Fax: 86-10-85282104  
Tel: 82-2-554-7200 Fax: 82-2-558-5932 or  
82-2-558-5934  
Singapore  
200 Middle Road  
#07-02 Prime Centre  
Singapore, 188980  
Tel: 65-6334-8870 Fax: 65-6334-8850  
China - Chengdu  
Rm. 2401-2402, 24th Floor,  
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Tel: 86-28-86766200  
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Fax: 49-89-627-144-44  
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Italy  
India  
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Milan, Italy  
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Tel: 91-80-22290061 Fax: 91-80-22290062  
Japan  
Fax: 650-961-0286  
Toronto  
Tel: 39-0331-742611  
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Netherlands  
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Tel: 81-45-471- 6166 Fax: 81-45-471-6122  
ASIA/PACIFIC  
Australia  
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Fax: 31-416-690340  
United Kingdom  
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Berkshire, England RG41 5TU  
Tel: 44-118-921-5869  
Fax: 44-118-921-5820  
05/28/04  
DS21191M-page 26  
2004 Microchip Technology Inc.  

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