24AA128-I/WF16K_技术文档

24AA128/24LC128/24FC128

128K I²C Serial EEPROM

Device Selection Table

Part Number

VCC Range

Max. Clock Frequency Temp. Ranges

Available Packages

24AA128

1.7V-5.5V

400 kHz⁽¹⁾

I

SN, SM, ST, MF, MNY, MS, P, CSP

24LC128

24FC128

2.5V-5.5V

1.7V-5.5V

400 kHz

1 MHz⁽²⁾

I, E

I

SN, SM, ST, MF, MNY, MS, P

Note 1: 100 kHz for VCC < 2.5V.

2: 400 kHz for VCC < 2.5V.

Features

Packages

• Single Supply with Operation down to 1.7V for

24AA128/24FC128 devices, 2.5V for 24LC128

Devices

• 8-Lead SOIC, 8-Lead SOIJ, 8-Lead TSSOP,

8-Lead DFN, 8-Lead TDFN, 8-Lead MSOP,

8-Lead PDIP and 8-Ball CSP

• Low-Power CMOS Technology:

- Write current 3 mA, maximum

- Standby current 1 µA, maximum (I-temp.)

• Two-Wire Serial Interface, I²C Compatible

• Cascadable up to Eight Devices

• Schmitt Trigger Inputs for Noise Suppression

• Output Slope Control to Eliminate Ground Bounce

• 100 kHz, 400 kHz and 1 MHz Compatibility

• Page Write Time: 5 ms, Maximum

• Self-Timed Erase/Write Cycle

Description

The Microchip Technology Inc. 24XX128⁽¹⁾is a 16K x

8 (128 Kbit) Serial Electrically Erasable PROM

(EEPROM), capable of operation across a broad volt-

age range (1.7V to 5.5V). It has been developed for

advanced, low-power applications such as personal

communications or data acquisition. This device also

has a page write capability of up to 64 bytes of data.

This device is capable of both random and sequential

reads up to the 128K boundary. Functional address

lines allow up to eight devices on the same bus, for up

to 1 Mbit address space.

• 64-Byte Page Write Buffer

• Hardware Write-Protect

• ESD Protection > 4,000V

Note 1: 24XX128 is used in this document as a

generic part number for the 24AA128/

24LC128/24FC128 devices.

• More than 1 Million Erase/Write Cycles

• Data Retention > 200 years

• Factory Programming Available

• RoHS Compliant

• Temperature Ranges:

- Industrial (I):

- Extended (E)

-40C to +85C

-40C to +125C

• Automotive AEC-Q100 Qualified

Package Types

8-Lead PDIP/MSOP⁽¹⁾

8-Lead SOIC/SOIJ/TSSOP

8-Lead DFN/TDFN

8-Ball CSP

(Top View)

VCC A1 A0

A0

1

8

VCC

1

2

3

4

8

7

6

5

1

2

3

4

A0

A1

8

7

6

5

VCC

WP

A0

A1

VCC

WP

1

2

3

A1

A2

2

3

4

7

6

5

WP

4

5

WP

A2

SCL

SDA

8

6

7

SCL

SDA

A2

SCL

SDA

SDA SCL VSS

VSS

Note 1: Pins A0 and A1 are no-connects for the MSOP package only.

 2010-2019 Microchip Technology Inc.

DS20001191T-page 1

24AA128/24LC128/24FC128

Block Diagram

A0 A1 A2WP

HV Generator

I/O

Control

Logic

Memory

Control

Logic

EEPROM

Array

XDEC

Page Latches

I/O

SCL

YDEC

SDA

VCC

VSS

Sense Amp.

R/W Control

DS20001191T-page 2

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

1.0

ELECTRICAL CHARACTERISTICS

Absolute Maximum Ratings^(†)

VCC.............................................................................................................................................................................6.5V

All inputs and outputs w.r.t. VSS ..........................................................................................................-0.6V to VCC +1.0V

Storage temperature...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied................................................................................................-40°C to +125°C

ESD protection on all pins  4 kV

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

TABLE 1-1:

DC CHARACTERISTICS

Electrical Characteristics:

DC CHARACTERISTICS

Industrial (I):

Extended (E):

VCC = +1.7V to 5.5V TA = -40°C to +85°C

VCC = +2.5V to 5.5V TA = -40°C to 125°C

Param.

Symbol

No.

Characteristic

Min.

Max.

Units

Conditions

D1

D2

VIH

VIL

High-level input voltage

Low-level input voltage

0.7 VCC

—

V

—

0.3 VCC

0.2 VCC

—

VCC 2.5V

—

VCC < 2.5V

D3

D4

D5

VHYS

VOL

ILI

Hysteresis of Schmitt Trigger 0.05 VCC

inputs (SDA, SCL pins)

VCC  2.5V (Note)

Low-level output voltage

Input leakage current

Output leakage current

—

0.40

±1

V

IOL = 3.0 mA @ VCC = 4.5V

IOL = 2.1 mA @ VCC = 2.5V

—

A

VIN = VSS or VCC, WP = VSS

VIN = VSS or VCC, WP = VCC

D6

D7

ILO

—

±1

10

A

VOUT = VSS or VCC

CIN,

Pin capacitance

pF

VCC = 5.0V (Note)

COUT

(all inputs/outputs)

TA = 25°C, FCLK = 1 MHz

D8

D9

ICC Read Operating current

ICC Write

—

400

3

A

mA

A

VCC = 5.5V, SCL = 400 kHz

VCC = 5.5V

ICCS

Standby current

1

SDA = SCL = VCC = 5.5V

A0, A1, A2, WP = VSS, I-Temp

—

5

A

SDA = SCL = VCC = 5.5V

A0, A1, A2, WP = VSS, E-Temp

Note:

This parameter is periodically sampled and not 100% tested.

 2010-2019 Microchip Technology Inc.

DS20001191T-page 3

24AA128/24LC128/24FC128

TABLE 1-2:

AC CHARACTERISTICS

Electrical Characteristics:

AC CHARACTERISTICS

Industrial (I):

Extended (E):

VCC = +1.7V to 5.5V TA = -40°C to +85°C

VCC = +2.5V to 5.5V TA = -40°C to 125°C

Param.

Symbol

No.

Characteristic

Clock frequency

Min.

Max.

Units

Conditions

1.7V  VCC  2.5V

1

2

3

4

FCLK

—

100

400

1000

—

kHz

ns

2.5V  VCC  5.5V

—

1.7V  VCC  2.5V (24FC128)

2.5V  VCC  5.5V (24FC128)

1.7V  VCC  2.5V

—

THIGH

TLOW

Clock high time

Clock low time

4000

600

500

4700

1300

500

—

2.5V  VCC  5.5V

—

1.7V  VCC  2.5V (24FC128)

2.5V  VCC  5.5V (24FC128)

1.7V  VCC  2.5V

—

2.5V  VCC  5.5V

—

1.7V  VCC  2.5V (24FC128)

2.5V  VCC  5.5V (24FC128)

1.7V  VCC  2.5V

—

TR

TF

SDA and SCL rise time

(Note 1)

1000

300

100

—

2.5V  VCC  5.5V

—

1.7V  VCC  5.5V (24FC128)

All except, 24FC128

5

6

SDA and SCL fall time

(Note 1)

—

1.7V  VCC  5.5V (24FC128)

1.7V  VCC  2.5V

THD:STA Start condition hold time

4000

600

250

4700

600

250

0

—

2.5V  VCC  5.5V

—

1.7V  VCC  2.5V (24FC128)

2.5V  VCC  5.5V (24FC128)

1.7V  VCC  2.5V

—

7

TSU:STA Start condition setup time

—

2.5V  VCC  5.5V

—

1.7V  VCC  2.5V (24FC128)

2.5V  VCC  5.5V (24FC128)

(Note 2)

—

8

9

THD:DAT Data input hold time

TSU:DAT Data input setup time

—

250

100

4000

600

250

—

1.7V  VCC  2.5V

—

2.5V  VCC  5.5V

—

1.7V  VCC  5.5V (24FC128)

1.7 V  VCC  2.5V

10

TSU:STO Stop condition setup time

—

2.5 V  VCC  5.5V

—

1.7V  VCC  2.5V (24FC128)

2.5 V  VCC  5.5V (24FC128)

—

Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved

noise spike suppression. This eliminates the need for a TI specification for standard operation.

4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s website

at www.microchip.com.

DS20001191T-page 4

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

TABLE 1-2:

AC CHARACTERISTICS (CONTINUED)

Electrical Characteristics:

AC CHARACTERISTICS

Industrial (I):

Extended (E):

VCC = +1.7V to 5.5V TA = -40°C to +85°C

VCC = +2.5V to 5.5V TA = -40°C to 125°C

Param.

Symbol

No.

Characteristic

Min.

Max.

Units

Conditions

1.7V  VCC  2.5V

11

12

13

TSU:WP WP setup time

4000

600

—

ns

2.5V  VCC  5.5V

600

—

1.7V  VCC  5.5V (24FC128)

1.7V  VCC  2.5V

THD:WP WP hold time

4700

1300

—

2.5V  VCC  5.5V

—

1.7V  VCC  5.5V (24FC128)

1.7V  VCC  2.5V

TAA

Output valid from clock

(Note 2)

3500

900

400

—

2.5V  VCC  5.5V

—

1.7V  VCC  2.5V (24FC128)

2.5V  VCC  5.5V (24FC128)

1.7V  VCC  2.5V

—

14

15

TBUF

TOF

Bus Free Time: The time the

bus must be free before a

new transmission can start

4700

1300

500

—

2.5V  VCC  5.5V

—

1.7V  VCC  2.5V (24FC128)

2.5V  VCC  5.5V (24FC128)

All except, 24FC128 (Note 1)

24FC128 (Note 1)

—

Output fall time from VIH

minimum to VIL maximum

CB  100 pF

10 + 0.1CB

—

250

16

17

18

TSP

TWC

—

Input filter spike suppression

(SDA and SCL pins)

—

50

5

ns

All except, 24FC128

(Notes 1 and 3)

Write Cycle Time

(byte or page)

ms

—

Endurance

1,000,000

—

cycles 25°C, 5.5V, Page Mode (Note 4)

Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs, which provide improved

noise spike suppression. This eliminates the need for a TI specification for standard operation.

4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model, which can be obtained from Microchip’s website

at www.microchip.com.

 2010-2019 Microchip Technology Inc.

DS20001191T-page 5

24AA128/24LC128/24FC128

FIGURE 1-1:

BUS TIMING DATA

5

4

D3

2

SCL

7

3

10

8

9

SDA

IN

6

16

14

12

13

SDA

OUT

(protected)

WP

11

(unprotected)

DS20001191T-page 6

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

2.0

PIN DESCRIPTIONS

The descriptions of the pins are listed in Table 2-1.

TABLE 2-1:

PIN FUNCTION TABLE

Name SOIC

SOIJ TSSOP DFN⁽¹⁾TDFN⁽¹⁾MSOP

PDIP

CSP

Function

A0

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

1

2

3

4

5

6

7

8

—

3

1

2

3

4

5

6

7

8

3

2

5

8

6

7

4

1

User Configurable Chip Select

Ground

A1

A2

VSS

SDA

SCL

WP

VCC

4

5

Serial Address/Data I/O

Serial Clock

6

7

Write-Protect Input

8

Power Supply

Note 1: The exposed pad on the DFN/TDFN package can be connected to VSS or left floating.

2.1

A0, A1, A2 Chip Address Inputs

2.3

Serial Clock (SCL)

The A0, A1 and A2 inputs are used by the 24XX128 for

multiple device operations. The levels on these inputs

are compared with the corresponding bits in the slave

address. The chip is selected if the compare is true.

This input is used to synchronize the data transfer to

and from the device.

2.4

Write-Protect (WP)

Note:

For the MSOP package only, pins A0 and

A1 are not connected.

This pin must be connected to either VSS or VCC. If tied

to VSS, write operations are enabled. If tied to VCC,

write operations are inhibited but read operations are

not affected.

Up to eight devices (two for the MSOP package) may

be connected to the same bus by using different Chip

Select bit combinations. These inputs must be

connected to either VCC or VSS.

In most applications, the chip address inputs A0, A1

and A2 are hardwired to logic ‘0’ or logic ‘1’. For

applications in which these pins are controlled by a

microcontroller or other programmable device, the chip

address pins must be driven to logic ‘0’ or logic ‘1’

before normal device operation can proceed.

2.2

Serial Data (SDA)

This is a bidirectional pin used to transfer addresses

and data into and out of the device. It is an open-drain

terminal. Therefore, the SDA bus requires a pull-up

resistor to VCC (typical 10 k for 100 kHz, 2 k for

400 kHz and 1 MHz).

For normal data transfer, SDA is allowed to change

only during SCL low. Changes during SCL high are

reserved for indicating the Start and Stop conditions.

 2010-2019 Microchip Technology Inc.

DS20001191T-page 7

24AA128/24LC128/24FC128

4.4

Data Valid (D)

3.0

FUNCTIONAL DESCRIPTION

The state of the data line represents valid data when,

after a Start condition, the data line is stable for the

duration of the high period of the clock signal.

The 24XX128 supports a bidirectional two-wire bus and

data transmission protocol. A device that sends data

onto the bus is defined as a transmitter and a device

receiving data as a receiver. The bus must be

controlled by a master device which generates the

Serial Clock (SCL), controls the bus access and

generates the Start and Stop conditions while the

24XX128 works as a slave. Both master and slave can

operate as a transmitter or receiver, but the master

device determines which mode is activated.

The data on the line must be changed during the low

period of the clock signal. There is one bit of data per

clock pulse.

Each data transfer is initiated with a Start condition and

terminated with a Stop condition. The number of the

data bytes transferred between the Start and Stop

conditions is determined by the master device and is,

theoretically, unlimited (although only the last 64 will be

stored when doing a write operation). When an

overwrite does occur, it will replace data in a

First-In First-Out (FIFO) principle.

4.0

BUS CHARACTERISTICS

The following bus protocol has been defined:

• Data transfer may be initiated only when the bus

is not busy.

4.5

Acknowledge

• During data transfer, the data line must remain

stable whenever the clock line is high. Changes in

the data line while the clock line is high will be

interpreted as a Start or Stop condition.

Each receiving device, when addressed, is obliged to

generate an Acknowledge signal after the reception of

each byte. The master device must generate an extra

clock pulse, which is associated with this Acknowledge

bit.

Accordingly, the following bus conditions have been

defined (Figure 4-1).

Note: The 24XX128 does not generate any

Acknowledge bits if an internal

programming cycle is in progress.

4.1

Bus Not Busy (A)

Both data and clock lines remain high.

A device that acknowledges must pull down the SDA

line during the Acknowledge clock pulse in such a way

that the SDA line is stable-low during the high period of

the Acknowledge-related clock pulse. Moreover, setup

and hold times must be taken into account. During

reads, a master must signal an end of data to the slave

by not generating an Acknowledge bit on the last byte

that has been clocked out of the slave. In this case, the

slave (24XX128) will leave the data line high to enable

the master to generate the Stop condition.

4.2

Start Data Transfer (B)

A high-to-low transition of the SDA line while the clock

(SCL) is high determines a Start condition. All

commands must be preceded by a Start condition.

4.3

Stop Data Transfer (C)

A low-to-high transition of the SDA line while the clock

(SCL) is high determines a Stop condition. All

operations must end with a Stop condition.

FIGURE 4-1:

DATA TRANSFER SEQUENCE ON THE SERIAL BUS

(A)

(B)

(D)

(C) (A)

SCL

SDA

Start

Condition

Address or

Acknowledge

Valid

Data

Allowed

to Change

Stop

Condition

DS20001191T-page 8

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

FIGURE 4-2:

ACKNOWLEDGE TIMING

Acknowledge

Bit

1

2

3

4

5

6

7

8

9

1

2

3

SCL

SDA

Data from transmitter

Transmitter must release the SDA line at this point,

allowing the Receiver to pull the SDA line low to

acknowledge the previous eight bits of data.

Receiver must release the SDA line

at this point, allowing the Transmitter

to can continue sending data.

 2010-2019 Microchip Technology Inc.

DS20001191T-page 9

24AA128/24LC128/24FC128

FIGURE 5-1:

CONTROL BYTE

FORMAT

5.0

DEVICE ADDRESSING

A control byte is the first byte received following the

Start condition from the master device. The control byte

consists of a 4-bit control code. For the 24XX128, this

is set as ‘1010’ binary for read and write operations.

The next three bits of the control byte are the Chip

Select bits (A2, A1, A0). The Chip Select bits allow the

use of up to eight 24XX128 devices on the same bus

and are used to select which device is accessed. The

Chip Select bits in the control byte must correspond to

the logic levels on the corresponding A2, A1 and A0

pins for the device to respond. These bits, in effect, are

the three Most Significant bits of the word address. The

combination of the 4-bit control code and the next three

bits are called the slave address.

Read/Write Bit

Chip Select

Bits

Control Code

S

1

0

1

0

A2 A1 A0 R/W ACK

Slave Address

Start Bit

Acknowledge Bit

5.1

Contiguous Addressing Across

Multiple Devices

For the MSOP package, the A0 and A1 pins are not

connected. During device addressing, the A0 and A1

Chip Select bits (Figures 5-1 and 5-2) should be set to

‘0’. Only two 24XX128 MSOP packages can be

connected to the same bus.

The Chip Select bits A2, A1 and A0 can be used to

expand the contiguous address space for up to 1 Mbit

by adding up to eight 24XX128 devices on the same

bus. In this case, software can use A0 of the control

byte as address bit A14; A1 as address bit A15; and A2

as address bit A16. It is not possible to sequentially

read across device boundaries.

The last bit of the control byte is the Read/Write (R/W)

bit and it defines the operation to be performed. When

set to a ‘1’, a read operation is selected. When set to a

‘0’, a write operation is selected. The next two bytes

received define the address of the first data byte

(Figure 5-2). Because only A13…A0 are used, the

upper two address bits are “don’t care” bits. The upper

address bits are transferred first, followed by the Less

Significant bits.

For the MSOP package, up to two 24XX128 devices

can be added for up to 256 Kbit of address space. In

this case, software can use A2 of the control byte as

address bit A16. Bits A0 (A14) and A1 (A15) of the

control byte must always be set to logic ‘0’ for the

MSOP.

Following the Start condition, the 24XX128 monitors

the SDA bus checking the device type identifier being

transmitted. Upon receiving a ‘1010’ code and

appropriate device select bits, the slave device outputs

an Acknowledge signal on the SDA line. Depending on

the state of the R/W bit, the 24XX128 will select a read

or write operation.

FIGURE 5-2:

ADDRESS SEQUENCE BIT ASSIGNMENTS

Control Byte

Address High Byte

Address Low Byte

A

13

A

2

A

1

A

0

A

10

A

9

A

8

A

7

A

0

•

1

0

1

0

R/W

x

12 11

Control

Code

Chip

Select

Bits

x = “don’t care” bit

DS20001191T-page 10

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

once the master has transmitted a Stop condition.

Upon receipt of each word, the six lower Address

Pointer bits, which form the byte counter, are internally

incremented by one. If the master should transmit more

than 64 bytes prior to generating the Stop condition, the

address counter will roll over and the previously

received data will be overwritten. As with the byte write

operation, once the Stop condition is received, an inter-

nal write cycle will begin (Figure 6-1). If an attempt is

made to write to the array with the WP pin held high, the

device will acknowledge the command, but no write

cycle will occur, no data will be written and the device

will immediately accept a new command.

6.0

6.1

WRITE OPERATIONS

Byte Write

Following the Start condition from the master, the

control code (four bits), the Chip Select (three bits) and

the R/W bit (which is a logic low) are clocked onto the

bus by the master transmitter. This indicates to the

addressed slave receiver that the address high byte will

follow after it has generated an Acknowledge bit during

the ninth clock cycle. Therefore, the next byte

transmitted by the master is the high-order byte of the

word address and will be written into the Address

Pointer of the 24XX128. The next byte is the Least

Significant Address Byte. After receiving another

Acknowledge signal from the 24XX128, the master

device will transmit the data word to be written into the

addressed memory location. The 24XX128 acknowl-

edges again and the master generates a Stop

condition. This initiates the internal write cycle and

during this time, the 24XX128 will not generate

Acknowledge signals (Figure 6-1). If an attempt is

made to write to the array with the WP pin held high, the

device will acknowledge the command, but no write

cycle will occur, no data will be written, and the device

will immediately accept a new command. After a byte

write command, the internal address counter will point

to the address location following the one that was just

written.

Note: Page write operations are limited to

writing bytes within a single physical

page, regardless of the number of

bytes actually being written. Physical

page boundaries start at addresses

that are integer multiples of the page

buffer size (or ‘page size’) and end at

addresses that are integer multiples of

page size – 1. If a page write

command attempts to write across a

physical page boundary, the result is

that the data wraps around to the

beginning of the current page (over-

writing data previously stored there),

instead of being written to the next

page, as might be expected. It is,

therefore, necessary for the applica-

tion software to prevent page write

operations that would attempt to cross

a page boundary.

Note:

When doing a write of less than 64 bytes

the data in the rest of the page is

refreshed along with the data bytes being

written. This will force the entire page to

endure a write cycle, for this reason

endurance is specified per page.

6.3

Write Protection

The WP pin allows the user to write-protect the entire

array (0000-3FFF) when the pin is tied to VCC. If tied to

VSS the write protection is disabled. The WP pin is

sampled at the Stop bit for every write command

(Figure 1-1). Toggling the WP pin after the Stop bit will

have no effect on the execution of the write cycle.

6.2

Page Write

The write control byte, word address, and the first data

byte are transmitted to the 24XX128 in much the same

way as in a byte write. The exception is that instead of

generating a Stop condition, the master transmits up to

63 additional bytes, which are temporarily stored in the

on-chip page buffer, and will be written into memory

FIGURE 6-1:

BYTE WRITE

S

Bus Activity

Master

T

S

Control

Byte

Address

High Byte

Address

Low Byte

A

T

O

P

Data

R

T

A A A

S 1 0 1 0

2 1 0

SDA Line

x x

0

P

A

C

K

A

C

K

A

C

K

A

C

K

Bus Activity

x = “don’t care” bit

 2010-2019 Microchip Technology Inc.

DS20001191T-page 11

24AA128/24LC128/24FC128

FIGURE 6-1:

PAGE WRITE

S

T

S

Control

Byte

Address

High Byte

Address

Low Byte

Bus Activity

Master

A

T

Data Byte 0

Data Byte 63

R

O

P

T

A A A

SDA Line

x x

P

S 1 0 1 0

0

2 1 0

A

C

K

A

C

K

A

C

K

A

C

K

A

C

K

Bus Activity

x = “don’t care” bit

FIGURE 7-1:

ACKNOWLEDGE

POLLING FLOW

7.0

ACKNOWLEDGE POLLING

Since the device will not acknowledge during a write

cycle, this can be used to determine when the cycle is

complete (this feature can be used to maximize bus

throughput). Once the Stop condition for a write

command has been issued from the master, the device

initiates the internally timed write cycle. ACK polling

can be initiated immediately. This involves the master

sending a Start condition, followed by the control byte

for a write command (R/W = 0). If the device is still busy

with the write cycle, then no ACK will be returned. If no

ACK is returned, the Start bit and control byte must be

resent. If the cycle is complete, then the device will

return the ACK and the master can then proceed with

the next read or write command. See Figure 7-1 for

flow diagram.

Send

Write Command

Send Stop

Condition to

Initiate Write Cycle

Send Start

Send Control Byte

with R/W = 0

Did Device

Acknowledge

(ACK = 0)?

No

Yes

DS20001191T-page 12

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

8.2

Random Read

8.0

READ OPERATION

Random read operations allow the master to access

any memory location in a random manner. To perform

this type of read operation, the word address must first

be set. This is done by sending the word address to the

24XX128 as part of a write operation (R/W bit set to

‘0’). Once the word address is sent, the master gener-

ates a Start condition following the Acknowledge. This

terminates the write operation, but not before the inter-

nal Address Pointer is set. The master then issues the

control byte again, but with the R/W bit set to a ‘1’. The

24XX128 will then issue an Acknowledge and transmit

the 8-bit data word. The master will not acknowledge

the transfer but does generate a Stop condition, which

causes the 24XX128 to discontinue transmission

(Figure 8-2). After a random read command, the

internal address counter will point to the address

location following the one that was just read.

Read operations are initiated in much the same way as

write operations with the exception that the R/W bit of

the control byte is set to one. There are three basic

types of read operations: current address read, random

read and sequential read.

8.1

Current Address Read

The 24XX128 contains an address counter that main-

tains the address of the last word accessed, internally

incremented by one. Therefore, if the previous read

access was to address n (n is any legal address), the

next current address read operation would access data

from address n + 1.

Upon receipt of the control byte with R/W bit set to ‘1’,

the 24XX128 issues an acknowledge and transmits the

8-bit data word. The master will not acknowledge the

transfer, but does generate a Stop condition and the

24XX128 discontinues transmission (Figure 8-1).

8.3

Sequential Read

Sequential reads are initiated in the same way as a

random read except that after the 24XX128 transmits

the first data byte, the master issues an Acknowledge

(as opposed to the Stop condition used in a random

read). This Acknowledge directs the 24XX128 to

transmit the next sequentially addressed 8-bit word

(Figure 8-3). Following the final byte transmitted to the

master, the master will not generate an Acknowledge

but will generate a Stop condition.

FIGURE 8-1:

CURRENT ADDRESS

READ

S

T

A

R

T

S

T

O

P

Bus Activity

Master

Data

Byte

Control

Byte

A A A

2 1 0

SDA Line

S 1 0 1 0

1

P

A

C

K

N

O

Bus Activity

To provide sequential reads, the 24XX128 contains an

internal Address Pointer which is incremented by one

at the completion of each operation. This Address

Pointer allows the entire memory contents to be serially

read during one operation. The internal Address

Pointer will automatically roll over from address 3FFF

to address 0000 if the master acknowledges the byte

received from the array address 3FFF.

A

C

K

FIGURE 8-2:

RANDOM READ

S

T

A

R

T

S

Bus Activity

Master

T

A

R

T

S

T

O

P

Control

Byte

Address

High Byte

Address

Low Byte

Control

Byte

Data

Byte

A A A

2 1 0

A A A

2 1 0

SDA Line

x x

S 1 0 1 0

0

S 1 0 1 0

1

P

N

O

A

C

K

A

C

K

A

C

K

A

C

K

A

C

K

Bus Activity

x = “don’t care” bit

 2010-2019 Microchip Technology Inc.

DS20001191T-page 13

24AA128/24LC128/24FC128

FIGURE 8-3:

SEQUENTIAL READ

S

T

O

P

Control

Byte

Bus Activity

Master

Data (n)

Data (n + 1)

Data (n + x)

Data (n + 2)

P

SDA Line

N

O

A

C

K

A

C

K

A

C

K

A

C

K

A

C

K

Bus Activity

DS20001191T-page 14

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

9.0

9.1

PACKAGING INFORMATION

Package Marking Information

8-Lead SOIC (3.90 mm)

Example:

24LC128I

XXXXXXXX

XXXXYYWW

SN

0510

e

3

NNN

017

8-Lead SOIJ (5.28 mm)

Example:

24LC128

XXXXXXXX

YYWWNNN

e

3

I/SM

0510017

Example:

8-Lead TSSOP

XXXX

XYWW

4LC

I510

NNN

017

8-Lead DFN-S

Example:

24LC128

XXXXXXX

YYWW

I/MF

0510

017

NNN

8-Lead 2x3 TDFN

Example:

XXX

YWW

NN

A84

510

I7

 2010-2019 Microchip Technology Inc.

DS20001191T-page 15

24AA128/24LC128/24FC128

Package Marking Information (Continued)

8-Lead MSOP

Example:

XXXXXX

4L128I

051017

YWWNNN

8-Lead PDIP (300 mil)

Example:

24AA128

XXXXXXXX

XXXXXNNN

YYWW

I/P

017

e

3

0510

8-Lead Chip Scale

Example:

XXXXXXX

24AA128

0810017

YYWWNNN

1st Line Marking Codes

SOIJ PDIP

Part Number

TSSOP

MSOP

SOIC

DFN

TDFN

CSP

I-Temp E-Temp

24AA128

24LC128

24FC128

4AC

4LC

4FC

4A128T⁽¹⁾24AA128T⁽¹⁾24AA128 24AA128 24AA128

4L128T⁽¹⁾24LC128T⁽¹⁾24LC128

24LC128 24LC128

4F128T⁽¹⁾24FC128T⁽¹⁾24FC128 24FC128 24FC128

A81

A84

A8A

—

A85

—

24AA128

—

Note 1: T = Temperature grade (I, E)

Legend: XX...X Part number or part number code

T

Temperature (I, E)

Y

Year code (last digit of calendar year)

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

YY

WW

NNN

Alphanumeric traceability code (2 characters for small packages)

JEDEC^®designator for Matte Tin (Sn)

e

3

* Standard OTP marking consists of Microchip part number, year code, week code

and traceability code.

Note: For very small packages with no room for the JEDEC^®designator

e

3

, the marking will only appear on the outer carton or reel label.

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

DS20001191T-page 16

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

2X

0.10 C A–B

D

A

D

NOTE 5

N

E

2

E1

2

E1

E

1

2

NOTE 1

e

NX b

0.25

C A–B D

B

NOTE 5

TOP VIEW

0.10 C

C

A2

A

SEATING

PLANE

8X

SIDE VIEW

A1

h

R0.13

h

H

0.23

L

SEE VIEW C

(L1)

VIEW A–A

VIEW C

Microchip Technology Drawing No. C04-057-SN Rev E Sheet 1 of 2

 2010-2019 Microchip Technology Inc.

DS20001191T-page 17

24AA128/24LC128/24FC128

8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm (.150 In.) Body [SOIC]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

Units

MILLIMETERS

Dimension Limits

MIN

NOM

MAX

Number of Pins

Pitch

N

e

8

1.27 BSC

Overall Height

Molded Package Thickness

Standoff

Overall Width

A

-

1.75

-

0.25

A2

A1

E

1.25

0.10

§

6.00 BSC

Molded Package Width

Overall Length

E1

D

3.90 BSC

4.90 BSC

Chamfer (Optional)

Foot Length

h

L

0.25

0.40

-

0.50

1.27

Footprint

L1

1.04 REF

Foot Angle

Lead Thickness

Lead Width

Mold Draft Angle Top

Mold Draft Angle Bottom

0°

0.17

0.31

5°

-

8°

c

b

0.25

0.51

15°

5°

15°

Notes:

1. Pin 1 visual index feature may vary, but must be located within the hatched area.

2. § Significant Characteristic

3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or

protrusions shall not exceed 0.15mm per side.

4. Dimensioning and tolerancing per ASME Y14.5M

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

REF: Reference Dimension, usually without tolerance, for information purposes only.

5. Datums A & B to be determined at Datum H.

Microchip Technology Drawing No. C04-057-SN Rev E Sheet 2 of 2

DS20001191T-page 18

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

8-Lead Plastic Small Outline (SN) - Narrow, 3.90 mm Body [SOIC]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

SILK SCREEN

C

Y1

X1

E

RECOMMENDED LAND PATTERN

Units

Dimension Limits

MILLIMETERS

NOM

MIN

MAX

Contact Pitch

E

C

X1

Y1

1.27 BSC

5.40

Contact Pad Spacing

Contact Pad Width (X8)

Contact Pad Length (X8)

0.60

1.55

Notes:

1. Dimensioning and tolerancing per ASME Y14.5M

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

Microchip Technology Drawing C04-2057-SN Rev E

 2010-2019 Microchip Technology Inc.

DS20001191T-page 19

24AA128/24LC128/24FC128

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS20001191T-page 20

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2010-2019 Microchip Technology Inc.

DS20001191T-page 21

24AA128/24LC128/24FC128

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS20001191T-page 22

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

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 2010-2019 Microchip Technology Inc.

DS20001191T-page 23

24AA128/24LC128/24FC128

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS20001191T-page 24

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

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+ꢁꢓꢓꢅ.ꢖ/

:ꢁꢓꢓꢅ.ꢖ/

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*#ꢑꢌ ꢉ"ꢅꢂꢇ"ꢅ5ꢉꢄꢔ%ꢎ

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ꢐꢏ

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M

ꢓꢁ:ꢓ

M

"ꢛꢊꢃꢉ#

ꢀꢁ ꢂꢃꢄꢅꢀꢅꢆꢃ !ꢇꢈꢅꢃꢄ"ꢉ#ꢅ$ꢉꢇ%!ꢊꢉꢅ&ꢇꢋꢅꢆꢇꢊꢋ'ꢅ(!%ꢅ&! %ꢅ(ꢉꢅꢈꢌꢍꢇ%ꢉ"ꢅ)ꢃ%ꢎꢃꢄꢅ%ꢎꢉꢅꢎꢇ%ꢍꢎꢉ"ꢅꢇꢊꢉꢇꢁ

ꢏꢁ ꢂꢇꢍ2ꢇꢔꢉꢅ&ꢇꢋꢅꢎꢇꢆꢉꢅꢌꢄꢉꢅꢌꢊꢅ&ꢌꢊꢉꢅꢉ#ꢑꢌ ꢉ"ꢅ%ꢃꢉꢅ(ꢇꢊ ꢅꢇ%ꢅꢉꢄ" ꢁ

,ꢁ ꢂꢇꢍ2ꢇꢔꢉꢅꢃ ꢅ ꢇ)ꢅ ꢃꢄꢔ!ꢈꢇ%ꢉ"ꢁ

ꢗꢁ ꢐꢃ&ꢉꢄ ꢃꢌꢄꢃꢄꢔꢅꢇꢄ"ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢃꢄꢔꢅꢑꢉꢊꢅꢕꢖꢒ*ꢅ-ꢀꢗꢁ+ꢒꢁ

.ꢖ/0 .ꢇ ꢃꢍꢅꢐꢃ&ꢉꢄ ꢃꢌꢄꢁꢅꢘꢎꢉꢌꢊꢉ%ꢃꢍꢇꢈꢈꢋꢅꢉ#ꢇꢍ%ꢅꢆꢇꢈ!ꢉꢅ ꢎꢌ)ꢄꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ ꢁ

ꢙ*10 ꢙꢉ$ꢉꢊꢉꢄꢍꢉꢅꢐꢃ&ꢉꢄ ꢃꢌꢄ'ꢅ! !ꢇꢈꢈꢋꢅ)ꢃ%ꢎꢌ!%ꢅ%ꢌꢈꢉꢊꢇꢄꢍꢉ'ꢅ$ꢌꢊꢅꢃꢄ$ꢌꢊ&ꢇ%ꢃꢌꢄꢅꢑ!ꢊꢑꢌ ꢉ ꢅꢌꢄꢈꢋꢁ

ꢒꢃꢍꢊꢌꢍꢎꢃꢑ ꢘꢉꢍꢎꢄꢌꢈꢌꢔꢋ ꢐꢊꢇ)ꢃꢄꢔ /ꢓꢗꢞꢀꢏꢏ.

 2010-2019 Microchip Technology Inc.

DS20001191T-page 25

24AA128/24LC128/24FC128

"ꢛꢊꢃ# 1ꢌꢊꢅ%ꢎꢉꢅ&ꢌ %ꢅꢍ!ꢊꢊꢉꢄ%ꢅꢑꢇꢍ2ꢇꢔꢉꢅ"ꢊꢇ)ꢃꢄꢔ 'ꢅꢑꢈꢉꢇ ꢉꢅ ꢉꢉꢅ%ꢎꢉꢅꢒꢃꢍꢊꢌꢍꢎꢃꢑꢅꢂꢇꢍ2ꢇꢔꢃꢄꢔꢅꢖꢑꢉꢍꢃ$ꢃꢍꢇ%ꢃꢌꢄꢅꢈꢌꢍꢇ%ꢉ"ꢅꢇ%ꢅ

ꢎ%%ꢑ033)))ꢁ&ꢃꢍꢊꢌꢍꢎꢃꢑꢁꢍꢌ&3ꢑꢇꢍ2ꢇꢔꢃꢄꢔ

DS20001191T-page 26

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.8 mm Body [TDFN]

With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

D

A

B

E

N

(DATUM A)

(DATUM B)

NOTE 1

2X

0.15 C

2X

1

2

0.15 C

TOP VIEW

0.10 C

(A3)

C

A

SEATING

PLANE

8X

A1

L

0.08 C

C A B

SIDE VIEW

0.10

D2

1

2

0.10

C A B

NOTE 1

E2

K

N

8X b

0.10

0.05

C A B

C

e

BOTTOM VIEW

Microchip Technology Drawing No. C04-129-MN Rev E Sheet 1 of 2

 2010-2019 Microchip Technology Inc.

DS20001191T-page 27

24AA128/24LC128/24FC128

8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.8 mm Body [TDFN]

With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

Units

Dimension Limits

MILLIMETERS

NOM

MIN

MAX

Number of Pins

Pitch

Overall Height

Standoff

Contact Thickness

Overall Length

Overall Width

Exposed Pad Length

Exposed Pad Width

Contact Width

Contact Length

N

8

e

0.50 BSC

0.75

A

A1

A3

D

0.70

0.00

0.80

0.05

0.02

0.20 REF

2.00 BSC

3.00 BSC

1.40

E

D2

E2

b

L

K

1.35

1.25

0.20

0.25

0.20

1.45

1.35

0.30

0.45

-

1.30

0.25

0.30

-

Contact-to-Exposed Pad

Notes:

1. Pin 1 visual index feature may vary, but must be located within the hatched area.

2. Package may have one or more exposed tie bars at ends.

3. Package is saw singulated

4. Dimensioning and tolerancing per ASME Y14.5M

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

REF: Reference Dimension, usually without tolerance, for information purposes only.

Microchip Technology Drawing No. C04-129-MN Rev E Sheet 2 of 2

DS20001191T-page 28

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

8-Lead Plastic Dual Flat, No Lead Package (MN) – 2x3x0.8 mm Body [TDFN]

With 1.4x1.3 mm Exposed Pad (JEDEC Package type WDFN)

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

X2

EV

8

ØV

C

Y2

EV

Y1

1

2

SILK SCREEN

X1

E

RECOMMENDED LAND PATTERN

Units

Dimension Limits

E

MILLIMETERS

NOM

0.50 BSC

MIN

MAX

Contact Pitch

Optional Center Pad Width

Optional Center Pad Length

Contact Pad Spacing

X2

Y2

C

1.60

1.50

2.90

Contact Pad Width (X8)

Contact Pad Length (X8)

Thermal Via Diameter

Thermal Via Pitch

X1

Y1

V

0.25

0.85

0.30

1.00

EV

Notes:

1. Dimensioning and tolerancing per ASME Y14.5M

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

2. For best soldering results, thermal vias, if used, should be filled or tented to avoid solder loss during

reflow process

Microchip Technology Drawing No. C04-129-MN Rev. B

 2010-2019 Microchip Technology Inc.

DS20001191T-page 29

24AA128/24LC128/24FC128

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS20001191T-page 30

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2010-2019 Microchip Technology Inc.

DS20001191T-page 31

24AA128/24LC128/24FC128

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS20001191T-page 32

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

D

A

N

B

E1

NOTE 1

1

2

TOP VIEW

E

A2

A

C

PLANE

L

c

A1

e

eB

8X b1

8X b

.010

C

SIDE VIEW

END VIEW

Microchip Technology Drawing No. C04-018D Sheet 1 of 2

 2010-2019 Microchip Technology Inc.

DS20001191T-page 33

24AA128/24LC128/24FC128

8-Lead Plastic Dual In-Line (P) - 300 mil Body [PDIP]

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

ALTERNATE LEAD DESIGN

(VENDOR DEPENDENT)

DATUM A

b

e

2

e

2

e

Units

Dimension Limits

INCHES

NOM

8

.100 BSC

-

MIN

MAX

Number of Pins

Pitch

N

e

A

Top to Seating Plane

-

.210

.195

-

Molded Package Thickness

Base to Seating Plane

Shoulder to Shoulder Width

Molded Package Width

Overall Length

Tip to Seating Plane

Lead Thickness

Upper Lead Width

A2

A1

E

E1

D

L

c

b1

b

eB

.115

.015

.290

.240

.348

.115

.008

.040

.014

-

.130

-

.310

.250

.365

.130

.010

.060

.018

-

.325

.280

.400

.150

.015

.070

.022

.430

Lower Lead Width

Overall Row Spacing

§

Notes:

1. Pin 1 visual index feature may vary, but must be located within the hatched area.

2. § Significant Characteristic

3. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or

protrusions shall not exceed .010" per side.

4. Dimensioning and tolerancing per ASME Y14.5M

BSC: Basic Dimension. Theoretically exact value shown without tolerances.

Microchip Technology Drawing No. C04-018D Sheet 2 of 2

DS20001191T-page 34

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2010-2019 Microchip Technology Inc.

DS20001191T-page 35

24AA128/24LC128/24FC128

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

DS20001191T-page 36

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

Note: For the most current package drawings, please see the Microchip Packaging Specification located at

http://www.microchip.com/packaging

 2010-2019 Microchip Technology Inc.

DS20001191T-page 37

24AA128/24LC128/24FC128

APPENDIX A: REVISION HISTORY

Revision T (08/2019)

Updated Packaging; Updated content throughout for

clarification.

Revision S (05/2010)

Added TDFN Package; Updated Package Drawings

and Product ID.

Revision R (04/2009)

Updated Chip Scale package.

Revision Q (6/2008)

Updated packaging; Added Chip Scale package.

Revision P

Changed 1.8V to 1.7V throughout document; Revised

Features Section; Replaced Package Drawings;

Revised Product ID Section.

Revision N

Revised Sections 2.1, 2.4 and 6.3. Removed 14-Lead

TSSOP Package.

Revision M

Added 1.8V 400 kHz option for 24FC128.

Revision L

Corrections to Section 1.0, Electrical Characteristics.

DS20001191T-page 38

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

THE MICROCHIP WEBSITE

CUSTOMER SUPPORT

Microchip provides online support via our website at

www.microchip.com. This website is used as a means

to make files and information easily available to

customers. Accessible by using your favorite Internet

browser, the website contains the following information:

Users of Microchip products can receive assistance

through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

• Product Support – Data sheets and errata,

application notes and sample programs, design

resources, user’s guides and hardware support

documents, latest software releases and archived

software

Customers

should

contact

their

distributor,

representative or Field Application Engineer (FAE) for

support. Local sales offices are also available to help

customers. A listing of sales offices and locations is

included in the back of this document.

• General Technical Support – Frequently Asked

Questions (FAQ), technical support requests,

online discussion groups, Microchip consultant

program member listing

Technical support is available through the website

at: http://microchip.com/support

• Business of Microchip – Product selector and

ordering guides, latest Microchip press releases,

listing of seminars and events, listings of

Microchip sales offices, distributors and factory

representatives

CUSTOMER CHANGE NOTIFICATION

SERVICE

Microchip’s customer notification service helps keep

customers current on Microchip products. Subscribers

will receive e-mail notification whenever there are

changes, updates, revisions or errata related to a

specified product family or development tool of interest.

To register, access the Microchip website at

www.microchip.com. Under “Support”, click on

“Customer Change Notification” and follow the

registration instructions.

 2010-2019 Microchip Technology Inc.

DS20001191T-page 39

24AA128/24LC128/24FC128

NOTES:

DS20001191T-page 40

 2010-2019 Microchip Technology Inc.

24AA128/24LC128/24FC128

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Examples:

PART NO.

Device

X⁽¹⁾

X

/XX

a) 24AA128-I/P:

Industrial Temp.,

Tape and Reel

Option

Temperature

Range

Package

1.7V, PDIP package.

b) 24AA128T-I/SN: Tape and Reel,

Industrial Temp., 1.7V, SOIC

package.

Device:

24AA128:

24LC128:

24FC128:

1.7V, 128-Kbit I²C Serial EEPROM

2.5V, 128-Kbit I²C Serial EEPROM

1.7V, High Speed, 128-Kbit I²C

Serial EEPROM

c) 24AA128-I/ST:

Industrial Temp.,

1.7V, TSSOP package.

d) 24AA128-I/MS: Industrial Temp.,

1.7V, MSOP package.

Tape and Reel Blank

= Standard packaging (tube or tray)

= Tape and Reel^{( 1)}

e) 24AA128T-I/CS15K:Tape and Reel,

Industrial Temp., 1.7V, Chip Scale

package.

T

Temperature

Range:

I

E

=

-40C to +85C (Industrial)

-40C to +125C (Extended)

f) 24LC128-E/P:

Extended Temp.,

2.5V, PDIP package.

g) 24LC128-I/SN: Industrial Temp.,

2.5V, SOIC package.

Package:

SN

SM

ST

= Plastic Small Outline - Narrow,

3.90 mm Body, 8-lead (SOIC)

= Plastic Small Outline - Medium,

5.28 mm Body, 8-lead (SOIJ)

= Plastic Thin Shrink Small Outline,

4.4 mm, 8-lead (TSSOP)

h) 24LC128T-I/SN: Tape and Reel,

Industrial Temp., 2.5V, SOIC

package.

i) 24LC128-I/MS: Industrial Temp.,

2.5V, MSOP package.

MF

= Plastic Dual Flat, No Lead Package

5x6x0.85 mm Body,

j) 24LC128T-I/MNY: Tape and Reel,

Industrial Temp., 2.5V, TDFN

package.

8-lead (DFN-S)

MNY

MS

= Plastic Dual Flat, No Lead Package

2x3x0.8 mm Body, 8-lead (TDFN)

= Plastic Micro Small Outline

Package, 8-lead (MSOP)

= Plastic Dual In-Line - 300 mil Body,

8-lead (PDIP)

k) 24FC128-I/P:

Industrial Temp.,

1.7V, High Speed, PDIP package.

l) 24FC128-I/SN: Industrial Temp.,

1.7V, High Speed, SOIC package.

P

CS15K^{( 2)}

= Chip Scale, 8-lead (CSP)

m) 24FC128T-I/SN: Tape and Reel,

Industrial Temp., 1.7V, High Speed,

SOIC package

Note 1: Tape and Reel identifier only

appears in the catalog part number

description. This identifier is used for

ordering purposes and is not printed

on the device package. Check with

your Microchip Sales Office for pack-

age availability with the Tape and

Reel option.

2: 15K indicates 150K technology.

3: Contact Microchip for Automotive

grade ordering part numbers.

 2010-2019 Microchip Technology Inc.

DS20001191T-page41

24AA128/24LC128/24FC128

NOTES:

DS20001191T-page 42

 2010-2019 Microchip Technology Inc.

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

•

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR

WARRANTIES OF ANY KIND WHETHER EXPRESS OR

IMPLIED, WRITTEN OR ORAL, STATUTORY OR

OTHERWISE, RELATED TO THE INFORMATION,

INCLUDING BUT NOT LIMITED TO ITS CONDITION,

QUALITY, PERFORMANCE, MERCHANTABILITY OR

FITNESS FOR PURPOSE. Microchip disclaims all liability

arising from this information and its use. Use of Microchip

devices in life support and/or safety applications is entirely at

the buyer’s risk, and the buyer agrees to defend, indemnify and

hold harmless Microchip from any and all damages, claims,

suits, or expenses resulting from such use. No licenses are

conveyed, implicitly or otherwise, under any Microchip

intellectual property rights unless otherwise stated.

Trademarks

The Microchip name and logo, the Microchip logo, Adaptec,

AnyRate, AVR, AVR logo, AVR Freaks, BesTime, BitCloud, chipKIT,

chipKIT logo, CryptoMemory, CryptoRF, dsPIC, FlashFlex,

flexPWR, HELDO, IGLOO, JukeBlox, KeeLoq, Kleer, LANCheck,

LinkMD, maXStylus, maXTouch, MediaLB, megaAVR, Microsemi,

Microsemi logo, MOST, MOST logo, MPLAB, OptoLyzer,

PackeTime, PIC, picoPower, PICSTART, PIC32 logo, PolarFire,

Prochip Designer, QTouch, SAM-BA, SenGenuity, SpyNIC, SST,

SST Logo, SuperFlash, Symmetricom, SyncServer, Tachyon,

TempTrackr, TimeSource, tinyAVR, UNI/O, Vectron, and XMEGA

are registered trademarks of Microchip Technology Incorporated in

the U.S.A. and other countries.

APT, ClockWorks, The Embedded Control Solutions Company,

EtherSynch, FlashTec, Hyper Speed Control, HyperLight Load,

IntelliMOS, Libero, motorBench, mTouch, Powermite 3, Precision

Edge, ProASIC, ProASIC Plus, ProASIC Plus logo, Quiet-Wire,

SmartFusion, SyncWorld, Temux, TimeCesium, TimeHub,

TimePictra, TimeProvider, Vite, WinPath, and ZL are registered

trademarks of Microchip Technology Incorporated in the U.S.A.

Adjacent Key Suppression, AKS, Analog-for-the-Digital Age, Any

Capacitor, AnyIn, AnyOut, BlueSky, BodyCom, CodeGuard,

CryptoAuthentication, CryptoAutomotive, CryptoCompanion,

CryptoController, dsPICDEM, dsPICDEM.net, Dynamic Average

Matching, DAM, ECAN, EtherGREEN, In-Circuit Serial

Programming, ICSP, INICnet, Inter-Chip Connectivity, JitterBlocker,

KleerNet, KleerNet logo, memBrain, Mindi, MiWi, MPASM, MPF,

MPLAB Certified logo, MPLIB, MPLINK, MultiTRAK, NetDetach,

Omniscient Code Generation, PICDEM, PICDEM.net, PICkit,

PICtail, PowerSmart, PureSilicon, QMatrix, REAL ICE, Ripple

Blocker, SAM-ICE, Serial Quad I/O, SMART-I.S., SQI,

SuperSwitcher, SuperSwitcher II, Total Endurance, TSHARC,

USBCheck, VariSense, ViewSpan, WiperLock, Wireless DNA, and

ZENA are trademarks of Microchip Technology Incorporated in the

U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated in

the U.S.A.

The Adaptec logo, Frequency on Demand, Silicon Storage

Technology, and Symmcom are registered trademarks of Microchip

Technology Inc. in other countries.

GestIC is a registered trademark of Microchip Technology Germany

II GmbH & Co. KG, a subsidiary of Microchip Technology Inc., in

other countries.

All other trademarks mentioned herein are property of their

respective companies.

ISBN: 978-1-5224-4893-8

For information regarding Microchip’s Quality Management Systems,

please visit www.microchip.com/quality.

 2010-2019 Microchip Technology Inc.

DS20001191T-page 43

Worldwide Sales and Service

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://www.microchip.com/

support

Australia - Sydney

Tel: 61-2-9868-6733

India - Bangalore

Tel: 91-80-3090-4444

Austria - Wels

Tel: 43-7242-2244-39

Fax: 43-7242-2244-393

China - Beijing

Tel: 86-10-8569-7000

India - New Delhi

Tel: 91-11-4160-8631

Denmark - Copenhagen

Tel: 45-4450-2828

Fax: 45-4485-2829

China - Chengdu

Tel: 86-28-8665-5511

India - Pune

Tel: 91-20-4121-0141

Finland - Espoo

Tel: 358-9-4520-820

China - Chongqing

Tel: 86-23-8980-9588

Japan - Osaka

Tel: 81-6-6152-7160

Web Address:

www.microchip.com

France - Paris

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

China - Dongguan

Tel: 86-769-8702-9880

Japan - Tokyo

Tel: 81-3-6880- 3770

Atlanta

Duluth, GA

Tel: 678-957-9614

Fax: 678-957-1455

China - Guangzhou

Tel: 86-20-8755-8029

Korea - Daegu

Tel: 82-53-744-4301

Germany - Garching

Tel: 49-8931-9700

China - Hangzhou

Tel: 86-571-8792-8115

Korea - Seoul

Tel: 82-2-554-7200

Germany - Haan

Tel: 49-2129-3766400

Austin, TX

Tel: 512-257-3370

China - Hong Kong SAR

Tel: 852-2943-5100

Malaysia - Kuala Lumpur

Tel: 60-3-7651-7906

Germany - Heilbronn

Tel: 49-7131-72400

Boston

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

China - Nanjing

Tel: 86-25-8473-2460

Malaysia - Penang

Tel: 60-4-227-8870

Germany - Karlsruhe

Tel: 49-721-625370

China - Qingdao

Philippines - Manila

Germany - Munich

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Tel: 86-532-8502-7355

Tel: 63-2-634-9065

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

China - Shanghai

Tel: 86-21-3326-8000

Singapore

Tel: 65-6334-8870

Germany - Rosenheim

Tel: 49-8031-354-560

China - Shenyang

Tel: 86-24-2334-2829

Taiwan - Hsin Chu

Tel: 886-3-577-8366

Dallas

Addison, TX

Tel: 972-818-7423

Fax: 972-818-2924

Israel - Ra’anana

Tel: 972-9-744-7705

China - Shenzhen

Tel: 86-755-8864-2200

Taiwan - Kaohsiung

Tel: 886-7-213-7830

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

China - Suzhou

Tel: 86-186-6233-1526

Taiwan - Taipei

Tel: 886-2-2508-8600

Detroit

Novi, MI

Tel: 248-848-4000

China - Wuhan

Tel: 86-27-5980-5300

Thailand - Bangkok

Tel: 66-2-694-1351

Italy - Padova

Tel: 39-049-7625286

Houston, TX

Tel: 281-894-5983

China - Xian

Tel: 86-29-8833-7252

Vietnam - Ho Chi Minh

Tel: 84-28-5448-2100

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

Indianapolis

Noblesville, IN

Tel: 317-773-8323

Fax: 317-773-5453

Tel: 317-536-2380

China - Xiamen

Tel: 86-592-2388138

Norway - Trondheim

Tel: 47-7288-4388

China - Zhuhai

Tel: 86-756-3210040

Poland - Warsaw

Tel: 48-22-3325737

Los Angeles

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

Tel: 951-273-7800

Romania - Bucharest

Tel: 40-21-407-87-50

Spain - Madrid

Tel: 34-91-708-08-90

Fax: 34-91-708-08-91

Raleigh, NC

Tel: 919-844-7510

Sweden - Gothenberg

Tel: 46-31-704-60-40

New York, NY

Tel: 631-435-6000

Sweden - Stockholm

Tel: 46-8-5090-4654

San Jose, CA

Tel: 408-735-9110

Tel: 408-436-4270

UK - Wokingham

Tel: 44-118-921-5800

Fax: 44-118-921-5820

Canada - Toronto

Tel: 905-695-1980

Fax: 905-695-2078

 2010-2019 Microchip Technology Inc.

DS20001191T-page 44

05/14/19


型号：	24AA128-I/WF16K
厂家：	MICROCHIP
描述：	128K, 16K X 8, 2.5V SER EE WAFER ON FR
文件：	总44页 (文件大小：1533K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

24AA128-I/WF16K [MICROCHIP]

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24AA128-IT/SN

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24AA128E/MS

24AA128E/P

24AA128E/SM

24AA128E/SN

24AA128E/ST

24AA128E/ST14

24AA128EP

24AA128ESM

24AA128ESN