24AA014T-I/ST_技术文档

24AA014/24LC014

1K I²C^™Serial EEPROM

Package Types

Device Selection Table

SOIC, TSSOP

PDIP, MSOP

Part

Number

VCC

Range

Max

Clock

Temp.

Range

A0

1

8

VCC

1

2

3

4

8

7

6

5

A0

A1

VCC

WP

24AA014 1.8V - 5.5V 400 kHz⁽¹⁾

24LC014 2.5V - 5.5V 400 kHz

Note 1: 100 kHz for VCC < 2.5V

I

A1

A2

2

3

7

6

WP

SCL

A2

SCL

SDA

VSS

4

5

SDA

VSS

DFN

Features:

• Single-supply with operation down to 1.8V

• Low-power CMOS technology:

A0

1

VCC

WP

8

7

6

5

2

3

4

A1

SCL

SDA

A2

VSS

- 1 mA active current, typical

- 1 μA standby current, typical at 5.5V

• Organized as a single block of 128 bytes (128 x 8)

• Hardware write protection for entire array

• 2-wire serial interface bus, I²C™ compatible

• 100 kHz and 400 kHz clock compatibility

• Page write buffer for up to 16 bytes

• Self-timed write cycle (including auto-erase)

• 5 ms max. write cycle time

Block Diagram

WP

A0 A1 A2

HV Generator

I/O

Control

Logic

Memory

Control

Logic

EEPROM

Array

XDEC

• Address lines allow up to eight devices on bus

• 1,000,000 erase/write cycles

• ESD protection > 4,000V

SDA

SCL

• Data retention > 200 years

Write-Protect

Circuitry

VCC

VSS

• 8-pin PDIP, SOIC, TSSOP, DFN and MSOP

packages

YDEC

• Available for extended temperature ranges:

Sense Amp.

R/W Control

- Industrial (I):

-40°C to +85°C

Description:

Pin Function Table

The Microchip Technology Inc. 24AA014/24LC014 is a

1 Kbit Serial Electrically Erasable PROM with opera-

tion down to 1.8V. The device is organized as a single

block of 128 x 8-bit memory with a 2-wire serial inter-

face. Low-current design permits operation with typical

standby and active currents of only 1 μA and 1 mA,

respectively. The device has a page write capability for

up to 16 bytes of data. Functional address lines allow

the connection of up to eight 24AA014/24LC014

devices on the same bus for up to 8 Kbits of contiguous

EEPROM memory. The device is available in the

standard 8-pin PDIP, 8-pin SOIC (150 mil), TSSOP, 2x3

DFN and MSOP packages.

Name

Function

VSS

Ground

SDA

Serial Data

Serial Clock

SCL

VCC

Power Supply

Chip Selects

A0, A1, A2

WP

Hardware Write-Protect

DS21809C-page 1

24AA014/24LC014

1.0

ELECTRICAL CHARACTERISTICS

(†)

Absolute Maximum Ratings

VCC.............................................................................................................................................................................6.5V

All inputs and outputs w.r.t. VSS ......................................................................................................... -0.6V to VCC +1.0V

Storage temperature ...............................................................................................................................-65°C to +150°C

Ambient temperature with power applied................................................................................................-65°C to +125°C

ESD protection on all pins ......................................................................................................................................................≥ 4 kV

† NOTICE: Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the

device. This is a stress rating only and functional operation of the device at those or any other conditions above those

indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for

extended periods may affect device reliability.

TABLE 1-1:

DC CHARACTERISTICS

All parameters apply across the

specified operating ranges unless

otherwise noted.

VCC = +1.8V to +5.5V

Industrial (I): TA = -40°C to +85°C

Parameter

Symbol

Min.

Max.

Units

Conditions

SCL and SDA pins:

High-level input voltage

VIH

0.7 VCC

—

0.3 VCC

—

V

Low-level input voltage

VIL

Hysteresis of Schmitt Trigger inputs

Low-level output voltage

VHYS

VOL

0.05 VCC

—

(Note 1)

0.40

IOL = 3.0 mA, VCC = 4.5V

IOL = 2.1 mA, VCC = 2.5V

Input leakage current

ILI

—

±1

10

μΑ

μA

pF

VIN = VSS or VCC, WP = Vss

VOUT = VSS or VCC

Output leakage current

ILO

Pin capacitance (all inputs/outputs)

CIN, COUT

VCC = 5.0V (Note 1)

TA = 25°C, f = 1 MHz

Operating current

Standby current

ICC Read

ICC Write

ICCS

—

1

3

1

mA

μA

VCC = 5.5V, SCL = 400 kHz

VCC = 5.5V

VCC = 5.5V, SDA = SCL = VCC

WP = VSS, A0, A1, A2 = VSS

Note 1: This parameter is periodically sampled and not 100% tested.

DS21809C-page 2

24AA014/24LC014

TABLE 1-2:

AC CHARACTERISTICS

All parameters apply across the specified

operating ranges unless otherwise noted.

Vcc = 1.8V to 5.5V

Industrial (I): TA = -40°C to +85°C

Vcc = 1.8V - 5.5V Vcc = 2.5V - 5.5V

STD MODE FAST MODE

Parameter

Symbol

Units

Remarks

Min.

Max.

Min.

Max.

Clock frequency

FCLK

THIGH

TLOW

TR

—

4000

4700

—

100

—

600

1300

—

400

—

kHz

ns

Clock high time

Clock low time

—

ns

SDA and SCL rise time

SDA and SCL fall time

Start condition hold time

1000

300

—

300

—

ns

(Note 1)

TF

—

ns

THD:STA

4000

600

ns

After this period, the first

clock pulse is generated

Start condition setup time

TSU:STA

4700

—

600

—

ns

Only relevant for repeated

Start condition

Data input hold time

Data input setup time

Stop condition setup time

Output valid from clock

Bus free time

THD:DAT

TSU:DAT

TSU:STO

TAA

0

—

0

—

ns

(Note 2)

250

4000

—

100

600

—

3500

—

900

—

(Note 2)

TBUF

4700

1300

Time the bus must be free

before a new transmission

can start

Output fall time from VIH

minimum to VIL maximum

TOF

—

250

50

20 +0.1

CB

250

50

ns

(Note 1), CB ≤ 100 pF

Input filter spike suppression TSP

(SDA and SCL pins)

—

(Note 3)

Write cycle time

Endurance

TWC

—

5

—

5

ms Byte or Page mode

1M

—

1M

—

cycles 25°C, (Note 4)

Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3: The combined TSP and VHYS specifications are due to Schmitt Trigger inputs which provide improved

noise spike suppression. This eliminates the need for a TI specification for standard operation.

4: This parameter is not tested but ensured by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model which can be downloaded from Microchip’s web

site at www.microchip.com.

FIGURE 1-1:

BUS TIMING DATA

THIGH

TF

TR

SCL

TSU:STA

TLOW

THD:DAT

TSU:DAT

TSU:STO

SDA

IN

THD:STA

TSP

TBUF

TAA

SDA

OUT

DS21809C-page 3

24AA014/24LC014

2.0

2.1

PIN DESCRIPTIONS

SDA Serial Data

3.0

FUNCTIONAL DESCRIPTION

The 24AA014/24LC014 supports a bidirectional, 2-wire

bus and data transmission protocol. A device that

sends data onto the bus is defined as transmitter, and

a device receiving data as receiver. The bus has to be

controlled by a master device that generates the Serial

Clock (SCL), controls the bus access and generates

the Start and Stop conditions while the 24AA014/

24LC014 works as slave. Both master and slave can

operate as transmitter or receiver, but the master

device determines which mode is activated.

This is a bidirectional pin used to transfer addresses

and data into and out of the device. It is an open drain

terminal. Therefore, the SDA bus requires a pull-up

resistor to VCC (typical 10 kΩ for 100 kHz, 2 kΩ for

400 kHz).

For normal data transfer SDA is allowed to change only

during SCL low. Changes during SCL high are

reserved for indicating the Start and Stop conditions.

2.2

SCL Serial Clock

The SCL input is used to synchronize the data transfer

to and from the device.

2.3

A0, A1, A2

The levels on the inputs A0, A1 and A2 are compared

with the corresponding bits in the slave address. The

chip is selected if the compare is true.

Up to eight 24AA014/24LC014 devices may be

connected to the same bus by using different Chip

Select bit combinations. These inputs must be

connected to either VCC or VSS.

2.4

WP

WP is the hardware write-protect pin. It must be tied to

VCC or VSS. If tied to VCC, the hardware write protection

is enabled. If the WP pin is tied to VSS the hardware

write protection is disabled.

2.5

Noise Protection

The 24AA014/24LC014 employs a VCC threshold

detector circuit that disables the internal erase/write

logic if the VCC is below 1.5 volts at nominal conditions.

The SCL and SDA inputs have Schmitt Trigger and

filter circuits that suppress noise spikes to assure

proper device operation even on a noisy bus.

DS21809C-page 4

24AA014/24LC014

The data on the line must be changed during the low

period of the clock signal. There is one bit of data per

clock pulse.

4.0

BUS CHARACTERISTICS

The following bus protocol has been defined:

• Data transfer may be initiated only when the bus

is not busy.

Each data transfer is initiated with a Start condition and

terminated with a Stop condition. The number of the

data bytes transferred between the Start and Stop

conditions is determined by the master device and is,

theoretically, unlimited, though only the last sixteen will

be stored when doing a write operation. When an over-

write does occur, it will replace data in a first-in first-out

fashion.

• During data transfer, the data line must remain

stable whenever the clock line is high. Changes in

the data line while the clock line is high will be

interpreted as a Start or Stop condition.

Accordingly, the following bus conditions have been

defined (Figure 4-1).

4.5

Acknowledge

4.1

Bus Not Busy (A)

Each receiving device, when addressed, is required to

generate an acknowledge after the reception of each

byte. The master device must generate an extra clock

pulse which is associated with this Acknowledge bit.

Both data and clock lines remain high.

4.2

Start Data Transfer (B)

A high-to-low transition of the SDA line while the clock

(SCL) is high determines a Start condition. All

commands must be preceded by a Start condition.

Note:

The 24AA014/24LC014 does not generate

any Acknowledge bits if an internal

programming cycle is in progress.

The device that acknowledges has to pull down the

SDA line during the Acknowledge clock pulse in such a

way that the SDA line is stable low during the high

period of the acknowledge-related clock pulse. Of

course, setup and hold times must be taken into

account. A master must signal an end of data to the

slave by not generating an Acknowledge bit on the last

byte that has been clocked out of the slave. In this case,

the slave must leave the data line high to enable the

master to generate the Stop condition (Figure 4-2).

4.3

Stop Data Transfer (C)

A low-to-high transition of the SDA line while the clock

(SCL) is high determines a Stop condition. All

operations must be ended with a Stop condition.

4.4

Data Valid (D)

The state of the data line represents valid data when,

after a Start condition, the data line is stable for the

duration of the high period of the clock signal.

FIGURE 4-1:

DATA TRANSFER SEQUENCE ON THE SERIAL BUS CHARACTERISTICS

(A)

(B)

(C)

(D)

(C) (A)

SCL

SDA

Start

Condition

Stop

Condition

Address or

Acknowledge

Valid

Data

Allowed

to Change

FIGURE 4-2:

ACKNOWLEDGE TIMING

Acknowledge

Bit

1

2

3

4

5

6

7

8

9

1

2

3

SCL

SDA

Data from transmitter

Transmitter must release the SDA line at this point allowing

the Receiver to pull the SDA line low to acknowledge the

previous eight bits of data.

Receiver must release the SDA line at this

point so the Transmitter can continue

sending data.

DS21809C-page 5

24AA014/24LC014

FIGURE 5-1:

CONTROL BYTE FORMAT

5.0

DEVICE ADDRESSING

Read/Write Bit

A control byte is the first byte received following the

Start condition from the master device (Figure 5-1).

The control byte consists of a four-bit control code; for

the 24AA014/24LC014 this is set as ‘1010’ binary for

read and write operations. The next three bits of the

control byte are the Chip Select bits (A2, A1, A0). The

Chip Select bits allow the use of up to eight 24AA014/

24LC014 devices on the same bus and are used to

select which device is accessed. The Chip Select bits

in the control byte must correspond to the logic levels

on the corresponding A2, A1 and A0 pins for the device

to respond. These bits are in effect the three Most

Significant bits of the word address.

Chip Select

Control Code

Bits

S

1

0

1

0

A2 A1 A0 R/W ACK

Slave Address

Acknowledge Bit

Start Bit

5.1

Contiguous Addressing Across

Multiple Devices

The last bit of the control byte defines the operation to

be performed. When set to a ‘1’, a read operation is

selected. When set to a ‘0’, a write operation is

selected. Following the Start condition, the 24AA014/

24LC014 monitors the SDA bus, checking the control

byte being transmitted. Upon receiving a ‘1010’ code

and appropriate Chip Select bits, the slave device out-

puts an Acknowledge signal on the SDA line. Depend-

ing on the state of the R/W bit, the 24AA014/24LC014

will select a read or write operation.

The Chip Select bits A2, A1 and A0 can be used to

expand the contiguous address space for up to 8K bits

by adding up to eight 24AA014/24LC014 devices on

the same bus. In this case, software can use A0 of the

control byte as address bit A8, A1 as address bit A9,

and A2 as address bit A10. It is not possible to

sequentially read across device boundaries.

DS21809C-page 6

24AA014/24LC014

The higher order four bits of the word address remain

constant. If the master should transmit more than 16

bytes prior to generating the Stop condition, the

address counter will roll over and the previously

received data will be overwritten. As with the byte write

operation, once the Stop condition is received, an inter-

nal write cycle will begin (Figure 6-2). If an attempt is

made to write to the protected portion of the array when

the hardware write protection has been enabled, the

device will acknowledge the command, but no data will

be written. The write cycle time must be observed even

if write protection is enabled.

6.0

6.1

WRITE OPERATIONS

Byte Write

Following the Start signal from the master, the device

code(4 bits), the Chip Select bits (3 bits) and the R/W

bit (which is a logic low) are placed onto the bus by the

master transmitter. The device will acknowledge this

control byte during the ninth clock pulse. The next byte

transmitted by the master is the word address and will

be written into the Address Pointer of the 24AA014/

24LC014. After receiving another Acknowledge signal

from the 24AA014/24LC014, the master device will

transmit the data word to be written into the addressed

memory location. The 24AA014/24LC014 acknowl-

edges again and the master generates a Stop

condition. This initiates the internal write cycle and the

24AA014/24LC014 will not generate Acknowledge

signals during this time (Figure 6-1). If an attempt is

made to write to the protected portion of the array when

the hardware write protection has been enabled, the

device will acknowledge the command, but no data will

be written. The write cycle time must be observed even

if write protection is enabled.

Note:

Page write operations are limited to writing

bytes within a single physical page,

regardless of the number of bytes

actually being written. Physical page

boundaries start at addresses that are

integer multiples of the page buffer size (or

‘page size’) and end at addresses that are

integer multiples of [page size – 1]. If a

Page Write command attempts to write

across a physical page boundary, the

result is that the data wraps around to the

beginning of the current page (overwriting

data previously stored there), instead of

being written to the next page, as might be

expected. It is therefore necessary that the

application software prevent page write

operations that would attempt to cross a

page boundary.

6.2

Page Write

The write-control byte, word address and the first data

byte are transmitted to the 24AA014/24LC014 in the

same way as in a byte write. But instead of generating

a Stop condition, the master transmits up to 15 addi-

tional data bytes to the 24AA014/24LC014 that are

temporarily stored in the on-chip page buffer and will be

written into the memory once the master has transmit-

ted a Stop condition. Upon receipt of each word, the

four lower order Address Pointer bits are internally

incremented by one.

6.3

Write Protection

The WP pin must be tied to VCC or VSS. If tied to VCC,

the entire array will be write-protected. If the WP pin is

tied to VSS, write operations to all address locations are

allowed.

FIGURE 6-1:

BYTE WRITE

S

T

A

R

T

S

Bus Activity

Master

Control

Byte

Word

Address

T

Data

O

P

SDA Line

S

P

A

C

K

A

C

K

A

C

K

Bus Activity

FIGURE 6-2:

PAGE WRITE

S

T

A

R

T

S

T

O

P

Bus Activity

Master

Control

Byte

Word

Address (n)

Data (n)

Data (n +1)

Data (n + 15)

SDA Line

S

P

A

C

K

A

C

K

A

C

K

A

C

K

A

C

K

Bus Activity

DS21809C-page 7

24AA014/24LC014

FIGURE 7-1:

ACKNOWLEDGE POLLING

FLOW

7.0

ACKNOWLEDGE POLLING

Since the device will not acknowledge during a write

cycle, this can be used to determine when the cycle is

complete (this feature can be used to maximize bus

throughput). Once the Stop condition for a write

command has been issued from the master, the device

initiates the internally-timed write cycle and ACK polling

can be initiated immediately. This involves the master

sending a Start condition followed by the control byte

for a Write command (R/W = 0). If the device is still

busy with the write cycle, no ACK will be returned. If no

ACK is returned, the Start bit and control byte must be

re-sent. If the cycle is complete, the device will return

the ACK and the master can then proceed with the next

Read or Write command. See Figure 7-1 for a flow

diagram of this operation.

Send

Write Command

Send Stop

Condition to

Initiate Write Cycle

Send Start

Send Control Byte

with R/W = 0

Did Device

Acknowledge

(ACK = 0)?

No

Yes

DS21809C-page 8

24AA014/24LC014

Once the word address is sent, the master generates a

Start condition following the acknowledge. This

terminates the write operation, but not before the

internal Address Pointer is set. The master then issues

the control byte again but with the R/W bit set to a ‘1’.

The 24AA014/24LC014 will then issue an acknowl-

edge and transmits the eight-bit data word. The master

will not acknowledge the transfer, but does generate a

Stop condition and the 24AA014/24LC014 discontin-

ues transmission (Figure 8-2). After this command, the

internal address counter will point to the address

location following the one that was just read.

8.0

READ OPERATIONS

Read operations are initiated in the same way as write

operations, with the exception that the R/W bit of the

slave address is set to ‘1’. There are three basic types

of read operations: current address read, random read

and sequential read.

8.1

Current Address Read

The 24AA014/24LC014 contains an address counter

that maintains the address of the last word accessed,

internally incremented by one. Therefore, if the

previous read access was to address n, the next

current address read operation would access data from

address n + 1. Upon receipt of the slave address with

the R/W bit set to ‘1’, the 24AA014/24LC014 issues an

acknowledge and transmits the 8-bit data word. The

master will not acknowledge the transfer, but does

generate a Stop condition and the 24AA014/24LC014

discontinues transmission (Figure 8-1).

8.3

Sequential Read

Sequential reads are initiated in the same way as a

random read except that after the 24AA014/24LC014

transmits the first data byte, the master issues an

acknowledge as opposed to a Stop condition in a

random read. This directs the 24AA014/24LC014 to

transmit the next sequentially addressed 8-bit word

(Figure 8-3).

8.2

Random Read

To provide sequential reads the 24AA014/24LC014

contains an internal Address Pointer which is

incremented by one at the completion of each opera-

tion. This Address Pointer allows the entire memory

contents to be serially read during one operation. The

internal Address Pointer will automatically roll over

from address 0FFh to address 000h.

Random read operations allow the master to access

any memory location in a random manner. To perform

this type of read operation, the word address must first

be set. This is done by sending the word address to the

24AA014/24LC014 as part of a write operation.

FIGURE 8-1:

CURRENT ADDRESS READ

S

T

A

R

T

S

T

O

P

Bus Activity

Master

Control

Byte

Data

SDA Line

P

S

A

C

K

N

O

A

C

Bus Activity

K

DS21809C-page 9

24AA014/24LC014

FIGURE 8-2:

RANDOM READ

S

T

S

T

A

R

T

S

T

O

P

Bus Activity

Master

Control

A

Word

Address (n)

Control

Byte

Data (n)

Byte

R

T

S

P

S

SDA Line

N

O

A

C

K

A

C

K

A

C

K

A

C

K

Bus Activity

FIGURE 8-3:

SEQUENTIAL READ

S

T

O

P

Bus Activity

Master

Control

Byte

Data (n)

Data (n + 1)

Data (n + 2)

Data (n + X)

P

SDA Line

A

C

K

A

C

K

A

C

K

A

C

K

N

O

A

C

K

Bus Activity

DS21809C-page 10

24AA014/24LC014

9.0

9.1

PACKAGING INFORMATION

Package Marking Information

8-Lead PDIP (300 mil)

Example:

24LC014

XXXXXXXX

T/XXXNNN

I/P

e

3

12F

YYWW

0521

8-Lead SOIC (150 mil)

Example:

24LC014I

XXXXXXXT

e

3

XXXXYYWW

SN

052I

NNN

12F

Example:

8-Lead TSSOP

4L14

I521

12F

XXXX

TYWW

NNN

Example:

4L14I

8-Lead MSOP

XXXXT

52112F

YWWNNN

8-Lead 2x3 DFN

Example:

XXX

YWW

NN

2N4

521

12

DS21809C-page 11

24AA014/24LC014

1st Line Marking Codes

Part Number

24AA014

TSSOP

MSOP

DFN

4A14

4L14

4A14T

4L14T

2N1

2N4

24LC014

Note:

T = Temperature grade (I, E)

Legend: XX...X Part number or part number code

T

Temperature (I, E)

Y

Year code (last digit of calendar year)

YY

WW

NNN

Year code (last 2 digits of calendar year)

Week code (week of January 1 is week ‘01’)

Alphanumeric traceability code (2 characters for small packages)

Pb-free JEDEC designator for Matte Tin (Sn)

e

3

Note: For very small packages with no room for the Pb-free JEDEC designator

, the marking will only appear on the outer carton or reel label.

e

3

Note: In the event the full Microchip part number cannot be marked on one line, it will

be carried over to the next line, thus limiting the number of available

characters for customer-specific information.

Note:

Please visit www.microchip.com/Pbfree for the latest information on Pb-free conversion.

*Standard OTP marking consists of Microchip part number, year code, week code, and traceability code.

DS21809C-page 12

24AA014/24LC014

8-Lead Plastic Dual In-line (P) – 300 mil (PDIP)

E1

D

2

n

1

α

E

A2

A

L

c

A1

β

B1

B

p

eB

Units

INCHES*

NOM

MILLIMETERS

Dimension Limits

MIN

MAX

MIN

NOM

MAX

n

p

Number of Pins

Pitch

8

.100

.155

.130

2.54

3.94

3.30

Top to Seating Plane

A

.140

.170

3.56

4.32

Molded Package Thickness

Base to Seating Plane

Shoulder to Shoulder Width

Molded Package Width

Overall Length

A2

A1

E

.115

.015

.300

.240

.360

.125

.008

.045

.014

.310

5

.145

2.92

0.38

7.62

6.10

9.14

3.18

0.20

1.14

0.36

7.87

5

3.68

.313

.250

.373

.130

.012

.058

.018

.370

10

.325

.260

.385

.135

.015

.070

.022

.430

15

7.94

6.35

9.46

3.30

0.29

1.46

0.46

9.40

10

8.26

6.60

9.78

3.43

0.38

1.78

0.56

10.92

15

E1

D

Tip to Seating Plane

Lead Thickness

L

c

Upper Lead Width

B1

B

Lower Lead Width

Overall Row Spacing

Mold Draft Angle Top

Mold Draft Angle Bottom

§

eB

α

β

5

10

15

5

10

15

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-001

Drawing No. C04-018

DS21809C-page 13

24AA014/24LC014

8-Lead Plastic Small Outline (SN) – Narrow, 150 mil (SOIC)

E

E1

p

D

2

B

n

1

h

α

45°

c

A2

A

φ

β

L

A1

Units

INCHES*

NOM

MILLIMETERS

Dimension Limits

MIN

MAX

MIN

NOM

8

MAX

n

p

Number of Pins

Pitch

8

.050

.061

.056

.007

.237

.154

.193

.015

.025

4

1.27

Overall Height

A

.053

.069

1.35

1.32

1.55

1.42

0.18

6.02

3.91

4.90

0.38

0.62

4

1.75

Molded Package Thickness

Standoff

A2

A1

E

.052

.004

.228

.146

.189

.010

.019

0

.061

.010

.244

.157

.197

.020

.030

8

1.55

0.25

6.20

3.99

5.00

0.51

0.76

8

§

0.10

5.79

3.71

4.80

0.25

0.48

0

Overall Width

Molded Package Width

Overall Length

E1

D

Chamfer Distance

Foot Length

h

L

φ

Foot Angle

c

Lead Thickness

Lead Width

.008

.013

0

.009

.017

12

.010

.020

15

0.20

0.33

0

0.23

0.42

12

0.25

0.51

15

B

α

β

Mold Draft Angle Top

Mold Draft Angle Bottom

0

12

15

0

12

15

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.010” (0.254mm) per side.

JEDEC Equivalent: MS-012

Drawing No. C04-057

DS21809C-page 14

24AA014/24LC014

8-Lead Plastic Thin Shrink Small Outline (ST) – 4.4 mm (TSSOP)

E

E1

p

D

2

1

n

B

α

A

c

A1

A2

φ

β

L

Units

INCHES

NOM

MILLIMETERS*

Dimension Limits

MIN

MAX

MIN

NOM

8

MAX

n

p

Number of Pins

Pitch

8

.026

0.65

Overall Height

A

.043

1.10

0.95

0.15

6.50

4.50

3.10

0.70

8

Molded Package Thickness

Standoff

A2

A1

E

.033

.035

.004

.251

.173

.118

.024

4

.037

.006

.256

.177

.122

.028

8

0.85

0.05

0.90

0.10

6.38

4.40

3.00

0.60

4

§

.002

.246

.169

.114

.020

0

Overall Width

6.25

4.30

2.90

0.50

0

Molded Package Width

Molded Package Length

Foot Length

E1

D

L

φ

Foot Angle

c

Lead Thickness

.004

.007

0

.006

.010

5

.008

.012

10

0.09

0.19

0

0.15

0.25

5

0.20

0.30

10

Lead Width

B

α

β

Mold Draft Angle Top

Mold Draft Angle Bottom

0

5

10

0

5

10

* Controlling Parameter

§ Significant Characteristic

Notes:

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed

.005” (0.127mm) per side.

JEDEC Equivalent: MO-153

Drawing No. C04-086

DS21809C-page 15

24AA014/24LC014

8-Lead Plastic Micro Small Outline Package (MS) (MSOP)

E

E1

p

D

2

B

n

1

α

A2

A

c

φ

A1

(F)

L

β

Units

Dimension Limits

INCHES

NOM

MILLIMETERS*

MIN

MAX

MIN

NOM

8

MAX

n

p

Number of Pins

Pitch

8

.026 BSC

0.65 BSC

Overall Height

A

A2

A1

E

-

.043

-

0.85

-

1.10

Molded Package Thickness

Standoff

.030

.033

.037

0.75

0.95

0.15

.000

-

.006

0.00

Overall Width

.193 TYP.

4.90 BSC

Molded Package Width

Overall Length

Foot Length

E1

D

.118 BSC

3.00 BSC

L

.016

.024

.037 REF

.031

0.40

0.60

0.95 REF

0.80

Footprint (Reference)

Foot Angle

F

φ

c

0°

.003

.009

5°

-

8°

.009

.016

15°

0°

0.08

0.22

5°

-

8°

0.23

0.40

15°

Lead Thickness

Lead Width

.006

B

α

β

.012

Mold Draft Angle Top

Mold Draft Angle Bottom

*Controlling Parameter

Notes:

-

5°

15°

5°

15°

Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not

exceed .010" (0.254mm) per side.

JEDEC Equivalent: MO-187

Drawing No. C04-111

DS21809C-page 16

24AA014/24LC014

8-Lead Plastic Dual Flat No Lead Package (MC) 2x3x0.9 mm Body (DFN) – Saw Singulated

p

D

b

n

L

E

E2

EXPOSED

METAL

PAD

2

1

PIN 1

ID INDEX

AREA

D2

(NOTE 2)

BOTTOM VIEW

TOP VIEW

A

A1

A3

EXPOSED

TIE BAR

(NOTE 1)

Units

Dimension Limits

INCHES

NOM

8

MILLIMETERS*

NOM

MIN

MAX

MIN

MAX

n

p

Number of Pins

Pitch

8

.020 BSC

0.50 BSC

0.90

Overall Height

Standoff

A

A1

A3

D

.031

.035

.001

.008 REF.

.039

.002

0.80

0.00

1.00

.000

0.02

0.05

Contact Thickness

Overall Length

0.20 REF.

2.00 BSC

--

.079 BSC

--

(Note 3)

Exposed Pad Length

Overall Width

D2

E

.055

.064

1.39

1.62

.118 BSC

--

3.00 BSC

--

(Note 3)

Exposed Pad Width

Contact Width

E2

b

.047

.008

.012

.071

.012

.020

1.20

0.20

0.30

1.80

0.30

0.50

.010

0.25

Contact Length

L

.016

0.40

*Controlling Parameter

Notes:

1. Package may have one or more exposed tie bars at ends.

2. Pin 1 visual index feature may vary, but must be located within the hatched area.

3. Exposed pad dimensions vary with paddle size.

4. JEDEC equivalent: MO-229

Drawing No. C04-123

Revised 05/24/04

DS21809C-page 17

24AA014/24LC014

REVISION HISTORY

Revision B

Corrections to Section 1.0, Electrical Characteristics.

Revision C

Added DFN package.

DS21809C-page 18

24AA014/24LC014

THE MICROCHIP WEB SITE

CUSTOMER SUPPORT

Microchip provides online support via our WWW site at

www.microchip.com. This web site is used as a means

to make files and information easily available to

customers. Accessible by using your favorite Internet

browser, the web site contains the following

information:

Users of Microchip products can receive assistance

through several channels:

• Distributor or Representative

• Local Sales Office

• Field Application Engineer (FAE)

• Technical Support

• Product Support – Data sheets and errata,

application notes and sample programs, design

resources, user’s guides and hardware support

documents, latest software releases and archived

software

• Development Systems Information Line

Customers

should

contact

their

distributor,

representative or field application engineer (FAE) for

support. Local sales offices are also available to help

customers. A listing of sales offices and locations is

included in the back of this document.

• General Technical Support – Frequently Asked

Questions (FAQ), technical support requests,

online discussion groups, Microchip consultant

program member listing

Technical support is available through the web site

at: http://support.microchip.com

• Business of Microchip – Product selector and

ordering guides, latest Microchip press releases,

listing of seminars and events, listings of

Microchip sales offices, distributors and factory

representatives

In addition, there is

a

Development Systems

Information Line which lists the latest versions of

Microchip’s development systems software products.

This line also provides information on how customers

can receive currently available upgrade kits.

The Development Systems Information Line

numbers are:

CUSTOMER CHANGE NOTIFICATION

SERVICE

1-800-755-2345 – United States and most of Canada

1-480-792-7302 – Other International Locations

Microchip’s customer notification service helps keep

customers current on Microchip products. Subscribers

will receive e-mail notification whenever there are

changes, updates, revisions or errata related to a

specified product family or development tool of interest.

To register, access the Microchip web site at

www.microchip.com, click on Customer Change

Notification and follow the registration instructions.

DS21809C-page 19

24AA014/24LC014

READER RESPONSE

It is our intention to provide you with the best documentation possible to ensure successful use of your Microchip prod-

uct. If you wish to provide your comments on organization, clarity, subject matter, and ways in which our documentation

can better serve you, please FAX your comments to the Technical Publications Manager at (480) 792-4150.

Please list the following information, and use this outline to provide us with your comments about this document.

To:

Technical Publications Manager

Reader Response

Total Pages Sent ________

RE:

From:

Name

Company

Address

City / State / ZIP / Country

Telephone: (_______) _________ - _________

FAX: (______) _________ - _________

Application (optional):

Would you like a reply?

Y

N

24AA014/24LC014

DS21809C

Literature Number:

Device:

Questions:

1. What are the best features of this document?

2. How does this document meet your hardware and software development needs?

3. Do you find the organization of this document easy to follow? If not, why?

4. What additions to the document do you think would enhance the structure and subject?

5. What deletions from the document could be made without affecting the overall usefulness?

6. Is there any incorrect or misleading information (what and where)?

7. How would you improve this document?

DS21809C-page 20

24AA014/24LC014

PRODUCT IDENTIFICATION SYSTEM

To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.

Examples:

PART NO.

Device

X

/XX

a) 24AA014-I/P: Industrial Temperature,

1.8V, PDIP package.

Temperature Package

Range

b) 24AA014-I/SN: Industrial Temperature,

1.8V, SOIC Package.

c) 24AA014T-I/ST: Industrial Temperature,

1.8V, TSSOP Package, Tape and Reel

Device:

24AA014: 1.8V, 1 Kbit Addressable Serial EEPROM

24AA014T: 1.8V, 1 Kbit Addressable Serial EEPROM

(Tape and Reel)

24LC014: 2.5V, 1 Kbit Addressable Serial EEPROM

24LC014T: 2.5V, 1 Kbit Addressable Serial EEPROM

(Tape and Reel)

a) 24LC014-I/P: Industrial Temperature,

2.5V, PDIP Package.

b) 24LC014T-I/SN: Industrial Temperature,

2.5V, SOIC Package, Tape and Reel

c) 24LC014T-I/MS: Industrial Temperature,

2.5V, MSOP Package, Tape and Reel.

Temperature Range:

Package:

I

=

-40°C to +85°C

P

=

Plastic DIP, (300 mil Body), 8-lead

Plastic SOIC, (150 mil Body)

TSSOP, 8-lead

MSOP, 8-lead

2x3 DFN, 8-lead

SN

ST

MS

MC

Sales and Support

Data Sheets

Products supported by a preliminary Data Sheet may have an errata sheet describing minor operational differences and

recommended workarounds. To determine if an errata sheet exists for a particular device, please contact one of the following:

1. Your local Microchip sales office

2. The Microchip Corporate Literature Center U.S. FAX: (480) 792-7277

3. The Microchip Worldwide Site (www.microchip.com)

Please specify which device, revision of silicon and Data Sheet (include Literature #) you are using.

Customer Notification System

Register on our web site (www.microchip.com/cn) to receive the most current information on our products.

DS21809C-page 21

24AA014/24LC014

NOTES:

DS21809C-page 22

Note the following details of the code protection feature on Microchip devices:

•

Microchip products meet the specification contained in their particular Microchip Data Sheet.

•

Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the

intended manner and under normal conditions.

•

There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our

knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data

Sheets. Most likely, the person doing so is engaged in theft of intellectual property.

•

Microchip is willing to work with the customer who is concerned about the integrity of their code.

Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not

mean that we are guaranteeing the product as “unbreakable.”

Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our

products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts

allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.

Information contained in this publication regarding device

applications and the like is provided only for your convenience

and may be superseded by updates. It is your responsibility to

ensure that your application meets with your specifications.

MICROCHIP MAKES NO REPRESENTATIONS OR WAR-

RANTIES OF ANY KIND WHETHER EXPRESS OR IMPLIED,

WRITTEN OR ORAL, STATUTORY OR OTHERWISE,

RELATED TO THE INFORMATION, INCLUDING BUT NOT

LIMITED TO ITS CONDITION, QUALITY, PERFORMANCE,

MERCHANTABILITY OR FITNESS FOR PURPOSE.

Microchip disclaims all liability arising from this information and

its use. Use of Microchip’s products as critical components in

life support systems is not authorized except with express

written approval by Microchip. No licenses are conveyed,

implicitly or otherwise, under any Microchip intellectual property

rights.

Trademarks

The Microchip name and logo, the Microchip logo, Accuron,

dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART,

PRO MATE, PowerSmart, rfPIC, and SmartShunt are

registered trademarks of Microchip Technology Incorporated

in the U.S.A. and other countries.

AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB,

PICMASTER, SEEVAL, SmartSensor and The Embedded

Control Solutions Company are registered trademarks of

Microchip Technology Incorporated in the U.S.A.

Analog-for-the-Digital Age, Application Maestro, dsPICDEM,

dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR,

FanSense, FlexROM, fuzzyLAB, In-Circuit Serial

Programming, ICSP, ICEPIC, MPASM, MPLIB, MPLINK,

MPSIM, PICkit, PICDEM, PICDEM.net, PICLAB, PICtail,

PowerCal, PowerInfo, PowerMate, PowerTool, rfLAB,

rfPICDEM, Select Mode, Smart Serial, SmartTel, Total

Endurance and WiperLock are trademarks of Microchip

Technology Incorporated in the U.S.A. and other countries.

SQTP is a service mark of Microchip Technology Incorporated

in the U.S.A.

All other trademarks mentioned herein are property of their

respective companies.

Printed on recycled paper.

Microchip received ISO/TS-16949:2002 quality system certification for

its worldwide headquarters, design and wafer fabrication facilities in

Chandler and Tempe, Arizona and Mountain View, California in

October 2003. The Company’s quality system processes and

procedures are for its PICmicro^®8-bit MCUs, KEELOQ^®code hopping

devices, Serial EEPROMs, microperipherals, nonvolatile memory and

analog products. In addition, Microchip’s quality system for the design

and manufacture of development systems is ISO 9001:2000 certified.

DS21808C-page 23

WORLDWIDE SALES AND SERVICE

AMERICAS

ASIA/PACIFIC

EUROPE

Corporate Office

Australia - Sydney

Tel: 61-2-9868-6733

Fax: 61-2-9868-6755

India - Bangalore

Tel: 91-80-2229-0061

Fax: 91-80-2229-0062

Austria - Weis

Tel: 43-7242-2244-399

Fax: 43-7242-2244-393

2355 West Chandler Blvd.

Chandler, AZ 85224-6199

Tel: 480-792-7200

Fax: 480-792-7277

Technical Support:

http://support.microchip.com

Web Address:

www.microchip.com

China - Beijing

Tel: 86-10-8528-2100

Fax: 86-10-8528-2104

Denmark - Ballerup

Tel: 45-4450-2828

Fax: 45-4485-2829

India - New Delhi

Tel: 91-11-5160-8631

Fax: 91-11-5160-8632

China - Chengdu

Tel: 86-28-8676-6200

Fax: 86-28-8676-6599

France - Massy

Tel: 33-1-69-53-63-20

Fax: 33-1-69-30-90-79

Japan - Kanagawa

Tel: 81-45-471- 6166

Fax: 81-45-471-6122

Atlanta

China - Fuzhou

Tel: 86-591-8750-3506

Fax: 86-591-8750-3521

Germany - Ismaning

Tel: 49-89-627-144-0

Fax: 49-89-627-144-44

Korea - Seoul

Alpharetta, GA

Tel: 770-640-0034

Fax: 770-640-0307

Tel: 82-2-554-7200

Fax: 82-2-558-5932 or

82-2-558-5934

Italy - Milan

Tel: 39-0331-742611

Fax: 39-0331-466781

China - Hong Kong SAR

Tel: 852-2401-1200

Fax: 852-2401-3431

Boston

Singapore

Tel: 65-6334-8870

Fax: 65-6334-8850

Westborough, MA

Tel: 774-760-0087

Fax: 774-760-0088

Netherlands - Drunen

Tel: 31-416-690399

Fax: 31-416-690340

China - Shanghai

Tel: 86-21-5407-5533

Fax: 86-21-5407-5066

China - Shenyang

Tel: 86-24-2334-2829

Fax: 86-24-2334-2393

Taiwan - Kaohsiung

Tel: 886-7-536-4818

Fax: 886-7-536-4803

Chicago

Itasca, IL

Tel: 630-285-0071

Fax: 630-285-0075

England - Berkshire

Tel: 44-118-921-5869

Fax: 44-118-921-5820

Taiwan - Taipei

Tel: 886-2-2500-6610

Fax: 886-2-2508-0102

Dallas

Addison, TX

China - Shenzhen

Tel: 86-755-8203-2660

Fax: 86-755-8203-1760

Tel: 972-818-7423

Fax: 972-818-2924

Taiwan - Hsinchu

Tel: 886-3-572-9526

Fax: 886-3-572-6459

China - Shunde

Detroit

Tel: 86-757-2839-5507

Fax: 86-757-2839-5571

Farmington Hills, MI

Tel: 248-538-2250

Fax: 248-538-2260

China - Qingdao

Tel: 86-532-502-7355

Fax: 86-532-502-7205

Kokomo

Kokomo, IN

Tel: 765-864-8360

Fax: 765-864-8387

Los Angeles

Mission Viejo, CA

Tel: 949-462-9523

Fax: 949-462-9608

San Jose

Mountain View, CA

Tel: 650-215-1444

Fax: 650-961-0286

Toronto

Mississauga, Ontario,

Canada

Tel: 905-673-0699

Fax: 905-673-6509

03/01/05

DS21809C-page 24


型号：	24AA014T-I/ST
厂家：	MICROCHIP
描述：	1K I2C⑩ Serial EEPROM 1K I2C ™串行EEPROM 存储内存集成电路光电二极管双倍数据速率可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟
文件：	总24页 (文件大小：324K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

24AA014T-I/ST [MICROCHIP]

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24AA014TI/ST

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