SY100S325 [MICREL]
LOW-POWER HEX ECL-to-TTL TRANSLATOR; 低功耗HEX ECL至TTL译者
| 型号： | SY100S325 |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | LOW-POWER HEX ECL-to-TTL TRANSLATOR |
| 文件： | 总5页 (文件大小：103K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LOW-POWER HEX
ECL-to-TTL
SY100S325
TRANSLATOR
DESCRIPTION
FEATURES
■ Max. propagation delay of 3.7ns
■ IEE min. of –37mA
The SY100S325 are hex translators for converting
100K ECL logic levels to TTL logic levels. Inputs can be
used as inverting, non-inverting or differential receivers.
An internal reference voltage generator provides VBB for
single-ended operation or for use in Schmitt trigger
applications. All inputs have 75KΩ pull-down resistors.
The outputs will go LOW when the inputs are either open
or have the same potential.
When used in single-ended operation, the apparent
input threshold of the true inputs is 20mV to 40mV higher
(positive) than the threshold of the complementary inputs.
The VTTL and VEE power may be applied in either order.
■ TTL outputs
■ Extended supply voltage option:
VEE = –4.2V to –5.5V
■ 25% faster than National's 325
■ Differential inputs with built-in offset
■ Voltage and temperature compensation for improved
noise immunity
■ VBB output for single-ended use
■ Internal 75KΩ input pull-down resistors
■ Function and pinout compatible with Fairchild F100K
PIN CONFIGURATIONS
■ Available in 24-pin CERPACK and 28-pin PLCC
packages
25
24 23 22 21 20 19
V
TTL
TTL
26
27
28
1
18
17
16
15
14
13
12
D
D
D
4
3
3
V
V
CC
CC
CC
Top View
PLCC
J28-1
V
V
V
V
EES
BLOCK DIAGRAM
V
2
EE
Q
2
1
3
BB
Q
4
D
2
V
BB
5
6
7
8
9
10 11
D
D
0
0
Q
Q
Q
Q
Q
Q
0
1
2
3
4
5
24 23 22 21 20 19
D
D
D
4
1
18
17
16
D
D
2
1
D
D
1
1
5
5
2
3
D
1
Top View
Flatpack
F24-1
D
D
2
2
Q
Q
Q
5
4
3
4
5
6
15
14
13
D0
D0
Q0
D
D
3
3
7
8
9
10 11 12
D
D
4
4
D
D
5
5
PIN NAMES
Pin
D0–D5
D0–D5
Q0–Q5
VEES
Function
Data Inputs
Inverting Data Inputs
Data Outputs
VEE Substrate
VTTL
TTL VCC Power Supply
VCCO for ECL Outputs
VCCA
Rev.: F
Amendment:/0
Issue Date: July, 1999
1
Micrel
SY100S325
DC ELECTRICAL CHARACTERISTICS
VEE = –4.2V to –4.8V unless otherwise specified, VCC =VCCA = GND, VTTL = +4.5V to +5.5V
Symbol
Parameter
Min.
2.5
Typ.
—
Max.
—
Unit
V
Condition
VIN = VIH (Max.)
VIN = VIL (Min.)
VOH
VOL
Output HIGH Voltage
Output LOW Voltage
IOH = –2.0mA
—
—
0.5
—
V
IOL = 24mA
VDIFF
VCM
IIH
Input Voltage Differential
Common Mode Voltage
Input HIGH Current
150
—
—
mV
V
Required for Full Output Swing
—
1.0
350
—
Permissible ±VCM with Respect to VBB
—
—
µA
µA
mA
mA
mA
mV
mV
VIN = VIH (Max.), D0–D5 = VBB, D0–D5 = VIL (Min.)
VIN = VIH (Min.), D0–D5 = VBB
VOUT = GND
IIL
Input LOW Current
0.5
—
IOS
IEE
Output Short Circuit Current
VEE Power Supply Current
VTTL Power Supply Current
Ouptut Reference Voltage
–150
–37
—
–80
–24
42
–60
–17
65
D0–D5 = VBB
ITTL
VBB
VIH
D0–D5 = VBB
–1380
–1165
–1320 –1260
IVBB = –2.1mA
Single-Ended Input HIGH
Voltage
—
–880
Guaranteed HIGH Signal for All Inputs (with One
Tied to VBB)
VIL
Single-Ended Input LOW
Voltage
–1810
—
–1475
mV
Guaranteed LOW Signal for All Inputs (with One
Tied to VBB)
AC ELECTRICAL CHARACTERISTICS
PLCC/FLATPACK
VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND, VTTL = +4.5V to +5.5V
Symbol
Parameter
Min.
Typ.
Max.
Unit
Condition
CL = 15pF, Figure 2
tPLH
tPHL
Propagation Delay
Data to Output
900
2100
2900
ps
tPLH
tPHL
Propagation Delay
Data to Output
900
3100
3700
ps
CL = 50pF, Figure 2
2
Micrel
SY100S325
SWITCHING WAVEFORM
0.7 ± 0.1 ns
0.7 ± 0.1 ns
–0.95V
–1.69V
80%
50%
INPUT
20%
t
PLH
tPHL
ATTENUATED
OUTPUT
50%
Figure 1. Propagation Delay
NOTE:
VEE = –4.2V to –5.5V unless otherwise specified, VCC = VCCA = GND
TEST CIRCUITS
VTTL
VBB
0.1µF
OPEN
L2
450Ω
SCOPE
CHAN B
PULSE
GENERATOR
C
L
R
T
VCC
VEE
L1
SCOPE
CHAN A
R
T
Figure 2. AC Test Circuit for 15pF Loading
NOTES:
VCC = 0V, VEE = –4.5V, VTTL = +5V
L1 and L2 = equal length 50Ω impedance lines
RT = 50Ω terminator internal to scope
Decoupling 0.1µF from GND to VCC, VEE and VTTL
All unused outputs are loaded with 500Ω to GND
CL = Fixture and stray capacitance = 3pF
PRODUCT ORDERING CODE
Ordering
Code
Package
Type
Operating
Range
SY100S325FC
SY100S325JC
SY100S325JCTR
F24-1
J28-1
J28-1
Commercial
Commercial
Commercial
3
Micrel
SY100S325
24 LEAD CERPACK (F24-1)
Rev. 03
4
Micrel
SY100S325
28 LEAD PLCC (J28-1)
Rev. 03
MICREL-SYNERGY 3250 SCOTT BOULEVARD SANTA CLARA CA 95054 USA
TEL + 1 (408) 980-9191 FAX + 1 (408) 914-7878 WEB http://www.micrel.com
This information is believed to be accurate and reliable, however no responsibility is assumed by Micrel for its use nor for any infringement of patents or
other rights of third parties resulting from its use. No license is granted by implication or otherwise under any patent or patent right of Micrel Inc.
© 2000 Micrel Incorporated
5
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