MIC50398CN [MICREL]

Six Decade Counter / Display Decoder; 六十进制计数器/显示译码器
MIC50398CN
型号: MIC50398CN
厂家: MICREL SEMICONDUCTOR    MICREL SEMICONDUCTOR
描述:

Six Decade Counter / Display Decoder
六十进制计数器/显示译码器

计数器
文件: 总6页 (文件大小:74K)
中文:  中文翻译
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MIC50398/MIC50399  
Six Decade Counter / Display Decoder  
Not Recommended for New Designs  
General Description  
Features  
The MIC50398/9 is an ion-implanted, P-channel MOS  
six-decade synchronous up/down-counter/display driver  
with storage latches. The counter can be loaded  
digit-by-digit with BCD data. The counter has an  
asynchronous-clear function.  
Single power supply  
Schmitt-Trigger on the count-input  
Six decades of synchronous up/down counting  
Look-ahead carry or borrow  
Loadable counter  
Multiplexed seven-segment outputs MIC50398N  
Multiplexed BCD outputs, MIC50399N  
Internal scan oscillator  
Scanning is controlled by the scan oscillator input which is  
self-oscillating or can be driven by an external signal. The  
contents of the counter can be transferred into the 6-digit  
latch which is then multiplexed from MSD to LSD in BCD or  
7-segment format to the output. These devices are intended  
to interface directly with the standard CMOS logic families.  
Pin Connection  
V
V
SS  
1
2
3
4
5
6
7
8
9
28 UP/DOWN  
1
2
28 UP/DOWN  
SS  
SET  
27 CARRY  
SET  
27 ZERO  
a
b
c
d
e
f
26 COUNT INHIBIT  
25 COUNT INPUT  
24 LOAD COUNTER  
NC  
3
26 CARRY  
NC  
4
25 COUNT INHIBIT  
24 COUNT INPUT  
23 LOAD COUNTER  
A
5
D
D
D
D
D
D
V
SEGMENTS  
23  
22  
21  
20  
19  
18  
17  
B
6
6
BCD  
OUTPUT  
D
D
D
D
D
D
V
C
D
7
22  
21  
20  
19  
18  
17  
16  
5
6
MIC50398CN  
MIC50399CN  
8
4
5
DIGIT  
STROBES  
g
STORE  
9
3
4
DIGIT  
STROBES  
C
D
STORE 10  
10  
11  
12  
13  
2
3
C
C
C
C
C
C
C
11  
12  
13  
14  
COUNTER  
BCD  
INPUTS  
D
C
B
A
1
C
B
A
2
COUNTER  
BCD  
INPUTS  
DD  
1
16 SCAN  
DD  
15 CLEAR  
CLEAR 14  
15 SCAN  
Segment Identification  
Ordering Information  
a
Part Number  
MIC50398CN  
MIC50399CN  
Temp. Range  
Package  
f
b
c
0°C to 70°C  
0°C to 70°C  
28-pin Plastic DIP  
28-pin Plastic DIP  
g
d
e
8-10  
August 1998  
MIC50398/50399  
Micrel  
The carry output goes high with the leading edge of the  
count input at the count of 000000 when counting up or at  
999999 when counting down and goes low with the negative  
going edge of the same count input. During a load counter  
operation the carry output is inhibited.  
Operations:  
Six Decade Counter, Latch  
The six decade counter is synchronously incremented or  
decremented on the positive edge of the count input signal.  
A Schmitt trigger on this input provides hysteresis for protec-  
tion against both a noisy environment and double triggering  
due to a slow rising edge at the count input.  
A count frequency of 1.5 MHz can be achieved if the zero  
output and carry output are not used. These outputs do not  
respond at this frequency due to their output delay illustrated  
on the timing diagram.  
The count inhibit can be changed in coincidence with  
the positive transition of the count input. Count inhibit must  
remain high while the count input is high to inhibit counting.  
BCD & Seven Segment Outputs  
BCD or seven segment outputs are available. Digit strobes  
are decoded internally by a divide by six Johnson counter.  
This counter scans from MSD to LSD. By bringing the SET  
input low, this counter will be forced to the MSD decade  
count. During this time the segment outputs are blanked to  
protect against display burn out.  
The counter will increment when up/down input is high (VSS)  
and will decrement when up/down input is low. The up/down  
input can be changed 0.75 µs prior to the positive transition  
of the count input.  
The clear input is asynchronous and will reset all decades to  
zero when brought high but does not affect the six digit latch  
or the scan counter.  
BCD outputs are valid for MSD when SET is low. Applying  
VSS to SET allows normal scan to resume. Digit 6 output is  
active (VSS) until the next scan clock pulse brings up digit 5  
output.  
As long as store input is low, data is continuously transferred  
from the counter to the display. Data in the counter will be  
latched and displayed when store input is high. Store can be  
changed in coincidence with the positive transition of the  
count input.  
The segment outputs and digit strobes are blanked during  
the interdigit blanking time. Typically the interdigit blanking  
time is 3 to 10 microseconds when using the internal scan  
oscillator.  
The counter is loaded digit by digit corresponding to the digit  
strobe outputs. BCD thumb wheel switches with four diodes  
per decade connected between the digit strobe outputs and  
the BCD inputs is one method to supply BCD data for  
loading the counter decades.  
BCD output data changes at the beginning of the interdigit  
blanking time. Therefore the BCD output data is valid when  
the positive transition of a digit output occurs. BCD outputs  
are on MIC50399 only.  
The load counter pulse must be at VSS 2 µs prior to the  
positive transition of the digit strobe of the digit to be loaded.  
The load counter pulse may be removed after the positive  
transition of the digit strobe since the chip internally latches  
this signal. The BCD data to be loaded must be valid through  
the negative transition of the digit strobe.  
Scan Oscillator  
The counters have an internal scan oscillator. The  
frequency of the scan oscillator is determined by an external  
capacitor between VSS or VDD and scan input. The wave  
form present on the scan oscillator input is triangular in the  
self oscillate mode. An external oscillator may also be used  
to drive the scan input.  
8
Inputs, Outputs  
The seven segment outputs are open drain capable of  
sourcing 10mA average current per segment over one digit  
cycle. Segments are on when at VSS. The Carry, Zero, BCD  
and digit strobe outputs are push pull and are on when at  
VSS. All inputs except Counter BCD and SCAN inputs are  
high impedance CMOS compatible.  
In the external drive mode the interdigit blanking time will be  
the sum of the negative dwell period of the external oscillator  
and the normal self oscillate blanking time. (310 µs). Dis-  
play brightness can be controlled by the duty cycle of the  
external scan oscillator.  
Typically, the scan oscillator will oscillate at the following  
frequencies with these nominal capacitor values from VSS to  
scan input.  
Two basic outputs originate from the counter: zero output,  
and carry output. Each output goes high on the positive  
(VSS) going edge of the count input under the following  
conditions:  
CIN  
Min  
Max  
820 pF  
470 pF  
120 pF  
1.4 kHz  
2.0 kHz  
7.0 kHz  
4.8 kHz  
6.8 kHz  
20 kHz  
Zero output goes high for one count period when all  
decades contain zero. During a load counter operation the  
zero output is inhibited. Zero output is on the MIC50399  
only.  
August 1998  
8-11  
MIC50398/50399  
Micrel  
Functional Diagram  
LED DIS  
**  
*50399 Only  
**50398 Only  
*
BCD OUT  
4
7
6
7 SEGMENT DECODER  
6:1 MUX  
6
SCAN COU  
STORE  
6 DIGIT LATCH  
COUNT INHIBIT  
COUNT  
6 DIGIT BCD  
UP/DOWN COUNTER  
UP/DOWN  
CLEAR  
8-12  
August 1998  
MIC50398/50399  
Micrel  
Absolute Maximum Ratings*  
Voltage on Any Terminal Relative to VSS  
Operating Temperature Range (Ambient)  
+0.3V to –20V  
0°C to +70°C  
Storage Temperature Range (Ambient) –40°C to +100°C  
*Operating above absolute maximum ratings may damage the  
device.  
Maximum Operating Conditions  
Symbol  
Parameter  
Min  
Max  
Units  
Notes  
TA  
Operating Temperature  
0
70  
°C  
VSS  
ISS  
BV  
Supply voltage (VDD = 0V)  
Supply Current  
10  
15  
40  
V
mA  
V
1
Break Down Voltage  
VSS – 26  
MIC50398 only  
(Segment only @ 10 µA)  
PD  
Power Dissipation  
670  
mW  
2
Electrical Characteristics  
(VDD = 0V, VSS = +10.0V to +15.0, 0°C TA 70°C)  
Static Operating Conditions  
Symbol  
VIL  
Parameter  
Input Low Voltage, “0”  
Min  
VDD  
Max  
0.2 VSS  
VSS  
Units  
Notes  
V
V
V
V
VIH  
Input High Voltage, “1”  
VSS – 1  
3
4
4
VOL  
Output Voltage “0” @ 30 µA  
Output Voltage “1” @ 1.5 mA  
0.2 VSS  
VOH  
IOH  
0.8 VSS  
8
Output Current “1”  
Digit strobes  
3.0  
10.0  
mA  
mA  
5
6
Segment outputs  
ISCAN  
ISCAN  
ISET  
Scan Input Pullup Current @ 0 V  
Scan Input Pulldown Current @ 15 V  
SET Input Pullup Current @ 0V  
5.5  
40  
60  
mA  
µA  
µA  
2
5
Note 1: ISS with inputs and outputs open at 0°C. 33 mA at 25°C and 28 mA at 70°C. This does not include segment current.  
Total power per segment must be limited not to exceed power dissipation of package. (θJA = 100°C/Watt)  
Note 2: All outputs loaded.  
Note 3: MIN VIH from CA CB CC CD inputs is VSS – 3.5 V. Those inputs have internal pulldown resistors to VDD  
.
Note 4: This applied to the push pull CMOS compatible outputs. Does not include digit strobes on segment outputs.  
Note 5: For VOUT = VSS – 2.0 Volts. Average value over one digit cycle.  
Note 6: For VOUT = VSS – 3.0 Volts. Average value over one digit cycle.  
August 1998  
8-13  
MIC50398/50399  
Micrel  
Timing  
COUNT  
tUDS  
tUDS  
UP/DOWN  
COUNT INHIBIT  
STORE  
tCIS  
tCIS  
tSS  
tSPW  
tPCW  
CLEAR  
tCS  
COUNT  
ZERO  
t OA  
t CA  
t OH  
t CH  
CARRY  
SCAN  
t L  
LOAD COUNTER  
Loading Counter, Register (1 Digit)  
tLS  
LOAD COUNTER  
tLS 2.0 µs min NOTE: REF. TO POSITIVE  
tDV  
TRANSITION OF DIGIT OUTPUT  
BCD DATA INPUT  
DIGIT OUTPUT 6  
tDV 2.0 µS min NOTE: REF. TO NEGATIVE  
EDGE OF DIGIT OUTPUT  
DIGIT OUTPUT 5 ETC  
COUNT INPUT, CARRY  
ZERO OUTPUT INHIBITED  
DURING THIS TIME  
NOTE:  
The inhibit function of the zero or carry outputs does  
not end when the Load Counter input goes to a “0”  
unless that transition occurs during interdigit  
blanking period at least 2.0 µs prior to a positive  
transition of a digit output.  
COUNT INPUT  
tOA  
tOH  
ZERO OUTPUT  
tCA  
tCH  
CARRY OUTPUT  
8-14  
August 1998  
MIC50398/50399  
Micrel  
Dynamic Operating Conditions  
Symbol  
fCI  
Parameter  
Count Input Frequency  
Scan Input Frequency  
Count Pulse Width  
Store Pulse Width  
Store Setup Time  
Count Inhibit Setup Time  
Up/Down setup Time  
Clear Pulse Width  
Clear Setup Time  
Zero Access Time  
Zero Hold Time  
Min  
0
Max  
1.5  
20  
Units  
MHz  
kHz  
ns  
Notes  
7,8  
fSI  
0
tCPW  
tSPW  
tSS  
325  
2.0  
0
9
µs  
µs  
10  
10  
10  
10  
10  
tCIS  
tUDS  
tCPW  
tCS  
0
µs  
–0.75  
2.0  
–0.5  
µs  
µs  
µs  
tOA  
3.0  
1.5  
1.5  
0.9  
µs  
10 MIC50399 only  
tOH  
µs  
10 MIC50399 only  
tCA  
Carry Access Time  
Carry Hold Time  
µs  
10  
11  
12  
tCH  
µs  
tL  
Load Time  
1/6 fSI  
Note 7: Measured at 50% duty cycle.  
Note 8: If carry or zero outputs are used, the count frequency will be limited by their respective output times.  
Note 9: The count pulse width must be greater than the carry access time when using the carry output.  
Note 10: The positive edge of the count input is the t = 0 reference.  
Note 11: Measured from negative edge of count input.  
Note 12: Time to load one digit.  
8
August 1998  
8-15  

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