DSC2044FE1-F0024T [MICREL]
Crystal-less⢠Configurable Clock Generator;
| 型号： | DSC2044FE1-F0024T |
| 厂家： | 
MICREL SEMICONDUCTOR |
| 描述： | Crystal-less⢠Configurable Clock Generator |
| 文件： | 总6页 (文件大小：740K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DSC2044FE1-F0024
Crystal-less™ Configurable Clock Generator
General Description
Features
The DSC2044FE1-F0024 is a programmable, high
performance dual HCSL output oscillator utilizing
Micrel's proven silicon MEMS technology to provide
excellent jitter and stability while incorporating
additional device functionality. Two HCSL outputs
are controlled by separate supply voltages to allow for
high output isolation. The frequencies of the outrputs
can be identical or independently derived from a
common PLL frequency source.
• Frequency and output formats:
- HCSL
200/100/156.25/100/125/125/50/200MHz
- HCSL
10/100/156.25/50/125/50/50/50MHz
• Low RMS phase jitter: <1ps (typ)
• ±50ppm frequency stability
• -20°C to +70°C ext. commercial temperature range
• High supply noise rejection: -50dBc
• Pin-selectable configurations
- Up to 8 output frequency combinations
• Excellent shock & vibration immunity
- Qualified to MIL-STD-883
The DSC2044FE1-F0024 has provision for up to eight
user-defined pre-programmed, pin-selectable output
frequency combinations.
Applications
• High reliability
• Consumer Electronics
- 20x better MTF than quartz oscillators
• Supply range of 2.25 to 3.6V
• AEC-Q100 automotive qualified
• 14-pin 3.2mm x 2.5mm QFN package
• Storage Area Networks
- SATA, SAS, Fibre Channel
• Passive Optical Networks
- EPON, 10G-EPON, GPON, 10G-GPON
• Ethernet
- 1G, 10GBASE-T/KR/LR/SR, and FCoE
• HD/SD/SDI Video & Surveillance
• PCI Express
• Automotive
VDD/VDD2
Block Diagram
CLK1+
200MHz HCSL
CLK1-
Control Circuitry
÷ 2
÷ M1
MEMS
PLL
CLK2+
÷ 2
÷ M2
10MHz HCSL
CLK2-
FS0/FS1/FS2
OE
VSS
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (408) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
December 10, 2015
3420
Revision 1.0
tcghelp@micrel.comor (408) 955-1690
Micrel, Inc.
DSC2044FE1-F0024
Ordering Information
Ordering Part Number
DSC2044FE1-F0024
DSC2044FE1-F0024T
Industrial Temperature Range
-20°C to +70°C
Shipping
Tube
Package
14-pin 3.2mm x 2.5mm QFN
14-pin 3.2mm x 2.5mm QFN
-20°C to +70°C
Tape and Reel
Devices are Green and RoHS compliant. Sample material may have only a partial top mark.
Pin Configuration
OE
CLK2+
CLK2-
CLK1-
CLK1+
NC
NC
GND
14-pin 3.2mm x 2.5mm QFN
Pin Description
Pin Number
Pin Name
OE
Pin Type
Pin Function
Enables outputs when high and disables outputs when low
Leave unconnected or connect to ground
Leave unconnected or connect to ground
Ground
1
2
I
NC
3
NC
4
GND
FS0
PWR
5
I
Least significant bit for frequency selection, see Table 1 for details
Middle bit for frequency selection, see Table 1 for details
Most significant bit for frequency selection, see Table 1 for details
Positive HCSL output
6
FS1
I
I
7
FS2
8
CLK1+
CLK1-
CLK2-
CLK2+
VDD2
VDD
NC
O
9
O
Negative HCSL output
10
11
12
13
14
O
Negative HCSL output
O
Positive HCSL output
PWR
PWR
Power supply for HCSL output CLK2, 1.65V to 3.6V (VDD2 ≤ VDD)
Power supply
Leave unconnected or connect to ground
December 10, 2015
3420
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Revision 1.0
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Micrel, Inc.
DSC2044FE1-F0024
Operational Description
The DSC2044FE1-F0024 is a dual output HCSL
oscillator consisting of a MEMS resonator and a
supporting PLL IC. The two HCSL outputs are
generated through independent 8-bit programmable
When OE (pin 1) is floated or connected to VDD,
the DSC2044 is in operational mode. Driving OE
to ground will tri-state both output drivers (hi-
impedance mode).
dividers from the output of the internal PLL. The
two constraints are imposed on the output frequencies:
1) f2 = M x f1/N, where M and N are even integers
between 4 and 254, 2) 1.2GHz < N x f2 < 1.7GHz.
The actual frequencies output by DSC2044FE1-F0024
are controlled by an internal pre-programmed memory
(OTP). This memory stores all coefficients required
by the PLL for up to eight different frequency
combinations. Three control pins (FS0 - FS2) select
the output frequency combination.
Output Clock Frequencies
Frequency select bits are weakly tied high so if left unconnected the default setting will be [111] and the device will output the
associated frequency highlighted in bold.
Freq Select Bits [FS2, FS1, FS0] - Default is [111]
Freq (MHz)
000
100
100
001
010
100
50
011
125
125
100
125
50
101
110
200
50
111
200
10
CLK1
CLK2
156.25
156.25
50
50
Table 1. Pin-Selectable Output Frequencies
Absolute Maximum Ratings
Item
Min.
-0.3
-0.3
-
Max.
+4.0
Units
V
Condition
Supply Voltage
Input Voltage
Junction Temp
Storage Temp
Soldering Temp
VDD + 0.3
+150
V
°C
°C
°C
-55
-
+150
+260
40sec max.
ESD
HBM
MM
4000
400
-
V
CDM
1500
1000+ years of data retention on internal memory
December 10, 2015
3420
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Micrel, Inc.
DSC2044FE1-F0024
Specifications (Unless specified otherwise: T = 25°C)
Parameter
Symbol
VDD
Condition
Min.
Typ.
Max.
3.6
Units
V
Supply Voltage¹
Supply Current
2.25
IDD
OE pin low - output is disabled
21
60
23
mA
OE pin high - outputs are enabled
RL = 50Ohms, F01 = F02 = 156.25MHz
Supply Current²
IDD
F
mA
Includes frequency variation due to initial
tolerance, temp. and power supply voltage
Frequency Stability
±50
ppm
Aging
F
First year (@ 25°C)
T = 25°C
±5
5
ppm
ms
Startup Time³
tSU
Input Logic Levels
Input Logic High
Input Logic Low
VIH
VIL
0.75 x VDD
-
-
V
0.25 x VDD
4
Output Disable Time
tDA
tEN
5
ns
ns
4
Output Enable Time
20
Pull-Up Resistor²
Pull-up exists on all digital IO
40
kOhms
HCSL Outputs
Output Logic Levels
Output Logic High
Output Logic Low
VOH
VOL
RL = 50Ohms
Single-Ended
0.725
-
-
0.1
V
mV
ps
Pk to Pk Output Swing
750
4
Output Transition Time
Rise Time
tR
tF
20% to 80%
RL = 50Ohms, CL = 2pF
200
48
400
52
Fall Time
CLK1
CLK2
200
10
Frequency
[FS2, FS1, FS0] = [1, 1, 1]
MHz
Output Duty Cycle
Period Jitter5
SYM
JPER
Differential
%
F01 = F02 = 156.25MHz
2.8
psRMS
200kHz to 20MHz @ 156.25MHz
100kHz to 20MHz @ 156.25MHz
12kHz to 20MHz @ 156.25MHz
0.25
0.37
1.7
Integrated Phase Noise
JPH
2
psRMS
Notes:
1. Pin 12 VDD2, and pin 13 VDD should be filtered with 0.1uF capacitors.
2. Output is enabled if OE pin is floated or not connected.
3. tSU is time to 100ppm stable output frequency after VDD is applied and outputs are enabled.
4. Output Waveform and Test Circuit figures below define the parameters.
5. Period Jitter includes crosstalk from adjacent output.
December 10, 2015
3420
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Revision 1.0
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Micrel, Inc.
DSC2044FE1-F0024
Nominal Performance Parameters (Unless specified otherwise: T = 25°C, VDD = 3.3V)
Figure 1. HCSL Phase Jitter (integrated phase noise)
HCSL Output Waveform
675
OE
Figure 2. HCSL Output Waveform
MSL 1 @ 260°C refer to JSTD-020C
Ramp-Up Rate (200°C to Peak Temp)
Preheat Time 150°C to 200°C
Time maintained above 217°C
Peak Temperature
3°C/sec Max.
60 - 180 sec
60 - 150 sec
255 - 260°C
20 - 40 sec
Time within 5°C of actual Peak
Ramp-Down Rate
6°C/sec Max.
8 min Max.
Time 25°C to Peak Temperature
December 10, 2015
3420
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Revision 1.0
tcghelp@micrel.comor (408) 955-1690
Micrel, Inc.
DSC2044FE1-F0024
Solder Reflow Profile
Figure 3. Solder Reflow Profile
Package Information7
3.2mm x 2.5mm 14 Lead Plastic Package
Notes:
6. Connect the exposed die paddle to ground.
7. Package information is correct as of the publication date. For updates and most current information, go to www.micrel.com.
Micrel makes no representations or warranties with respect to the accuracy or completeness of the information furnished in this data
sheet. This information is not intended as a warranty and Micrel does not assume responsibility for its use. Micrel reserves the right
to change circuitry, specifications and descriptions at any time without notice. No license, whether express, implied, arising by
estoppel or otherwise, to any intellectual property rights is granted by this document. Except as provided in Micrel's terms and
conditions of sale for such products, Micrel assumes no liability whatsoever, and Micrel disclaims any express or implied warranty
relating to the sale and/or use of Micrel products including liability or warranties relating to fitness for a particular purpose,
merchantability, or infringement of any patent, copyright or other intellectual property right.
Micrel products are not designed or authorized for use as components in life support appliances, devices or systems where malfunction
of a product can reasonably be expected to result in personal injury. Life support devices or systems are devices or systems that (a)
are intended for surgical implant into the body or (b) support or sustain life, and whose failure to perform can be reasonably expected
to result in a significant injury to the user. A Purchaser's use or sale of Micrel Products for use in life support appliances, devices
or systems is a Purchaser's own risk and Purchaser agrees to fully indemnify Micrel for any damages resulting from such use or sale.
© 2015 Micrel, Incorporated.
December 10, 2015
3420
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