MX66C1024MI-70 [Macronix]
5V Low Power CMOS SRAM 128 x 8 Bit; 5V低功耗CMOS SRAM的128 ×8位
| 型号： | MX66C1024MI-70 |
| 厂家： | 
MACRONIX INTERNATIONAL |
| 描述： | 5V Low Power CMOS SRAM 128 x 8 Bit |
| 文件： | 总10页 (文件大小：315K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
MX66C1024
5V Low Power CMOS SRAM 128 x 8 Bit
n DESCRIPTION
n FEATURES
The MX66C1024 is a high performance, extremely low power
CMOS
Static Random Access Memory organized as 131,072 words by 8
bits and operates at 5.0V supply voltage.
• Vcc operation voltage : 5V
• Low power consumption :
45mA (Max.) write current
2mA (Max.) read current
Advanced CMOS technology and circuit techniques provide both
high speed and low power features with a typical CMOS standby
current of 0.005uA and maximum access time of 70ns and 100ns
Easy memory expansion is provided by an active LOW chip
enable (CE1), an active HIGH chip enable (CE2), and active
LOW output enable (OE) and three-state output drivers.
The MX66C1024 has an automatic power down feature, reducing
the power consumption significantly when chip is deselected.
The MX66C1024 is available in the JEDEC standard 32 pin
SOP, STSOP and TSOP.
0.6uA (Typ.) CMOS standby current
• High speed access time :
-70
-10
70ns (Max.)
100ns (Max.)
• Input levels are CMOS-compatible
• Automatic power down when chip is deselected
• Three state outputs
• Fully static operation
• Data retention supply voltage as low as 1.2V
• Easy expansion with CE2, CE1, and OE options
n PIN CONFIGURATIONS
n BLOCK DIAGRAM
NC
A16
A14
A12
A7
1
2
VCC
A15
CE2
WE
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
3
4
A6
A7
A12
A14
A16
A15
A13
A8
5
A13
A8
A9
A6
A5
Address
6
7
Memory Array
1024 x 1024
20
1024
Row
Input
A4
MX66C1024MC
MX66C1024MI
8
A11
OE
A3
A2
9
Decoder
Buffer
10
11
12
13
14
15
16
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
A1
A9
A11
A0
DQ0
DQ1
DQ2
GND
1024
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
8
Data
Input
Column I/O
8
Buffer
Write Driver
Sense Amp
8
1
2
3
4
5
6
7
8
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
A11
A9
A8
OE
8
Data
Output
Buffer
A10
CE1
DQ7
DQ6
DQ5
DQ4
DQ3
GND
DQ2
DQ1
DQ0
A0
128
A13
WE
CE2
A15
VCC
NC
A16
A14
A12
A7
Column Decoder
14
MX66C1024TC
MX66C1024SC
MX66C1024TI
MX66C1024SI
CE2
CE1
WE
9
Control
Address Input Buffer
10
11
12
13
14
15
16
OE
Vdd
Gnd
A5 A4 A3 A2 A1 A0 A10
A6
A1
A2
A3
A5
A4
P/N DS00040
Rev. 1.0, November 1999
1
Macronix America Inc., USA 1338 Ridder Park Dr., San Jose, CA 95131
Tel (408)453-8088 Fax (408)451-0876 http: www.macronix.com
MX66C1024
n PIN DESCRIPTIONS
Name
Function
A0-A16 Address Input
These 17 address input select one of the 131,072 x 8-bit words in the RAM
CE1 Chip Enable 1 Input
CE2 Chip Enable 2 Input
CE1 is active LOW and CE2 is active HIGH. Both chip enables must be active to read
from or write to the device. If either chip enable is not active, the device is deselected
and is in a standby power mode. The DQ pins will be in the high impedance state
when the device is deselected.
WE Write Enable Input
OE Output Enable Input
The write enable input is active LOW and controls read and write operations. With the
chip selected, when WE is HIGH and OE is LOW, output data will be present on the
DQ pins; when WE is LOW, the data present on the DQ pins will be written into the
selected memory location.
The output enable input is active LOW. If the output enable is active while the chip is
selected and the write enable is inactive, data will be present on the DQ pins and they
will be enabled. The DQ pins will be in the high impedance state when OE is inactive.
These 8 bi-directional ports are used to read data from or write data into the RAM.
DQ0 – DQ7 Data Input/Output
Ports
Vcc
Power Supply
Ground
Gnd
n TRUTH TABLE
MODE
WE
X
CE1
H
CE2
X
OE
X
I/O OPERATION
High Z
Vcc CURRENT
Not selected
(Power Down)
ICCSB, ICCSB1
X
X
L
X
Output Disabled
Read
H
L
H
H
L
High Z
ICC
ICC
ICC
OUT
IN
H
L
H
D
Write
L
L
H
X
D
n ABSOLUTE MAXIMUM RATINGS(1)
n OPERATING RANGE
SYMBOL
VTERM
TBIAS
TSTG
PARAMETER
Terminal Voltage with
Respect to GND
RATING
UNITS
AMBIENT
TEMPERATURE
0 O C to +70 O
RANGE
-0.5 to +7.0
-40 to +125
-60 to +150
1.0
V
O C
O C
W
Commercial
Industrial
C
Temperature Under Bias
Storage Temperature
Power Dissipation
-40 O C to +70 O
C
PT
n CAPACITANCE (1) (TA = 25oC, f = 1.0 MHz)
DC Output Current
20
mA
IOUT
SYMBOL
PARAMETER
CONDITIONS
MAX.
UNIT
Input
1. Stresses greater than those listed under ABSOLUTE MAXIMUM
RATINGS may cause permanent damage to the device. This is a
stress rating only and functional operation of the device at these
or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
reliability.
CIN
VIN=0V
6
pF
Capacitance
Input/Output
Capacitance
CDQ
VI/O=0V
8
pF
1. This parameter is guaranteed and not tested.
P/N DS00040
Rev. 1.0, November 1999
2
Macronix America Inc., USA 1338 Ridder Park Dr., San Jose, CA 95131
Tel (408)453-8088 Fax (408)451-0876 http: www.macronix.com
MX66C1024
n DC ELECTRICAL CHARACTERISTICS ( TA = 0 to + 70oC )
PARAMETER
MIN. TYP. (1) MAX.
UNITS
PARAMETER
TEST CONDITIONS
NAME
Guaranteed Input Low
Voltage(2)
IL
V
-0.5
--
0.8
V
Guaranteed Input High
IH
V
2.2
--
--
--
Vcc+0.5
1
V
Voltage(2)
IL
IN
I
Input Leakage Current
Output Leakage Current
Vcc = Max, V = 0V to Vcc
uA
IH
IL,
Vcc = Max, CE1= V , CE2= V or
OE = V , V = 0V to Vcc
OL
I
--
--
1
uA
IH
I/O
OL
OL
V
Output Low Voltage
Output High Voltage
Vcc = Max, I = 1mA
--
--
--
0.4
--
V
V
OH
OH
V
Vcc = Min, I = -0.5mA
2.4
IL
IH
CE1 = V , or CE2 = V , Vcc = 5.0 V
Operating Power Supply
Current
CC
I
--
--
--
--
--
45
2
mA
mA
uA
(3)
DQ
I
= 0mA, F = Fmax
IH
IL
CE1 = V , or CE2 = V , Vcc = 5.0 V
Standby Power Supply
Current
CCSB
I
(3)
DQ
I
= 0mA, F = Fmax
>
<
CE1 Vcc-0.2V, CE2 0.2V,
Power Down Supply
Current
=
<
IN
=
CCSB1
I
0.6
3
>
IN
V
Vcc-0.2V or V 0.2V
=
=
1. Typical characteristics are at TA = 25oC.
2. These are absolute values with respect to device ground and all overshoots due to system or tester notice are included.
3. Fmax = 1/tRC
.
n DATA RETENTION CHARACTERISTICS ( TA = 0 to + 70oC )
SYMBOL
PARAMETER
TEST CONDITIONS
MIN. TYP.(1) MAX.
UNITS
<
>
CE1 Vcc - 0.2V, CE2 0.2V,
=
=
VDR
Vcc for Data Retention
1.2
--
--
V
VIN > Vcc - 0.2V or VIN< 0.2V
=
=
>
<
CE1 Vcc - 0.2V, CE2 0.2V,
=
=
ICCDR
Data Retention Current
--
0
0.005
0.2
uA
>
VIN
Vcc - 0.2V or VIN 0.2V
<
=
=
Chip Deselect to Data
Retention Time
tCDR
tR
--
--
--
--
ns
ns
See Retention Waveform
(2)
Operation Recovery Time
TRC
1. Vcc = 1.5V, TA = + 25OC
2. tRC = Read Cycle Time
n LOW VCC DATA RETENTION WAVEFORM (1) ( CE1 Controlled )
Data Retention Mode
³
DR 1.2V
V
Vcc
Vcc
Vcc
CE
t
R
t
CDR
³
CE Vcc - 0.2V
VIH
VIH
n LOW VCC DATA RETENTION WAVEFORM (2) ( CE2 Controlled )
Data Retention Mode
DR ³ 1.2V
V
Vcc
Vcc
Vcc
t
R
t
CDR
CE2
0.2V
£
VIH
VIH
CE2
P/N DS00040
Rev. 1.0, November 1999
3
Macronix America Inc., USA 1338 Ridder Park Dr., San Jose, CA 95131
Tel (408)453-8088 Fax (408)451-0876 http: www.macronix.com
MX66C1024
n KEY TO SWITCHING WAVEFORMS
n AC TEST CONDITIONS
Input Pulse Levels
Input Rise and Fall Times 5ns
Input and Output
Vcc/0V
WAVEFORM
INPUTS
OUTPUTS
MUST BE
STEADY
MUST BE
STEADY
Timing Reference Level
0.5Vcc
MAY CHANGE
FROM H TO L
WILL BE
CHANGE
FROM H TO L
n AC TEST LOADS AND WAVEFORMS
W
W
1000
1000
5PF
MAY CHANGE
FROM L TO H
WILL BE
CHANGE
FROM L TO H
5.0V
5.0V
OUTPUT
OUTPUT
,
DON T CARE:
CHANGE :
STATE
UNKNOWN
100PF
ANY CHANGE
PERMITTED
INCLUDING
JIG AND
SCOPE
INCLUDING
JIG AND
SCOPE
W
W
1500
1500
DOES NOT
APPLY
CENTER
FIGURE 1A
FIGURE 1B
LINE IS HIGH
IMPEDANCE
”OFF ”STATE
THEVENIN EQUIVALENT
600
W
OUTPUT
0.9V
ALL INPUT PULSES
Vcc
GND
10%
90% 90%
10%
®
®
¬
¬ 5ns
FIGURE 2
n AC ELECTRICAL CHARACTERISTICS (over the operating range)
READ CYCLE
JEDEC
PARAMETER
NAME
PARAMETER
MX66C1024-70
MIN. TYP. MAX.
MX66C1024-10
MIN. TYP. MAX.
UNIT
DESCRIPTION
NAME
t
t
AVAX
RC
Read Cycle Time
70
--
--
--
--
--
--
--
--
--
--
--
70
70
70
50
--
100
--
--
--
--
--
--
--
--
--
--
--
100
100
100
50
--
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
t
AVQV
AA
Address Access Time
t
t
E1LQV
ACS1
Chip Select Access Time
(CE1)
(CE2)
--
--
t
t
E2HOV
ACS2
Chip Select Access Time
--
--
t
t
GLQV
OE
Output Enable to Output Valid
Chip Select to Output Low Z
Chip Select to Output Low Z
Output Enable to Output in Low Z
Chip Deselect to Output in High Z
Chip Deselect to Output in High Z
Output Disable to Output in High Z
--
--
t
t
E1LQX
CLZ1
(CE1)
(CE2)
10
10
10
0
10
10
10
0
t
t
E2HOX
CLZ2
--
--
t
t
GLQX
OLZ
--
--
t
t
E1HQZ
CHZ1
(CE1)
(CE2)
40
40
35
--
40
40
35
--
t
t
E2HQZ
CHZ1
0
0
t
t
GHQZ
OHZ
0
--
--
0
--
--
t
t
AXOX
OH
10
Output Disable to Output Address Change
10
1. Typical characteristics are at Vcc = 5V, TA = 25oC.
P/N DS00040
Rev. 1.0, November 1999
4
Macronix America Inc., USA 1338 Ridder Park Dr., San Jose, CA 95131
Tel (408)453-8088 Fax (408)451-0876 http: www.macronix.com
MX66C1024
n SWITCHING WAVEFORMS (READ CYCLE)
READ CYCLE1 (1,2,4)
t
RC
ADDRESS
t
AA
t
OH
t
OH
D OUT
READ CYCLE2 (1,3,4)
CE1
t ACS1
t ACS2
CE2
(5)
CHZ
t
(5)
CLZ
t
D OUT
READ CYCLE3 (1,4)
ADDRESS
t
RC
t
AA
OE
t
OH
t
OE
t
OLZ
CE1
(5)
(5) t ACS1
CLZ1
t
t
OHZ
(1,5)
CHZ
t
t
CE2
t ACS2
(2,5)
CHZ
t
(5)
CLZ2
D OUT
NOTES:
1. WE is high for read Cycle.
2. Device is continuously selected when CE1 = VIL and CE2= VIH.
3. Address valid prior to or coincident with CE1 transition low and/or CE2 transition high.
4. OE = VIL
.
±
5. Transition is measured 500mV from steady state with CL = 5pF as shown in Figure 1B.
The parameter is guaranteed but not 100% tested.
P/N DS00040
Rev. 1.0, November 1999
5
Macronix America Inc., USA 1338 Ridder Park Dr., San Jose, CA 95131
Tel (408)453-8088 Fax (408)451-0876 http: www.macronix.com
MX66C1024
n AC ELECTRICAL CHARACTERISTICS (over the operating range)
WRITE CYCLE
JEDEC
PARAMETER
PARAMETER
MX66C1024-70
MIN. TYP. MAX. MIN. TYP. MAX.
MX66C1024-10
DESCRIPTION
UNIT
NAME
tNAME
70
70
0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
100
100
0
--
--
--
--
--
--
--
--
--
--
--
--
--
--
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
t
E1LWH
CW
AS
Chip Select to End of Write
Address Set up Time
t
t
t
t
t
t
t
t
t
t
t
AVWL
--
--
t
AVWH
AW
Address Valid to End of Write
Write Pulse Width
70
50
0
--
10
50
--
--
t
WLWH
WP
--
--
t
WHAX
WR1
WR2
WHZ
DW
DH
Write Recovery Time
(CE1, WE)
(CE2)
--
--
t
E2LAX
Write Recovery Time
0
--
--
--
t
WLOZ
Write to Output in High Z
Data to Write Time Overlap
Data Hold from Write Time
--
30
--
--
30
--
t
DVWH
30
0
30
0
t
WHDX
--
--
t
GHOZ
OHZ
OW
Output Disable to Output in High Z
End of Write to Output Active
0
30
--
0
30
--
t
WHQX
5
5
1. Typical characteristics are at Vcc = 5V, T
A
= 25oC.
n SWITCHING WAVEFORMS (WRITE CYCLE)
WRITE CYCLE1 (1)
t
WC
ADDRESS
OE
(3)
WR1
t
(11)
CW
t
(5)
(5)
CE1
(11)
CE2
t
t
CW
t
WR2
(3)
t
AW
WP
(2)
WE
t
AS
(4,10)
OHZ
t
D OUT
t
DH
t
DW
D IN
P/N DS00040
Rev. 1.0, November 1999
6
Macronix America Inc., USA 1338 Ridder Park Dr., San Jose, CA 95131
Tel (408)453-8088 Fax (408)451-0876 http: www.macronix.com
MX66C1024
(1,6)
WRITE CYCLE2
t
WC
ADDRESS
CE1
(11)
CW
t
(5)
(5)
(11)
CW
CE2
t
t
WR2
t
AW
(3)
t
WP
(2)
t
DH
WE
t AS
(4,10)
(7)
(8)
t WHZ
D OUT
t
DW
(8)
t
DH
D IN
NOTES:
1. WE must be high during address transitions.
2. The internal write time of the memory is defined by the overlap of CE1 and CE2 active and WE low.
All signals must be active to initiate a write and any one signal can terminate a write by going
inactive. The data input setup and hold timing should be referenced to the second transition edge
of the signal that terminates the write.
3. TWR is measured from the earlier of CE1 or WE going high or CE2 going low at the end of write
cycle.
4. During this period, DQ pins are in the output state so that the input signals of opposite phase to the
outputs must not be applied.
5. If the CE1 low transition or the CE2 high transition occurs simultaneously with the WE low
transitions or after the WE transition, output remain in a high impedance state.
6. OE is continuously low (OE = VIL ).
7. DOUT is the same phase of write data of this write cycle.
8. DOUT is the read data of next address.
9. If CE1 is low and CE2 is high during this period, DQ pins are in the output state. Then the data input
signals of opposite phase to the outputs must not be applied to them.
10. Transition is measured 500mV from steady state with CL = 5pF as shown in Figure 1B. The
±
parameter is guaranteed but not 100% tested.
11. TCW is measured from the later of CE1 going low or CE2 going high to the end of write.
P/N DS00040
Rev. 1.0, November 1999
7
Macronix America Inc., USA 1338 Ridder Park Dr., San Jose, CA 95131
Tel (408)453-8088 Fax (408)451-0876 http: www.macronix.com
MX66C1024
n
SPEED
(ns)
ORDERING
PART NUMBER
PACKAGE
TEMPERATURE RANGE
0O C to + 70O
0O C to + 70O
-40O C to + 85O
-40O C to + 85O
0O C to + 70O
C
C
SOP - 32 PIN
70
MX66C1024MC - 70
MX66C1024MC - 10
MX66C1024MI - 70
MX66C1024MI - 10
MX66C1024TC - 70
MX66C1024TC - 10
MX66C1024TI- 70
MX66C1024TI- 10
MX66C1024SC- 70
MX66C1024SC- 10
MX66C1024SI- 70
MX66C1024SI- 10
100
70
SOP - 32 PIN
SOP - 32 PIN
SOP - 32 PIN
C
C
100
70
C
TSOP - 32 PIN
TSOP - 32 PIN
0O C to + 70O
-40O C to + 85O
C
100
70
C
TSOP - 32 PIN
TSOP - 32 PIN
STSOP - 32 PIN
-40O C to + 85O
C
100
70
0O C to + 70O
0O C to + 70O
C
C
100
70
STSOP - 32 PIN
STSOP - 32 PIN
STSOP - 32 PIN
-40O C to + 85O
-40O C to + 85O
C
100
C
n PACKAGE DIMENSIONS
P/N DS00040
Rev. 1.0, November 1999
8
Macronix America Inc., USA 1338 Ridder Park Dr., San Jose, CA 95131
Tel (408)453-8088 Fax (408)451-0876 http: www. .com
MX66C1024
n PACKAGE DIMENSIONS (continued)
P/N DS00040
Rev. 1.0, November 1999
9
Macronix America Inc., USA 1338 Ridder Park Dr., San Jose, CA 95131
Tel (408)453-8088 Fax (408)451-0876 http: www.macronix.com
This page is left blank intentionally.
P/N DS00040
Rev. 1.0, November 1999
Macronix America Inc., USA 1338 Ridder Park Dr., San Jose, CA 95131
Tel (408)453-8088 Fax (408)451-0876 http: www. .com
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