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MX23L3211MC-12 [Macronix]

32M-BIT MASK ROM (8/16-BIT OUTPUT); 32M - BIT MASK ROM （8/ 16位输出）
MX23L3211MC-12
型号： MX23L3211MC-12
厂家： MACRONIX INTERNATIONAL    MACRONIX INTERNATIONAL
描述：

32M-BIT MASK ROM (8/16-BIT OUTPUT)
32M - BIT MASK ROM （8/ 16位输出）

输出元件 有原始数据的样本ROM
文件： 总9页 (文件大小：518K)
中文：  中文翻译
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MX23L3211  
32M-BIT MASK ROM (8/16-BIT OUTPUT)  
FEATURES  
ORDER INFORMATION  
• Bit organization  
Part No.  
Access Page Access Package  
- 4M x 8 (byte mode)  
- 2M x 16 (word mode)  
• Fast access time  
- Random access: 100ns (max.)  
- Page access: 30ns (max.)  
• Page Size  
- 8 words per page  
• Current  
- Operating:40mA  
- Standby:5uA  
Time  
Time  
30ns  
50ns  
30ns  
50ns  
30ns  
MX23L3211MC-10 100ns  
MX23L3211MC-12 120ns  
MX23L3211TC-10 100ns  
MX23L3211TC-12 120ns  
MX23L3211RC-10 100ns  
44 pin SOP  
44 pin SOP  
48 pin TSOP  
48 pin TSOP  
48 pin TSOP  
(Reverse type)  
48 pin TSOP  
(Reverse type)  
MX23L3211RC-12 120ns  
50ns  
• Supply voltage  
- 100ns @3.0V ~ 3.6V  
- 120ns @2.7V ~ 3.6V  
• Package  
- 44 pin SOP (500mil)  
- 48 pin TSOP (12mm x 20mm)  
PIN CONFIGURATION  
44 SOP  
PIN DESCRIPTION  
Symbol  
A0~A20  
D0~D14  
D15/A-1  
Pin Function  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
A20  
A19  
A8  
NC  
A18  
A17  
A7  
2
3
4
Address Inputs  
Data Outputs  
A9  
5
A10  
A11  
A12  
A13  
A14  
A15  
A16  
BYTE  
VSS  
D15/A-1  
D7  
D14  
D6  
D13  
D5  
D12  
D4  
VCC  
A6  
6
D15 (Word Mode)/ LSB Address  
(Byte Mode)  
A5  
7
A4  
8
A3  
9
A2  
CE  
Chip Enable Input  
Output Enable Input  
Word/ Byte Mode Selection  
Power Supply Pin  
Ground Pin  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
A1  
A0  
CE  
VSS  
OE  
D0  
D8  
D1  
D9  
D2  
OE  
Byte  
VCC  
VSS  
NC  
No Connection  
D10  
D3  
D11  
MODE SELECTION  
CE  
H
L
OE  
X
Byte  
D15/A-1  
X
D0~D7  
High Z  
High Z  
D0~D7  
D0~D7  
D8~D15  
High Z  
Mode  
Power  
Stand-by  
Active  
X
X
H
L
-
H
L
X
High Z  
-
L
Output  
Input  
D8~D15  
High Z  
Word  
Byte  
Active  
L
L
Active  
P/N:PM0411  
REV. 2.1, JUL. 17, 2001  
1
MX23L3211  
48TSOP (NormalType)  
1
2
3
4
5
6
7
8
BYTE  
A16  
A15  
A14  
A13  
A12  
A11  
A10  
A9  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
VSS  
VSS  
D15/A-1  
D7  
D14  
D6  
D13  
D5  
D12  
D4  
VCC  
VCC  
NC  
D11  
D3  
D10  
D2  
D9  
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
A8  
A19  
VSS  
A20  
A18  
A17  
A7  
A6  
A5  
A4  
A3  
MX23L3211  
(Normal Type)  
D1  
D8  
D0  
OE  
VSS  
VSS  
A2  
A1  
A0  
CE  
48TSOP (ReverseType)  
48  
47  
46  
45  
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
1
2
3
4
5
6
7
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
BYTE  
A16  
A15  
A14  
A13  
A12  
A11  
A10  
A9  
VSS  
VSS  
D15/A-1  
D7  
D14  
D6  
D13  
D5  
D12  
D4  
VCC  
VCC  
NC  
D11  
D3  
D10  
D2  
D9  
D1  
A8  
A19  
VSS  
A20  
A18  
A17  
A7  
A6  
A5  
A4  
A3  
MX23L3211  
(Reverse Tpye)  
D8  
D0  
OE  
VSS  
A2  
A1  
A0  
CE  
VSS  
P/N:PM0411  
REV. 2.1, JUL. 17, 2001  
2
MX23L3211  
BLOCK DIAGRAM  
A0/(A-1)  
A2  
A3  
D0  
Address  
Buffer  
Memory  
Array  
Page  
Page  
Word/  
Byte  
Output  
Buffer  
Buffer  
Decoder  
D15/(D7)  
A20  
CE  
BYTE  
OE  
ABSOLUTE MAXIMUM RATINGS  
Item  
Symbol  
VIN  
Ratings  
Voltage on any Pin Relative to VSS  
Ambient OperatingTemperature  
StorageTemperature  
-1.3V to VCC+2.0V (Note)  
0°C to 70°C  
Topr  
Tstg  
-65°C to 125°C  
Note: Minimum DC voltage on input or I/O pins is -0.5V.  
During voltage transitions, inputs may undershoot VSS  
to -1.3V for periods of up to 20ns. Maximum DC voltage  
on input or I/O pins is VCC+0.5V. During voltage transi-  
tions, input may overshoot VCC to VCC+2.0V for peri-  
ods of up to 20ns.  
DC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3.0V~3.6V)  
Item  
Symbol  
VOH  
VOL  
MIN.  
MAX.  
Conditions  
IOH = -400uA  
IOL = 1.6mA  
Output High Voltage  
Output Low Voltage  
Input High Voltage  
Input Low Voltage  
Input Leakage Current  
Output Leakage Current  
Operating Current  
Standby Current (TTL)  
Standby Current (CMOS)  
Input Capacitance  
Output Capacitance  
2.4V  
-
-
0.4V  
VCC+0.3V  
0.8V  
5uA  
VIH  
2.2V  
VIL  
-0.3V  
ILI  
-
-
-
-
-
-
-
0V, VCC  
0V, VCC  
ILO  
5uA  
ICC1  
ISTB1  
ISTB2  
CIN  
40mA  
1mA  
5uA  
tRC = 100ns, all output open  
CE = VIH  
CE>VCC-0.2V  
10pF  
10pF  
Ta = 25°C, f = 1MHZ  
Ta = 25°C, f = 1MHZ  
COUT  
P/N:PM0411  
REV. 2.1, JUL. 17, 2001  
3
MX23L3211  
AC CHARACTERISTICS (Ta = 0°C ~ 70°C, VCC = 3V±10%)  
Item  
Symbol  
23L3211-10  
23L3211-12  
MIN.  
MAX.  
MIN.  
MAX.  
-
Read Cycle Time  
tRC  
tAA  
tACE  
tPA  
100ns  
-
120ns  
Address Access Time  
Chip Enable Access Time  
Page Mode Access Time  
Output Enable Time  
-
100ns  
100ns  
30ns  
30ns  
-
-
120ns  
120ns  
50ns  
50ns  
-
-
-
-
-
tOE  
tOH  
tHZ  
-
-
Output Hold After Address  
Output High Z Delay  
0ns  
-
0ns  
-
20ns  
20ns  
Note:Output high-impedance delay (tHZ) is measured  
from OE or CE going high, and this parameter guaran-  
teed by design over the full voltage and temperature op-  
erating range - not tested.  
AC Test Conditions  
Input Pulse Levels  
Input Rise and Fall Times  
Input Timing Level  
Output Timing Level  
Output Load  
0.4V~ 2.6V  
10ns  
IOH (load)=-0.4mA  
1.4V  
1.4V  
DOUT  
See Figure  
IOL (load)=1.6mA  
C<100pF  
Note:  
No output loading is present in tester load board.  
Active loading is used and under software programming control.  
Output loading capacitance includes load board's and all stray capacitance.  
P/N:PM0411  
REV. 2.1, JUL. 17, 2001  
4
MX23L3211  
TIMING DIAGRAM  
RANDOM READ  
ADD  
ADD  
ADD  
ADD  
tRC  
tACE  
CE  
OE  
tOE  
tHZ  
tOH  
tAA  
VALID  
VALID  
VALID  
DATA  
PAGE READ  
A3-A20  
VALID ADD  
2'nd ADD  
tPA  
3'rd ADD  
(A-1),A0,A1,A2  
DATA  
1'st ADD  
tAA  
VALID  
VALID  
VALID  
Note: CE, OE are enable.  
Page size is 8 double words in 32-bit mode, 16 words in 16-bit mode.  
P/N:PM0411  
REV. 2.1, JUL. 17, 2001  
5
MX23L3211  
PACKAGE INFORMATION  
44-PIN PLASTIC SOP  
P/N:PM0411  
REV. 2.1, JUL. 17, 2001  
6
MX23L3211  
48-PIN PLASTICTSOP  
P/N:PM0411  
REV. 2.1, JUL. 17, 2001  
7
MX23L3211  
REVISION HISTORY  
REVISION  
2.0  
DESCRIPTION  
PAGE  
P4  
P1  
DATE  
JAN/22/1999  
Output hold after address (tOH) spec is revised as 0ns(min.)  
120ns speed grade's voltage range is revised as 2.7V~3.6V  
Modify Package Information  
2.1  
P6~7  
JUL/17/2001  
P/N:PM0411  
REV. 2.1, JUL. 17, 2001  
8
MX23L3211  
MACRONIX INTERNATIONAL CO., LTD.  
HEADQUARTERS:  
TEL:+886-3-578-6688  
FAX:+886-3-563-2888  
EUROPE OFFICE:  
TEL:+32-2-456-8020  
FAX:+32-2-456-8021  
JAPAN OFFICE:  
TEL:+81-44-246-9100  
FAX:+81-44-246-9105  
SINGAPORE OFFICE:  
TEL:+65-348-8385  
FAX:+65-348-8096  
TAIPEI OFFICE:  
TEL:+886-2-2509-3300  
FAX:+886-2-2509-2200  
MACRONIX AMERICA, INC.  
TEL:+1-408-453-8088  
FAX:+1-408-453-8488  
CHICAGO OFFICE:  
TEL:+1-847-963-1900  
FAX:+1-847-963-1909  
http : //www.macronix.com  
MACRONIX INTERNATIONAL CO., LTD. reserves the right to change product and specifications without notice.  
9

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