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5962-3826703V7V [MAXWELL]

MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON; 微型电路，存储器，数字， CMOS 128K ×8位EEPROM ，单片硅
5962-3826703V7V
型号： 5962-3826703V7V
厂家： MAXWELL TECHNOLOGIES    MAXWELL TECHNOLOGIES
描述：

MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON
微型电路，存储器，数字， CMOS 128K ×8位EEPROM ，单片硅

存储 可编程只读存储器 电动程控只读存储器 电可擦编程只读存储器
文件： 总40页 (文件大小：315K)
中文：  中文翻译
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REVISIONS  
LTR  
A
DESCRIPTION  
DATE (YR-MO-DA)  
93-06-29  
APPROVED  
M. A. Frye  
Add packages T and W. Add vendor CAGE 60395 as source of  
supply. Increase data retention to 20 years, minimum. Redrawn with  
changes.  
B
C
D
E
Changes in accordance with NOR 5962-R139-94.  
Changes in accordance with NOR 5962-R278-94.  
Changes in accordance with NOR 5962-R163-96.  
94-03-29  
94-09-19  
96-06-27  
98-07-22  
M. A. Frye  
M. A. Frye  
M. A. Frye  
Updated boilerplate. Added device types 16-18 and packages M and N  
to drawing along with vendor CAGE 0EU86 as supplier. Removed  
figures 9, 10 and 11 software data protect algorithms. Removed  
vendor 61395 as supplier. - glg  
Raymond Monnin  
F
Corrected dimensions for packages "M" and "N". - glg  
99-10-06  
Raymond Monnin  
Raymond Monnin  
G
Added device 19, packages 6 and 7, and updated boilerplate. ksr  
01- 10- 05  
THE ORIGINAL FIRST PAGE OF THIS DRAWING HAS BEEN REPLACED.  
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REV  
SHEET  
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18  
19  
20  
SHEET  
REV STATUS  
OF SHEETS  
REV  
10  
11  
12  
13  
14  
SHEET  
PREPARED BY  
Kenneth Rice  
PMIC N/A  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216  
STANDARD  
MICROCIRCUIT  
DRAWING  
CHECKED BY  
Charles Reusing  
MICROCIRCUIT, MEMORY, DIGITAL,  
CMOS 128K x 8 BIT EEPROM,  
MONOLITHIC SILICON  
APPROVED BY  
Charles E. Besore  
THIS DRAWING IS  
AVAILABLE  
FOR USE BY ALL  
DEPARTMENTS  
DRAWING APPROVAL DATE  
91-07-12  
AND AGENCIES OF THE  
DEPARTMENT OF DEFENSE  
SIZE  
CAGE CODE  
5962-38267  
A
67268  
REVISION LEVEL  
G
AMSC N/A  
SHEET  
1
OF  
37  
DSCC FORM 2233  
APR 97  
5962-E561-01  
DISTRIBUTION STATEMENT A. Approved for public release; distribution is unlimited.  
1. SCOPE  
1.1 Scope. This drawing documents two product assurance class levels consisting of high reliability (device classes Q and M)  
and space application (device class V). A choice of case outlines and lead finishes are available and are reflected in the Part or  
Identifying Number (PIN). When available, a choice of Radiation Hardness Assurance (RHA) levels are reflected in the PIN.  
1.2 PIN. The PIN shall be as shown in the following example:  
5962  
-
38267  
01  
Q
X
X
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|
|
|
|
|
|
|
|
|
|
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Federal  
stock class  
designator  
RHA  
designator  
(see 1.2.1)  
Device  
type  
(see 1.2.2)  
Device  
class  
designator  
(see 1.2.3)  
Case  
outline  
(see 1.2.4)  
Lead  
finish  
(see 1.2.5)  
\
/
\/  
Drawing number  
1.2.1 RHA designator. Device classes Q and V RHA marked devices meet the MIL-PRF-38535 specified RHA levels and  
are marked with the appropriate RHA designator. Device class M RHA marked devices meet the MIL-PRF-38535, appendix A  
specified RHA levels and are marked with the appropriate RHA designator. A dash (-) indicates a non-RHA device.  
1.2.2 Device type(s). The device type(s) shall identify the circuit function as follows:  
Software  
Generic  
data  
Device type number  
Circuit function  
Access time Write speed  
Write mode  
Endurance  
protect  
01,16  
02  
03,17  
04  
05,18  
06  
07,19  
08  
09  
10  
11  
12  
1/  
128K x 8 EEPROM  
128K x 8 EEPROM  
128K x 8 EEPROM  
128K x 8 EEPROM  
128K x 8 EEPROM  
128K x 8 EEPROM  
128K x 8 EEPROM  
128K x 8 EEPROM  
128K x 8 EEPROM  
128K x 8 EEPROM  
128K x 8 EEPROM  
128K x 8 EEPROM  
128K x 8 EEPROM  
128K x 8 EEPROM  
128K x 8 EEPROM  
250 ns  
250 ns  
200 ns  
200 ns  
150 ns  
150 ns  
120 ns  
120 ns  
90 ns  
90 ns  
70 ns  
70 ns  
120 ns  
90 ns  
10 ms  
5 ms  
10 ms  
5 ms  
10 ms  
5 ms  
10 ms  
3 ms  
10 ms  
3 ms  
10 ms  
3 ms  
3 ms  
3 ms  
Byte/Page  
Byte/Page  
Byte/Page  
Byte/Page  
Byte/Page  
Byte/Page  
Byte/Page  
Byte/Page  
Byte/Page  
Byte/Page  
Byte/Page  
Byte/Page  
Byte/Page  
Byte/Page  
Byte/Page  
10,000 cycle  
10,000 cycle  
10,000 cycle  
10,000 cycle  
10,000 cycle  
10,000 cycle  
10,000 cycle  
10,000 cycle  
10,000 cycle  
10,000 cycle  
10,000 cycle  
10,000 cycle  
10,000 cycle  
10,000 cycle  
10,000 cycle  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
yes  
13  
14  
15  
70 ns  
3 ms  
1.2.3 Device class designator. The device class designator shall be a single letter identifying the product assurance level as  
follows:  
Device class  
M
Device requirements documentation  
Vendor self-certification to the requirements for MIL-STD-883 compliant, non-JAN  
class level B microcircuits in accordance with MIL-PRF-38535, appendix A  
Q or V  
Certification and qualification to MIL-PRF-38535  
1/ Generic numbers are listed on the Standard Microcircuit Drawing Source Approval Bulletin at the end of this document and will  
also be listed in QML-38535 and MIL-HDBK-103.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
2
DSCC FORM 2234  
APR 97  
1.2.4 Case outline(s). The case outline(s) shall be as designated in MIL-STD-1835 and as follows:  
Outline letter  
Descriptive designator  
GDIP1-T32 or CDIP2-T32  
CQCC1-N44  
Terminals  
Package style  
Dual in-line  
Square chip carrier  
Flat package  
Rectangular chip carrier  
Grid array  
X
Y
Z
U
T
W
M
N
6
32  
44  
32  
32  
30  
36  
32  
32  
32  
32  
See figure 1  
CQCC1-N32  
See figure 1  
See figure 1  
See figure 1  
See figure 1  
Grid array  
Flat package  
Flat package  
Flat package  
Flat package  
See figure 1(enhanced rad tolerant)  
See figure 1(enhanced rad tolerant)  
7
1.2.5 Lead finish. The lead finish is as specified in MIL-PRF-38535 for device classes Q and V or MIL-PRF-38535, appendix  
A for device class M.  
1.3 Absolute maximum ratings. 1/ 2/  
Supply voltage range (V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.5 V dc to +6.0 V dc 3/  
CC  
Operating case temperature range . . . . . . . . . . . . . . . . . . . . . . -55 C to +125 C  
Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . -65 C to +150 C  
Lead temperature (soldering, 10 seconds) . . . . . . . . . . . . . . . . +300 C  
Thermal resistance, junction-to-case (  
):  
JC  
Cases X, Y and U . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See MIL-STD-1835  
Cases T and W . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 C/W 4/  
Case Z . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 C/W 4/  
Case M . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 C/W 4/  
Case N . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 C/W 4/  
Case 6 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 C/W 4/  
Case 7 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5 C/W 4/  
Maximum power dissipation (P ) . . . . . . . . . . . . . . . . . . . . . . . . 1.0 watts  
D
Junction temperature (T ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +175 C 5/  
J
Endurance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10,000 cycles/byte (minimum)  
Data retention . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 years minimum  
1.4 Recommended operating conditions.  
Supply voltage range (V ) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.5 V dc minimum to 5.5 V dc maximum  
CC  
Supply voltage (V  
)
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.0 V dc  
SS  
High level input voltage range (V ) . . . . . . . . . . . . . . . . . . . . . . 2.0 V dc to V  
+ 1.0 V dc 6/  
CC  
IH  
Low level input voltage range (V ) . . . . . . . . . . . . . . . . . . . . . . -0.1 V dc to 0.8 V dc  
IL  
Case operating temperature range (T ) . . . . . . . . . . . . . . . . . . -55 C to +125 C  
C
1.5 Digital logic testing for device classes Q and V.  
Fault coverage measurement of manufacturing  
logic tests (MIL-STD-883, test method 5012) . . . . . . . . . . . . . . 100 percent  
1/ Stresses above the absolute maximum rating may cause permanent damage to the device. Extended operation at the  
maximum levels may degrade performance and affect reliability.  
2/ All voltages referenced to V  
(V = ground), unless otherwise specified.  
SS SS  
3/ Negative undershoots to a minimum of -1.0 V are allowed with a maximum of 20 ns pulse width.  
4/ When the thermal resistance for this case is specified in MIL-STD-1835, that value shall supersede  
the value indicated herein.  
5/ Maximum junction temperature shall not be exceeded except for allowable short duration burn-in screening  
conditions in accordance with method 5004 of MIL-STD-883.  
6/ For device types 16-19 only, V on RES shall be V  
- 0.5 V min. to V  
+ 1.0 V max.  
IH  
CC  
CC  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
3
DSCC FORM 2234  
APR 97  
2. APPLICABLE DOCUMENTS  
2.1 Government specification, standards, and handbooks. The following specification, standards, and handbooks form a part  
of this drawing to the extent specified herein. Unless otherwise specified, the issues of these documents are those listed in the  
issue of the Department of Defense Index of Specifications and Standards (DoDISS) and supplement thereto, cited in the  
solicitation.  
SPECIFICATION  
DEPARTMENT OF DEFENSE  
MIL-PRF-38535 - Integrated Circuits, Manufacturing, General Specification for.  
STANDARDS  
DEPARTMENT OF DEFENSE  
MIL-STD-883  
-
Test Method Standard Microcircuits.  
MIL-STD-1835 - Interface Standard for Microcircuit Case Outlines.  
HANDBOOKS  
DEPARTMENT OF DEFENSE  
MIL-HDBK-103 - List of Standard Microcircuit Drawings.  
MIL-HDBK-780 - Standard Microcircuit Drawings.  
(Unless otherwise indicated, copies of the specification, standards, and handbooks are available from the Standardization  
Document Order Desk, 700 Robbins Avenue, Building 4D, Philadelphia, PA 19111-5094).  
2.2 Non-Government publications. The following documents form a part of this document to the extent specified herein. Unless  
otherwise specified, the issues of the documents which are DoD adopted are those listed in the issue of the DODISS cited in the  
solicitation. Unless otherwise specified, the issues of documents not listed in the DODISS are the issues of the documents cited  
in the solicitation.  
AMERICAN SOCIETY FOR TESTING AND MATERIALS (ASTM)  
ASTM Standard F1192-88  
-
Standard Guide for the Measurement of Single Event Phenomena from  
Heavy Ion Irradiation of Semiconductor Devices.  
(Applications for copies of ASTM publications should be addressed to the American Society for Testing and Materials, 1916  
Race Street, Philadelphia, PA 19103).  
ELECTRONICS INDUSTRIES ASSOCIATION (EIA)  
JEDEC Standard EIA/JESD78 - I/C Latch-up Test.  
(Applications for copies should be addressed to the Electronics Industries Association, 2500 Wilson Boulevard, Arlington,  
VA 22201).  
(Non-Government standards and other publications are normally available from the organizations that prepare or distribute  
the documents. These documents also may be available in or through libraries or other informational services).  
2.3 Order of precedence. In the event of a conflict between the text of this drawing and the references cited herein, the text of  
this drawing shall take precedence. Nothing in this document, however, supersedes applicable laws and regulations unless a  
specific exemption has been obtained.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
4
DSCC FORM 2234  
APR 97  
3. REQUIREMENTS  
3.1 Item requirements. The individual item requirements for device classes Q and V shall be in accordance with MIL-PRF-38535  
and as specified herein or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM  
plan shall not affect the form, fit, or function as described herein. The individual item requirements for device class M shall be in  
accordance with MIL-PRF-38535, appendix A for non-JAN class level B devices and as specified herein.  
3.2 Design, construction, and physical dimensions. The design, construction, and physical dimensions shall be as specified  
in MIL-PRF-38535 and herein for device classes Q and V or MIL-PRF-38535, appendix A and herein for device class M.  
3.2.1 Case outline(s). The case outline(s) shall be in accordance with 1.2.4 herein and figure 1.  
3.2.2 Terminal connections. The terminal connections shall be as specified on figure 2.  
3.2.3 Truth table. The truth table shall be as specified on figure 3.  
3.2.3.1 Unprogrammed devices. The truth table for unprogrammed devices for contracts involving no altered item drawing  
shall be as specified on figure 3 herein. When required, in screening (see 4.2 herein), or quality conformance inspection groups  
A, B, C, or D (see 4.4 herein), the devices shall be programmed by the manufacturer prior to test in a checkerboard or similar  
pattern (a minimum of 50 percent of the total number of bits programmed).  
3.2.3.2 Programmed devices. The requirements for supplying programmed devices are not part of this document.  
3.3 Electrical performance characteristics and postirradiation parameter limits. Unless otherwise specified herein, the electrical  
performance characteristics and postirradiation parameter limits are as specified in table I and shall apply over the full case  
operating temperature range.  
3.4 Electrical test requirements. The electrical test requirements shall be the subgroups specified in table IIA. The electrical  
tests for each subgroup are defined in table I.  
3.5 Marking. The part shall be marked with the PIN listed in 1.2 herein. In addition, the manufacturer's PIN may also be marked  
as listed in MIL-HDBK-103. For packages where marking of the entire SMD PIN number is not feasible due to space limitations,  
the manufacturer has the option of not marking the "5962-" on the device. For RHA product using this option, the RHA designator  
shall still be marked. Marking for device classes Q and V shall be in accordance with MIL-PRF-38535. Marking for device class  
M shall be in accordance with MIL-PRF-38535, appendix A.  
3.5.1 Certification/compliance mark. The certification mark for device classes Q and V shall be a "QML" or "Q" as required in  
MIL-PRF-38535. The compliance mark for device class M shall be a "C" as required in MIL-PRF-38535, appendix A.  
3.6 Certificate of compliance. For device classes Q and V, a certificate of compliance shall be required from a QML-38535  
listed manufacturer in order to supply to the requirements of this drawing (see 6.6.1 herein). For device class M, a certificate of  
compliance shall be required from a manufacturer in order to be listed as an approved source of supply in MIL-HDBK-103 (see 6.6.2  
herein). The certificate of compliance submitted to DSCC-VA prior to listing as an approved source of supply for this drawing shall  
affirm that the manufacturer's product meets, for device classes Q and V, the requirements of MIL-PRF-38535 and herein or for  
device class M, the requirements of MIL-PRF-38535, appendix A and herein.  
3.7 Certificate of conformance. A certificate of conformance as required for device classes Q and V in MIL-PRF-38535 or for  
device class M in MIL-PRF-38535, appendix A shall be provided with each lot of microcircuits delivered to this drawing.  
3.8 Notification of change for device class M. For device class M, notification to DSCC-VA of change of product (see 6.2 herein)  
involving devices acquired to this drawing is required for any change as defined in MIL-PRF-38535, appendix A.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
5
DSCC FORM 2234  
APR 97  
3.9 Verification and review for device class M. For device class M, DSCC, DSCC's agent, and the acquiring activity retain the  
option to review the manufacturer's facility and applicable required documentation. Offshore documentation shall be made available  
onshore at the option of the reviewer.  
3.10 Microcircuit group assignment for device class M. Device class M devices covered by this drawing shall be in microcircuit  
group number 41 (see MIL-PRF-38535, appendix A).  
3.11 Processing of EEPROMs. All testing requirements and quality assurance provisions herein shall be satisfied by the  
manufacturer prior to delivery.  
3.11.1 Conditions of the supplied devices. Devices will be supplied in an unprogrammed or clear state. No provision will be  
made for supplying programmed devices.  
3.11.2 Erasure of EEPROMs. When specified, devices shall be erased in accordance with procedures and characteristics  
specified in 4.5.1.  
3.11.3 Programming of EEPROMs. When specified, devices shall be programmed in accordance with procedures and  
characteristics specified in 4.5.2.  
3.11.4 Verification of state of EEPROMs. When specified, devices shall be verified as either written to the specified pattern  
or cleared. As a minimum, verification shall consist of performing a read of the entire array to verify that all bits are in the proper  
state. Any bit that does not verify to be in the proper state shall constitute a device failure and the device shall be removed from  
the lot or sample.  
3.11.5 Power supply sequence of EEPROMs. In order to reduce the probability of inadvertant writes, the following power  
supply sequences shall be observed.  
a. For device types 1-19, a logic high state shall be applied to WE and/or CE at the same time or before the application  
of V . For device types 16-19, an additional precaution is available, a logic low state shall be applied to RES at the  
CC  
same time or before the application of V  
.
CC  
b. For device types 1-19, a logic high state shall be applied to WE and/or CE at the same time or before the removal of  
V
. For device types 16-19, an additional precaution is available, a logic low state shall be applied to RES at the  
CC  
same time or before the removal of V  
.
CC  
3.12 Endurance. A reprogrammability test shall be completed as part of the vendor's reliability monitors. This  
reprogrammability test shall be done for initial characterization and after any design or process changes which may affect the  
reprogrammability of the device. The methods and procedures may be vendor specific, but shall guarantee the number of  
program/erase endurance cycles listed in section 1.3 herein over the full military temperature range. The vendor's procedure  
shall be kept under document control and shall be made available upon request of the acquiring or preparing activity, along with  
test data.  
3.13 Data retention. A data retention stress test shall be completed as part of the vendor's reliability monitors. This test shall  
be done for initial characterization and after any design or process change which may affect data retention. The methods and  
procedures may be vendor specific, but shall guarantee the number of years listed in section 1.3 herein over the full military  
temperature range. The vendor's procedure shall be kept under document control and shall be made available upon request  
of the acquiring or preparing activity, along with test data.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
6
DSCC FORM 2234  
APR 97  
4. QUALITY ASSURANCE PROVISIONS  
4.1 Sampling and inspection. For device classes Q and V, sampling and inspection procedures shall be in accordance with MIL-  
PRF-38535 or as modified in the device manufacturer's Quality Management (QM) plan. The modification in the QM plan shall not  
affect the form, fit, or function as described herein. For device class M, sampling and inspection procedures shall be in accordance  
with MIL-PRF-38535, appendix A.  
4.2 Screening. For device classes Q and V, screening shall be in accordance with MIL-PRF-38535, and shall be conducted on  
all devices prior to qualification and technology conformance inspection. For device class M, screening shall be in accordance with  
method 5004 of MIL-STD-883, and shall be conducted on all devices prior to quality conformance inspection.  
4.2.1 Additional criteria for device class M.  
a. Delete the sequence specified as initial (preburn-in) electrical parameters through interim (postburn-in) electrical  
parameters of method 5004 and substitute lines 1 through 6 of table IIA herein.  
b. Prior to burn-in, the devices shall be programmed (see 4.5.2 herein) with a checkerboard pattern or equivalent  
(manufacturers at their option may employ an equivalent pattern provided it is a topologically true alternating bit pattern).  
The pattern shall be read before and after burn-in. Devices having bits not in the proper state after burn-in shall constitute  
a device failure and shall be included in the PDA calculation and shall be removed from the lot.  
c. The test circuit shall be maintained by the manufacturer under document revision level control and shall be made available  
to the preparing or acquiring activity upon request. The test circuit shall specify the inputs, outputs, biases, and power  
dissipation, as applicable, in accordance with the intent specified in test method 1015.  
(1) Dynamic burn-in (method 1015 of MIL-STD-883, test condition D; for circuit, see 4.2.1c herein).  
d. Interim and final electrical parameters shall be as specified in table IIA herein.  
e. After the completion of all screening, the device shall be erased and verified prior to delivery.  
4.2.2 Additional criteria for device classes Q and V.  
a. The burn-in test duration, test condition and test temperature, or approved alternatives shall be as specified in the device  
manufacturer's QM plan in accordance with MIL-PRF-38535. The burn-in test circuit shall be maintained under document  
revision level control of the device manufacturer's Technology Review Board (TRB) in accordance with MIL-PRF-38535  
and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs,  
outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1015 of MIL-  
STD-883.  
b. Interim and final electrical test parameters shall be as specified in table IIA herein.  
c. Additional screening for device class V beyond the requirements of device class Q shall be as specified in appendix B of  
MIL-PRF-38535.  
4.3 Qualification inspection for device classes Q and V. Qualification inspection for device classes Q and V shall be in  
accordance with MIL-PRF-38535. Inspections to be performed shall be those specified in MIL-PRF-38535 and herein for groups  
A, B, C, D, and E inspections (see 4.4.1 through 4.4.4).  
4.4 Conformance inspection. Technology conformance inspection for classes Q and V shall be in accordance with MIL-PRF-  
38535 including groups A, B, C, D, and E inspections and as specified herein. Quality conformance inspection for device class  
M shall be in accordance with MIL-PRF-38535, appendix A and as specified herein. Inspections to be performed for device class  
M shall be those specified in method 5005 of MIL-STD-883 and herein for groups A, B, C, D, and E inspections (see 4.4.1 through  
4.4.4).  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
7
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics.  
|
|
|
|
|
|
|
|
Test  
|Symbol |  
|
|
|
|
|I  
|
|
|I  
|
Conditions  
-55 C +125 C  
= 0 V; 4.5 V  
| Group A | Device  
|subgroups | types  
|
|
|
| 1, 2, 3  
|
|
Limits  
|
| Unit  
|
|
|
|
T
C
| V  
|
|
|V  
|
|
|V  
|
V
5.5 V  
|
|
|
| Min | Max  
|
|
| -5  
|
|
SS  
CC  
unless otherwise specified  
|
|
|
|
|
|
|
|
High level input current  
Low level input current  
= 5.5 V, V = 5.5 V  
| All  
|
|
| All  
|
5
5
| µA  
|
|
| µA  
|
IH  
IL  
CC  
IN  
= 5.5 V, V = 0.1 V  
IN  
| 1, 2, 3  
|
| -5  
|
CC  
|
|
|
|
| 16-19  
| -100 | 100  
|
|
|
| For RES input  
|
|
|
|
|
|
|
|
|
|
|
|
High impedance output  
leakage current 1/  
|I  
|
|
|
|I  
|
|
|
|V  
|
|
|
|V  
|
|
|
|V  
|
|
|V  
|V  
|
OE  
V
| 1, 2, 3  
|
|
|
| 1, 2, 3  
|
|
|
| 1, 2, 3  
|
|
|
| 1, 2, 3  
|
|
|
| 1, 2, 3  
|
|
|
| 1, 2, 3  
|
|
| 1, 2, 3  
|
|
|
|
|
| -10  
|
|
|
| 10  
|
|
|
|
|
OZH  
OZL  
IH  
CC  
CC  
O
= 5.5 V, V = 5.5 V  
| All  
|
|
|
|
|
| All  
|
|
|
| All  
|
|
|
| 01-15  
|
| 16-19  
|
| All  
|
|
| 01-15 | 12  
|
|
| µA  
|
|
|
|
|
|
|V  
|V  
|
OE  
V
| -10  
| 10  
IH  
CC  
CC  
= 5.5 V, V = 0.0 V  
|
|
|
|
|
|
|
|
|
|
O
|
Output high voltage  
Output low voltage  
Input high voltage 2/  
|I  
= -400 µA, V = 4.5 V  
CC  
|
|
|
|
|
|
|
|
|
|
|
|
2.4  
| V  
OH  
OL  
IH  
OH  
|V = 2.0 V, V = 0.8 V  
|
|
|
IH  
IL  
|
|
|I  
= 2.1 mA, V  
= 4.5 V  
CC  
IL  
|
|
|
|
|
|
|
|
|
|
|
0.4 | V  
OL  
|V = 2.0 V, V = 0.8 V  
|
|
|
IH  
|
|
|V  
|
= 5.5 V  
= 4.5 V  
2.0  
2.2  
6.0 | V  
CC  
|
|
|
|
|
6.0  
|
|V  
|
|
|V  
|
Input low voltage 2/  
OE high voltage  
|V  
|
| -0.5  
|
|
0.8 | V  
IL  
CC  
|
|
|
|
|
|
| 13  
|
| V  
|
H
|
|
|
|V  
- |V  
+ |  
CC  
CC  
RES high voltage  
|
| 16-19 | 0.5  
| 1.0  
|
|
|I  
|
|
|
|
|
|
|I  
|
|
|
|
|I  
|
|
|
|V  
|
|
| 01-06,  
| 08,13,  
| 16,17  
| 07,18,  
| 19  
| 09-12,  
| 14,15  
|
| All  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Operating supply current  
= 5.5 V, WE = V  
,
| 1, 2, 3  
|
|
|
|
|
|
| 1, 2, 3  
|
|
|
| 80  
|
| 100  
|
| 120  
|
|
|
|
|
|
|
| mA  
|
|
|
|
|
|
CC1  
CC  
IH  
|CE = OE = V  
|f = 1/t  
IL  
min  
AVAV  
|
|
|
|V  
|
Standby supply current  
TTL  
= 5.5 V, CE = V  
,
3
| mA  
CC2  
CC3  
CC  
all I/O's = open,  
IH  
|
|
|
|
|OE = V , f = 0 Hz  
|
|
|V = 5.5 V, CE = V  
|Inputs = V , I/O's = open,  
IL  
|
|
Standby supply current  
CMOS  
-0.3 V  
| 1, 2, 3  
| 01-07  
| 08-12  
| 13-15,  
| 16-19  
| 850 | µA  
CC  
CC  
|
|
|
| 500  
| 350  
|
|
|
|
IH  
|OE = V , f = 0 Hz  
IL  
|
|
See footnotes at end of table.  
SIZE  
STANDARD  
5962-38267  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
8
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics - Continued.  
|
|
|
|
|
|
|
|
Test  
|Symbol |  
Conditions  
+125 C  
= 0 V; 4.5 V  
| Group A | Device  
|subgroups | types  
Limits  
|
| Unit  
|
| -55 C  
| V  
T
|
|
|
|
C
|
V
5.5 V  
|
|
|
|
|
|
|
|
|
|
|
|
| Min | Max  
SS  
CC  
|
|
|
unless otherwise specified  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Input capacitance 3/ 4/  
Output capacitance 3/ 4/  
Functional tests  
|C  
|
|V = 0 V, f = 1.0 MHz,  
4
4
| All  
| 10.0 | pF  
IN  
IN  
|T = +25 C, see 4.4.1c  
C
|
|
|
|
|
|
|
|
|
|
|
|V  
|
|
|C  
|
= 0 V, f = 1.0 MHz  
| All  
| 12.0 | pF  
OUT  
OUT  
|T = +25 C, see 4.4.1c  
|
|
|
|
C
|
|
|
|
|
|
|
|
|
|
| See 4.4.1d  
| 7,8A,8B  
| All  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| See figures 4, 5, and 6 as  
| applicable.  
|
|01-02,16 | 250  
|03-04,17 | 200  
|05-06,18 | 150  
| 07,08, | 120  
|
|
|
5/  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Read cycle time  
|t  
|9, 10, 11  
|
| ns  
AVAV  
AVQV  
|
|
| 13,19  
| 09,10, | 90  
| 14  
| 11,12, | 70  
| 15  
|
|01-02,16 |  
|03-04,17 |  
|05-06,18 |  
| 07,08,  
| 13,19  
| 09,10,  
| 14  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 250  
| 200  
| 150  
|
|
Address access time  
|t  
|
|9, 10, 11  
|
|
|
|
|
|
|
|
| 120 | ns  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 90  
|
|
|
|
|
| 11,12,  
| 15  
|
| 70  
|
|
|
|
|
|
|
|
|01-02,16 |  
|03-04,17 |  
|05-06,18 |  
| 250  
| 200  
| 150  
|
|
CE access time  
OE access time  
|t  
|
|9, 10, 11  
ELQV  
|
| 07,08,  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 120 | ns  
|
|
| 13,19  
|
|
|
|
| 09,10,  
| 90  
|
|
|
| 14  
|
|
|
|
| 11,12,  
| 70  
|
|
|
| 15  
|
|
|
|
|
|
|
|t  
|
|9, 10, 11  
| 01-06  
| 55  
| ns  
OLQV  
ELQX  
EHQZ  
|
| 07-15  
| 50  
|
|
|
|t  
|
|
|
|t  
|
|
|
| 16-19  
| 75  
|
|
|
|
|
CE to output in low Z  
4/  
|9, 10, 11  
| All  
0
|
| ns  
|
|
|
|
|
|
|
|
|
|
|
|
Chip disable to output  
in high Z  
|9, 10, 11  
| 01-06  
| 07-19  
|
| 55  
| 50  
|
| ns  
4/  
|
|
|
|
See footnotes at end of table.  
SIZE  
STANDARD  
5962-38267  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
9
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics - Continued.  
|
|
|
|
|
|
|
|
|
Test  
|Symbol  
Conditions  
+125 C  
= 0 V; 4.5 V  
| Group A | Device  
|subgroups | types  
Limits  
|
| Unit  
|
|
|
|
| -55 C  
T
|
C
| V  
V
5.5 V  
|
|
| Min | Max  
|
SS  
CC  
|
|
unless otherwise specified  
|
|
|
|
|
|
|
|
|
|
OE to output in low Z  
4/  
|t  
|See figures 4, 5, and 6 as  
|9, 10, 11  
| All  
| 0  
|
| ns  
OLQX  
|
|
|
| applicable. 5/  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Output disable to output  
in high Z  
|t  
|9, 10, 11  
| 01-06  
|
| 55  
| ns  
OHQZ  
4/  
|
|
|
|
| 07-19  
|
| 50  
|
|
|
|
|
|
|
|
|
|
|
Output hold from address  
change  
|t  
|9, 10, 11  
| All  
|
|
| 0  
|
| ns  
AXQX  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 01,03,  
| 05,07,  
| 09,11,  
| 16-19  
| 02,04  
| 06  
| 08,10,  
| 12-15  
|
|
|
|
|
|
|
|
|9, 10, 11  
|
| 10  
|
Write cycle time  
|t  
|t  
|
|
|
|
|t  
|t  
|
|
|t  
|t  
|
|
|
|t  
|t  
|
|
|t  
|t  
|
|
|t  
|t  
|
|
|t  
|t  
|
|
|t  
|t  
|
|
|
|
|
|
| ms  
WHWL1  
EHEL1  
|
|
|
|
|
| 5  
|
|
|
| 3  
|
|
|
|
|
|
|
|
|
Address setup time  
Address hold time  
|9, 10, 11  
| All  
|
|
| 0  
|
| ns  
AVWL  
AVEL  
|
|
|
|
|
|
|
|
|
| 16-19  
| 150  
|
|
|9, 10, 11  
| 01-08, | 70  
|
| ns  
WLAX  
ELAX  
|
| 13  
|
|
|
|
|
| 09-12,  
|
|
|
| 14,15  
| 50  
|
|
|
|
|
|
|
Write setup time  
Write hold time  
OE setup time  
OE hold time  
|9, 10, 11  
| All  
| 0  
|
| ns  
ELWL  
WLEL  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|9, 10, 11  
| All  
| 0  
|
| ns  
WHEH  
EHWH  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|9, 10, 11  
| 01-15 | 10  
|
| ns  
OHWL  
OHEL  
|
|
|
|
|
|
| 16-19 | 0  
|
|
|
|
|
|
|
|9, 10, 11  
| 01-15 | 10  
|
| ns  
WHOL  
EHOL  
|
|
|
|
|
|
| 16-19 | 0  
|
|
|
|
|
|
|
Write pulse width (page  
or byte write)  
|9, 10, 11  
| 01-15 | 100  
|
| ns  
WLWH  
ELEH  
|
|
|
|
|
|
| 16-19 | 250  
| 16-19 | 100  
| 01-08, | 60  
| 13  
| 09-12, | 40  
| 14,15  
|
|
|
|
|
Data setup time  
|t  
|t  
|
|
|9, 10, 11  
|
| ns  
DVWH  
DVEH  
|
|
|
|
|
|
|
|
|
|
|
See footnotes at end of table.  
SIZE  
STANDARD  
5962-38267  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
10  
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics - Continued.  
|
|
|
|
|
|
|
|
|
Test  
|Symbol  
Conditions  
+125 C  
= 0 V; 4.5 V  
| Group A | Device  
|subgroups | types  
Limits  
|
| Unit  
|
|
|
|
|t  
|t  
| -55 C  
T
|
C
| V  
V
5.5 V  
|
|
|
| Min | Max  
|
SS  
CC  
|
|
unless otherwise specified  
|
|
|
|
|
|
|
|
|
|
|
| 01-07  
|
Data hold time  
Byte load cycle  
|See figures 4, 5, and 6 as  
|9, 10, 11  
| 16-19  
| 10  
| 0  
|
|
| ns  
WHDX  
EHDX  
| applicable. 5/  
|
|
|
| 08-15  
|
|
|
|
|
|
|
|
|
|t  
|
|9, 10, 11  
| 01-15  
| .20  
| 149  
| µs  
WHWL2  
|
|
|
|
|
|
|
|
|
|
| 16-19  
|
| .3  
|
| 30  
|
|
|
|
|
|
|
|
|
|
|01-02,16 |  
|03-04,17 |  
|05-06,18 |  
| 250  
|
|
|
| 200  
|
Last byte loaded to data  
polling  
|t  
|t  
|
|9, 10, 11  
| 150  
|
WHEL  
EHEL  
|
|
|07,08,  
|
| 120  
| ns  
|
|
|
|
|
|
|
|
|13,19  
|
|
|
|
|
|09,10,  
|
| 90  
|
|
|
|14  
|
|
|
|
|
|11,12,  
|
| 70  
|
|
|
|15  
|
|
|
|
|
|
|
|
|
CE setup time  
(chip erase)  
|t  
|See figures 4, 5, and 6 as  
|9, 10, 11  
| 01-15  
| 5  
|
| µs  
ELWL  
|
|
|
| applicable. 5/ 6/  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
OE setup time  
(chip erase)  
|t  
|9, 10, 11  
| 01-15  
| 5  
|
| µs  
OVHWL  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 01-07  
| 10  
|
| ms  
WE pulse width (chip  
erase)  
|t  
|9, 10, 11  
|
|
|
|
WLWH2  
|
|
|
|
| 08-15  
| 10  
|
| µs  
|
|
|
|
|
|
|
|
|
|
CE hold time  
(chip erase)  
|t  
|9, 10, 11  
| 01-15  
| 5  
|
| µs  
WHEH  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
OE hold time (chip erase)  
|t  
|
|
|9, 10, 11  
| 01-15  
| 5  
|
| µs  
WHOH  
|
|
|
|
|
|
|
|
|
|
High voltage  
(chip erase)  
|V  
|9, 10, 11  
| 01-15  
| 12  
| 13  
| V  
H
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Clear recovery  
(chip erase)  
|t  
|9, 10, 11  
| 01-15  
|
| 50  
| ms  
OLEL  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Data setup time  
(chip erase) 7/  
|t  
|9, 10, 11  
| 01-15  
| 1  
| µs  
DHWL  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
Data hold time during  
chip erase cycle 7/  
|t  
|
|
|9, 10, 11  
| 01-15  
| 1  
| µs  
WHDX  
|
|
|
|
|
|
|
|
See footnotes at end of table.  
SIZE  
STANDARD  
5962-38267  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
11  
DSCC FORM 2234  
APR 97  
TABLE I. Electrical performance characteristics - Continued.  
|
|
|
|
|
|
|
|
|
Test  
|Symbol  
Conditions  
+125 C  
= 0 V; 4.5 V  
| Group A | Device  
|subgroups | types  
|
|
|
|9, 10, 11  
|
|
|
|9, 10, 11  
|
|
|9, 10, 11  
|
|
Limits  
|
| Unit  
|
|
|
|
| -55 C  
| V  
|
|
|See figures 4, 5, and 6 as  
| applicable. 5/ 8/  
|
|
|
|
|
|
|
|
|
|
|
|
|
T
|
|
|
|
C
V
5.5 V  
|
|
|
| Min | Max  
SS  
CC  
unless otherwise specified  
|
|
|
|
|
|
|
|
|
|
|
RES low to output float  
|t  
| 16-19  
|
|
|
| 16-19  
|
|
| 16-19  
|
|
| 16-19  
|
|
0
0
| 350 | ns  
DFR  
|
|
|
|t  
|
|
|t  
|
|
|t  
|
|
|
|
|
|
|
|
RES to output delay  
Reset protect time  
Reset high time  
| 450 | ns  
RR  
|
|
|
|
|
|
|
|
|
|
|
|
| 100  
|
|
| 1.0  
|
|
| µs  
|
|
| µs  
|
|
RP  
|9, 10, 11  
|
|
|9, 10, 11  
|
RES  
Time to device busy  
|t  
|
| 16-19  
|
| 120  
|
| ns  
|
DB  
1/ Connect all address inputs and OE to V and measure I  
IH  
and I  
with the output under test connected to V  
.
OZL  
OZH  
OUT  
Terminal conditions for the output leakage current test shall be as follows:  
a.  
b. For I  
V
= 2.0 V for device types 01-15 and 2.2 V for device types 16-19; V = 0.8 V.  
IH  
IL  
: Select an appropriate address to acquire a logic "1" on the designated output. Apply V to CE.  
IH  
OZL  
Measure the leakage current while applying the specified voltage.  
c. For I  
: Select an appropriate address to acquire a logic "0" on the designated output. Apply V to CE.  
OZH  
IH  
Measure the leakage current while applying the specified voltage.  
2/ A functional test shall verify the dc input and output levels and applicable patterns as appropriate, all input  
and I/O pins shall be tested. Terminal conditions are as follows:  
a. Inputs: H =2.0 V for device types 01-15 and 2.2 V for device types 16-19; L = 0.8 V. Outputs: H = 2.4 V minimum and  
L = 0.4 V maximum.  
b. The functional tests shall be performed with V  
3/ All pins not being tested are to be open.  
= 4.5 and V  
= 5.5 V.  
CC  
CC  
4/ Tested initially and after any design or process changes which may affect that parameter, and therefore shall be  
guaranteed to the limits specified in table I.  
5/ Tested by application of specified timing signals and conditions.  
Equivalent ac test conditions:  
Output load, see figure 5; input rise and fall times 10 ns; input pulse levels, 0.4 V and 2.4 V; timing measurement  
reference levels, inputs, 1.5 V for device types 1-15 and 1 V and 2 V for device types 16-19; outputs, 1.5 V for device types  
1-15 and 0.8 V and 2 V for device types 16-19.  
6/ Chip erase functions are applicable to device types 01-15 only.  
7/ This parameter not applicable for internal timer controlled devices.  
8/ RES functions are applicable to device types 16-19 only.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
12  
DSCC FORM 2234  
APR 97  
4.4.1 Group A inspection.  
a. Tests shall be as specified in table IIA herein.  
b. Subgroups 5 and 6 in table I, method 5005 of MIL-STD-883 shall be omitted.  
c. Subgroup 4 (C and C  
IN OUT  
measurements) shall be measured only for initial qualification and after any process or design  
changes which may affect input or output capacitance. Capacitance shall be measured between the designated terminal  
and GND at a frequency of 1 MHz. Sample size is 15 devices with no failures and all input and output terminals tested.  
d. For device class M, subgroups 7 and 8 tests shall be sufficient to verify the truth table. For device classes Q and V,  
subgroups 7 and 8 shall include verifying the functionality of the device, these tests shall have been fault graded in  
accordance with MIL-STD-883, test method 5012 (see 1.5 herein).  
e. O/V (latch-up) tests shall be measured only for initial qualification and after any design or process changes which may  
affect the performance of the device. For device class M, procedures and circuits shall be maintained under document  
revision level control by the manufacturer and shall be made available to the preparing activity or acquiring activity upon  
request. For device classes Q and V, the procedures and circuits shall be under the control of the device manufacturer's  
TRB in accordance with MIL-PRF-38535 and shall be made available to the preparing activity or acquiring activity upon  
request. Testing shall be on all pins, on five devices with zero failures. Latch-up test shall be considered destructive.  
Information contained in JEDEC Standard EIA/JESD78 may be used for reference.  
f. All devices selected for testing shall be programmed with a checkerboard pattern or equivalent. After completion of all  
testing, the devices shall be erased and verified, (except devices submitted for groups C and D testing).  
4.4.2 Group C inspection. The group C inspection end-point electrical parameters shall be as specified in table IIA herein.  
4.4.2.1 Additional criteria for device class M.  
a. Steady-state life test conditions, method 1005 of MIL-STD-883:  
(1) The device selected for testing shall be programmed with a checkerboard pattern. After completion of all testing, the  
devices shall be erased and verified (except devices submitted for group D testing).  
(2) Test condition D or E. The test circuit shall be maintained by the manufacturer under document revision level control  
and shall be made available to the preparing or acquiring activity upon request. The test circuit shall specify the inputs,  
outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005.  
(3)  
T = +125 C, minimum.  
A
(4) Test duration: 1,000 hours, except as specified in method 1005 of MIL-STD-883.  
b. All devices requiring end-point electrical testing shall be programmed with a checkerboard or equivalent alternating bit  
pattern.  
c. After the completion of all testing, the devices shall be cleared and verified prior to delivery.  
4.4.2.2 Additional criteria for device classes Q and V. The steady-state life test duration, test condition and test temperature,  
or approved alternatives shall be as specified in the device manufacturer's QM plan in accordance with MIL-PRF-38535. The test  
circuit shall be maintained under document revision level control by the device manufacturer's TRB, in accordance with MIL-  
PRF-38535, and shall be made available to the acquiring or preparing activity upon request. The test circuit shall specify the inputs,  
outputs, biases, and power dissipation, as applicable, in accordance with the intent specified in test method 1005 of MIL-STD-883.  
4.4.3 Group D inspection. The group D inspection end-point electrical parameters shall be as specified in table IIA herein. The  
devices selected for testing shall be programmed with a checkerboard pattern. After completion of all testing, the devices shall be  
erased and verified.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
13  
DSCC FORM 2234  
APR 97  
Case T  
FIGURE 1. Case outline.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
14  
DSCC FORM 2234  
APR 97  
Case W  
FIGURE 1. Case outline - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
15  
DSCC FORM 2234  
APR 97  
Case Z  
FIGURE 1. Case outline - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
16  
DSCC FORM 2234  
APR 97  
Case Z  
Variations (all dimensions shown in inches)  
Symbol  
Min  
Max  
Notes  
4
A
b
b1  
C
C1  
D
E
E1  
E2  
E3  
.090  
.015  
.015  
.004  
.004  
.120  
.020  
.019  
.007  
.006  
.830  
.488  
.498  
.430  
8
.330  
.030  
e
.050 BSC  
H
k
1.228  
.015  
.008  
2, 5  
2, 5  
k1  
.025 ref  
L
Q
S
.270  
.026  
.005  
.370  
.045  
3
6
S1  
.045  
N
32  
Inches mm | Inches mm | Inches mm  
.004 0.10 | .020  
.005 0.13 | .025  
.006 0.15 | .026  
.007 0.18 | .030  
.008 0.20 | .045  
.015 0.38 | .050  
.019 0.48 | .120  
0.51 | .270  
0.64 | .350  
0.66 | .370  
0.76 | .472 11.99  
1.14 | .488 12.40  
1.27 | .498 12.65  
3.05 | 1.228 31.19  
6.86  
8.89  
9.40  
NOTES:  
1.  
2.  
All dimensions and tolerances conform to ANSI Y14.5M-1982.  
Index area: An identification mark shall be located adjacent to pin 1 within the shaded area shown. Alternatively,  
a tab (dim k) may be used as shown.  
3.  
4.  
5.  
6.  
7.  
8.  
9.  
Dimension Q shall be measured from the point on the lead located opposite the braze pad.  
This dimension includes lid thickness.  
Optional, see note 2. If pin 1 identification is used instead of this tab, the minimum dimension does not apply.  
(N) indicates number of leads.  
Uses a metal lid.  
Includes braze fillet.  
Metric equivalents are given for general information only.  
FIGURE 1. Case outline - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
17  
DSCC FORM 2234  
APR 97  
Case M  
Pin 1 indicator  
FIGURE 1. Case outline - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
18  
DSCC FORM 2234  
APR 97  
Case M  
Variations  
Millimeters  
Inches  
Symbol  
Min  
Max  
Min  
Max  
A
A1  
b
c
D
D2  
E
E1  
2.46  
2.29  
.038  
3.12  
2.79  
.048  
.097  
.090  
.015  
.003  
.810  
.745  
.425  
.330  
.123  
.110  
.019  
.007  
.830  
.755  
.445  
.356  
0.08  
0.18  
20.57  
18.92  
10.80  
8.38  
21.08  
19.18  
11.30  
9.04  
e
1.14  
1.40  
.045  
1.00  
.055  
1.10  
H
25.40  
27.94  
L
Q
7.37  
0.66  
7.87  
0.94  
.290  
.026  
.310  
.037  
N
32  
NOTE: Although dimensions are in inches, the US government preferred system of measurement is the metric SI system.  
However, since this item was originally designed using inch-pound units of measurement, in the event of conflict  
between the two, the inch-pound units shall take precedence. Metric equivalents are for general information only.  
FIGURE 1. Case outline - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
19  
DSCC FORM 2234  
APR 97  
Case N  
Pin 1 indicator  
FIGURE 1. Case outline - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
20  
DSCC FORM 2234  
APR 97  
Case N  
Variations  
Millimeters  
Inches  
Symbol  
Min  
Max  
Min  
Max  
A
A1  
b
c
D
D1  
D2  
E
3.18  
2.29  
0.38  
3.81  
2.79  
0.48  
.125  
.090  
.015  
.003  
.810  
.775  
.745  
.425  
.290  
.150  
.110  
.019  
.007  
.830  
.785  
.755  
.445  
.310  
0.08  
0.18  
20.57  
19.69  
18.92  
10.80  
7.37  
21.08  
19.94  
19.18  
11.30  
7.87  
E1  
e
1.14  
1.40  
.045  
1.00  
.055  
1.10  
H
25.40  
27.94  
L
Q
7.37  
0.66  
7.87  
0.94  
.290  
.026  
.310  
.037  
N
32  
NOTE: Although dimensions are in inches, the US government preferred system of measurement is the metric SI system.  
However, since this item was originally designed using inch-pound units of measurement, in the event of conflict  
between the two, the inch-pound units shall take precedence. Metric equivalents are for general information only.  
FIGURE 1. Case outline - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
21  
DSCC FORM 2234  
APR 97  
Case 6  
FIGURE 1. Case outline - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
22  
DSCC FORM 2234  
APR 97  
Case 6  
Variations  
Millimeters  
Inches  
Symbol  
Min  
Max  
Min  
Max  
A
b
c
D
E
E1  
E2  
E3  
3.07  
0.38  
0.10  
3.81  
0.56  
0.18  
21.08  
12.40  
7.87  
.121  
.015  
.004  
.150  
.022  
.009  
.830  
.488  
.498  
11.99  
.472  
7.72  
0.76  
.304  
.030  
e
1.27  
.050 BSC  
.005  
S1  
0.13  
L
Q
7.37  
0.51  
7.87  
1.14  
.355  
.020  
.375  
.045  
N
32  
NOTE: Although dimensions are in inches, the US government preferred system of measurement is the metric SI system.  
However, since this item was originally designed using inch-pound units of measurement, in the event of conflict  
between the two, the inch-pound units shall take precedence. Metric equivalents are for general information only.  
This package is manufactured for additonal Rad tolerant capabilities, contact the vendor for specific information.  
FIGURE 1. Case outline - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
23  
DSCC FORM 2234  
APR 97  
Case 7  
FIGURE 1. Case outline - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
24  
DSCC FORM 2234  
APR 97  
Case 7  
Variations  
Millimeters  
Inches  
Symbol  
Min  
Max  
Min  
Max  
A
b
c
D
E
E1  
E2  
E3  
3.18  
.038  
0.08  
3.81  
0.56  
0.23  
21.08  
10.57  
11.18  
.117  
.015  
.003  
.143  
.022  
.009  
.830  
.416  
.440  
10.26  
.404  
5.94  
0.76  
.234  
.030  
e
1.27  
.050 BSC  
.005  
S1  
0.13  
L
Q
8.89  
0.53  
10.41  
0.91  
.350  
.021  
.410  
.036  
N
32  
NOTE: Although dimensions are in inches, the US government preferred system of measurement is the metric SI system.  
However, since this item was originally designed using inch-pound units of measurement, in the event of conflict  
between the two, the inch-pound units shall take precedence. Metric equivalents are for general information only.  
This package is manufactured for additonal Rad tolerant capabilities, contact the vendor for specific information.  
FIGURE 1. Case outline - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
25  
DSCC FORM 2234  
APR 97  
Device types  
Case outlines  
01 - 15  
16 - 19  
X, Z, U  
Y
W
T
U
M, N,6,7  
Terminal number  
Terminal symbol  
1
2
3
4
5
6
7
8
NC  
A16  
A15  
A12  
A7  
A6  
A5  
A4  
NC  
NC  
NC  
NC  
A16  
A15  
A12  
A7  
NC  
NC  
NC  
A16  
A15  
A12  
A7  
A14  
A12  
A7  
A6  
A5  
A4  
A3  
A2  
RDY/BUSY  
A16  
A14  
A12  
A7  
RDY/BUSY  
A16  
A14  
A12  
A7  
A6  
A5  
A4  
A6  
A5  
A4  
A6  
9
A3  
A6  
A5  
A1  
A3  
A3  
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
23  
24  
25  
26  
27  
28  
29  
30  
31  
32  
33  
34  
35  
36  
37  
38  
39  
40  
41  
42  
43  
44  
A2  
A1  
A0  
A5  
A4  
A3  
A2  
A1  
A0  
A2  
A1  
A0  
A2  
A1  
A0  
NC  
NC  
NC  
A4  
A3  
A2  
I/O0  
I/O1  
I/O2  
VSS  
I/O3  
I/O4  
I/O5  
I/O6  
I/O7  
CE  
A10  
OE  
A11  
A9  
I/O0  
I/O1  
I/O2  
VSS  
I/O3  
I/O4  
I/O5  
I/O6  
I/O7  
CE  
A10  
OE  
A11  
A9  
I/O0  
I/O1  
I/O2  
VSS  
I/O3  
I/O4  
I/O5  
I/O6  
I/O7  
CE  
I/O0  
I/O1  
I/O2  
VSS  
I/O3  
I/O4  
I/O5  
I/O6  
I/O7  
CE  
A0  
I/O0  
I/O1  
I/O2  
VSS  
I/O3  
I/O4  
I/O5  
I/O6  
I/O7  
CE  
A10  
OE  
A11  
A9  
A1  
A0  
I/O0  
I/O1  
I/O2  
VSS  
NC  
I/O3  
I/O4  
I/O5  
I/O6  
I/O7  
CE  
A10  
OE  
NC  
NC  
NC  
NC  
A11  
A9  
A10  
OE  
A11  
A9  
A10  
OE  
A11  
A9  
A8  
A13  
WE  
VCC  
A15  
A16  
---  
---  
---  
---  
---  
---  
---  
---  
---  
---  
---  
---  
---  
A8  
A8  
A8  
A13  
A14  
NC  
WE  
VCC  
---  
---  
---  
---  
---  
---  
---  
---  
---  
---  
---  
---  
A13  
WE  
RES  
A15  
VCC  
---  
---  
---  
---  
---  
---  
---  
---  
---  
---  
---  
---  
A13  
WE  
RES  
A15  
VCC  
---  
---  
---  
---  
---  
---  
---  
---  
---  
---  
---  
---  
A8  
A13  
A14  
NC  
NC  
NC  
WE  
VCC  
---  
---  
---  
---  
---  
A8  
A13  
A14  
NC  
NC  
WE  
VCC  
---  
---  
---  
---  
NC = no connection  
FIGURE 2. Terminal connections.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
G
26  
DSCC FORM 2234  
APR 97  
Device types 01-15  
Mode  
Read  
CE  
OE  
WE  
I/O  
V
V
V
D
IL  
IL  
IH  
OUT  
Write  
V
V
V
D
IL  
IH  
IL  
IN  
Standby  
V
X
X
X
X
High Z  
IH  
Write inhibit  
X
V
D
or High Z  
IH  
OUT  
Write inhibit  
V
X
X
High Z  
or High Z  
IH  
Write inhibit  
X
V
D
IL  
OUT  
Write inhibit  
V
V
V
No operation  
IL  
IL  
IL  
Software chip clear  
Software write protect  
High voltage chip clear  
V
V
V
D
IL  
IH  
IL  
IN  
V
V
V
D
IL  
IH  
IL  
IN  
V
V
H
V
V
IL  
IL  
IH  
V
= High logic, "1" state, V = Low logic, "0" state.  
IL  
IH  
X = logic "don't care" state, High Z = high impedance state.  
V
D
= Chip clear voltage, D  
= Data in.  
= Data out, and  
H
IN  
OUT  
Device types 16-19  
WE  
Mode  
Read  
CE  
OE  
RES  
RDY/BUSY  
High Z  
I/O  
V
V
V
V
H
D
IL  
IL  
IH  
OUT  
Standby  
V
X
X
X
High Z  
High Z  
IH  
Write  
V
V
V
V
H
High Z to V  
D
IL  
IH  
IL  
OL  
IN  
Deselect  
V
V
V
V
H
High Z  
---  
High Z  
---  
IL  
IH  
IH  
Write inhibit  
Write inhibit  
DATA polling  
Program reset  
X
X
X
V
X
X
IH  
V
X
---  
---  
IL  
V
V
V
V
H
V
D
(I/O7)  
IL  
IL  
IH  
OL  
OUT  
High Z  
X
X
X
V
High Z  
IL  
V
= High logic, "1" state, V = Low logic, "0" state.  
IL  
IH  
X = logic "don't care" state, High Z = high impedance state.  
= Data in, D  
D
= Data out, and V = V -0.5 V to V +1.0 V.  
OUT  
IN  
H
CC  
CC  
.
FIGURE 3. Truth table.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
SHEET  
G
27  
DSCC FORM 2234  
APR 97  
READ MODE WAVEFORM  
NOTE: RES waveform is applicable to device types 16-19 only.  
FIGURE 4. Waveforms.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
28  
DSCC FORM 2234  
APR 97  
WE CONTROLLED BYTE WRITE WAVEFORMS  
NOTE: RDY/BUSY, RES, and V  
waveforms are applicable to device types 16-19 only.  
CC  
FIGURE 4. Waveforms.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
29  
DSCC FORM 2234  
APR 97  
CE CONTROLLED BYTE WRITE WAVEFORMS  
NOTE: RDY/BUSY, RES, and V  
waveforms are applicable to device types 16-19 only.  
CC  
FIGURE 4. Waveforms - Continued.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
30  
DSCC FORM 2234  
APR 97  
PAGE WRITE MODE CYCLE WAVEFORMS  
NOTE: RDY/BUSY, RES, and V  
waveforms are applicable to device types 16-19 only.  
CC  
FIGURE 4. Waveforms - Continued.  
SIZE  
STANDARD  
5962-38267  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
31  
DSCC FORM 2234  
APR 97  
CHIP ERASE WAVEFORMS (device types 01-15 only)  
FIGURE 4. Waveforms - continued.  
SIZE  
STANDARD  
5962-38267  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
32  
DSCC FORM 2234  
APR 97  
NOTES:  
1. V  
and V  
will be adjusted to meet load conditions of table I.  
OL  
OH  
2. Use this circuit or equivalent circuit.  
FIGURE 5. Switching load circuit.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
33  
DSCC FORM 2234  
APR 97  
TABLE IIA. Electrical test requirements. 1/ 2/ 3/ 4/ 5/ 6/ 7/  
Line  
no.  
Test  
requirements  
Subgroups  
(per method  
5005, table I)  
Subgroups  
(per MIL-PRF-38535,  
table III)  
Device  
class M  
Device  
class Q  
Device  
class V  
1
2
Interim electrical  
parameters (see 4.2)  
1,7,9 or  
2,8A,10  
1,7,9 or  
1,2,8A,10  
Static burn-in I  
method 1015  
Not  
required  
Not  
required  
Required  
3
4
Same as line 1  
1*,7*  
Dynamic burn-in  
(method 1015)  
Required  
Required  
Required  
5
6
Same as line 1  
1*,7*  
Final electrical  
parameters  
1*,2,3,7*,  
1*,2,3,7*,  
1*,2,3,7*,  
8A,8B,9,10,11 8A,8B,9,10,11 8A,8B,9,10,11  
7
8
Group A test  
requirements  
1,2,3,4**,7,8A, 1,2,3,4**,7, 1,2,3,4**,7,  
8B,9,10,11  
2,3,7,8A,8B  
8A,8B,9,10,11 8A,8B,9,10,11  
1,2,3,7,8A,8B, 1,2,3,7,8A,8B,  
Group C end-point  
electrical  
9,10, 11  
9,10,11  
parameters  
9
Group D end-point  
electrical parameters  
2,3,7,8A,8B  
1,7,9  
2,3,7  
8A,8B  
2,3,7,  
8A,8B  
10  
Group E end-point  
1,7,9  
1,7,9  
electrical parameters  
1/ Blank spaces indicate test are not applicable.  
2/ Any or all subgroups may be combined when using high-speed testers.  
3/ Subgroups 7 and 8 functional tests shall verify the truth table.  
4/ * Indicates PDA applies to subgroups 1 and 7.  
5/ ** See 4.4.1c.  
6/  
Indicates delta limit (see table IIB) shall be required where specified, and the delta values  
shall be computed with reference to the previous interim electrical parameters (see line 1).  
7/ See 4.4.1e.  
TABLE IIB. Delta limits at +25 C.  
Test 1/  
All device types  
I
I
I
standby  
± 10% of specified  
value in table I  
CC3  
, I  
± 10% of specified  
value in table I  
IH IL  
, I  
OHZ OLZ  
± 10% of specified  
value in table I  
1/ The above parameters shall be recorded  
before and after the required burn-in and  
life tests to determine the delta  
.
SIZE  
STANDARD  
5962-38267  
A
MICROCIRCUIT DRAWING  
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
34  
DSCC FORM 2234  
APR 97  
4.4.4 Group E inspection. Group E inspection is required only for parts intended to be marked as radiation hardness assured  
(see 3.5 herein). RHA levels for device classes M, Q, and V shall be as specified in MIL-PRF-38535.  
a. End-point electrical parameters shall be as specified in table IIA herein.  
b. For device classes Q and V, the devices or test vehicle shall be subjected to radiation hardness assured tests as specified  
in MIL-PRF-38535 for the RHA level being tested. For device class M, the devices shall be subjected to radiation  
hardness assured tests as specified in MIL-PRF-38535, appendix A for the RHA level being tested. All device classes  
must meet the postirradiation end-point electrical parameter limits as defined in table IA at T = +25 C ±5 C, after  
A
exposure, to the subgroups specified in table IIA herein.  
c. When specified in the purchase order or contract, a copy of the RHA delta limits shall be supplied.  
4.5 Methods of inspection. Methods of inspection shall be as specified in the appropriate figures and tables as follows.  
4.5.1 Erasing procedures. The erasing procedures shall be as specified by the device manufacturer and shall be available upon  
request.  
4.5.2 Programming procedure. The programming procedures shall be as specified by the device manufacturer and shall be made  
available upon request.  
4.5.3 Software data protect procedures. The software data protect procedures shall be as specified by the device manufacturer  
and shall be made available upon request.  
4.6 Delta measurements for device classes Q and V. Delta measurements, as specified in table IIA, shall be made and recorded  
before and after the required burn-in screens and steady-state life tests to determine delta compliance. The electrical parameters  
to be measured, with associated delta limits are listed in table IIB. The device manufacturer may, at his option, either perform delta  
measurements or within 24 hours after burn-in perform final electrical parameter tests, subgroups 1, 7, and 9.  
5. PACKAGING  
5.1 Packaging requirements. The requirements for packaging shall be in accordance with MIL-PRF-38535 for device classes  
Q and V or MIL-PRF-38535, appendix A for device class M.  
6. NOTES  
6.1 Intended use. Microcircuits conforming to this drawing are intended for use for Government microcircuit applications (original  
equipment), design applications, and logistics purposes.  
6.1.1 Replaceability. Microcircuits covered by this drawing will replace the same generic device covered by a contractor-prepared  
specification or drawing.  
6.1.2 Substitutability. Device class Q devices will replace device class M devices.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
35  
DSCC FORM 2234  
APR 97  
6.2 Configuration control of SMD's. All proposed changes to existing SMD's will be coordinated with the users of record for the  
individual documents. This coordination will be accomplished using DD Form 1692, Engineering Change Proposal.  
6.3 Record of users. Military and industrial users should inform Defense Supply Center Columbus when a system application  
requires configuration control and which SMD's are applicable to that system. DSCC will maintain a record of users and this list  
will be used for coordination and distribution of changes to the drawings. Users of drawings covering microelectronic devices (FSC  
5962) should contact DSCC-VA, telephone (614) 692-0544  
6.4 Comments. Comments on this drawing should be directed to DSCC-VA, Columbus, Ohio 43216-5000, or telephone  
(614) 692-0547.  
6.5 Abbreviations, symbols, and definitions. The abbreviations, symbols, and definitions used herein are defined in MIL-PRF-  
38535, MIL-STD-1331, and as follows:  
C
, C  
. . . . . . Input and bidirectional output, terminal-to-GND capacitance.  
IN OUT  
GND . . . . . . . . . . . Ground zero voltage potential.  
I
I
I
T
T
. . . . . . . . . . . . Supply current.  
CC  
IL  
IH  
C
A
. . . . . . . . . . . . . Input current low.  
. . . . . . . . . . . . Input current high.  
. . . . . . . . . . . . Case temperature.  
. . . . . . . . . . . . Ambient temperature.  
. . . . . . . . . . . Positive supply voltage.  
V
V
CC  
. . . . . . . . . . . . Output enable and Write enable voltage during chip erase.  
H
O/V . . . . . . . . . . . . Latchup over-voltage.  
6.5.1 Timing limits. The table of timing values shows either a minimum or a maximum limit for each parameter. Input  
requirements are specified from the external system point of view. Thus, address setup time is shown as a minimum since the  
system must supply at least that much time (even though most devices do not require it). On the other hand, responses from the  
memory are specified from the device point of view. Thus, the access time is shown as a maximum since the device never provides  
data later than that time.  
6.5.2 Timing parameter abbreviations. All timing abbreviations use lower case characters with upper case subscripts. The  
initial character is always "t" and is followed by four descriptors. These characters specify two signal points arranged in a "from-to"  
sequence that define a timing interval. The two descriptors for each signal specify the signal name and the signal transition. Thus  
the format is:  
t
X
X
X
X
Signal name from which interval is defined  
Transition direction for first signal  
Signal name to which interval is defined  
Transition direction for second signal  
a. Signal definitions:  
b. Transition definitions:  
A = Address  
H = Transition to high  
D = Data in  
L = Transition to low  
Q = Data out  
V = Transition to valid  
W = Write enable  
E = Chip enable  
G = Output enable  
X = Transition to invalid or don't care  
Z = Transition to off (high impedance)  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
36  
DSCC FORM 2234  
APR 97  
6.5.3 Waveforms.  
Waveform  
symbol  
Input  
Output  
MUST BE  
WILL BE  
VALID  
VALID  
CHANGE FROM  
H TO L  
WILL CHANGE  
FROM  
H TO L  
CHANGE FROM  
L TO H  
WILL CHANGE  
FROM  
L TO H  
DON'T CARE  
ANY CHANGE  
PERMITTED  
CHANGING  
STATE  
UNKNOWN  
HIGH  
IMPEDANCE  
6.6 Sources of supply.  
6.6.1 Sources of supply for device classes Q and V. Sources of supply for device classes Q and V are listed in QML-38535.  
The vendors listed in QML-38535 have submitted a certificate of compliance (see 3.6 herein) to DSCC-VA and have agreed to this  
drawing.  
6.6.2 Approved sources of supply for device class M. Approved sources of supply for class M are listed in MIL-HDBK-103. The  
vendors listed in MIL-HDBK-103 have agreed to this drawing and a certificate of compliance (see 3.6 herein) has been submitted  
to and accepted by DSCC-VA.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
37  
DSCC FORM 2234  
APR 97  
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN  
DATE: FINAL PRELIMINARY AS OF 2 OCT 01  
Approved sources of supply for SMD 5962-38267 are listed below for immediate acquisition only and shall be added to  
MIL-HDBK-103 and QML-38535 during the next revision. MIL-BUL-103 and QML-38535 will be revised to include the  
addition or deletion of sources. The vendors listed below have agreed to this drawing and a certificate of compliance  
has been submitted to and accepted by DSCC-VA. This bulletin is superseded by the next dated revision of  
MIL-BUL-103 and QML-38535.  
| Standard  
| microcircuit drawing | CAGE  
| PIN 1/  
|
| Vendor | Vendor  
similar  
| number | PIN 2/  
|
|
|
|
|
|
|
| 5962-3826701MXA | 1FN41 | AT28C010-25BM/883 |  
|
|
| 3/  
| 3/  
| X28C010DMB-25  
| CM28C010-250  
|
|
|
|
| 5962-3826701MYA | 1FN41 | AT28C010-25LM/883  
| 3/ | LM28C010-250  
|
| 5962-3826701MZA | 1FN41 | AT28C010-25FM/883 |  
| 5962-3826701MZC | 3/  
| X28C010FMB-25  
| FM28C010-250  
|
|
|
|
|
|
| 3/  
|
| 5962-3826701MTA | 1FN41 | AT28C010-25UM/883 |  
|
|
|
|
|
|
|
|
| 5962-3826701MUA | 1FN41 | AT28C010-25EM/883 |  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 5962-3826701MWC | 3/  
|
|
| 5962-3826702MXA | 3/  
|
|
| 5962-3826702MYA | 3/  
|
|
| 5962-3826702MZA | 3/  
|
|
| X28C010KMB-25  
| TM28C010-250  
|
| CM28C010H-250  
|
|
| LM28C010H-250  
|
|
| FM28C010H-250  
|
|
| 3/  
|
|
|
|
|
|
|
| 5962-3826702MWA | 3/  
|
| TM28C010H-250  
|
|
| 5962-3826703MXA | 1FN41 | AT28C010-20BM/883 |  
|
|
| 3/  
| 3/  
| X28C010DMB-20  
| CM28C010-200  
|
|
|
|
| 5962-3826703MYA | 1FN41 | AT28C010-20LM/883  
| 3/ | LM28C010-200  
|
| 5962-3826703MZA | 1FN41 | AT28C010-20FM/883 |  
| 5962-3826703MZC | 3/  
| X28C010FMB-20  
| FM28C010-200  
|
|
|
|
|
|
| 3/  
|
| 5962-3826703MTA | 1FN41 | AT28C010-20UM/883 |  
|
|
|
|
|
|
|
|
| 5962-3826703MUA | 1FN41 | AT28C010-20EM/883 |  
|
|
|
|
|
|
|
|
|
|
|
|
| 5962-3826703MWC | 3/  
|
|
| 5962-3826704MXA | 3/  
|
|
| X28C010KMB-20  
| TM28C010-200  
|
| CM28C010H-200  
|
|
| 3/  
|
|
|
| 5962-3826704MYA | 3/  
|
| LM28C010H-200  
|
|
See footnotes at end of list.  
1 of 3  
STANDARDIZED MILITARY DRAWING SOURCE APPROVAL BULLETIN - Continued.  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| Standard  
| microcircuit drawing | CAGE  
| PIN 1/  
| Vendor | Vendor  
similar  
| number | PIN 2/  
|
|
|
|
|
|
|
| 5962-3826704MZA | 3/  
| FM28C010H-200  
|
|
|
|
|
|
| 5962-3826704MWA | 3/  
| TM28C010H-200  
|
|
|
| 5962-3826705MXA | 1FN41 | AT28C010-15BM/883 |  
|
|
| 60395 | X28C010DMB-15  
| 3/ | CM28C010-150  
|
|
|
|
| 5962-3826705MYA | 1FN41 | AT28C010-15LM/883  
| 3/ | LM28C010-150  
|
| 5962-3826705MZA | 1FN41 | AT28C010-15FM/883 |  
| 5962-3826705MZC | 3/  
| X28C010FMB-15  
| FM28C010-150  
|
|
|
|
|
|
| 3/  
|
| 5962-3826705MTA | 1FN41 | AT28C010-15UM/883 |  
|
|
|
|
|
|
|
|
| 5962-3826705MUA | 1FN41 | AT28C010-15EM/883 |  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 5962-3826705MWC | 3/  
| X28C010KMB-15  
| TM28C010-150  
|
|
| 3/  
|
|
| 5962-3826706MXA | 3/  
| CM28C010H-150  
|
|
|
|
|
|
| 5962-3826706MYA | 3/  
| LM28C010H-150  
|
|
|
|
|
|
| 5962-3826706MZA | 3/  
| FM28C010H-150  
|
|
|
|
|
|
| 5962-3826706MWA | 3/  
| TM28C010H-150  
|
|
|
| 5962-3826707MXA | 1FN41 | AT28C010-12BM/883 |  
|
|
|
| 60395 | X28C010DMB-12  
|
|
|
|
|
|
|
| 3/  
|
| CM28C010-120  
|
| 5962-3826707MYA | 1FN41 | AT28C010-12LM/883  
|
|
|
| 3/  
|
|
| LM28C010-120  
|
|
| 5962-3826707MTA | 1FN41 | AT28C010-15UM/883 |  
|
|
|
|
|
|
|
|
| 5962-3826707MUA | 1FN41 | AT28C010-15EM/883 |  
|
|
|
|
|
|
|
|
| 5962-3826707MZA | 1FN41 | AT28C010-12FM/883 |  
| 5962-3826707MZC | 3/  
|
|
|
|
|
|
|
|
| 3/  
|
| 5962-3826707MWC | 3/  
|
|
| 3/  
|
See footnotes at end of list.  
2 of 3  
STANDARD MICROCIRCUIT DRAWING SOURCE APPROVAL BULLETIN - Continued.  
|
|
|
|
|
|
|
|
|
| Standard  
| microcircuit drawing | CAGE  
| PIN 1/  
|
|
| Vendor | Vendor  
similar  
| number | PIN 2/  
|
|
|
|
|
| 5962-3826716QUA | 0EU86 | AS58C1001ECA-25/883C |  
| 5962-3826716QMA | 0EU86 | AS58C1001F-25/883C  
| 5962-3826716QMC | 68911 | 28C010TFB-25  
| 5962-3826716QNA | 0EU86 | AS58C1001SF-25/883C  
| 5962-3826716Q6C | 68911 | 28C010TRPFB-25  
| 5962-3826716Q7C | 68911 | 28C011TRPFB-25  
|
|
|
|
|
|
|
|
|
|
|
|
|
| 5962-3826717QUA | 0EU86 | AS58C1001ECA-20/883C |  
| 5962-3826717QMA | 0EU86 | AS58C1001F-20/883C  
| 5962-3826717QMC | 68911 | 28C010TFB-20  
| 5962-3826717QNA | 0EU86 | AS58C1001SF-20/883C  
| 5962-3826717Q6C | 68911 | 28C010TRPFB-20  
| 5962-3826717Q7C | 68911 | 28C011TRPFB-20  
|
|
|
|
|
|
|
|
|
|
|
|
|
| 5962-3826718QUA | 0EU86 | AS58C1001ECA-15/883C |  
| 5962-3826718QMA | 0EU86 | AS58C1001F-15/883C  
| 5962-3826718QMC | 68911 | 28C010TFB-15  
| 5962-3826718QNA | 0EU86 | AS58C1001SF-15/883C  
| 5962-3826718Q6C | 68911 | 28C010TRPFB-15  
| 5962-3826718Q7C | 68911 | 28C011TRPFB-15  
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| 5962-3826719QMC | 68911 | 28C010TFB-12  
| 5962-3826719Q6C | 68911 | 28C010TRPFB-12  
| 5962-3826719Q7C | 68911 | 28C011TRPFB-12  
|
|
|
1/ The lead finish shown for each PIN representing a hermetic  
package is the most readily available from the manufacturer  
listed for that part. If the desired lead finish is not listed,  
contact the Vendor to determine its availability.  
2/ Caution. Do not use this number for item  
acquisition. Items acquired to this number may not  
satisfy the performance requirements of this drawing.  
3/ Not available from an approved source.  
Vendor CAGE  
number  
Vendor name  
and address  
1FN41  
60395  
0EU86  
68911  
Atmel Corporation  
2125 O'Nel Drive  
San Jose, CA 95131  
Xicor, Incorporated  
851 Buckeye Court  
Milpitas, CA 95035  
Austin Semiconductor  
8701 Cross Park Drive  
Austin, TX 78754-4566  
Maxwell Technologies  
9244 Balboa Avenue  
San Diego, CA 92123  
The information contained herein is disseminated for convenience only and  
the Government assumes no liability whatsoever for any inaccuracies in this  
information bulletin.  
3 of 3  

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