MAX9939AUB/V+T [MAXIM]
SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp;
| 型号： | MAX9939AUB/V+T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | SPI Programmable-Gain Amplifier with Input VOS Trim and Output Op Amp 放大器 信息通信管理 光电二极管 |
| 文件： | 总15页 (文件大小：1790K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
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MAX9939
SPI Programmable-Gain Amplifier
with Input V Trim and Output Op Amp
OS
General Description
Features
● SPI-Programmable Gains: 0.2V/V to 157V/V
The MAX9939 is a general-purpose, differential-input
programmable-gain amplifier (PGA) that is ideal for
conditioning a variety of wide dynamic range signals
such as those found in motor current-sense, medical
instrumentation, and sonar data acquisition applications.
It features programmable differential gains from 0.2V/V to
157V/V, input offset-voltage compensation, and an output
amplifier that can be configured either as a high-order
active filter or to provide a differential output.
● Extremely Low Gain Tempco
● Integrated Amplifier for R/C Programmable Active
Filter
● Input Offset-Voltage Compensation
● Input Protection to ±16V
● 13μA Software Shutdown Mode
● -40°C to +125°C Operating Temperature Range
● 10-Pin μMAX Package
The PGA is optimized for high-signal bandwidth and
its gain can be programmed to be 0.2V/V, 1V/V, 10V/V,
20V/V, 30V/V, 40V/V, 60V/V, 80V/V, 119V/V, and 157V/V.
Precision resistor matching provides extremely low gain
tempco and high CMRR. Although the MAX9939 operates
Ordering Information
from a single supply V
between 2.9V to 5.5V, it can
CC
process signals both above and below ground due to the
use of an input level-shifting amplifier stage. Furthermore,
its inputs are protected to ±16V, allowing it to withstand
fault conditions and signal overranges.
PART
TEMP RANGE
-40ºC to +125ºC
-40ºC to +125ºC
PIN-PACKAGE
10 µMAX
MAX9939AUB+
MAX9939AUB/V+T
10 µMAX
/V denotes an automotive-qualified part.
+Denotes a lead(Pb)-free/RoHS-compliant package.
The output amplifier is designed for high bandwidth and
low-bias currents, making it ideal for use in multiple-
feedback active filter topologies that offer much higher Qs
and stopband attenuation than Sallen-Key architectures.
The MAX9939 draws 3.4mA of quiescent supply current
at 5V, and includes a software-programmable shutdown
mode that reduces its supply current to only 13μA. The
Pin Configuration
®
MAX9939 is available in a 10-pin μMAX package and
operates over the -40°C to +125°C automotive temperature
range.
TOP VIEW
+
SCLK
DIN
1
2
3
4
5
10 CS
Applications
● Sensorless Motor Control
● Medical Signal Conditioning
● Sonar and General Purpose Data Acquisition
● Differential to Single-Ended Conversion
9
8
7
6
V
CC
MAX9939
µMAX
GND
INA-
INA+
OUTA
INB
OUTB
● Differential-Input, Differential-Output Signal
Amplification
● Sensor Interface and Signal Processing
μMAX is a registered trademark of Maxim Integrated Products,
Inc.
Functional Diagram appears at end of data sheet.
19-4329; Rev 4; 8/19
MAX9939
SPI Programmable-Gain Amplifier
with Input V Trim and Output Op Amp
OS
Absolute Maximum Ratings
V
to GND ............................................................-0.3V to +6V
Operating Temperature Range......................... -40°C to +125°C
Junction Temperature......................................................+150°C
Storage Temperature Range............................ -65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Soldering Temperature (reflow).......................................+260°C
CC
INB, OUTA, OUTB, SCLK, DIN, CS......... -0.3V to (V
+ 0.3V)
CC
INA+, INA- to GND.................................................-16V to +16V
Output Short-Circuit Current Duration.......................Continuous
Continuous Input Current into Any Terminal ....................±20mA
Continuous Power Dissipation (T = +70°C)
A
10-Pin μMAX (derate 5.6mW/°C above +70°C)..........707mW
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Electrical Characteristics
(V
= 5V, V
= 0V, V
= V
, Gain = 10V/V, R
= R
= 1kΩ to V /2, T = T
to T
, unless otherwise noted.
MAX
CC
GND
INA+
INA-
OUTA
OUTB
CC
A
MIN
Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
PGA CHARACTERISTICS
Gain Error
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GE
0.05
2.2
0.38
17
9
%
T
= +25°C, 0.2V ≤ V
≤ VCC - 0.2V
A
OUTA
Gain Temperature-Coefficient
Tc-GE
ppm/°C
With no V
With no V
trim, T = +25°C
1.5
OS
A
Input Offset Voltage (Note 2)
V
mV
OS-A
trim, T = T
to T
MAX
15
OS
A
MIN
Input Offset-Voltage Drift
10
µV/C
mV
Input Offset-Voltage Trim Range
±17
V
- 2.2
CC
Input Common-Mode Range
V
CM
Guaranteed by CMRR test (Note 3)
-V /2
CC
V
-1V ≤ V
≤ V
- 2.2V
50
50
39
60
60
CM
CC
Common-Mode Rejection Ratio
CMRR
-V /2 ≤ V
≤ V
- 2.2V, T = +25°C
dB
CC
CM
CC
A
-V /2 ≤ V
≤ V
- 2.2V
CC
CM
CC
Output Short-Circuit current
I
70
54
mA
SC
Input-Voltage Noise Density
V
f = 10kHz, gain = 157V/V
Gain = 0.2V/V
nV/√Hz
N
2.15
Gain-Bandwidth Product
GBW
Gain = 1V/V
MHz
Gain = 157V/V
279
9
Slew Rate
SR
V/µs
µs
Settling Time
Distortion
t
To 1%, 2V output step
0.45
89
1
S
THD
f = 1kHz, V
= 2.5V
dB
OUTA
P-P
Max Capacitive Load
C
nF
L(MAX)
Voltage output high = V
- V
- V
GND
,
CC
OUTA
Output Swing
V
, V
25
60
mV
OH OL
voltage output low = V
OUTA
OUTPUT AMPLIFIER CHARACTERISTICS
Input Bias Current
Ib
(Note 4)
1
pA
mV
mA
T
T
= +25°C
1.5
9
A
A
Input Offset Voltage (Note 2)
Output Short-Circuit Current
V
OS-B
= T
to T
15
MIN
MAX
I
70
SC
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MAX9939
SPI Programmable-Gain Amplifier
with Input V Trim and Output Op Amp
OS
Electrical Characteristics (continued)
(V
= 5V, V
= 0V, V
= V
, Gain = 10V/V, R
= R
= 1kΩ to V /2, T = T
to T
, unless otherwise noted.
MAX
CC
GND
INA+
INA-
OUTA
OUTB
CC
A
MIN
Typical values are at T = +25°C.) (Note 1)
A
PARAMETER
Unity-Gain Bandwidth
Slew Rate
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MHz
V/µs
µs
UGBW
2.2
6.4
0.86
36
SR
Settling Time
t
To 1%, 2V output step
S
Input-Voltage Noise Density
Distortion
V
nV/√Hz
dB
N
THD
f = 1kHz, V
= 2.5V , gain = -1V/V
90
OUTA
P-P
Max Capacitive Load
C
1
nF
L(MAX)
Voltage output high = V
- V
- V
GND
,
CC
OUTB
Output Swing
V
, V
25
60
mV
OH OL
voltage output low = V
OUTB
POWER SUPPLY
Supply Voltage Range
V
Guaranteed by PSRR
2.9
60
5.5
V
CC
1kΩ between OUTA and INB, 1kΩ between
OUTB and INB, measured differentially
between OUTA and OUTB
Power-Supply Rejection Ratio
PSRR
80
dB
Supply Current
I
OUTA and OUTB unloaded
3.4
13
6.7
24
mA
µA
CC
Shutdown Supply Current
SPI CHARACTERISTICS
Input-Voltage Low
I
Soft shutdown through SPI
SHDN
V
0.8
±1
5
V
V
IL
IH
IN
V
V
= 5V
2.0
CC
Input-Voltage High
V
= 3.3V
1.65
CC
Input Leakage Current
Input Capacitance
I
µA
pF
C
5
IN
SPI TIMING CHARACTERISTICS
SCLK Frequency
f
(Note 5)
MHz
ns
SCLK
SCLK Period
t
200
80
CP
SCLK Pulse-Width High
SCLK Pulse-Width Low
CS Fall to SCLK Rise Setup
t
ns
CH
t
80
ns
CL
t
80
ns
CSS
20 + (0.5
CS Fall to SCLK Rise Hold
t
ns
CSH
x t
)
CP
DIN to SCLK Setup
t
55
ns
ns
ns
ns
ns
DS
DIN Hold after SCLK
t
0
DH
SCLK Rise to CS Fall Delay
CS Rise to SCLK Rise Hold
CS Pulse-Width High
t
20
80
CS0
CS1
t
t
200
CSW
Note 1: All devices are 100% production tested at T = +25°C. Temperature limits are guaranteed by design.
A
Note 2: The input offset voltage includes the effects of mismatches in the internal V /2 resistor dividers.
CC
Note 3: For gain of 0.25V/V, the input common-mode range is -1V to V
- 2V.
CC
Note 4: The input current of a CMOS device is too low to be accurately measured on an ATE and is typically on the order of 1pA.
Note 5: Parts are functional with f
= 10MHz.
SCLK
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MAX9939
SPI Programmable-Gain Amplifier
with Input V
Trim and Output Op Amp
OS
CS
t
CSW
t
CSS
t
CS1
t
t
t
t
t
CL
CP
CH
CSH
CSO
SCLK
DIN
t
t
DH
DS
Figure 1. SPI Interface Timing Diagram
Typical Operating Characteristics
(V
= 5V, V
= 0V, V
= V = 0V, Gain = 10V/V, R
= R
= 1kΩ to V /2, T = +25°C, unless otherwise noted.)
CC
GND
IN+
IN-
OUTA
OUTB CC A
PGA GAIN vs. FREQUENCY
PGA GAIN vs. FREQUENCY
AMPLIFIER B GAIN vs. FREQUENCY
60
3
60
1V/V GAIN 157V/V
R
L
= 10kΩ to V /2
CC
R
L
= 10kΩ to V /2
CC
40
20
0
2
1
0
40
20
0
GAIN =30V/V
-20
-40
-60
-80
-1
-2
-3
-4
-20
-40
-60
-80
GAIN = 160V/V
R = 10kΩ to V /2
L
CC
0.01
0.1
1
10
100
0.01
0.1
1
10
0.01
0.1
1
10
100
FREQUENCY (MHz)
FREQUENCY (MHz)
FREQUENCY (MHz)
COMMON-MODE REJECTION RATIO
vs. FREQUENCY
AMPLIFIER B GAIN vs. FREQUENCY
GAIN ERROR vs. TEMPERATURE
3
0
-10
-20
-30
-40
-50
-60
-70
-80
0.20
0.15
0.10
0.05
0
R = 10kΩ to V /2
1V/V GAIN 157V/V
L
CC
2
1
0
-1
-2
-3
-4
0.01
0.1
1
10
0.001
0.01
0.1
1
10
100
-40 -25 -10
5
20 35 50 65 80 95 110 125
FREQUENCY (MHz)
FREQUENCY (MHz)
TEMPERATURE (°C)
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MAX9939
SPI Programmable-Gain Amplifier
with Input V Trim and Output Op Amp
OS
Typical Operating Characteristics (continued)
(V
= 5V, V
= 0V, V
= V = 0V, Gain = 10V/V, R
= R
= 1kΩ to V /2, T = +25°C, unless otherwise noted.)
CC
GND
IN+
IN-
OUTA
OUTB
CC
A
INPUT V TRIM RESPONSE
OS
INPUT V vs. TEMPERATURE
OS
MAX9939 toc08
3.0
2.5
2.0
1.5
1.0
0.5
0
OUTA
10mV/div
GAIN = 1V/V
1ms/div
-40 -25 -10
5
20 35 50 65 80 95 110 125
TEMPERATURE (°C)
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
DIFFERENTIAL PSRR vs. FREQUENCY
0
-20
0
10V/V GAIN 157V/V
1V/V GAIN 157V/V
-20
-40
-40
GAIN = 157V/V
-60
-60
-80
-80
-100
-120
GAIN = 1V/V
-100
0.01
0.1
1
10
100
1000 10,000
0.01
0.1
1
10
100
FREQUENCY (kHz)
FREQUENCY (kHz)
NOISE VOLTAGE DENSITY
NOISE VOLTAGE DENSITY
10,000
1000
100
1000
100
10
PGA
10V/V GAIN 157V/V
AMPLIFIER B
10
10
100
1000
10,000
100,000
10
100
1000
10,000
100,000
FREQUENCY (Hz)
FREQUENCY (Hz)
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MAX9939
SPI Programmable-Gain Amplifier
with Input V Trim and Output Op Amp
OS
Typical Operating Characteristics (continued)
(V
= 5V, V
= 0V, V
= V = 0V, Gain = 10V/V, R
= R
= 1kΩ to V /2, T = +25°C, unless otherwise noted.)
CC
GND
IN+
IN-
OUTA
OUTB
CC
A
OUTPUT IMPEDANCE vs. FREQUENCY
1% SETTLING TIME vs. GAIN (PGA)
1000
100
10
V
OUT
= 2V
P-P
AMPLIFIER B
900
800
700
600
500
400
300
200
100
0
1
0.1
0.01
0.001
0.01
0.1
1
10
0
20 40 60 80 100 120 140 160
GAIN (V/V)
FREQUENCY (MHz)
RECOVERY FROM INPUT OVERLOAD
RECOVERY FROM INPUT OVERLOAD
(PGA, GAIN = 1V/V)
(PGA, GAIN = 157V/V)
MAX9939 toc15
MAX9939 toc16
INA+ - INA-
2V/div
INA+ - INA-
2mV/div
OUTA
1V/div
OUTA
1V/div
1µs/div
400ns/div
RECOVERY FROM INPUT OVERLOAD
(OUTPUT AMPLIFIER)
GAIN ADJUST RESPONSE
MAX9939 toc17
MAX9939 toc18
IN
2V/div
INA+ - INA-
2mV/div
GAIN = 10V/V
GAIN = 1V/V
OUTB
2V/div
OUTA
1V/div
GAIN = 40V/V
GAIN = 157V/V
1µs/div
200µs/div
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MAX9939
SPI Programmable-Gain Amplifier
with Input V Trim and Output Op Amp
OS
Typical Operating Characteristics (continued)
(V
= 5V, V
= 0V, V
= V = 0V, Gain = 10V/V, R
= R
= 1kΩ to V /2, T = +25°C, unless otherwise noted.)
CC
GND
IN+
IN-
OUTA
OUTB CC A
COMMON-MODE REJECTION RESPONSE
SHUTDOWN CURRENT vs. SUPPLY VOLTAGE
MAX9939 toc19
20
V
CM
V
DM
= 1V , 1kHz
P-P
= 25mV , 10kHz
P-P
16
12
8
INA+
1V/div
INA-
1V/div
OUTA
2V/div
4
GAIN = 157V/V
0
2.8
3.2
3.6 4.0
4.4
4.8 5.2
200µs/div
VOLTAGE (V)
Pin Description
PIN
1
NAME
SCLK
DIN
FUNCTION
Serial-Clock Input
2
Serial-Data Input. Data is clocked into the serial interface on the rising edge of SCLK.
3
GND
INA-
Ground
4
PGA Inverting Input
5
INA+
OUTB
INB
PGA Noninverting Input
6
Buffer Output
7
Buffer Input
8
OUTA
PGA Output
9
V
Power Supply. Bypass to GND with 0.1µF and 1µF capacitors.
CC
Active-Low Chip-Select Input. Drive CS low to enable the serial interface. Drive CS high to disable the serial
interface.
10
CS
is programmable between ±17mV and can be used to
Detailed Description
The MAX9939 is a general-purpose PGA with input
offset trim capability. Its gain and input offset voltage
regain output dynamic range in high gain settings. An
input offset-voltage measurement mode enables input
offset voltage to be calibrated out in firmware to obtain
excellent DC accuracy.
(V ) are SPI programmable. The device also includes
OS
an uncommitted output operational amplifier that can be
used as either a high-order active filter or to provide a
differential output. The device can be put into shutdown
through SPI.
The main amplifier accepts a differential input and pro-
vides a single-ended output. The relationship between the
differential input and singled-ended output is given by the
representative equation:
The gain of the amplifier is programmable between 0.2V/V
and 157V/V (default gain is set to 1 V/V). The input offset
V
= V /2 - Gain x (V
- V ) + Gain x V
INA- OS
OUTA
CC
INA+
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MAX9939
SPI Programmable-Gain Amplifier
with Input V Trim and Output Op Amp
OS
CS
SCLK
DIN
D0
D1
D2
D3
D6
D5
D6
D7
Figure 2. SPI Interface Timing Diagram (CPOL = CPHA = 0)
the clock polarity (CPOL) and clock phase (CPHA) both
set to 0 (see Figure 1). Initiating a write to the MAX9939 is
accomplished by pulling CS low. Data is clocked in on the
rising edge of each clock pulse, and is written LSB first.
Each write to the MAX9939 consists of 8 bits (1 byte). Pull
CS high after the 8th bit has been clocked in to latch the
data and before sending the next byte of instruction. Note
that the internal register is not updated if CS is pulled high
before the falling edge of the 8th clock pulse.
Architecture
The MAX9939 features three internal amplifiers as shown
in the Functional Diagram. The first amplifier (amplifier
LVL) is configured as a differential amplifier for differential
to single-ended conversion with an input offset-voltage trim
network. It has extremely high CMRR, gain accuracy, and
very low temperature drift due to precise resistor matching.
The output of this amplifier is level shifted to V /2.
CC
This amplifier is followed by a programmable-gain inverting
amplifier (amplifier A) with programmable R and R resis-
tors whose gain varies between 0.2V/V and 157V/V. The
output of this amplifier is biased at V /2 and has extremely
high gain accuracy and low temperature drift. The MAX9939
has an uncommitted op amp (amplifier B) whose noninvert-
ing input is referenced to V /2. Its inverting input and
output are externally accessible, allowing it to be configured
either as an active filter or as a differential output.
Register Description
F
I
The MAX9939 consists of three registers: a shift register
and two internal registers. The shift register accepts data
and transfers it to either of the two internal registers. The
two internal registers store data that is used to determine
the gain, input offset voltage, and operating modes of the
CC
CC
amplifier. The two internal registers are the Input V
OS
Trim register and Gain register. The format of the 8-bit
write to these registers is shown in Tables 1 and 2. Data
is sent to the shift register LSB first.
A robust input ESD protection scheme allows input volt-
ages at INA+ and INA- to reach ±16V without damaging
the MAX9939, thus making the part extremely attractive
for use in front-ends that can be exposed to high voltages
during fault conditions. In addition, its input-voltage range
Table 1. Input V
Trim Register
OS
D7
D0
LSB
extends down to -V /2 (e.g., -2.5V when powered from
D6
D5
D4
V3
D3
D2
D1
CC
MSB
SHDN MEAS V4
a 5V single supply) allowing the MAX9939 to translate
below ground signals to a 0V to 5V output signal. This
feature simplifies interfacing ground-referenced signals
with unipolar-input ADCs.
V2
V1
V0
SEL = 0
Table 2. Gain Register
SPI-Compatible Serial Interface
D7
MSB
D0
LSB
D6
D5
D4
D3
D2
D1
The MAX9939 has a write-only interface, consisting of
three inputs: the clock signal (SCLK), data input (DIN),
and chip-select input (CS). The serial interface works with
SHDN MEAS
X
G3
G2
G1
G0
SEL = 1
X = Don’t care.
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MAX9939
SPI Programmable-Gain Amplifier
with Input V Trim and Output Op Amp
OS
SEL: The SEL bit selects which internal register is written
Programming Input Offset Voltage (VOS)
to. Set SEL to 0 to write bits D5:D1 to the input V
register. Set SEL to 1 to write D4:D1 to the Gain register
(D5 is don’t care when SEL = 1).
trim
OS
The input offset voltage is set by the bits V4:V0 in the
Input Offset Voltage Trim register. Bit V4 determines the
polarity of the offset. Setting V4 to 0 makes the offset
positive, while setting V4 to 1 makes the offset negative.
SHDN: Set SHDN to 0 for normal operation. Set SHDN to
1 to place the device in a low-power 13μA shutdown mode.
In shutdown mode, the outputs OUTA and OUTB are high
impedance, however, the SPI decode circuitry is still active.
Each instruction requires a write to the SHDN bit.
Table 4 shows the relationship between V3:V0 and V
.
OS
To determine the effect of V
at the output of the ampli-
OS
fier for gains other than 1, use the following formula:
= V /2 + Gain x (V + V )
OS
V
OUTA
CC
OS-INHERENT
MEAS: The MAX9939 provides a means for measuring
its own input offset voltage. When MEAS is set to 1, the
INA- input is disconnected from the input signal path and
internally shorted to INA+. This architecture thus allows
the input common-mode voltage to be compensated at
the application-specific input common-mode voltage of
interest. The input offset voltage of the PGA is the output
offset voltage divided by the programmed gain without
where V
is the inherent input offset voltage
OS-INHERENT
of the amplifier, which can be measured by setting MEAS
to 1.
Applications Information
Use of Output Amplifier as Active Filter
The output amplifier can be configured as a multiple-
feedback active filter as shown in Figure 3, which tradi-
tionally has better stopband attenuation characteristics
than Sallen-Key filters. These filters also possess inher-
ently better distortion performance since there are no
common-mode induced effects (i.e., the common-mode
voltage of the operational amplifier is always fixed at
any V
trim (i.e., V3:V0 set to 0):
OS
V
= (V
- V /2)/Gain
CC
OS-INHERENT
OUTA
. The input V
OS-INHERENT OS
Program V
to offset V
OS
also includes the effect of mismatches in the resistor-
dividers. Setting MEAS to 0 switches the inputs back to
the signals on INA+ and INA-. Each instruction requires a
write to the MEAS bit.
V
/2 instead of it being signal dependent such as in
CC
Sallen-Key filters). Choose external resistors and capaci-
Programming Gain
tors to create lowpass, bandpass, or highpass filters.
The PGA’s gain is set by the bits G3:G0 in the Gain
register. Table 3 shows the relationship between the bits
G3:G0 and the amplifier’s gain. The slew rate and small-
signal bandwidth (SSBW) of the PGA depend on its gain
setting as shown in Table 3.
Table 3. Gain
GAIN
(V/V)
SLEW RATE
(V/µs)
G3:G0
SMALL-SIGNAL BANDWIDTH (MHz)
0000
0001
0010
0011
0100
0101
0110
0111
1000
1
2.90
8.99
2.15
2.40
1.95
3.40
2.15
2.60
1.91
2.30
1.78
10
20
8.70
30
12.80
12.50
13.31
12.15
18.53
16.49
40
60
80
120
157
0.2 (V
= 5V)
CC
1001
1010
2.86
2.90
1.95
2.15
0.25 (V
= 3.3V)
CC
1
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MAX9939
SPI Programmable-Gain Amplifier
with Input V Trim and Output Op Amp
OS
Differential-Input, Differential-Output PGA
Table 4. Input Offset-Voltage Trim
The output amplifier can be configured so that the
MAX9939 operates as a differential-input, differential-
output programmable gain amplifier. As shown in Figure
4, use a 10kΩ resistor between OUTA and INB, and
between INB and OUTB. Such a differential-output con-
figuration is ideal for use in low-voltage applications that
can benefit from the 2X output voltage dynamic range
when compared to single-ended output format.
INPUT OFFSET VOLTAGE
(V4 = 0 TRIMS POSITIVE, V4 = 1 TRIMS NEGATIVE)
V3:V0
0000
0001
0010
0011
0100
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
V
(mV)
OS
0
1.3
2.5
3.8
Use of Output Operational Amplifier as TIA
4.9
CMOS inputs on the output op amp makes it ideal for
use as an input transimpedance amplifier (TIA) in certain
current-output sensor applications. In such a situation,
keep in mind that the inverting input operates at fixed
6.1
7.3
8.4
voltage of V /2. Use a high-value resistor as a feedback
10.6
11.7
12.7
13.7
14.7
15.7
16.7
17.6
CC
gain element, and use a feedback capacitor in parallel
with this resistor if necessary to aid amplifier stability in
the presence of high photodiode or cable capacitance.
The output of this TIA can be routed to INA+ or INA- for
further processing and signal amplification.
Power-Supply Bypassing
Bypass V
to GND with a 0.1μF capacitor in parallel
CC
with a 1μF low-ESR capacitor placed as close as possible
to the MAX9939.
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MAX9939
SPI Programmable-Gain Amplifier
with Input V
Trim and Output Op Amp
OS
V
CC
1µF
0.1µF
V
CC
V
CC
MAX9939
20kΩ
20kΩ
V /2
CC
V /2
CC
20kΩ
20kΩ
10kΩ
10kΩ
OUTA
INA+
INA-
A
R
I
LVL
66.5kΩ
R
F
ASIC
4.7nF
121kΩ
INB
V
CC
10kΩ
220pF
66.5kΩ
1.21kΩ
INPUT
OFFSET-
VOLTAGE
TRIM
20kΩ
20kΩ
ADC
B
OUTB
GAIN
SHUTDOWN
100nF
V /2
CC
SPI REGISTERS
SCLK DIN CS
GND
CS
DOUT
SCLK
Figure 3. Using the MAX9939 Output Amplifier as an Anti-Aliasing Filter (Corner Frequency = 1.3kHz) to Maximize Nyquist Bandwidth
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MAX9939
SPI Programmable-Gain Amplifier
with Input V
Trim and Output Op Amp
OS
V
CC
1µF
0.1µF
V
CC
MAX9939
V
CC
20kΩ
/2
20kΩ
/2
V
CC
V
CC
20kΩ
20kΩ
10kΩ
10kΩ
OUTA
INA+
INA-
A
F
R
I
LVL
10kΩ
R
ASIC
INB
V
CC
10kΩ
10kΩ
ADC
INPUT
OFFSET-
VOLTAGE
TRIM
20kΩ
20kΩ
B
OUTB
GAIN
SHUTDOWN
V /2
CC
SPI REGISTERS
SCLK DIN CS
GND
CS
DOUT
SCLK
Figure 4. Using the MAX9939 as a Differential-Input, Differential-Output PGA
Chip Information
PROCESS: BiCMOS
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MAX9939
SPI Programmable-Gain Amplifier
with Input V Trim and Output Op Amp
OS
Functional Diagram
V
CC
V
CC
MAX9939
V
CC
20kΩ
/2
20kΩ
/2
V
CC
V
CC
20kΩ
20kΩ
10kΩ
10kΩ
INA+
INA-
OUTA
A
R
I
LVL
R
F
INB
V
CC
10kΩ
INPUT
OFFSET-
VOLTAGE
TRIM
20kΩ
20kΩ
OUTB
B
GAIN
SHUTDOWN
V /2
CC
SPI REGISTERS
SCLK DIN CS
GND
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MAX9939
SPI Programmable-Gain Amplifier
with Input V Trim and Output Op Amp
OS
Package Information
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing
pertains to the package regardless of RoHS status.
PACKAGE TYPE
PACKAGE CODE
OUTLINE NO.
21-0061
LAND PATTERN NO.
90-0330
10 μMAX
U10+2
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MAX9939
SPI Programmable-Gain Amplifier
with Input V
Trim and Output Op Amp
OS
Revision History
REVISION
NUMBER
REVISION
PAGES
CHANGED
DESCRIPTION
DATE
11/08
2/09
0
1
2
3
4
Initial release
—
9
Corrected gain value in Table 3
Modified Figure 2
12/10
12/12
8/19
8
Added the MAX9939AUB/V+T
Updated Detailed Description
1
7
For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.
2019 Maxim Integrated Products, Inc.
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