MAX9371EKA-T [MAXIM]

LVTTL/TTL to LVPECL/PECL Translator, 1 Func, Complementary Output, BIPolar, PDSO8, SOT-23, 8 PIN;
MAX9371EKA-T
型号: MAX9371EKA-T
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

LVTTL/TTL to LVPECL/PECL Translator, 1 Func, Complementary Output, BIPolar, PDSO8, SOT-23, 8 PIN

文件: 总9页 (文件大小:219K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
19-2377; Rev 0; 4/02  
LVTTL/TTL-to-Differential LVPECL/PECL  
Translators  
General Description  
Features  
The MAX9370/MAX9371/MAX9372 LVTTL/TTL-to-differ-  
ential LVPECL/PECL translators are designed for high-  
speed communication signal and clock driver  
applications. The MAX9370/MAX9372 are dual  
LVTTL/TTL-to-LVPECL/PECL translators that operate in  
excess of 1GHz. The MAX9371 is a single translator.  
The MAX9370/MAX9371 operate over a wide 3.0V to  
5.25V supply range, allowing high-performance clock  
or data distribution in systems with a nominal 3.3V or  
5.0V supply. The MAX9372 is designed to operate from  
3.0V to 3.6V.  
Guaranteed 1GHz Operating Frequency at 600mV  
Differential Output  
270ps Propagation Delay  
10ps Output-to-Output Skew (MAX9370/MAX9372)  
Wide Supply Range: 3.0V to 5.25V  
(MAX9370/MAX9371)  
ESD Protection > 2kV (Human Body Model)  
Output High with Input Open  
The devices default to output high if the input is discon-  
nected. They feature low 270ps propagation delay. The  
MAX9370/MAX9371/MAX9372 employ industry-stan-  
dard flow-through pinouts. These devices are specified  
for operation from -40°C to +85°C, and are offered in  
space-saving, 8-pin SOT23, µMAX, and SO packages.  
Available in Small 8-Pin SOT23, µMAX, and SO  
Packages  
Improved Upgrades to MC100EL22, MC100EPT20,  
MC100EPT22  
Ordering Information  
PART  
TEMP RANGE  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
-40°C to +85°C  
PIN-PACKAGE  
8 SOT23-8  
8 µMAX  
MAX9370EKA-T*  
MAX9370EUA*  
MAX9370ESA  
MAX9371EKA-T*  
MAX9371EUA*  
MAX9371ESA  
MAX9372EKA-T*  
MAX9372EUA*  
MAX9372ESA  
Applications  
Precision Clock/Data Level Translation  
Central Office Clock Distribution  
DSLAM/DLC  
8 SO  
8 SOT23-8  
8 µMAX  
Base Station  
8 SO  
Mass Storage  
8 SOT23-8  
8 µMAX  
8 SO  
Pin Configurations/Functional Diagrams appears at end of  
data sheet.  
*Future product—contact factory for availability.  
Typical Operating Circuit  
MAX9370  
MAX9371  
MAX9372  
PECL/LVPECL  
RECEIVER  
Z = 50  
0
Q_  
D
TTL/LVTTL  
INPUT  
Q_  
Z = 50Ω  
0
50Ω  
50Ω  
V
CC  
- 2.0V  
________________________________________________________________ Maxim Integrated Products  
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at  
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.  
LVTTL/TTL-to-Differential LVPECL/PECL  
Translators  
ABSOLUTE MAXIMUM RATINGS  
V
V
to GND (MAX9370/MAX9371) .......................-0.3V to +5.5V  
to GND (MAX9372)........................................-0.3V to +4.0V  
Junction-to-Case Thermal Resistance  
CC  
CC  
8-Pin SOT23................................................................+80°C/W  
8-Pin µMAX..............................................................+39°C/W  
8-Pin SO......................................................................+40°C/W  
D_ to GND ..................................................-0.3V to (V  
+ 0.3V)  
+ 0.3V)  
CC  
CC  
Q_, Q_ to GND ...........................................-0.3V to (V  
Continuous Output Current ................................................50mA  
Surge Output Current........................................................100mA  
Junction-to-Ambient Thermal Resistance in Still Air  
8-Pin SOT23..............................................................+112°C/W  
8-Pin µMAX............................................................+221°C/W  
8-Pin SO....................................................................+170°C/W  
Junction-to-Ambient Thermal Resistance with  
Continuous Power Dissipation (T = +70°C)  
A
8-Pin SO (derate 5.9mW/°C above +70°C)...................470mW  
8-Pin µMAX (derate 4.5mW/°C above +70°C) ..............362mW  
8-Pin SOT23 (derate 8.9mW/°C above +70°C).............714mW  
Operating Temperature Range ...........................-40°C to +85°C  
Junction Temperature .....................................................+150°C  
Storage Temperature Range.............................-60°C to +150°C  
Soldering Temperature (10s)...........................................+300°C  
500LFPM Airflow  
8-Pin SOT23................................................................+78°C/W  
8-Pin µMAX............................................................+155°C/W  
8-Pin SO......................................................................+99°C/W  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability.  
DC ELECTRICAL CHARACTERISTICS  
(V  
= 3.0V to 5.25V for MAX9370/MAX9371, V  
= 3.0V to 3.6V for MAX9372, outputs terminated with 501ꢀ to V  
- 2.0V.  
CC  
CC  
CC  
Typical values are at V  
= 3.3V, V = 2.4V, V = 0.4V, unless otherwise noted.) (Notes 1, 2, 3)  
CC  
IH  
IL  
-40°C  
TYP  
+25°C  
TYP  
+85°C  
TYP  
PARAMETER SYMBOL  
CONDITIONS  
UNITS  
MIN  
MAX  
MIN  
MAX  
MIN  
MAX  
LVTTL INPUTS (D_)  
Input High  
Voltage  
V
2.0  
2.0  
2.0  
V
V
IH  
Input Low  
Voltage  
V
0.8  
0.8  
0.8  
IL  
IL  
Input Low  
Current  
I
V
= 0.5V  
= 2.7V  
-100  
+10  
-100  
+10  
-100  
+10  
µA  
D
V
V
-50  
-50  
-50  
D
D
= V  
,
CC  
MAX9370/  
MAX9371  
130  
20  
130  
20  
130  
20  
Input High  
Current  
I
µA  
V
IH  
V
= V  
,
CC  
D
MAX9372  
Input Clamp  
Voltage  
I
IL  
or I = 18mA -1.2  
-1.2  
-1.2  
IH  
LVPECL/PECL OUTPUTS (Q_, Q_)  
V
-
V
-
V
-
V
-
V
-
V
-
CC  
CC  
CC  
CC  
CC  
CC  
MAX9370  
1.085  
0.895 1.025  
0.895 1.025  
0.895  
Output High  
Voltage  
V
V
V
OH  
MAX9371/  
MAX9372  
V
-
V
-
V
-
V
-
V
-
V
-
CC  
CC  
CC  
CC  
CC  
CC  
1.145  
0.895 1.145  
0.895 1.145  
0.895  
V
1.83  
-
V
1.62  
-
V
1.81  
-
V
1.62  
-
V
1.81  
-
V
1.62  
-
CC  
CC  
CC  
CC  
CC  
CC  
MAX9370  
Output Low  
Voltage  
V
OL  
MAX9371/  
MAX9372  
V
-
V
-
V
-
V
-
V
-
V
-
CC  
CC  
CC  
CC  
CC  
CC  
1.945  
1.695 1.945  
-1.695 1.945  
1.695  
2
_______________________________________________________________________________________  
LVTTL/TTL-to-Differential LVPECL/PECL  
Translators  
DC ELECTRICAL CHARACTERISTICS (continued)  
(V  
= 3.0V to 5.25V for MAX9370/MAX9371, V  
= 3.0V to 3.6V for MAX9372, outputs terminated with 501ꢀ to V - 2.0V.  
CC  
CC  
CC  
Typical values are at V  
= 3.3V, V = 2.4V, V = 0.4V, unless otherwise noted.) (Notes 1, 2, 3)  
CC  
IH  
IL  
-40°C  
+25°C  
+85°C  
PARAMETER SYMBOL  
CONDITIONS  
UNITS  
MIN  
TYP  
MAX  
MIN  
TYP  
MAX  
MIN  
TYP  
MAX  
Differential  
Output Swing  
600  
600  
600  
mV  
(V  
OH  
- V  
OL  
)
SUPPLY CURRENT  
MAX9370/  
MAX9372  
Power-Supply  
Current  
(Note 4)  
18  
28  
16  
20  
28  
16  
22  
28  
16  
I
mA  
CC  
MAX9371  
9.5  
10.5  
11.5  
AC ELECTRICAL CHARACTERISTICS  
(V  
= 3.0V to 5.25V for MAX9370/MAX9371, V  
= 3.0V to 3.6V for MAX9372, outputs terminated with 501ꢀ to V  
- 2.0V, input  
CC  
CC  
CC  
frequency 1.0GHz, input transition time = 125ps (20ꢀ to 80ꢀ), V = 2.0V, V = 0.8V. Typical values are at V  
= 3.3V, V  
=
IH  
IH  
IL  
CC  
2.4V, V = 0.4V, unless otherwise noted.) (Note 5)  
IL  
-40°C  
+25°C  
+85°C  
PARAMETER SYMBOL  
CONDITIONS  
UNITS  
MIN  
TYP  
MAX  
MIN  
TYP  
MAX  
MIN  
TYP  
MAX  
Maximum  
Toggle  
Frequency  
V
- V  
OL  
OH  
f
1.0  
1.5  
270  
10  
1.0  
1.5  
1.0  
1.5  
270  
7
GHz  
MAX  
600mV  
Input-to-  
Output  
Propagation  
Delay  
t
,
PLH  
Figure 1  
200  
80  
400  
200  
80  
270  
7
400  
200  
80  
400  
ps  
t
PHL  
MAX9370/  
MAX9372  
(Note 6)  
Output-to-  
Output Skew  
t
50  
250  
60  
50  
250  
60  
50  
250  
60  
ps  
ps  
SKQQ  
Output Rise/  
Fall Time  
t , t  
Figure 1  
R
F
Added  
Deterministic  
Jitter  
1Gbps 223 - 1  
PRBS pattern  
(Note 7)  
t
DJ  
40  
40  
40  
ps  
(P-P)  
Added  
Random Jitter  
1GHz clock  
(Note 7)  
t
RJ  
0.23  
0.8  
0.23  
0.8  
0.23  
0.8  
ps  
(RMS)  
Note 1: Measurements are made with the device in thermal equilibrium.  
Note 2: Current into a pin is defined as positive. Current out of a pin is defined as negative.  
Note 3: DC parameters are production tested at T = +25°C. DC limits are guaranteed by design and characterization over the full  
A
operating temperature range.  
Note 4: All pins are open except V  
and GND.  
CC  
Note 5: Guaranteed by design and characterization. Limits are set to 6 sigma.  
Note 6: Measured between outputs of the same part at the signal crossing points under identical conditions for a same-edge transition.  
Note 7: Device jitter added to the input signal.  
_______________________________________________________________________________________  
3
LVTTL/TTL-to-Differential LVPECL/PECL  
Translators  
Typical Operating Characteristics  
(MAX9371, V  
= 3.3V, V = 2.4V, V = 0.4V, outputs terminated with 50to V  
- 2V, input transition time = 125ps (20ꢀ to 80ꢀ),  
CC  
IH  
IL  
CC  
T
A
= +25°C, unless otherwise noted.)  
DIFFERENTIAL OUTPUT VOLTAGE  
SUPPLY CURRENT vs. TEMPERATURE  
(V - V ) vs. FREQUENCY  
TRANSITION TIME vs. TEMPERATURE  
OH  
OL  
1000  
800  
600  
400  
200  
0
26  
22  
18  
14  
10  
6
260  
f = 100MHz  
ALL INPUTS AND OUTPUTS ARE OPEN  
240  
MAX9370/MAX9372  
FALLING EDGE  
RISING EDGE  
220  
200  
180  
MAX9371  
0
0.4  
0.8  
1.2  
1.6  
2.0  
-40  
-15  
10  
35  
60  
85  
-40  
-15  
10  
35  
60  
85  
FREQUENCY (GHz)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
PROPAGATION DELAY vs. TEMPERATURE  
300  
290  
280  
270  
260  
250  
240  
-40  
-15  
10  
35  
60  
85  
TEMPERATURE (°C)  
4
_______________________________________________________________________________________  
LVTTL/TTL-to-Differential LVPECL/PECL  
Translators  
Pin Description for the MAX9370/MAX9372  
PIN  
NAME  
FUNCTION  
SO  
µMAX  
SOT23  
1
2
3
4
5
6
7
8
7
6
5
2
4
3
Q0  
Q0  
Noninverting Differential LVPECL/PECL Output 0. Typically terminate with 50resistor to V - 2V.  
CC  
Inverting Differential LVPECL/PECL Output 0. Typically terminate with 50resistor to V - 2V.  
CC  
Q1  
Noninverting Differential LVPECL/PECL Output 1. Typically terminate with 50resistor to V - 2V.  
CC  
Q1  
Inverting Differential LVPECL/PECL Output 1. Typically terminate with 50resistor to V - 2V.  
CC  
GND  
D1  
Ground. Provide a low-impedance connection to ground plane.  
LVTTL/TTL Input 1. LVTTL/TTL input for translator corresponding to output Q1 and Q1.  
LVTTL/TTL Input 0. LVTTL/TTL input for translator corresponding to output Q0 and Q0.  
D0  
Positive Supply Voltage. Bypass V  
capacitors as close to the device as possible with the smaller value capacitor closest to the device.  
to GND with 0.1µF and 0.01µF ceramic capacitors. Place the  
CC  
8
1
V
CC  
Pin Description for the MAX9371  
PIN  
NAME  
FUNCTION  
SO  
µMAX  
SOT23  
1, 4, 6  
4, 5, 8  
N.C.  
Q
No Connection. No internal connection.  
2
3
5
7
7
6
2
3
Noninverting Differential LVPECL/PECL Output. Typically terminate with 50resistor to V - 2V.  
CC  
Q
Inverting Differential LVPECL/PECL Output. Typically terminate with 50resistor to V - 2V.  
CC  
GND Ground. Provide a low-impedance connection to ground plane.  
D
LVTTL/TTL Input  
Positive Supply Voltage. Bypass V  
capacitors as close to the device as possible with the smaller value capacitor closest to the device.  
to GND with 0.1µF and 0.01µF ceramic capacitors. Place the  
CC  
8
1
V
CC  
Inputs and Outputs  
Detailed Description  
The MAX9370/MAX9371/MAX9372 inputs accept stan-  
dard LVTTL/TTL levels. The input has pullup circuitry that  
drives the outputs to a differential high if the inputs are  
open. The outputs are differential LVPECL/PECL levels.  
The MAX9370/MAX9371/MAX9372 LVTTL/TTL-to-differ-  
ential LVPECL/PECL translators are designed for high-  
speed communication signal and clock driver  
applications. The MAX9370/MAX9372 are dual LVTTL-  
to-LVPECL/PECL translators that operate in excess of  
1GHz. The MAX9371 is a single translator. The  
MAX9370/MAX9371 operate over a wide 3.0V to 5.25V  
supply range, allowing high-performance clock or data  
distribution in systems with a nominal 3.3V or 5.0V sup-  
ply. The MAX9372 is optimized for 3.0V to 3.6V opera-  
tion. These devices feature low 270ps propagation  
delay and 40ps peak-to-peak deterministic jitter.  
Applications Information  
Output Termination  
Terminate outputs with 50to V  
- 2V or use an equiv-  
CC  
alent Thevenin termination. Use the same terminate on  
each output for the lowest output-to-output skew. When a  
single-ended signal is taken from a differential output,  
terminate both outputs. For example, if Q is used as a  
single-ended output, terminate both Q and Q.  
_______________________________________________________________________________________  
5
LVTTL/TTL-to-Differential LVPECL/PECL  
Translators  
Ensure that the output currents do not exceed the con-  
tinuous safe output current limit or surge output current  
limit as specified in the Absolute Maximum Ratings  
table. Under all operating conditions, the devices total  
thermal limits should be observed.  
PC Board Traces  
Input and output trace characteristics affect the perfor-  
mance of the MAX9370/MAX9371/MAX9372. Connect  
each differential output to a 50characteristic impedance  
trace. Minimize the number of vias to prevent impedance  
discontinuities. Reduce reflections by maintaining the 50Ω  
characteristic impedance through connectors and across  
cables. Reduce skew within a differential pair by match-  
ing the electrical length of the traces.  
Supply Bypassing  
to GND with high-frequency surface-mount  
Bypass V  
CC  
ceramic 0.1µF and 0.01µF capacitors in parallel and as  
close to the device as possible, with the 0.01µF capaci-  
tor closest to the device. Use multiple parallel vias to  
minimize parasitic inductance.  
Chip Information  
TRANSISTOR COUNT: 358  
PROCESS: Bipolar  
V
V
IH  
50%  
50%  
PHL  
D_  
IL  
t
t
PLH  
V
V
Q_  
Q_  
OH  
V
OH  
- V  
OL  
OL  
80%  
80%  
V
V
- V  
- V  
OH  
OL  
0V (DIFFERENTIAL)  
20%  
OH  
OL  
20%  
Q_ - Q_  
t
R
t
F
Figure 1. Input-to-Output Propagation Delay and Transition Timing Diagram  
6
_______________________________________________________________________________________  
LVTTL/TTL-to-Differential LVPECL/PECL  
Translators  
Pin Configurations/Functional Diagrams  
1
2
8
7
1
2
8
7
N.C.  
Q
V
V
N.C.  
Q
CC  
CC  
MAX9371  
MAX9371  
D
GND  
3
4
6
5
3
4
6
5
Q
N.C.  
GND  
D
Q
N.C.  
N.C.  
N.C.  
SO/µMAX  
SOT23  
MAX9370/MAX9372  
MAX9370/MAX9372  
1
8
1
8
Q0  
V
CC  
V
CC  
Q0  
2
3
2
3
7
6
7
6
Q0  
Q1  
GND  
D0  
D0  
D1  
Q0  
Q1  
4
5
4
5
Q1  
GND  
D1  
Q1  
SO/µMAX  
SOT23  
_______________________________________________________________________________________  
7
LVTTL/TTL-to-Differential LVPECL/PECL  
Translators  
Package Information  
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,  
go to www.maxim-ic.com/packages.)  
4X S  
8
8
MILLIMETERS  
INCHES  
DIM MIN  
MAX  
MAX  
MIN  
-
-
0.043  
0.006  
0.037  
0.014  
0.007  
0.120  
1.10  
0.15  
0.95  
0.36  
0.18  
3.05  
A
0.002  
0.030  
0.010  
0.005  
0.116  
0.05  
0.75  
0.25  
0.13  
2.95  
A1  
A2  
b
E
H
ÿ 0.50±0.1  
c
D
e
0.0256 BSC  
0.65 BSC  
0.6±0.1  
E
H
0.116  
0.188  
0.016  
0  
0.120  
2.95  
4.78  
0.41  
0∞  
3.05  
5.03  
0.66  
6∞  
0.198  
0.026  
6∞  
L
1
1
α
S
0.6±0.1  
0.0207 BSC  
0.5250 BSC  
D
BOTTOM VIEW  
TOP VIEW  
A1  
A2  
A
c
α
e
L
b
SIDE VIEW  
FRONT VIEW  
PROPRIETARY INFORMATION  
TITLE:  
PACKAGE OUTLINE, 8L uMAX/uSOP  
APPROVAL  
DOCUMENT CONTROL NO.  
REV.  
1
21-0036  
J
1
8
_______________________________________________________________________________________  
LVTTL/TTL-to-Differential LVPECL/PECL  
Translators  
Package Information (continued)  
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,  
go to www.maxim-ic.com/packages.)  
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are  
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.  
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 _____________________ 9  
© 2002 Maxim Integrated Products  
Printed USA  
is a registered trademark of Maxim Integrated Products.  

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