MAX8795A+ [MAXIM]
Switching Regulator, Current-mode, 1.6A, 1400kHz Switching Freq-Max, BICMOS, 5 X 5 MM, 0.80 MM HEIGHT, LEAD FREE, MO-220WHHD-2, TQFN-32;
| 型号： | MAX8795A+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Switching Regulator, Current-mode, 1.6A, 1400kHz Switching Freq-Max, BICMOS, 5 X 5 MM, 0.80 MM HEIGHT, LEAD FREE, MO-220WHHD-2, TQFN-32 信息通信管理 开关 |
| 文件： | 总24页 (文件大小：387K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-079ꢀ; Rev 0; ꢁ/07
TFT-LCD DC-DC Converter with
Operational Amplifiers
MX8795A
General Description
Features
o 2.5V to 5.5V Input Supply Range
The MAX8795A includes a high-performance step-up
regulator, two linear-regulator controllers, and five high-
current operational amplifiers for active-matrix, thin-film
transistor (TFT), liquid-crystal displays (LCDs). Also
included is a logic-controlled, high-voltage switch with
adjustable delay.
o 1.2MHz Current-Mode Step-Up Regulator
Fast Transient Response to Pulsed Load
High-Accuracy Output Voltage (1%)
Built-In 20V, 3A, 0.16Ω n-Channel MOSFET
High Efficiency (85%)
The step-up DC-DC converter provides the regulated
supply voltage for the panel source driver ICs. The con-
verter is a high-frequency (1.2MHz) current-mode regu-
lator with an integrated 20V n-channel MOSFET that
allows the use of ultra-small inductors and ceramic
capacitors. It provides fast transient response to pulsed
loads while achieving efficiencies over 85%.
o Linear-Regulator Controllers for V
and V
GOFF
GON
o High-Performance Operational Amplifiers
130mA Output Short-Circuit Current
45V/µs Slew Rate
20MHz, -3dB Bandwidth
Rail-to-Rail Inputs/Outputs
o Logic-Controlled, High-Voltage Switch with
The gate-on and gate-off linear-regulator controllers
provide regulated TFT gate-on and gate-off supplies
using external charge pumps attached to the switching
node. The MAX8795A includes five high-performance
operational amplifiers. These amplifiers are designed to
drive the LCD backplane (VCOM) and/or the gamma-
correction divider string. The device features high out-
put current ( 1ꢀ0mA), fast slew rate (ꢁ5V/ꢂs), wide
bandwidth (20MHz), and rail-to-rail inputs and outputs.
Adjustable Delay
o Timer-Delay Fault Latch for All Regulator Outputs
o Thermal-Overload Protection
o 0.6mA Quiescent Current
Minimal Operating Circuit
V
V
CP
CN
The MAX8795A is available in a lead-free, ꢀ2-pin, thin
QFN package with a maximum thickness of 0.8mm for
ultra-thin LCD panels.
V
V
MAIN
IN
LX
IN
FB
STEP-UP
CONTROLLER
Applications
Notebook Computer Displays
LCD Monitor Panels
PGND
AGND
COMP
V
V
CP
MAX8795A
Automotive Displays
DRVP
FBP
GATE-ON
GON
CONTROLLER
SRC
COM
DRN
DEL
CTL
SWITCH
CONTROL
V
V
CN
Ordering Information
DRVN
FBN
PIN-
PKG
GATE-OFF
CONTROLLER
GOFF
PART
TEMP RANGE
SUP
PACKAGE
CODE
NEG1
ꢀ2 Thin QFN
5mm x 5mm
MAX8795A+
-ꢁ0°C to +85°C
Tꢀ255+ꢀ
OUT1
OP1
OP2
REF
POS1
NEG2
REF
+Denotes a lead-free package.
NEG4
OUT2
POS2
OUT4
OP4
POS4
NEG5
OUT3
POS3
OUT5
POS5
OP3
OP5
BGND
EP
Pin Configuration appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
TFT-LCD DC-DC Converter with
Operational Amplifiers
ABSOLUTE MAXIMUM RATINGS
IN, CTL to AGND...................................................-0.ꢀV to +7.5V
DRN to COM............................................................-ꢀ0V to +ꢀ0V
COMP, FB, FBP, FBN, DEL, REF to AGND ....-0.ꢀV to (V + 0.ꢀV)
POS_ to NEG_ RMS Current ...................................5mA (Note 1)
OUT_ Maximum Continuous Output Current.................... 75mA
LX Switch Maximum Continuous RMS Current.....................1.6A
IN
PGND, BGND to AGND...................................................... 0.ꢀV
LX to PGND ............................................................-0.ꢀV to +20V
SUP to AGND .........................................................-0.ꢀV to +20V
DRVP to AGND.......................................................-0.ꢀV to +ꢀ6V
Continuous Power Dissipation (T = +70°C)
A
ꢀ2-Pin Thin QFN (derate ꢀꢁ.5mW/°C above +70°C) 2758mW
Operating Temperature Range ...........................-ꢁ0°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+ꢀ00°C
POS_, NEG_, OUT_ to AGND...................-0.ꢀV to (V
+ 0.ꢀV)
SUP
DRVN to AGND...................................(V - ꢀ0V) to (V + 0.ꢀV)
IN
IN
SRC to AGND.........................................................-0.ꢀV to +ꢁ0V
COM, DRN to AGND ................................-0.ꢀV to (V + 0.ꢀV)
SRC
MX8795A
Note 1: See Figure 2 for the op amp clamp structure.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V = ꢀV, V
= V
= 1ꢁV, PGND = AGND = BGND = 0, I
= 25ꢂA, T = 0°C to +85°C. Typical values are at T = +25°C,
REF A A
IN
MAIN
SUP
unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
IN Supply Range
V
(Note 2)
2.5
6.0
V
IN
IN Undervoltage-Lockout
Threshold
V
V
rising, typical hysteresis = 50mV
2.05
2.25
0.6
2
2.ꢁ5
1.0
ꢀ
V
UVLO
IN
V
= V
= 1.ꢀV, V
= 0,
FBN
FB
FBP
LX not switching
IN Quiescent Current
I
mA
IN
V
= 1.2V, V
= 1.ꢁV, V
= 0,
FBN
FB
FBP
LX switching
Duration to Trigger Fault
Condition
FB or FBP below threshold or FBN above
threshold
200
ms
V
T
T
= +25°C to +85°C
= 0°C to +85°C
1.2ꢀ8
1.2ꢀ2
1.250
1.250
1.262
1.266
10
A
REF Output Voltage
No external load
0 < I < 50ꢂA
A
REF Load Regulation
REF Sink Current
mV
ꢂA
LOAD
In regulation
10
REF Undervoltage Lockout
Threshold
Rising edge; typical hysteresis = 160mV
1.15
V
Temperature rising
Hysteresis
+160
15
Thermal Shutdown
°C
MAIN STEP-UP REGULATOR
Output Voltage Range
V
f
V
18
V
kHz
%
MAIN
IN
Operating Frequency
1000
86
1200
90
1ꢁ00
9ꢀ
OSC
Oscillator Maximum Duty Cycle
T
T
= +25°C to +85°C
= 0°C to +85°C
1.221
1.212
1.10
1.2ꢀꢀ
1.2ꢀꢀ
1.1ꢁ
-1
1.2ꢁ5
1.2ꢁ8
1.17
A
FB Regulation Voltage
V
No load
falling
V
FB
A
FB Fault Trip Level
FB Load Regulation
FB Line Regulation
FB Input Bias Current
V
V
%
FB
0 < I
< full load, transient only
MAIN
V
V
= 2.5V to 6V
= 1.2ꢀꢀV
0.1
0.ꢁ
%/V
nA
IN
+100
+200
FB
2
_______________________________________________________________________________________
TFT-LCD DC-DC Converter with
Operational Amplifiers
MX8795A
ELECTRICAL CHARACTERISTICS (continued)
(V = ꢀV, V
= V
= 1ꢁV, PGND = AGND = BGND = 0, I
= 25ꢂA, T = 0°C to +85°C. Typical values are at T = +25°C,
IN
MAIN
SUP
REF A A
unless otherwise noted.)
PARAMETER
FB Transconductance
FB Voltage Gain
SYMBOL
CONDITIONS
MIN
TYP
160
700
160
10
MAX
UNITS
ꢂS
∆I
=
2.5ꢂA
From FB to COMP
= 200mA
75
280
COMP
V/V
mΩ
ꢂA
LX On-Resistance
R
I
LX
260
20
LX(ON)
LX Leakage Current
LX Current Limit
I
LX
V
V
= 19V
LX
FB
I
= 1.2V, duty cycle = 75%
2.5
0.1
ꢀ.0
0.2
1ꢁ
ꢀ.5
0.ꢀ
A
LIM
Current-Sense Transresistance
Soft-Start Period
V/A
ms
t
SS
V
REF
128
/
Soft-Start Step Size
V
OPERATIONAL AMPLIFIERS
SUP Supply Range
V
6.0
18.0
19.9
V
V
SUP
SUP Overvoltage Fault Threshold
18.0
19
Buffer configuration, V
no load
_ = V
/ 2,
POS
SUP
SUP Supply Current
I
ꢀ.5
5.0
mA
SUP
Input Offset Voltage
Input Bias Current
V
(V
(V
_, V
_, V
_) ≅ V
SUP
/ 2
0
0
12
mV
nA
OS
NEG
POS
OUT
I
_ , V
_, V
POS
_) ≅ V / 2
OUT SUP
-50
0
+50
BIAS
NEG
Input Common-Mode Voltage
Range
V
V
V
CM
SUP
Common-Mode Rejection Ratio
Open-Loop Gain
CMRR
0 ≤ (V
_, V _) ≤ V
POS SUP
ꢁ5
80
dB
dB
NEG
125
V
-
V
-
SUP
100
SUP
50
Output Voltage Swing, High
V
I
I
_ = 5mA
_ = -5mA
mV
OH
OUT
Output Voltage Swing, Low
Short-Circuit Current
V
50
100
mV
mA
OL
OUT
To V
/ 2, source or sink
75
60
1ꢀ0
SUP
DC, 6V ≤ V
(V
≤ 18V,
SUP
Power-Supply Rejection Ratio
PSRR
dB
_, V _) ≅ V
POS
/ 2
NEG
SUP
Slew Rate
ꢁ5
20
V/ꢂs
MHz
-ꢀdB Bandwidth
R = 10kΩ, C = 10pF, buffer configuration
L
L
GATE-ON LINEAR-REGULATOR CONTROLLER
FBP Regulation Voltage
FBP Fault Trip Level
V
I
= 100ꢂA
1.2ꢀ1
0.96
-50
1.250
1.00
1.269
1.0ꢁ
+50
V
V
FBP
DRVN
V
V
falling
FBP
FBP
FBP Input Bias Current
I
= 1.25V
nA
FBP
FBP Effective Load-Regulation
Error (Transconductance)
V
= 10V, I
= 50ꢂA to 1mA
-0.7
-1.5
10
%
DRVP
DRVP
FBP Line (IN) Regulation Error
DRVP Sink Current
I
= 100ꢂA, 2.5V < V < 6V
1
5
mV
mA
ꢂA
DRVP
IN
I
V
V
= 1.1V, V
= 1.ꢁV, V
= 10V
= ꢀꢁV
1
DRVP
FBP
FBP
DRVP
DRVP
DRVP Off-Leakage Current
Soft-Start Period
0.01
1ꢁ
10
t
ms
SS
V
128
/
REF
Soft-Start Step Size
V
_______________________________________________________________________________________
3
TFT-LCD DC-DC Converter with
Operational Amplifiers
ELECTRICAL CHARACTERISTICS (continued)
(V = ꢀV, V
= V
= 1ꢁV, PGND = AGND = BGND = 0, I
= 25ꢂA, T = 0°C to +85°C. Typical values are at T = +25°C,
IN
MAIN
SUP
REF A A
unless otherwise noted.)
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
GATE-OFF LINEAR-REGULATOR CONTROLLER
FBN Regulation Voltage
FBN Fault Trip Level
V
I
= 100ꢂA, V
rising
- V
FBN
0.98ꢁ
ꢀ70
1
1.015
ꢁ70
V
FBN
DRVN
REF
V
V
ꢁ20
mV
nA
FBN
FBN
FBN Input Bias Current
I
= 0.25V
-50
+50
FBN
MX8795A
FBN Effective Load-Regulation
Error (Transconductance)
V
= -10V, I
= 50ꢂA to 1mA
11
25
5
mV
DRVN
DRVN
DRVN
FBN Line (IN) Regulation Error
DRVN Source Current
DRVN Off-Leakage Current
Soft-Start Period
I
= 0.1mA, 2.5V < V < 6V
0.7
5
mV
mA
ꢂA
IN
I
V
V
= ꢀ00mV, V = -10V
DRVN
1
DRVN
FBN
FBN
= 0V, V
= -25V
-0.01
1ꢁ
-10
DRVN
t
ms
SS
(V
REF
-
Soft-Start Step Size
V
) /
V
FBN
128
POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES
DEL Capacitor Charge Current
DEL Turn-On Threshold
During startup, V
= 1V
ꢁ
5
6
ꢂA
V
DEL
V
1.19
1.25
1.ꢀ1
TH(DEL)
DEL Discharge Switch
On-Resistance
During UVLO, V = 2.0V
20
Ω
IN
CTL Input Low Voltage
V
V
= 2.5V to 5.5V
= 2.5V to 5.5V
0.6
+1
V
V
IN
IN
CTL Input High Voltage
2
CTL Input Leakage Current
CTL-to-SRC Propagation Delay
SRC Input Voltage Range
CTL = AGND or IN
-1
ꢂA
ns
V
100
ꢀ6
ꢀ00
200
10
V
V
V
= 1.5V, CTL = IN
= 1.5V, CTL = AGND
= 1.5V, CTL = IN
200
115
5
DEL
DEL
DEL
SRC Input Current
I
ꢂA
Ω
SRC
SRC-to-COM Switch On-Resistance
R
SRC(ON)
DRN(ON)
DRN-to-COM Switch
On-Resistance
R
V
= 1.5V, CTL = AGND
ꢀ0
60
Ω
DEL
4
_______________________________________________________________________________________
TFT-LCD DC-DC Converter with
Operational Amplifiers
MX8795A
ELECTRICAL CHARACTERISTICS
(V = ꢀV, V
= V
= 1ꢁV, PGND = AGND = BGND = 0, I
= 25ꢂA, T = -40°C to +85°C, unless otherwise noted.) (Note ꢀ)
REF A
IN
MAIN
SUP
PARAMETER
IN Supply Range
SYMBOL
CONDITIONS
MIN
MAX
UNITS
V
(Note 2)
2.5
6.0
V
IN
IN Undervoltage-Lockout
Threshold
V
V
V
rising, typical hysteresis = 150mV
2.05
2.ꢁ5
1.0
ꢀ
V
UVLO
IN
= V
= 1.ꢀV, V
= 0,
FBN
FB
FBP
LX not switching
IN Quiescent Current
I
mA
IN
V
= 1.2V, V
= 1.ꢁV, V
= 0,
FBN
FB
FBP
LX switching
No external load
Rising edge; typical hysteresis = 160mV
REF Output Voltage
REF Undervoltage Lockout
Threshold
1.218
1.277
1.15
V
V
MAIN STEP-UP REGULATOR
Output Voltage Range
Operating Frequency
FB Regulation Voltage
FB Line Regulation
V
f
V
18
1ꢁ00
1.260
0.ꢁ
V
kHz
V
MAIN
IN
900
OSC
V
No load
= 2.5V to 6V
1.198
FB
V
%/V
ꢂS
mΩ
A
IN
FB Transconductance
LX On-Resistance
∆I
=
2.5ꢂA
75
280
260
ꢀ.5
COMP
R
I
LX
= 200mA
LX(ON)
LX Current Limit
I
V
= 1.2V, duty cycle = 75%
FB
2.5
LIM
OPERATIONAL AMPLIFIERS
SUP Supply Range
V
6
18
V
V
SUP
SUP Overvoltage Fault Threshold
18.0
19.9
Buffer configuration, V
no load
_ = V
/ 2,
POS
SUP
SUP Supply Current
I
5
mA
mV
V
SUP
Input Offset Voltage
V
(V
NEG
_, V _, V _) ≅ V
POS OUT SUP
/ 2
12
OS
Input Common-Mode Voltage
Range
V
V
0
V
SUP
CM
V
-
SUP
100
Output Voltage Swing, High
Output Voltage Swing Low
I
I
_ = 5mA
_ = -5mA
mV
mA
OH
OUT
V
100
OL
OUT
Source
Sink
75
75
Short-Circuit Current
To V
/ 2
SUP
GATE-ON LINEAR-REGULATOR CONTROLLER
FBP Regulation Voltage
V
I
= 100ꢂA
= 10V, I
1.210
1.280
-1.5
10
V
FBP
DRVP
FBP Effective Load-Regulation
Error (Transconductance)
V
= 50ꢂA to 1mA
DRVP
%
DRVP
FBP Line (IN) Regulation Error
DRVP Sink Current
I
= 100ꢂA, 2.5V < V < 6V
mV
mA
DRVP
IN
I
V
= 1.1V, V = 10V
DRVP
1
DRVP
FBP
_______________________________________________________________________________________
5
TFT-LCD DC-DC Converter with
Operational Amplifiers
ELECTRICAL CHARACTERISTICS (continued)
(V = ꢀV, V
= V
= 1ꢁV, PGND = AGND = BGND = 0, I
= 25ꢂA, T = -40°C to +85°C, unless otherwise noted.) (Note ꢀ)
IN
MAIN
SUP
REF A
PARAMETER
SYMBOL
CONDITIONS
MIN
MAX
UNITS
GATE-OFF LINEAR-REGULATOR CONTROLLER
FBN Regulation Voltage
V
I
= 100ꢂA, V
- V
FBN
0.972
1.022
25
V
FBN
DRVN
REF
FBN Effective Load-Regulation
Error (Transconductance)
V
= -10V, I
= 50ꢂA to 1mA
mV
DRVN
DRVN
DRVN
FBN Line (IN) Regulation Error
DRVN Source Current
I
= 0.1mA, 2.5V < V < 6V
5
mV
mA
IN
MX8795A
I
V
= ꢀ00mV, V = -10V
DRVN
1
DRVN
FBN
POSITIVE GATE-DRIVER TIMING AND CONTROL SWITCHES
DEL Capacitor Charge Current
DEL Turn-On Threshold
CTL Input Low Voltage
During startup, V
= 1V
ꢁ
6
ꢂA
V
DEL
V
1.19
1.ꢀ1
0.6
TH(DEL)
V
V
= 2.5V to 5.5V
V
IN
IN
CTL Input High Voltage
SRC Input Voltage Range
= 2.5V to 5.5V
2
V
ꢀ6
ꢀ00
200
10
V
V
V
V
V
= 1.5V, CTL = IN
DEL
DEL
DEL
DEL
SRC Input Current
I
ꢂA
SRC
= 1.5V, CTL = AGND
= 1.5V, CTL = IN
SRC-to-COM Switch On-Resistance
DRN-to-COM Switch On-Resistance
R
Ω
Ω
SRC(ON)
R
= 1.5V, CTL = AGND
60
DRN(ON)
Note 2: For 5.5V < V < 6.0V, use MAX8795A for no longer than 1% of IC lifetime. For continuous operation, input voltage should
IN
not exceed 5.5V.
Note 3: Specifications to -ꢁ0°C are guaranteed by design, not production tested.
Typical Operating Characteristics
(Circuit of Figure 1, V = 5V, V
= 1ꢁV, V
= 25V, V
= -10V, T = +25°C, unless otherwise noted.)
IN
MAIN
GON
GOFF A
STEP-UP SUPPLY CURRENT
vs. SUPPLY VOLTAGE
STEP-UP EFFICIENCY
vs. LOAD CURRENT
SWITCHING FREQUENCY
vs. INPUT VOLTAGE
18
15
12
9
90
1.4
1.3
1.2
1.1
NO LOAD, SUP DISCONNECTED,
R1 = 221kΩ, R2 = 21.5kΩ
85
80
CURRENT INTO INDUCTOR
CURRENT INTO IN PIN
6
75
70
3
V
V
= 5V
= 13.9V
IN
MAIN
0
1.0
2.5
2.5 3.0
3.5 4.0 4.5 5.0 5.5 6.0
SUPPLY VOLTAGE (V)
3.0
3.5
4.0
4.5
5.0
5.5
1
10
100
1000
INPUT VOLTAGE (V)
LOAD CURRENT (mA)
6
_______________________________________________________________________________________
TFT-LCD DC-DC Converter with
Operational Amplifiers
MX8795A
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V = 5V, V
= 1ꢁV, V
= 25V, V
= -10V, T = +25°C, unless otherwise noted.)
IN
MAIN
GON
GOFF A
STEP-UP REGULATOR PULSED
LOAD-TRANSIENT RESPONSE
STEP-UP REGULATOR SOFT-START
(HEAVY LOAD)
TIMER-DELAYED OVERLOAD PROTECTION
MAX8795A toc05
MAX8795A toc06
MAX8795A toc04
A
A
50mA
A
0V
B
13.9V
B
0V
C
B
0A
0U
C
0A
0A
10µs/div
A: LOAD CURRENT, 1A/div
B: V , 200mV/div, AC-COUPLED
40ms/div
2ms/div
A: V
, 2V/div
MAIN
A: V , 5V/div
IN
B: INDUCTOR CURRENT, 1A/div
MAIN
B: V
, 5V/div
MAIN
C: INDUCTOR CURRENT, 1A/div
C: INDUCTOR CURRENT, 1A/div
REF VOLTAGE LOAD REGULATION
GATE-ON REGULATOR LOAD REGULATION
GATE-ON REGULATOR LINE REGULATION
1.2500
1.2495
1.2490
1.2485
1.2480
1.2475
1.2470
0
-0.1
-0.3
-0.5
-0.2
-0.4
-0.6
-0.8
I
200mA
I
= 20mA
BOOST =
15
POS
0
10
20
30
40
50
0
5
10
20
25
26
27
28
29
30
LOAD CURRENT (µA)
LOAD CURRENT (mA)
INPUT VOLTAGE (V)
_______________________________________________________________________________________
7
TFT-LCD DC-DC Converter with
Operational Amplifiers
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V = 5V, V
= 1ꢁV, V
= 25V, V
= -10V, T = +25°C, unless otherwise noted.)
IN
MAIN
GON
GOFF A
GATE-OFF REGULATOR LOAD REGULATION
GATE-OFF REGULATOR LINE REGULATION
POWER-UP SEQUENCE
MAX8795A toc12
0.2
0
0.4
0.2
0
A
0V
B
-0.2
-0.4
-0.6
-0.8
-1.0
-0.2
MX8795A
0V
0V
-0.4
-0.6
C
D
-0.8
-1.0
I
= 50mA
I
= 0mA
40
NEG
BOOST
0V
0
10
20
30
50
-16
-14
-12
-10
4ms/div
A: V
, 10V/div
C: V , 10V/div
NEG
LOAD CURRENT (mA)
MAIN
POS
INPUT VOLTAGE (V)
B: V , 20V/div
D: V
, 20V/div
COM
OPERATIONAL-AMPLIFIER
SUP SUPPLY CURRENT
vs. SUP VOLTAGE
RAIL-TO-RAIL INPUT/OUTPUT
MAX8795A toc14
3.6
3.5
3.4
3.3
3.2
3.1
3.0
V
SUP
= 15V
A
0V
B
2.9
2.8
0V
6
8
10
12
(V)
14
16
18
4µs/div
A: INPUT SIGNAL, 5V/div
B: OUTPUT SIGNAL, 5V/div
V
SUP
8
_______________________________________________________________________________________
TFT-LCD DC-DC Converter with
Operational Amplifiers
MX8795A
Typical Operating Characteristics (continued)
(Circuit of Figure 1, V = 5V, V
= 1ꢁV, V
= 25V, V
= -10V, T = +25°C, unless otherwise noted.)
IN
MAIN
GON
GOFF A
OPERATIONAL-AMPLIFIER
LOAD-TRANSIENT RESPONSE
OPERATIONAL-AMPLIFIER
LARGE-SIGNAL RESPONSE
OPERATIONAL-AMPLIFIER
SMALL-SIGNAL RESPONSE
MAX8795A toc15
MAX8795A toc16
MAX8795A toc17
V
= 15V
SUP
A
0V
A
A
0V
0V
B
+50mA
B
0mA
B
-50mA
0V
0V
400ns/div
1µs/div
A: INPUT SIGNAL, 5V/div
B: OUTPUT SIGNAL, 5V/div
400ns/div
A: OUTPUT VOLTAGE, 1V/div, AC-COUPLED
B: OUTPUT CURRENT, 50mA/div
A: INPUT SIGNAL, 100mV/div
B: OUTPUT SIGNAL, 100mV/div
Pin Description
PIN
1
NAME
SRC
FUNCTION
Switch Input. Source of the internal high-voltage p-channel MOSFET. Bypass SRC to PGND with a
minimum 0.1ꢂF capacitor close to the pins.
2
REF
Reference Bypass Terminal. Bypass REF to AGND with a minimum of 0.22ꢂF close to the pins.
Analog Ground for Step-Up Regulator and Linear Regulators. Connect to power ground (PGND)
underneath the IC.
ꢀ
AGND
Power Ground. PGND is the source of the main step-up n-channel power MOSFET. Connect PGND to
the output-capacitor ground terminals through a short, wide PCB trace. Connect to analog ground
(AGND) underneath the IC.
ꢁ
PGND
5
6
OUT1
NEG1
POS1
OUT2
NEG2
POS2
BGND
POSꢀ
OUTꢀ
Operational-Amplifier 1 Output
Operational-Amplifier 1 Inverting Input
7
Operational-Amplifier 1 Noninverting Input
Operational-Amplifier 2 Output
8
9
Operational-Amplifier 2 Inverting Input
10
11
12
1ꢀ
Operational-Amplifier 2 Noninverting Input
Analog Ground for Operational Amplifiers. Connect to power ground (PGND) underneath the IC.
Operational-Amplifier ꢀ Noninverting Input
Operational-Amplifier ꢀ Output
Operational-Amplifier Power Input. Positive supply rail for the operational amplifiers. Typically
1ꢁ
SUP
connected to V
. Bypass SUP to BGND with a 0.1ꢂF capacitor.
MAIN
15
16
POSꢁ
NEGꢁ
Operational-Amplifier ꢁ Noninverting Input
Operational-Amplifier ꢁ Inverting Input
_______________________________________________________________________________________
9
TFT-LCD DC-DC Converter with
Operational Amplifiers
Pin Description (continued)
PIN
17
NAME
OUTꢁ
POS5
NEG5
OUT5
FUNCTION
Operational-Amplifier ꢁ Output
18
19
20
Operational-Amplifier 5 Noninverting Input
Operational-Amplifier 5 Inverting Input
Operational-Amplifier 5 Output
n-Channel Power MOSFET Drain and Switching Node. Connect the inductor and Schottky diode to LX
and minimize the trace area for lowest EMI.
21
22
2ꢀ
LX
IN
MX8795A
Supply Voltage Input. IN can range from 2.5V to 6V.
Step-Up Regulator Feedback Input. Regulates to 1.2ꢀꢀV (nominal). Connect a resistive voltage-divider
FB
from the output (V
) to FB to analog ground (AGND). Place the divider within 5mm of FB.
MAIN
Step-Up Regulator Error-Amplifier Compensation Point. Connect a series RC from COMP to AGND.
See the Loop Compensation section for component selection guidelines.
2ꢁ
25
26
27
COMP
FBP
Gate-On Linear-Regulator Feedback Input. FBP regulates to 1.25V (nominal). Connect FBP to the
center of a resistive voltage-divider between the regulator output and AGND to set the gate-on linear-
regulator output voltage. Place the resistive voltage-divider within 5mm of FBP.
Gate-On Linear-Regulator Base Drive. Open drain of an internal n-channel MOSFET. Connect DRVP to
the base of an external pnp pass transistor. See the Pass-Transistor Selection section.
DRVP
FBN
Gate-Off Linear-Regulator Feedback Input. FBN regulates to 250mV (nominal). Connect FBN to the
center of a resistive voltage-divider between the regulator output and REF to set the gate-off linear-
regulator output voltage. Place the resistive voltage-divider within 5mm of FBN.
Gate-Off Linear-Regulator Base Drive. Open drain of an internal p-channel MOSFET. Connect DRVN to
the base of an external npn pass transistor. See the Pass-Transistor Selection section.
28
29
DRVN
DEL
High-Voltage Switch Delay Input. Connect a capacitor from DEL to AGND to set the high-voltage
switch startup delay.
High-Voltage Switch Control Input. When CTL is high, the high-voltage switch between COM and SRC
is on and the high-voltage switch between COM and DRN is off. When CTL is low, the high-voltage
switch between COM and SRC is off and the high-voltage switch between COM and DRN is on. CTL is
inhibited by the undervoltage lockout or when the voltage on DEL is less than 1.25V.
ꢀ0
CTL
ꢀ1
ꢀ2
—
DRN
COM
EP
Switch Input. Drain of the internal high-voltage back-to-back p-channel MOSFETs connected to COM.
Internal High-Voltage MOSFET Switch Common Terminal. Do not allow the voltage on COM to exceed
V
.
SRC
Exposed Back Paddle. Connect to AGND.
10 ______________________________________________________________________________________
TFT-LCD DC-DC Converter with
Operational Amplifiers
MX8795A
-10V gate-driver supplies. The input voltage range for the
Typical Operating Circuit
The MAX8795A typical operating circuit (Figure 1) is a
complete power-supply system for TFT LCDs. The circuit
generates a +1ꢁV source-driver supply and +25V and
IC is from +2.5V to +5.5V. The listed load currents in
Figure 1 are available from a +ꢁ.5V to +5.5V supply.
Table 1 lists some recommended components, and Table
2 lists the contact information of component suppliers.
LX
D1
L1
3.0µH
V
V
IN
4.5V TO 5.5V
MAIN
14V/500mA
C2
22µF
C1
22µF
R1
R10
10Ω
LX
LX
137kΩ
C3
0.1µF
1%
IN
FB
C13
0.1µF
R2
13.3kΩ
1%
C4
0.1µF
D2
180kΩ
AGND
PGND
LX
COMP
C14
68pF
C12
220µF
C11
0.1µF
R9
6.8kΩ
R3
6.8kΩ
C10
0.1µF
MAX8795A
D3
DRVP
FBP
Q1
DRVN
FBN
Q2
R7
324kΩ
1%
R4
191kΩ
1%
V
GOFF
-10V/50mA
R5
10.0kΩ
1%
C5
0.47µF
C9
0.22µF
R8
31.6kΩ
1%
SRC
V
GON
REF
COM
25V/20mA
C8
0.22µF
DRN
R6
1kΩ
CTL
SUP
DEL
C7
0.033µF
C6
0.1µF
BGND
NEG1
R19
100kΩ
R17
100kΩ
R15
100kΩ
R13
100kΩ
R11
100kΩ
OUT1
NEG2
POS1
OUT2
POS2
POS3
POS4
POS5
OUT3
NEG4
OUT4
TO VCOM
BACKPLANE
R12
100kΩ
R14
100kΩ
R16
100kΩ
NEG5
OUT5
R18
100kΩ
R20
100kΩ
EP
Figure 1. Typical Operating Circuit
Table 1. Component List
DESIGNATION
DESCRIPTION
DESIGNATION
DESCRIPTION
22ꢂF, 6.ꢀV X5R ceramic capacitor (1210)
TDK Cꢀ225X5R0J227M
ꢀ.0ꢂH, ꢀA inductor
Sumida CDRH6D28-ꢀR0
C1
L1
22ꢂF, 16V X5R ceramic capacitor (1812)
TDK Cꢁ5ꢀ2X5X1C226M
200mA, ꢁ0V pnp bipolar transistor (SOT2ꢀ)
Fairchild MMBTꢀ906
C2
D1
Q1
Q2
ꢀA, ꢀ0V Schottky diode (M-flat)
Toshiba CMS02
200mA, ꢁ0V npn bipolar transistor (SOT2ꢀ)
Fairchild MMBTꢀ90ꢁ
200mA, 100V, dual ultra-fast diodes (SOT2ꢀ)
Fairchild MMBDꢁ1ꢁ8SE
D2, Dꢀ
______________________________________________________________________________________ 11
TFT-LCD DC-DC Converter with
Operational Amplifiers
Table 2. Component Suppliers
SUPPLIER
PHONE
FAX
WEBSITE
www.fairchildsemi.com
Fairchild
ꢁ08-822-2000
8ꢁ7-5ꢁ5-6700
8ꢁ7-80ꢀ-6100
9ꢁ9-ꢁ55-2000
ꢁ08-822-2102
8ꢁ7-5ꢁ5-6720
8ꢁ7-ꢀ90-ꢁꢁ05
9ꢁ9-859-ꢀ96ꢀ
Sumida
TDK
www.sumida.com
www.component.tdk.com
www.toshiba.com/taec
Toshiba
Detailed Description
V
CN
V
CP
The MAX8795A contains a high-performance step-up
switching regulator, two low-cost linear-regulator con-
trollers, multiple high-current operational amplifiers,
and startup timing and level-shifting functionality useful
for active-matrix TFT LCDs. Figure 2 shows the
MAX8795A functional diagram.
MX8795A
V
IN
V
MAIN
LX
FB
IN
STEP-UP
CONTROLLER
Main Step-Up Regulator
The main step-up regulator employs a current-mode,
fixed-frequency PWM architecture to maximize loop
bandwidth and provide fast transient response to
pulsed loads typical of TFT-LCD panel source drivers.
The 1.2MHz switching frequency allows the use of low-
profile inductors and ceramic capacitors to minimize
the thickness of LCD panel designs. The integrated
high-efficiency MOSFET and the IC’s built-in digital
soft-start functions reduce the number of external com-
ponents required while controlling inrush currents. The
PGND
AGND
COMP
V
V
CP
MAX8795A
DRVP
FBP
GATE-ON
CONTROLLER
GON
SRC
COM
DRN
DEL
CTL
SWITCH
CONTROL
output voltage can be set from V to 18V with an exter-
IN
nal resistive voltage-divider.
V
V
CN
The regulator controls the output voltage and the power
delivered to the output by modulating the duty cycle (D)
of the internal power MOSFET in each switching cycle.
The duty cycle of the MOSFET is approximated by:
DRVN
FBN
GATE-OFF
CONTROLLER
GOFF
SUP
NEG1
V
− V
IN
MAIN
V
D ≈
MAIN
OUT1
OP1
OP2
Figure ꢀ shows the functional diagram of the step-up
regulator. An error amplifier compares the signal at FB
to 1.2ꢀꢀV and changes the COMP output. The voltage
at COMP sets the peak inductor current. As the load
varies, the error amplifier sources or sinks current to the
COMP output accordingly to produce the inductor peak
current necessary to service the load. To maintain sta-
bility at high duty cycles, a slope-compensation signal
is summed with the current-sense signal.
REF
POS1
NEG2
REF
NEG4
OUT2
POS2
OUT4
OP4
POS4
NEG5
OUT3
POS3
OUT5
POS5
OP3
OP5
On the rising edge of the internal clock, the controller sets
a flip-flop, turning on the n-channel MOSFET and applying
the input voltage across the inductor. The current through
the inductor ramps up linearly, storing energy in its
magnetic field. Once the sum of the current-feedback
signal and the slope compensation exceeds the COMP
BGND
EP
Figure 2. MAX8795A Functional Diagram
12 ______________________________________________________________________________________
TFT-LCD DC-DC Converter with
Operational Amplifiers
MX8795A
FROM CHARGE-PUMP
V
MAIN
LX
OUTPUT
RESET DOMINANT
S
CLOCK
pnp PASS
TRANSISTOR
DRVP
PGND
R
Q
npn CASCODE
TRANSISTOR
ILIM
COMPARATOR
V
GON
MAX8795A
SOFT-
START
V
LIMIT
FBP
SLOPE COMP
PWM
COMPARATOR
CURRENT
SENSE
Σ
Figure ꢁ. Using Cascoded npn for Charge-Pump Output
Voltages > ꢀ6V
OSCILLATOR
FAULT
COMPARATOR
LX
0.1µF
TO FAULT LATCH
V
MAIN
14V
ERROR AMP
1.14V
FB
0.1µF
68pF
1.233V
COMP
6.8kΩ
DRVP
Q1
V
GON
35V
Figure ꢀ. Step-Up Regulator Functional Diagram
MAX8795A
voltage, the controller resets the flip-flop and turns off
the MOSFET. Since the inductor current is continuous,
a transverse potential develops across the inductor that
turns on the diode (D1). The voltage across the induc-
tor then becomes the difference between the output
voltage and the input voltage. This discharge condition
forces the current through the inductor to ramp back
down, transferring the energy stored in the magnetic
field to the output capacitor and the load. The MOSFET
remains off for the rest of the clock cycle.
0.47µF
0.22µF
274kΩ
1%
47pF
FBP
10.2kΩ
1%
150pF
Figure 5. The linear regulator controls the intermediate charge-
pump stage.
Gate-On Linear-Regulator Controller, REG P
The gate-on linear-regulator controller (REG P) is an
analog gain block with an open-drain n-channel output.
It drives an external pnp pass transistor with a 6.8kΩ
base-to-emitter resistor (Figure 1). Its guaranteed base-
drive sink current is at least 1mA. The regulator including
Q1 in Figure 1 uses a 0.ꢁ7ꢂF ceramic output capacitor
and is designed to deliver 20mA at 25V. Other output
voltages and currents are possible with the proper pass
transistor and output capacitor. See the Pass-Transistor
Selection and Stability Requirements sections.
REG P is typically used to provide the TFT-LCD gate
drivers’ gate-on voltage. Use a charge pump with as
many stages as necessary to obtain a voltage exceed-
ing the required gate-on voltage (see the Selecting the
Number of Charge-Pump Stages section). Note the
voltage rating of DRVP is ꢀ6V. If the charge-pump out-
put voltage can exceed ꢀ6V, an external cascode npn
transistor should be added as shown in Figure ꢁ.
Alternately, the linear regulator can control an interme-
diate charge-pump stage while regulating the final
charge-pump output (Figure 5).
______________________________________________________________________________________ 13
TFT-LCD DC-DC Converter with
Operational Amplifiers
REG P is enabled after the REF voltage exceeds 1.0V.
Each time it is enabled, the controller goes through a
soft-start routine that ramps up its internal reference
DAC in 128 steps.
As the operational amplifier’s capacitive load increases,
the amplifier’s bandwidth decreases and gain peaking
increases. A 5Ω to 50Ω small resistor placed between
OUT_ and the capacitive load reduces peaking, but also
reduces the gain. An alternative method of reducing
peaking is to place a series RC network (snubber) in par-
allel with the capacitive load. The RC network does not
continuously load the output or reduce the gain. Typical
values of the resistor are between 100Ω and 200Ω, and
the typical value of the capacitor is 10nF.
Gate-Off Linear-Regulator Controller, REG N
The gate-off linear-regulator controller (REG N) is an
analog gain block with an open-drain p-channel output.
It drives an external npn pass transistor with a 6.8kΩ
base-to-emitter resistor (Figure 1). Its guaranteed base-
drive source current is at least 1mA. The regulator
including Q2 in Figure 1 uses a 0.ꢁ7ꢂF ceramic output
capacitor and is designed to deliver 50mA at -10V. Other
output voltages and currents are possible with the proper
pass transistor and output capacitor (see the Pass-
Transistor Selection and Stability Requirements sections).
MX8795A
Undervoltage Lockout (UVLO)
The UVLO circuit compares the input voltage at IN with
the UVLO threshold (2.25V rising, 2.20V falling, typ) to
ensure the input voltage is high enough for reliable
operation. The 50mV (typ) hysteresis prevents supply
transients from causing a restart. Once the input voltage
exceeds the UVLO rising threshold, startup begins.
When the input voltage falls below the UVLO falling
threshold, the controller turns off the main step-up regu-
lator, turns off the linear-regulator outputs, and disables
the switch control block; the operational-amplifier out-
puts are high impedance.
REG N is typically used to provide the TFT-LCD gate
drivers’ gate-off voltage. A negative voltage can be
produced using a charge-pump circuit as shown in
Figure 1. REG N is enabled after the voltage on REF
exceeds 1.0V. Each time it is enabled, the control goes
through a soft-start routine that ramps down its internal
reference DAC from V
to 250mV in 128 steps.
REF
Reference Voltage (REF)
The reference output is nominally 1.25V and can
source at least 50ꢂA (see the Typical Operating
Characteristics). Bypass REF with a 0.22ꢂF ceramic
capacitor connected between REF and AGND.
Operational Amplifiers
The MAX8795A has five operational amplifiers. The opera-
tional amplifiers are typically used to drive the LCD back-
plane (VCOM) or the gamma-correction divider string.
They feature 1ꢀ0mA output short-circuit current, ꢁ5V/ꢂs
slew rate, and 20MHz/ꢀdB bandwidth. The rail-to-rail input
and output capability maximizes system flexibility.
Power-Up Sequence and Soft-Start
Once the voltage on IN exceeds approximately 2.25V,
the reference turns on. With a 0.22ꢂF REF bypass
capacitor, the reference reaches its regulation voltage
of 1.25V in approximately 1ms. When the reference
voltage exceeds 1.0V, the IC enables the main step-up
regulator, the gate-on linear-regulator controller, and
the gate-off linear-regulator controller simultaneously.
Short-Circuit Current Limit and Input Clamp
The operational amplifiers limit short-circuit current to
approximately 1ꢀ0mA if the output is directly shorted to
SUP or to BGND. If the short-circuit condition persists, the
junction temperature of the IC rises until it reaches the
thermal-shutdown threshold (+160°C typ). Once the junc-
tion temperature reaches the thermal-shutdown threshold,
an internal thermal sensor immediately sets the thermal
fault latch, shutting off all the IC’s outputs. The device
remains inactive until the input voltage is cycled.
The IC employs soft-start for each regulator to minimize
inrush current and voltage overshoot and to ensure a
well-defined startup behavior. Each output uses a 7-bit
soft-start DAC. For the step-up and the gate-on linear
regulator, the DAC output is stepped in 128 steps from
zero up to the reference voltage. For the gate-off linear
regulator, the DAC output steps from the reference
down to 250mV in 128 steps. The soft-start duration is
1ꢁms (typ) for all three regulators.
The operational amplifiers have ꢁV input clamp structures
in series with a 500Ω resistance and a diode (Figure 2).
Driving Pure Capacitive Load
The operational amplifiers are typically used to drive
the LCD backplane (VCOM) or the gamma-correction
divider string. The LCD backplane consists of a distrib-
uted series capacitance and resistance, a load that can
be easily driven by the operational amplifier. However,
if the operational amplifier is used in an application with
a pure capacitive load, steps must be taken to ensure
stable operation.
A capacitor (C
) from DEL to AGND determines the
DEL
switch-control-block startup delay. After the input volt-
age exceeds the UVLO threshold (2.25V typ) and the
soft-start routine for each regulator is complete and
there is no fault detected, a 5ꢂA current source starts
charging C
. Once the capacitor voltage exceeds
DEL
14 ______________________________________________________________________________________
TFT-LCD DC-DC Converter with
Operational Amplifiers
MX8795A
1.25V (typ), the switch-control block is enabled as
shown in Figure 6. After the switch-control block is
enabled, COM can be connected to SRC or DRN
through the internal p-channel switches, depending
upon the state of CTL. Before startup and when IN is
V
V
V
IN
2.25V
REF
MAIN
1.05V
less than V
, DEL is internally connected to AGND
DEL
UVLO
to discharge C
. Select C
to set the delay time
DEL
using the following equation:
5µA
1.25V
C
=DELAY_TIME×
V
GON
DEL
Switch-Control Block
The switch-control input (CTL) is not activated until all
four of the following conditions are satisfied: the input
V
GOFF
V
DEL
12ms
voltage exceeds V
, the soft-start routine of all the
1.25V
SWITCH
CONTROL
ENABLED
UVLO
regulators is complete, there is no fault condition detect-
ed, and V exceeds its turn-on threshold. Once acti-
INPUT SOFT- SOFT-
VOLTAGE START START
DEL
vated and if CTL is high, the 5Ω internal p-channel
switch (Q1) between COM and SRC turns on and the
ꢀ0Ω p-channel switch (Q2) between DRN and COM
turns off. If CTL is low, Q1 turns off and Q2 turns on.
OK
BEGINS ENDS
Figure 6. Power-Up Sequence
IN
MAX8795A
5µA
2.25V
FB OK
FBP OK
FBN OK
SRC
Q1
DEL
REF
COM
Q2
CTL
DRN
Figure 7. Switch-Control Block
______________________________________________________________________________________ 15
TFT-LCD DC-DC Converter with
Operational Amplifiers
The equations used here include a constant LIR, which
Fault Protection
During steady-state operation, if the output of the main
regulator or any of the linear-regulator outputs does not
exceed its respective fault-detection threshold, the
MAX8795A activates an internal fault timer. If any con-
dition or combination of conditions indicates a continu-
ous fault for the fault-timer duration (200ms typ), the
MAX8795A sets the fault latch to shut down all the out-
puts except the reference. Once the fault condition is
removed, cycle the input voltage (below the UVLO
falling threshold) to clear the fault latch and reactivate
the device. The fault-detection circuit is disabled during
the soft-start time.
is the ratio of the inductor peak-to-peak ripple current
to the average DC inductor current at the full load cur-
rent. The best trade-off between inductor size and cir-
cuit efficiency for step-up regulators generally has an
LIR between 0.ꢀ and 0.6. However, depending on the
AC characteristics of the inductor core material and
ratio of inductor resistance to other power-path resis-
tances, the best LIR can shift up or down. If the induc-
tor resistance is relatively high, more ripple can be
accepted to reduce the number of turns required and
increase the wire diameter. If the inductor resistance is
relatively low, increasing inductance to lower the peak
current can decrease losses throughout the power
path. If extremely thin high-resistance inductors are
used, as is common for LCD-panel applications, the
best LIR can increase to between 0.5 and 1.0.
MX8795A
Thermal-Overload Protection
Thermal-overload protection prevents excessive power
dissipation from overheating the MAX8795A. When the
junction temperature exceeds +160°C, a thermal sen-
sor immediately activates the fault protection, which
shuts down all outputs except the reference, allowing
the device to cool down. Once the device cools down
by approximately 15°C, cycle the input voltage (below
the UVLO falling threshold) to clear the fault latch and
reactivate the device.
Once a physical inductor is chosen, higher and lower
values of the inductor should be evaluated for efficien-
cy improvements in typical operating regions.
Calculate the approximate inductor value using the typ-
ical input voltage (V ), the maximum output current
IN
(I
), the expected efficiency (η ) taken from
TYP
MAIN(MAX)
an appropriate curve in the Typical Operating
Characteristics section, and an estimate of LIR based
on the above discussion:
The thermal-overload protection protects the controller
in the event of fault conditions. For continuous opera-
tion, do not exceed the absolute maximum junction
temperature rating of +150°C.
2
⎛
⎜
⎞
⎟
η
TYP
LIR
⎛
⎞
⎟
V
V
− V
× f
⎛
⎞
IN
MAIN IN
L =
⎜
⎝
⎟
⎠
⎜
V
I
Design Procedure
⎝
⎠
MAIN ⎝ MAIN(MAX) OSC ⎠
Main Step-Up Regulator
Choose an available inductor value from an appropriate
inductor family. Calculate the maximum DC input cur-
Inductor Selection
The minimum inductance value, peak current rating,
and series resistance are factors to consider when
selecting the inductor. These factors influence the con-
verter’s efficiency, maximum output load capability,
transient-response time, and output voltage ripple. Size
and cost are also important factors to consider.
rent at the minimum input voltage (V
) using con-
IN(MIN)
servation of energy and the expected efficiency at that
operating point (η ) taken from the appropriate curve
MIN
in the Typical Operating Characteristics:
I
× V
MAIN(MAX)
MAIN
I
=
IN(DC,MAX)
V
× η
MIN
IN(MIN)
The maximum output current, input voltage, output volt-
age, and switching frequency determine the inductor
value. Very high inductance values minimize the cur-
rent ripple, and therefore, reduce the peak current,
which decreases core losses in the inductor and con-
duction losses in the entire power path. However, large
inductor values also require more energy storage and
more turns of wire, which increase size and can
increase conduction losses in the inductor. Low induc-
tance values decrease the size, but increase the cur-
rent ripple and peak current. Finding the best inductor
involves choosing the best compromise between circuit
efficiency, inductor size, and cost.
Calculate the ripple current at that operating point and
the peak current required for the inductor:
V
×(V
− V
)
IN(MIN)
MAIN
IN(MIN)
I
=
RIPPLE
L × V
× f
MAIN OSC
I
RIPPLE
I
=I
+
PEAK IN(DC,MAX)
2
The inductor’s saturation current rating and the
MAX8795A’s LX current limit (I ) should exceed I
,
PEAK
LIM
and the inductor’s DC current rating should exceed
. For good efficiency, choose an inductor with
I
IN(DC,MAX)
less than 0.1Ω series resistance.
16 ______________________________________________________________________________________
TFT-LCD DC-DC Converter with
Operational Amplifiers
MX8795A
Considering the typical operating circuit, the maximum
load current (I ) is 500mA with a 1ꢁV output and
a typical input voltage of 5V. Choosing an LIR of 0.5 and
estimating efficiency of 85% at this operating point:
since the step-up regulator often runs directly from the
output of another regulated supply. Typically, C can
IN
MAIN(MAX)
be reduced below the values used in the typical applica-
tions circuit. Ensure a low-noise supply at IN by using
adequate C . Alternately, greater voltage variation can
IN
2
5V
1ꢁV
1ꢁV − 5V
0.5A ×1.2MHz 0.5
0.85
⎛
⎞ ⎛
⎞⎛
⎞
be tolerated on C if IN is decoupled from C using an
IN
IN
L =
≈ ꢀ.ꢀµH
⎜
⎝
⎟ ⎜
⎟⎜
⎠⎝
⎟
⎠
⎠ ⎝
RC lowpass filter (see R10 and C1ꢀ in Figure 1).
Using the circuit’s minimum input voltage (ꢁ.5V) and
estimating efficiency of 80% at that operating point:
Rectifier Diode
The MAX8795A’s high switching frequency demands a
high-speed rectifier. Schottky diodes are recommended
for most applications because of their fast recovery time
and low forward voltage. In general, a 2A Schottky
diode complements the internal MOSFET well.
0.5A ×1ꢁV
ꢁ.5V × 0.8
I
=
≈1.9ꢁA
IN(DC,MAX)
The ripple current and the peak current are:
ꢁ.5V ×(1ꢁV − ꢁ.5V)
ꢀ.ꢀµH×1ꢁV ×1.2MHz
Output-Voltage Selection
The output voltage of the main step-up regulator can be
adjusted by connecting a resistive voltage-divider from the
I
I
=
≈ 0.77A
RIPPLE
0.77A
2
=1.9ꢁA +
≈ 2.ꢀꢀA
PEAK
output (V
) to AGND with the center tap connected to
MAIN
FB (see Figure 1). Select R2 in the 10kΩ to 50kΩ range.
Calculate R1 with the following equation:
Output-Capacitor Selection
The total output voltage ripple has two components: the
capacitive ripple caused by the charging and discharging
of the output capacitance, and the ohmic ripple due to the
capacitor’s equivalent series resistance (ESR):
⎛
⎞
V
V
MAIN
R1=R2×
−1
⎟
⎜
⎝
⎠
FB
where V , the step-up regulator’s feedback set point,
FB
is 1.2ꢀꢀV. Place R1 and R2 close to the IC.
V
= V
+ V
RIPPLE(C) RIPPLE(ESR)
RIPPLE
⎛
⎞
I
C
V
V
− V
IN
MAIN
MAIN
Loop Compensation
V
≈
RIPPLE(C)
⎜
⎟
f
⎝
⎠
Choose R to set the high-frequency integrator
COMP
OUT
MAIN OSC
gain for fast transient response. Choose C
the integrator zero to maintain loop stability.
to set
and:
COMP
V
≈I
R
RIPPLE(ESR) PEAK ESR(COUT)
For low-ESR output capacitors, use the following equa-
tions to obtain stable performance and good transient
response:
where I
is the RIPPLE inductor current (see the
RIPPLE
Inductor Selection section). For ceramic capacitors, the
output voltage ripple is typically dominated by
V
. The voltage rating and temperature charac-
RIPPLE(C)
25ꢀ× V × V
×C
OUT
IN
OUT
R
≈
≈
COMP
teristics of the output capacitor must also be considered.
L ×I
MAIN(MAX)
Input-Capacitor Selection
V
×C
OUT
OUT
C
COMP
The input capacitor (C ) reduces the current peaks
IN
10×I
×R
MAIN(MAX)
COMP
drawn from the input supply and reduces noise injection
into the IC. A 22ꢂF ceramic capacitor is used in the typi-
cal applications circuit (Figure 1) because of the high
source impedance seen in typical lab setups. Actual
applications usually have much lower source impedance
To further optimize transient response, vary R
in
COMP
20% steps and C
in 50% steps while observing
COMP
transient-response waveforms.
______________________________________________________________________________________ 17
TFT-LCD DC-DC Converter with
Operational Amplifiers
The number of positive charge-pump stages is given by:
Charge Pumps
Selecting the Number of Charge-Pump Stages
For highest efficiency, always choose the lowest num-
ber of charge-pump stages that meet the output
requirement. Figures 8 and 9 show the positive and
negative charge-pump output voltages for a given
V
+ V
− V
−2× V
D
GON
DROPOUT MAIN
n
=
POS
V
MAIN
where n
is the number of positive charge-pump
is the gate-on linear-regulator REG P out-
is the main step-up regulator output, V is
POS
GON
MAIN
stages, V
V
for one-, two-, and three-stage charge pumps.
MAIN
put, V
D
the forward-voltage drop of the charge-pump diode,
and V is the dropout margin for the linear reg-
DROPOUT
ulator. Use V
MX8795A
POSITIVE CHARGE-PUMP
= 0.ꢀV.
DROPOUT
OUTPUT VOLTAGE vs. V
MAIN
The number of negative charge-pump stages is given by:
60
50
40
30
20
10
0
3-STAGE CHARGE PUMP
V
D
= 0.3V TO 1V
−V + V
GOFF
DROPOUT
n
=
NEG
V
−2× V
MAIN
D
where n
is the number of negative charge-pump
NEG
stages, V
2-STAGE CHARGE PUMP
is the gate-off linear-regulator REG N
GOFF
MAIN
output, V
is the main step-up regulator output, V
D
is the forward-voltage drop of the charge-pump diode,
and V is the dropout margin for the linear reg-
DROPOUT
ulator. Use V
= 0.ꢀV.
DROPOUT
1-STAGE CHARGE PUMP
The above equations are derived based on the
assumption that the first stage of the positive charge
2
4
6
8
10
12
14
pump is connected to V
and the first stage of the
MAIN
V
(V)
MAIN
negative charge pump is connected to ground.
Sometimes fractional stages are more desirable for bet-
ter efficiency. This can be done by connecting the first
Figure 8. Positive Charge-Pump Output Voltage vs. V
MAIN
stage to V or another available supply. If the first
charge-pump stage is powered from V , the above
IN
IN
equations become:
NEGATIVE CHARGE-PUMP
V
+ V
+ V
OUTPUT VOLTAGE vs. V
MAIN
GON
DROPOUT IN
n
=
=
POS
-0
-5
V
−2× V
D
MAIN
1-STAGE
CHARGE PUMP
−V
+ V
+ V
GOFF
DROPOUT IN
n
NEG
-10
-15
-20
-25
-30
-35
-40
-45
V
−2× V
D
MAIN
Flying Capacitors
2-STAGE
CHARGE PUMP
Increasing the flying-capacitor (C ) value lowers the
X
effective source impedance and increases the output-
current capability. Increasing the capacitance indefinitely
has a negligible effect on output-current capability
because the internal switch resistance and the diode
impedance place a lower limit on the source imped-
ance. A 0.1ꢂF ceramic capacitor works well in most
low-current applications. The flying capacitor’s voltage
rating must exceed the following:
3-STAGE
CHARGE PUMP
V
D
= 0.3V TO 1V
2
4
6
8
10
12
14
V
(V)
MAIN
Figure 9. Negative Charge-Pump Output Voltage vs. V
MAIN
V
> n× V
MAIN
CX
18 ______________________________________________________________________________________
TFT-LCD DC-DC Converter with
Operational Amplifiers
MX8795A
where n is the stage number in which the flying capaci-
tor appears, and V is the output voltage of the
Pass-Transistor Selection
The pass transistor must meet specifications for current
MAIN
main step-up regulator.
gain (h ), input capacitance, collector-emitter saturation
FE
voltage, and power dissipation. The transistor’s current
gain limits the guaranteed maximum output current to:
Charge-Pump Output Capacitor
Increasing the output capacitance or decreasing the
ESR reduces the output ripple voltage and the peak-to-
peak transient voltage. With ceramic capacitors, the
output voltage ripple is dominated by the capacitance
value. Use the following equation to approximate the
required capacitor value:
⎛
⎞
V
BE
I
= I
−
×h
FE(MIN)
LOAD(MAX)
DRV
⎜
⎟
R
⎝
⎠
BE
where I
is the minimum guaranteed base-drive cur-
DRV
rent, V is the transistor’s base-to-emitter forward volt-
BE
age drop, and R
is the pullup resistor connected
BE
I
LOAD_CP
C
≥
between the transistor’s base and emitter. Furthermore,
the transistor’s current gain increases the linear regula-
tor’s DC loop gain (see the Stability Requirements sec-
tion), so excessive gain destabilizes the output.
Therefore, transistors with current gain over 100 at the
maximum output current can be difficult to stabilize and
are not recommended unless the high gain is needed to
meet the load-current requirements.
OUT_CP
2f
V
OSC RIPPLE_CP
where C
pump, I
pump, and V
output ripple.
is the output capacitor of the charge
OUT_CP
is the load current of the charge
LOAD_CP
is the peak-to-peak value of the
RIPPLE_CP
Charge-Pump Rectifier Diodes
The transistor’s saturation voltage at the maximum out-
put current determines the minimum input-to-output
voltage differential that the linear regulator can support.
Also, the package’s power dissipation limits the usable
maximum input-to-output voltage differential. The maxi-
mum power-dissipation capability of the transistor’s
package and mounting must exceed the actual power
dissipated in the device. The power dissipated equals
Use low-cost silicon switching diodes with a current rat-
ing equal to or greater than two times the average
charge-pump input current. If it helps avoid an extra
stage, some or all of the diodes can be replaced with
Schottky diodes with an equivalent current rating.
Linear-Regulator Controllers
Output-Voltage Selection
Adjust the gate-on linear-regulator (REG P) output volt-
age by connecting a resistive voltage-divider from the
REG P output to AGND with the center tap connected
to FBP (Figure 1). Select the lower resistor of the divider
R5 in the range of 10kΩ to ꢀ0kΩ. Calculate the upper
resistor Rꢁ with the following equation:
the maximum load current (I
) multiplied
LOAD(MAX)_LR
by the maximum input-to-output voltage differential:
P =I ×(V − V
)
OUT_LR
LOAD(MAX)_LR
IN(MAX)_LR
where V
linear regulator, and V
the linear regulator.
is the maximum input voltage of the
IN(MAX)_LR
_
is the output voltage of
OUT LR
⎛
⎞
V
V
GON
Rꢁ =R5×
−1
⎟
⎜
⎝
⎠
Stability Requirements
FBP
The MAX8795A linear-regulator controllers use an inter-
nal transconductance amplifier to drive an external
pass transistor. The transconductance amplifier, the
pass transistor, the base-emitter resistor, and the out-
put capacitor determine the loop stability. The following
applies to both linear-regulator controllers in the
MAX8795A.
where V
= 1.25V (typ).
FBP
Adjust the gate-off linear-regulator REG N output volt-
age by connecting a resistive voltage-divider from
V
to REF with the center tap connected to FBN
GOFF
(Figure 1). Select R8 in the 20kΩ to 50kΩ range.
Calculate R7 with the following equation:
The transconductance amplifier regulates the output
voltage by controlling the pass transistor’s base cur-
rent. The total DC loop gain is approximately:
V
V
− V
GOFF
FBN
R7 =R8×
− V
REF
FBN
⎡
⎤
⎥
⎦
⎛
⎞
⎛
⎞
10
V
T
I
×h
where V
= 250mV, V
= 1.25V. Note that REF can
FBN
REF
BIAS FE
⎢
A
≅
× 1+
× V
REF
V_LR
⎜
⎟
⎜
⎟
only source up to 50ꢂA; using a resistor less than 20kΩ
I
LOAD_LR
⎝
⎠
⎢
⎣
⎥
⎝
⎠
for R8 results in higher bias current than REF can supply.
______________________________________________________________________________________ 19
TFT-LCD DC-DC Converter with
Operational Amplifiers
where V is 26mV at room temperature, and I
is the
ꢁ) Next, calculate the pole set by the linear regulator’s
feedback resistance and the capacitance between
FB_ and AGND (including stray capacitance):
T
BIAS
BE
current through the base-to-emitter resistor (R ). For
the MAX8795A, the bias currents for both the gate-on
and gate-off linear-regulator controllers are 0.1mA.
Therefore, the base-to-emitter resistor for both linear
regulators should be chosen to set 0.1mA bias current:
1
f
=
POLE_FB
2π ×C ×(R
||R
)
FB
UPPER
LOWER
V
0.7V
BE
R
=
=
≈ 6.8kΩ
BE
where CFB is the capacitance between FB_ and
AGND, R is the upper resistor of the linear regu-
0.1mA 0.1mA
UPPER
The output capacitor and the load resistance create the
dominant pole in the system. However, the internal
amplifier delay, pass transistor’s input capacitance,
and the stray capacitance at the feedback node create
additional poles in the system, and the output capaci-
tor’s ESR generates a zero. For proper operation, use
the following equations to verify the linear regulator is
properly compensated:
lator’s feedback divider, and R
is the lower resis-
LOWER
MX8795A
tor of the divider.
5) Next, calculate the zero caused by the output
capacitor’s ESR:
1
f
=
POLE_ESR
2π ×C
×R
ESR
OUT_LR
1) First, determine the dominant pole set by the linear
regulator’s output capacitor and the load resistor:
where RESR is the equivalent series resistance of
COUT_LR.
I
LOAD(MAX)_LR
f
=
To ensure stability, choose C
large enough so
POLE_LR
OUT_LR
2π ×C
× V
OUT_LR
OUT_LR
the crossover occurs well before the poles and zero
calculated in steps 2 to 5. The poles in steps ꢀ and ꢁ
generally occur at several megahertz, and using
ceramic capacitors ensures the ESR zero occurs at
several megahertz as well. Placing the crossover below
500kHz is sufficient to avoid the amplifier-delay pole
and generally works well, unless unusual component
choices or extra capacitances move one of the other
poles or the zero below 1MHz.
The unity-gain crossover of the linear regulator is:
= A
f
ꢀ f
V_LR POLE_LR
CROSSOVER
2) The pole created by the internal amplifier delay is
approximately 1MHz:
f
= 1MHz
POLE_AMP
ꢀ) Next, calculate the pole set by the transistor’s input
capacitance, the transistor’s input resistance, and
the base-to-emitter pullup resistor:
Applications Information
1
Power Dissipation
An IC’s maximum power dissipation depends on the
thermal resistance from the die to the ambient environ-
ment and the ambient temperature. The thermal resis-
tance depends on the IC package, PCB copper area,
other thermal mass, and airflow.
f
=
POLE_IN
2π ×C ×(R ||R )
IN
BE
IN
where:
g
h
FE
g
m
m
C
IN
=
, R
=
IN
2πf
T
The MAX8795A, with its exposed backside paddle sol-
dered to 1in2 of PCB copper and a large internal ground
plane layer, can dissipate approximately 2.76W into
+70°C still air. More PCB copper, cooler ambient air,
and more airflow increase the possible dissipation, while
less copper or warmer air decreases the IC’s dissipation
capability. The major components of power dissipation
are the power dissipated in the step-up regulator and
the power dissipated by the operational amplifiers.
g
is the transconductance of the pass transistor, and f
T
m
is the transition frequency. Both parameters can be found
in the transistor’s data sheet. Because RBE is much
greater than RIN, the above equation can be simplified:
1
f
=
POLE_IN
2π ×C ×R
IN
IN
Substituting for CIN and RIN yields:
f
T
f
=
POLE_IN
h
FE
20 ______________________________________________________________________________________
TFT-LCD DC-DC Converter with
Operational Amplifiers
MX8795A
Step-Up Regulator
• Create a power-ground island (PGND) consisting of
the input and output capacitor grounds, PGND pin,
and any charge-pump components. Connect all of
these together with short, wide traces or a small
ground plane. Maximizing the width of the power-
ground traces improves efficiency and reduces out-
put voltage ripple and noise spikes. Create an
analog ground plane (AGND) consisting of the
AGND pin, all the feedback-divider ground connec-
tions, the operational-amplifier divider ground con-
nections, the COMP and DEL capacitor ground
connections, and the device’s exposed backside
paddle. Connect the AGND and PGND islands by
connecting the PGND pin directly to the exposed
backside paddle. Make no other connections
between these separate ground planes.
The largest portions of power dissipation in the step-up
regulator are the internal MOSFET, the inductor, and the
output diode. If the step-up regulator has 90% efficiency,
approximately ꢀ% to 5% of the power is lost in the internal
MOSFET, approximately ꢀ% to ꢁ% in the inductor, and
approximately 1% in the output diode. The remaining 1%
to ꢀ% is distributed among the input and output capacitors
and the PCB traces. If the input power is about 5W, the
power lost in the internal MOSFET is approximately 150mW
to 250mW.
Operational Amplifier
The power dissipated in the operational amplifiers
depends on their output current, the output voltage,
and the supply voltage:
• Place all feedback voltage-divider resistors within
5mm of their respective feedback pins. The divider’s
center trace should be kept short. Placing the resis-
tors far away causes their FB traces to become
antennas that can pick up switching noise. Take
care to avoid running any feedback trace near LX or
the switching nodes in the charge pumps, or pro-
vide a ground shield.
PD
=I
×(V
− V
)
SOURCE OUT_(SOURCE)
SUP
OUT_
PD
=I
× V
SINK OUT_(SINK) OUT_
where I
is the output current sourced by
OUT_(SOURCE)
the operational amplifier, and I
is the output
OUT_(SINK)
current that the operational amplifier sinks.
In a typical case where the supply voltage is 1ꢀV and
the output voltage is 6V with an output source current
of ꢀ0mA, the power dissipated is 180mW.
• Place the IN pin and REF pin bypass capacitors as
close as possible to the device. The ground connec-
tion of the IN bypass capacitor should be connected
directly to the AGND pin with a wide trace.
PCB Layout and Grounding
Careful PCB layout is important for proper operation.
Use the following guidelines for good PCB layout:
• Minimize the length and maximize the width of the
traces between the output capacitors and the load
for best transient responses.
• Minimize the area of high-current loops by placing
the inductor, the output diode, and the output
capacitors near the input capacitors and near the
LX and PGND pins. The high-current input loop
goes from the positive terminal of the input capacitor
to the inductor, to the IC’s LX pin, out of PGND, and
to the input capacitor’s negative terminal. The high-
current output loop is from the positive terminal of
the input capacitor to the inductor, to the output
diode (D1), and to the positive terminal of the output
capacitors, reconnecting between the output capac-
itor and input capacitor ground terminals. Connect
these loop components with short, wide connec-
tions. Avoid using vias in the high-current paths. If
vias are unavoidable, use many vias in parallel to
reduce resistance and inductance.
• Minimize the size of the LX node while keeping it
wide and short. Keep the LX node away from feed-
back nodes (FB, FBP, and FBN) and analog ground.
Use DC traces to shield if necessary.
Refer to the MAX8795A evaluation kit for an example of
proper PCB layout.
Chip Information
TRANSISTOR COUNT: 6595
PROCESS: BiCMOS
______________________________________________________________________________________ 21
TFT-LCD DC-DC Converter with
Operational Amplifiers
Pin Configuration
TOP VIEW
24 23 22 21 20 19 18 17
FBP 25
DRVP 26
FBN 27
16 NEG4
15 POS4
14 SUP
MX8795A
DRVN 28
13 OUT3
12 POS3
11 BGND
10 POS2
MAX8795A
DEL 29
CTL 30
DRN 31
COM 32
9
NEG2
1
2
3
4
5
6
7
8
THIN QFN
5mm x 5mm
22 ______________________________________________________________________________________
TFT-LCD DC-DC Converter with
Operational Amplifiers
MX8795A
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE,
16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
1
K
21-0140
2
______________________________________________________________________________________ 23
TFT-LCD DC-DC Converter with
Operational Amplifiers
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information,
go to www.maxim-ic.com/packages.)
MX8795A
PACKAGE OUTLINE,
16, 20, 28, 32, 40L THIN QFN, 5x5x0.8mm
2
K
21-0140
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 24
© 2007 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
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