MAX8621YETG+ [MAXIM]
Power Supply Support Circuit, Adjustable, 6 Channel, BICMOS, 4 X 4 MM, 0.80 MM HEIGHT, LEAD FREE, TQFN-24;
| 型号： | MAX8621YETG+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Power Supply Support Circuit, Adjustable, 6 Channel, BICMOS, 4 X 4 MM, 0.80 MM HEIGHT, LEAD FREE, TQFN-24 便携式 便携式设备 |
| 文件： | 总18页 (文件大小：360K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-3539; Rev 1; 8/05
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
General Description
Features
The MAX8621Y/MAX8621Z power-management inte-
grated circuits (PMICs) are designed for a variety of
portable devices including cellular handsets. These
PMICs include two high-efficiency step-down DC-DC
converters, four low-dropout linear regulators (LDOs)
with pin-programmable capability, one open-drain dri-
ver, a 60ms (typ) reset timer, and power-on/off control
logic. These devices offer high efficiency with a no-load
supply current of 160µA, and their small thin QFN 4mm
x 4mm package makes them ideal for portable devices.
♦ Two 500mA Step-Down Converters
Up to 4MHz Switching Frequency
Adjustable Output from 0.6V to 3.3V
♦ Four Low-Noise LDOs with Pin-Programmable
Output Voltages
♦ One Open-Drain Driver
♦ 60ms (typ) Reset Timer
♦ Power-On/Off Control Logic and Sequencing
♦ 4mm x 4mm x 0.8mm 24-Pin Thin QFN
The step-down DC-DC converters utilize a proprietary
4MHz hysteretic-PWM control scheme that allows for
ultra-small external components. Internal synchronous
rectification improves efficiency and eliminates the
external Schottky diode that is required in conventional
step-down converters. The output voltage is adjustable
from 0.6V to 3.3V. The output current is guaranteed up
to 500mA.
Ordering Information
PART
TEMP RANGE PIN-PACKAGE
24 Thin QFN
4mm x 4mm (T2444-4)
MAX8621YETG
-40°C to +85°C
24 Thin QFN
4mm x 4mm (T2444-4)
The four LDOs offer low 45µV
output noise and low
RMS
MAX8621YETG+
MAX8621ZETG
MAX8621ZETG+
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
dropout of only 100mV at 100mA. OUT1 and OUT2
deliver 300mA (min) of continuous output current.
OUT3 and OUT4 deliver 150mA (min) of continuous
output current. The output voltages are pin selectable
by SEL1 and SEL2 for flexibility. The MAX8621Y/
MAX8621Z offer different sets of LDO output voltages.
24 Thin QFN
4mm x 4mm (T2444-4)
24 Thin QFN
4mm x 4mm (T2444-4)
+ Denotes lead-free package.
A microprocessor reset output (RESET) monitors OUT1
and warns the system of impending power loss, allow-
ing safe shutdown. RESET asserts during power-up,
power-down, shutdown, and fault conditions where
Typical Operating Circuit
BUCK1
1.375V, 500mA
INPUT
2.6V TO 5.5V
LX1
V
is below its regulation voltage.
OUT1
IN1
A 200mA driver output is provided to control LED back-
lighting or provide an open-drain connection for resis-
tors such as in feedback networks.
MAX8621Y
MAX8621Z
FB1
IN2
IN3
PGND1
LX2
Applications
BUCK2
1.8V, 500mA
Cellular Handsets
Smart Phones, PDAs
Digital Cameras
MP3 Players
PWRON
FB2
SEL1
SEL2
PGND2
OUT1
OUT1
2.6V, 300mA
EN2
EN3
Wireless LAN
RESET
OUT2
RESET
OUT2
2.6V, 300mA
Pin Configuration appears at end of data sheet.
EN4
OUT3
1.8V, 150mA
OUT3
ENDR
REFBP
OUT4
3V, 150mA
OUT4
DR
INPUT
GND
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
ABSOLUTE MAXIMUM RATINGS
PWRON, IN1, IN2, IN3, RESET, FB1, FB2,
ENDR, REFBP, SEL1, SEL2 to GND..................-0.3V to +6.0V
Continuous Power Dissipation (T = +70°C)
A
24-Pin 4mm x 4mm Thin QFN
(derate 27.8mW/°C above +70°C)..........................2222.2mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
EN2, EN3, EN4, DR to GND.......................-0.3V to (V
OUT1, OUT2, OUT3, OUT4 to GND...........-0.3V to (V
PGND1, PGND2 to GND ......................................-0.3V to + 0.3V
LX1, LX2 Current.......................................................... 1.5A
LX1, LX2 to GND (Note 1) ..........................-0.3V to (V + 0.3V)
+ 0.3V)
+ 0.3V)
IN3
IN2
RMS
IN1
DR Current......................................................................0.5A
RMS
Note 1: LX_ has internal clamp diodes to GND and IN1. Applications that forward-bias these diodes should take care not to exceed
the IC’s package dissipation limits.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V = 3.7V, C
= 10µF, C
= C
= 4.7µF, C
= C
= 4.7µF, C
= C
= 2.2µF, C = 0.01µF, T = -40°C to
REFBP A
IN
IN1
IN2
IN3
OUT1
OUT2
OUT3
OUT4
+85°C, unless otherwise noted. Typical values are at T = +25°C.) (Notes 1, 2)
A
PARAMETER
Input Supply Range
CONDITIONS
MIN
TYP
MAX
5.5
UNIT
V
After startup
2.6
Shutdown Supply Current
V
= 4.2V (Note 3)
2
15
µA
IN
V
= 3.7V; BUCK1, BUCK2, OUT1, OUT2 on; other
IN
160
275
710
300
circuits off
No-Load Supply Current
µA
µA
V
= 3.7V, BUCK1 and BUCK2 on, all LDOs on
IN
IN
V
= 3.7V, BUCK1 and BUCK2 with 500µA load each,
Light-Load Supply Current
OUT1 and OUT2 on, other circuits off
UNDERVOLTAGE LOCKOUT
Undervoltage Lockout (Note 4)
V
V
rising
falling
2.70
2.85
2.35
3.05
2.55
IN
IN
V
THERMAL SHUTDOWN
Threshold
T
rising
+160
15
°C
°C
A
Hysteresis
REFERENCE
Reference Bypass Output
Voltage
T
= 0°C to +85°C
1.235
1.44
1.250
0.2
1.265
0.4
V
A
REF Supply Rejection
LOGIC AND CONTROL INPUTS
Input Low Level
2.6V ≤ V ≤ 5.5V
mV/V
IN
PWRON, EN2, EN3, EN4; 2.6V ≤ V ≤ 5.5V
V
V
IN
PWRON, EN2, EN3, EN4; 2.6V ≤ V ≤ 4.2V
1.12
1.25
IN
Input High Level
PWRON, EN2, EN3, EN4; 2.6V ≤ V ≤ 5.5V
IN
Logic Input Current
EN3, EN4; 0V < V < 5.5V
IN
-1
+1
µA
V
Tristate Low Input Threshold
SEL_
0.3
0.7
50
1.0
Tristate Low Input Threshold
Hysteresis
SEL_
mV
V
V
-
V
-
V
-
IN
IN
1.2V
IN
Tristate High Input Threshold
SEL_
0.8V
0.4V
2
_______________________________________________________________________________________
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
ELECTRICAL CHARACTERISTICS (continued)
(V = 3.7V, C
= 10µF, C
= C
= 4.7µF, C
= C
= 4.7µF, C
= C
= 2.2µF, C = 0.01µF, T = -40°C to
REFBP A
IN
IN1
IN2
IN3
OUT1
OUT2
OUT3
OUT4
+85°C, unless otherwise noted. Typical values are at T = +25°C.) (Notes 1, 2)
A
PARAMETER
CONDITIONS
MIN
TYP
MAX
1600
3.3
UNIT
Tristate High Input Threshold
Hysteresis
SEL_
50
mV
PWRON, EN2 Pulldown Resistor
400
0.6
800
kΩ
to GND
STEP-DOWN DC-DC CONVERTER 1 (BUCK1)
Supply Current
I
= 0A, no switching
40
µA
V
LOAD
Output Voltage Range
FB1 Threshold Voltage
FB1 Threshold Line Regulation
V
falling
0.603
0.3
V
FB1
2.6V ≤ V ≤ 5.5V
%/V
IN
FB1 Threshold Voltage Hysteresis
1
%
(% of V
)
FB1
Shutdown
0.01
0.01
1000
1000
0.65
0.35
45
FB1 Bias Current
Current Limit
µA
mA
V
= 0.5V
FB1
p-MOSFET switch (I
)
670
750
1500
1330
1.5
LIMP
n-MOSFET rectifier (I
)
LIMN
p-MOSFET switch, I
= -40mA
LX1
On-Resistance
Ω
mA
ns
n-MOSFET rectifier, I
= 40mA
0.8
LX1
Rectifier Off-Current Threshold
Minimum On- and Off-Times
I
t
t
70
LXOFF
ON
107
95
OFF
STEP-DOWN DC-DC CONVERTER 2 (BUCK2)
Supply Current
I
= 0A, no switching
40
µA
V
LOAD
Output Voltage Range
FB2 Threshold Voltage
FB2 Threshold Line Regulation
0.6
3.3
V
falling
0.603
0.3
V
FB2
2.6V ≤ V ≤ 5.5V
%/V
IN
FB2 Threshold Voltage Accuracy
(Falling) (% of VFB2)
I
= 0A
-2.5
+2.5
%
%
LOAD
FB2 Threshold Voltage Hysteresis
(% of VFB2)
1
Shutdown
= 0.5V
0.01
0.01
1000
1000
0.65
0.35
45
FB2 Bias Current
Current Limit
µA
mA
V
FB
p-MOSFET switch
n-MOSFET rectifier
p-MOSFET switch, I
670
750
1500
1330
1.5
= -40mA
LX2
On-Resistance
Ω
mA
ns
n-MOSFET rectifier, I
= 40mA
0.8
LX2
Rectifier Off-Current Threshold
Minimum On- and Off-Times
I
t
t
70
LXOFF
ON
107
95
OFF
_______________________________________________________________________________________
3
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
ELECTRICAL CHARACTERISTICS (continued)
(V = 3.7V, C
= 10µF, C
= C
= 4.7µF, C
= C
= 4.7µF, C
= C
= 2.2µF, C = 0.01µF, T = -40°C to
REFBP A
IN
IN1
IN2
IN3
OUT1
OUT2
OUT3
OUT4
+85°C, unless otherwise noted. Typical values are at T = +25°C.) (Notes 1, 2)
A
PARAMETER
OUT1 (LDO1)
CONDITIONS
MIN
TYP
MAX
UNIT
T
T
= 0°C to +85°C
-1.3
+0.6
0
+2.0
+2.5
A
I
= 1mA, 3.7V ≤ V ≤ 5.5V,
IN
LOAD
relative to V
Output Voltage Accuracy
OUT(NOM)
= -40°C to +85°C
-2.3
%
A
I
= 150mA, relative to V
LOAD
OUT(NOM)
Output Current
Current Limit
300
940
420
mA
mA
mV
V
= 0V
310
550
200
OUT1
= 200mA, T = +85°C
LOAD A
Dropout Voltage
I
V
= greater of 3.7V or (V
+ 0.7V),
IN
OUT(NOM)
Load Regulation
1.2
60
%
1mA < I
< 300mA, V
= V
= 0V
LOAD
SEL1
SEL2
Power-Supply Rejection
10Hz to 10kHz, C
= 4.7µF, I
= 30mA
dB
OUT1
LOAD
ΔV
/ΔV
IN2
OUT1
Output Noise Voltage (RMS)
100Hz to 100kHz, C
= 4.7µF, I
= 30mA
45
4.7
2.2
21
µV
OUT1
LOAD
RMS
0 < I
0 < I
< 300mA
< 150mA
LOAD
LOAD
Output Capacitor for Stable
Operation
µF
Ground Current
I
= 500µA
µA
LOAD
OUT2 (LDO2)
T
T
= 0°C to +85°C
-1.3
-2.3
+0.6
0
+2.0
+2.5
A
I
= 1mA, 3.7V ≤ V ≤ 5.5V,
LOAD
IN_
relative to V
Output Voltage Accuracy
OUT(NOM)
= -40°C to +85°C
%
A
I
= 150mA, relative to V
= 0V
LOAD
OUT(NOM)
Output Current
Current Limit
300
940
420
mA
mA
mV
%
V
310
550
200
1.2
OUT2
= 200mA , T = +85°C
LOAD A
Dropout Voltage
Load Regulation
I
1mA < I
< 300mA, V
= V
= 0V
LOAD
SEL1
SEL2
Power-Supply Rejection
10Hz to 10kHz, C
= 4.7µF, I
= 30mA
60
dB
OUT2
LOAD
ΔV
/ΔV
IN2
OUT2
Output Noise Voltage (RMS)
100Hz to 100kHz, C
= 4.7µF, I
= 30mA
45
4.7
2.2
21
µV
OUT2
LOAD
RMS
0 < I
0 < I
< 300mA
< 150mA
LOAD
LOAD
Output Capacitor for Stable
Operation
µF
Ground Current
I
= 500µA
µA
%
LOAD
OUT3 (LDO3)
T
T
= 0°C to +85°C
-1.3
-2.3
+0.3
0
+2.0
+2.5
A
I
= 1mA, 3.7V ≤ V
≤ 5.5V,
LOAD
IN_
relative to V
Output Voltage Accuracy
OUT(NOM)
= -40°C to +85°C
A
I
= 75mA, relative to V
LOAD
OUT(NOM)
Output Current
Current Limit
150
650
210
mA
mA
mV
%
V
= 0V
165
360
100
0.6
OUT3
= 100mA , T = +85°C
LOAD A
Dropout Voltage
Load Regulation
I
1mA < I
< 150mA, V
= V
= 0V
LOAD
SEL1
SEL2
4
_______________________________________________________________________________________
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
ELECTRICAL CHARACTERISTICS (continued)
(V = 3.7V, C
= 10µF, C
= C
= 4.7µF, C
= C
= 4.7µF, C
= C
= 2.2µF, C = 0.01µF, T = -40°C to
REFBP A
IN
IN1
IN2
IN3
OUT1
OUT2
OUT3
OUT4
+85°C, unless otherwise noted. Typical values are at T = +25°C.) (Notes 1, 2)
A
PARAMETER
CONDITIONS
= 2.2µF, I
MIN
TYP
MAX
UNIT
Power-Supply Rejection
10Hz to 10kHz, C
= 30mA
LOAD
60
45
dB
OUT3
ΔV
/ΔV
IN2
OUT3
Output Noise Voltage (RMS)
100Hz to 100kHz, C
= 2.2µF, I
= 30mA
µV
OUT3
LOAD
RMS
Output Capacitor for Stable
Operation
0 < I
< 150mA
2.2
µF
LOAD
OUT4 (LDO4)
V
V
≥ 1.8V
-1.3
-1.30
-2.3
+0.3
+0.3
+2.0
+2.35
+2.5
OUT(NOM)
OUT(NOM)
T = 0°C to
A
+85°C
I
V
V
= 1mA, 3.7V ≤
≤ 5.5V, relative to
LOAD
= 1.5V
IN_
Output Voltage Accuracy
%
OUT(NOM)
T
A
= -40°C to +85°C
I
= 75mA, relative to V
0
LOAD
OUT(NOM)
Output Current
Current Limit
150
650
210
mA
mA
mV
%
V
= 0V
165
360
100
0.6
OUT4
= 100mA, T = +85°C
LOAD A
Dropout Voltage
Load Regulation
I
1mA < I
< 150mA, V
= V
= 0
LOAD
SEL1
SEL2
Power-Supply Rejection
10Hz to 10kHz, C
= 2.2µF, I
= 30mA
60
45
dB
OUT4
LOAD
ΔV
/ΔV
IN2
OUT4
Output Noise Voltage (RMS)
100Hz to 100kHz, C
= 2.2µF, I
= 30mA
µV
OUT4
LOAD
RMS
Output Capacitor for Stable
Operation
0 < I
< 150mA
2.2
µF
LOAD
DRIVER (DR)
ENDR Turn-On Threshold
ENDR Input Current
DR Output Low Voltage
DR Off-Current (Leakage)
RESET
I
= 1mA
0.65
0.2
V
DR
V
= 0V and 5.5V
-1
-1
+1
0.4
+1
µA
V
ENDR
I
= 150mA, V
= 3.7V
ENDR
DR
V
= V = 5.5V, V = 0V
ENDR
µA
DR
IN
V
OUT1
Output High Voltage
V
- 0.3V
Output Low Voltage
I
= 1mA
0.3
90
V
SINK
RESET Threshold
Percentage of nominal OUT1 rising when RESET falls
From OUT1 ≥ 87% until RESET = HIGH
84
8
87
60
14
%
RESET Active Timeout Period
Pullup Resistance to OUT1
ms
kΩ
20
Note 1: V , V , and V
are shorted together and single input is referred to as V .
IN
IN1 IN2
IN3
Note 2: All units are 100% production tested at T = +85°C. Limits over the operating range are guaranteed by design.
A
Note 3: OUT1, OUT2, OUT3, OUT4, LX1, and LX2 to ground.
Note 4: When the input voltage is greater than 2.85V (typ), the UVLO comparator trips and the threshold is reduced to 2.35V (typ).
This allows the system to start normally until the input voltage decays to 2.35V.
_______________________________________________________________________________________
5
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
Typical Operating Characteristics
(Circuit of Figure 3, V
= V
= V
= 3.6V, PWRON = IN, V
= 1.375V, V
= 1.8V, V
= 2.6V, V
= 2.6V, V
IN1
IN2
IN3
BUCK1
BUCK2
OUT1
OUT2 OUT3
= 1.8V, V
= 3.0V, SEL1 = SEL2 = open, LX1 = LX2 = Murata LQH32CN2R2M53, T = +25°C, unless otherwise noted.)
OUT4
A
SUPPLY CURRENT
vs. INPUT VOLTAGE
STARTUP WAVEFORMS
MAX8621 toc02
300
280
260
240
220
200
180
160
140
120
100
NO LOAD
BUCK1, BUCK2, OUT1, OUT2: ON
5V/div
0
PWRON
2V/div
0
2V/div
0
BUCK1
BUCK2
5V/div
0
OUT1
OUT2
5V/div
0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
50μs/div
INPUT VOLTAGE (V)
RESET WAVEFORMS
SHUTDOWN WAVEFORMS
MAX8621 toc04
MAX8621 toc03
5V/div
0
PWRON
PWRON
2V/div
0
2V/div
0
2V/div
0
BUCK1
BUCK2
OUT1
2V/div
0
LOAD = 1mA
5V/div
0
OUT1
OUT2
2V/div
0
5V/div
0
RESET
10mA LOAD ON ALL FOUR OUTPUTS
20ms/div
100μs/div
6
_______________________________________________________________________________________
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
Typical Operating Characteristics (continued)
(Circuit of Figure 3, V
= V
= V
= 3.6V, PWRON = IN, V
= 1.375V, V
= 1.8V, V
= 2.6V, V
= 2.6V, V
IN1
IN2
IN3
BUCK1
BUCK2
OUT1
OUT2 OUT3
= 1.8V, V
= 3.0V, SEL1 = SEL2 = open, LX1 = LX2 = Murata LQH32CN2R2M53, T = +25°C, unless otherwise noted.)
OUT4
A
OUT2 OUTPUT VOLTAGE ACCURACY
vs. LOAD CURRENT
OUT1 OUPUT VOLTAGE
vs. INPUT VOLTAGE
2.0
1.5
1.0
0.5
0
2.650
2.625
2.600
2.575
2.550
2.525
2.500
LOAD = 0
LOAD = 300mA
FALLING
-0.5
-1.0
-1.5
-2.0
RISING
0
50
100
150
200
250
300
2.5
3.0
3.5
4.0
4.5
5.0
5.5
LOAD CURRENT (mA)
INPUT VOLTAGE (V)
OUT1 POWER-SUPPLY
RIPPLE REJECTION vs. FREQUENCY
OUT4 DROPOUT VOLTAGE
vs. LOAD CURRENT
80
70
60
50
40
30
20
10
0
160
140
120
100
80
60
40
20
0
0.1
1
10
100
1000
0
50
100
150
FREQUENCY (kHz)
LOAD CURRENT (mA)
EFFICICENCY vs. LOAD CURRENT
EFFICICENCY vs. LOAD CURRENT
(V
= 1.8V)
BUCK2
(V
= 1.375V)
BUCK1
100
90
80
70
60
50
40
100
90
80
70
60
50
40
4.7μH
2.2μH
4.7μH
2.2μH
1μH
1μH
BUCK1, OUT1, OUT2:
ON WITH NO LOAD
BUCK2, OUT1, OUT2:
ON WITH NO LOAD
0.1
1
10
100
1000
0.1
1
10
100
1000
LOAD CURRENT (mA)
LOAD CURRENT (mA)
_______________________________________________________________________________________
7
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
Typical Operating Characteristics (continued)
(Circuit of Figure 3, V
= V
= V
= 3.6V, PWRON = IN, V
= 1.375V, V
= 1.8V, V
= 2.6V, V
= 2.6V, V
IN1
IN2
IN3
BUCK1
BUCK2
OUT1
OUT2 OUT3
= 1.8V, V
= 3.0V, SEL1 = SEL2 = open, LX1 = LX2 = Murata LQH32CN2R2M53, T = +25°C, unless otherwise noted.)
OUT4
A
SWITCHING FREQUENCY
vs. LOAD CURRENT
BUCK1 LIGHT-LOAD WAVEFORMS
MAX8621 toc12
10
1μH
10mV/div
AC-COUPLED
V
BUCK1
2.2μH
4.7μH
LOAD = 50mA
1
200mA/div
0
I
LX1
5V/div
0
V
LX1
0.1
0
100
200
300
400
500
200ns/div
LOAD CURRENT (mA)
BUCK1 HEAVY-LOAD WAVEFORMS
BUCK1 LOAD-TRANSIENT RESPONSE
MAX8621 toc13
MAX8621 toc14
10mV/div
AC-COUPLED
50mV/div
AC-COUPLED
V
V
BUCK1
BUCK1
LOAD = 300mA
500mA/div
0
I
I
LX1
LX1
200mA/div
0
400mA LOAD
V
5V/div
0
I
LX1
BUCK1
500mA/div
0
200ns/div
5μs/div
BUCK1 OUTPUT VOLTAGE
vs. LOAD CURRENT (VOLTAGE POSITIONING)
1.44
1.42
1.40
1.38
1.36
1.34
1.32
1.30
0
100
200
300
400
500
LOAD CURRENT (mA)
8
_______________________________________________________________________________________
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
Pin Description
PIN NAME
FUNCTION
1
2
3
FB1
FB2
Voltage Feedback for Step-Down Converter 1. FB1 regulates to 0.6V nominal.
Voltage Feedback for Step-Down Converter 2. FB2 regulates to 0.6V nominal.
GND Ground. Ground for all LDOs and the control section.
Reference Noise Bypass. Connect a 0.01µF ceramic capacitor from REFBP to GND. Not intended to drive resistive
load. REFBP is high impedance in shutdown.
4
5
6
7
REFBP
EN4
OUT4
EN3
Enable Input for OUT4. Drive EN4 high to turn on OUT4.
150mA LDO4 output. Bypass OUT4 to GND with a 2.2µF ceramic capacitor. OUT4 is high impedance when
disabled. OUT4 can only be activated if OUT1 is within 87% of regulation.
Enable Input for OUT3. Drive EN3 high to turn on OUT3.
Enable Input for OUT2. Drive EN2 high to disable OUT2. Drive EN2 low or leave open to enable OUT2. EN2 is
internally pulled to GND by an 800kΩ (typ) pulldown resistor. If the MAX8621Y/MAX8621Z are placed into shutdown
using PWRON (PWRON = low), OUT2 does not power regardless of the status of EN2.
8
EN2
300mA LDO2 Output. Bypass with a 4.7µF ceramic capacitor to GND. OUT2 is high impedance when disabled.
OUT2 can only be activated if OUT1 is within 87% of regulation.
9
OUT2
IN2
Supply Voltage to the Output MOSFET of All 4 LDOs. IN2 must be shorted to IN1 and IN3. Connect a 4.7µF ceramic
capacitor from IN2 to GND.
10
Open-Drain, Active-Low Reset Output. RESET asserts low when V
drops below 87% (typ) of regulation. RESET
OUT1
11 RESET
deasserts 60ms after V
rises above 87% (typ) of regulation (Figure 2).
OUT1
12
13
OUT1 300mA LDO1 Output. Bypass with a 4.7µF ceramic capacitor to GND. OUT1 is high impedance when disabled.
150mA LDO3 Output. Bypass OUT3 to GND with a 2.2µF ceramic capacitor. OUT3 is high impedance when
OUT3
disabled. OUT3 can only be activated if OUT1 is within 87% of regulation.
Power Enable Input. Drive PWRON high to enable the MAX8621Y/MAX8621Z. Drive PWRON low to enter shutdown
mode. PWRON has an internal 800kΩ (typ) pulldown resistor.
14 PWRON
Enable Input for DR. Drive ENDR low for DR to go into high impedance. Drive ENDR high to activate DR, pulling
DR low.
15
16
17
18
19
ENDR
IN3
Supply Voltage to the Control Section. IN3 must be shorted to IN1 and IN2. Connect a 4.7µF ceramic capacitor from
IN3 to GND.
LDO Output-Voltage Select Input 2. SEL1 and SEL2 set the OUT1, OUT2, OUT3, and OUT4 voltages to one of nine
combinations (Table 1).
SEL2
SEL1
DR
LDO Output-Voltage Select Input 1. SEL1 and SEL2 set the OUT1, OUT2, OUT3, and OUT4 voltages to one of nine
combinations (Table 1).
200mA Driver Output. Connects to the open drain of an internal n-channel MOSFET whose gate is controlled by
ENDR.
20 PGND2 Power Ground for BUCK2 and DR Switch
Inductor Connection for BUCK2. LX2 is internally connected to the drain of the internal p-channel MOSFET and the
drain of the internal n-channel synchronous rectifier for BUCK2. LX2 is high impedance when BUCK2 is disabled.
21
22
23
LX2
IN1
LX1
Supply Voltage to the Output Stage of BUCK1 and BUCK2. IN1 must be shorted to IN2 and IN3. Connect a 10µF
ceramic capacitor from IN1 to GND.
Inductor Connection for BUCK1. LX1 is internally connected to the drain of the internal p-channel MOSFET and the
drain of the internal n-channel synchronous rectifier for BUCK1. LX1 is high impedance when BUCK1 is disabled.
24 PGND1 Power Ground for BUCK1
—
EP
Exposed Paddle. Connect the exposed paddle to GND, PGND1, and PGND2.
_______________________________________________________________________________________
9
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
Transient Response graph in the Typical Operating
Characteristics.
Detailed Description
The MAX8621Y/MAX8621Z power-management ICs are
designed specifically to power a variety of portable
devices including cellular handsets. Each device con-
tains two 4MHz high-efficient step-down converters, four
low-dropout linear regulators (LDOs), a 60ms (typ) reset
timer, a 200mA open-drain output driver, and power-
on/off control logic (Figure 3).
Low-Dropout Linear Regulators
Each MAX8621Y/MAX8621Z contains four low-dropout,
low-quiescent-current, high-accuracy linear regulators
(LDOs). OUT1 and OUT2 supply loads up to 300mA,
while OUT3 and OUT4 supply loads up to 150mA. The
LDO output voltages are set using SEL1 and SEL2 (see
Table 1). The LDOs include an internal reference, error
amplifier, p-channel pass transistor, internal program-
mable voltage-divider, and an OUT1 power-good com-
parator. Each error amplifier compares the reference
voltage to a feedback voltage and amplifies the differ-
ence. If the feedback voltage is lower than the refer-
ence voltage, the pass-transistor gate is pulled lower,
allowing more current to pass to the outputs and
increasing the output voltage. If the feedback voltage is
too high, the pass-transistor gate is pulled up, allowing
less current to pass to the output.
Step Down DC-DC Control Scheme
The MAX8621Y/MAX8621Z step-down converters are
optimized for high-efficiency voltage conversion over a
wide load range, while maintaining excellent transient
response, minimizing external component size, and
minimizing output voltage ripple. The DC-DC convert-
ers (BUCK1 and BUCK2) also feature an optimized on-
resistance internal MOSFET switch and synchronous
rectifier to maximize efficiency. The MAX8621Y/
MAX8621Z utilize a proprietary hysteretic-PWM control
scheme that switches with nearly fixed frequency up to
4MHz, allowing for ultra-small external components.
The step-down converter output current is guaranteed
up to 500mA, while consuming 40µA (typ).
DR Driver
Each MAX8621Y/MAX8621Z includes a 1.3Ω n-channel
MOSFET open-drain output that is controlled by ENDR.
This output can be used to drive LEDs (see the Typical
Operating Circuit) and allow adjustable output voltages
(see Figure 1).
When the step-down converter output voltage falls below
the regulation threshold, the error comparator begins a
switching cycle by turning the high-side p-channel
MOSFET switch on. This switch remains on until the mini-
Programming LDO Output Voltages
(SEL1, SEL2)
mum on-time (t ) expires and the output voltage is in
ON
regulation or the current-limit threshold (I
) is exceed-
LIMP
As shown in Table 1, the LDO output voltages, OUT1,
OUT2, OUT3, and OUT4 are pin-programmable by the
logic states of SEL1 and SEL2. SEL1 and SEL2 are
trilevel inputs: IN, open, and GND. The input voltage,
ed. Once off, the high-side switch remains off until the
minimum off-time (t ) expires and the output voltage
OFF
again falls below the regulation threshold. During this off
period, the low-side synchronous rectifier turns on and
remains on until either the high-side switch turns on or
the inductor current reduces to the rectifier-off current
V , must be greater than the selected OUT1, OUT2,
IN
OUT3, and OUT4 voltages. The logic states of SEL1
and SEL2 can be programmed only during power-up.
Once the OUT_ voltages are programmed, their values
do not change by changing SEL_ unless the
MAX8621Y/MAX8621Z power is cycled.
threshold (I
= 45mA (typ)). The internal synchro-
LXOFF
nous rectifier eliminates the need for an external
Schottky diode.
Voltage-Positioning Load Regulation
The MAX8621Y/MAX8621Z use a unique step-down
converter feedback network. By taking feedback from
the LX node through R1, the usual phase lag due to the
output capacitor is removed, making the loop exceed-
ingly stable and allowing the use of a very small ceramic
output capacitor. This configuration causes the output
voltage to shift by the inductor series resistance multi-
plied by the load current. This output voltage shift is
known as voltage-positioning load regulation. Voltage-
positioning load regulation greatly reduces overshoot
during load transients, which effectively halves the
peak-to-peak output-voltage excursions compared to
traditional step-down converters. See the Buck1 Load-
L1
2.2μH
BUCK1
1.38V OR 1.8V
LX1
R1
150kΩ
C6
150pF
MAX8621Y
MAX8621Z
FB1
DR
R2
115kΩ
R5
215kΩ
1.38/1.8
ENDR
Figure 1. Adjusting BUCK1 Output Voltage Using DR
10 ______________________________________________________________________________________
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
Table 1. SEL1 and SEL2, MAX8621Y/MAX8621Z Output Voltage Selection
MAX8621Y
MAX8621Z
SEL1
SEL2
OUT1 (V)
3.3
OUT2 (V)
OUT3 (V)
2.85
3.3
OUT4 (V)
2.85
2.85
3.0
OUT1 (V)
2.8
OUT2 (V)
OUT3 (V)
3.0
OUT4 (V)
3.0
IN
IN
3.3
3.3
2.6
2.6
2.6
2.6
2.6
2.6
3.1
2.9
2.5
IN
OPEN
GND
IN
3.0
2.6
3.0
3.0
IN
2.5
3.3
2.85
3.0
2.6
2.9
2.9
OPEN
OPEN
OPEN
GND
GND
GND
2.85
3.3
3.3
2.5
2.6
3.0
3.3
OPEN
GND
IN
3.3
2.8
3.0
2.6
1.8
3.0
3.3
3.3
3.0
3.0
2.6
2.8
3.0
3.3
2.85
2.85
2.85
3.3
2.85
3.3
2.9
1.8
1.5
OPEN
GND
2.85
3.3
3.3
3.0
2.9
2.9
3.0
3.0
3.0
2.9
2.9
over time. For the same reason, OUT2, OUT3, and OUT4
can be turned on by EN2, EN3, and EN4 signals, but
only after OUT1 has reached 87% of its final value. Note
that OUT2 typically requires a longer time to enable than
OUT3 and OUT4 (45µs versus 15µs). All regulators can
be turned off at the same time when PWRON is low, but
BUCK1 remains on for approximately another 120µs
after PWRON goes low.
Power-Supply Sequence
BUCK1 is always first on and last off in the MAX8621Y/
MAX8621Zs’ power sequence. BUCK1 turns on approxi-
mately 40µs after PWRON is enabled. BUCK2 turns on
approximately 40µs after BUCK1, and OUT1 turns on
65µs after BUCK2. These delays have been added to
sequence the turn-on of the step-down converters and
LDOs so that the initial current surges are distributed
PWRON
REF
40μs
BUCK1
120μs
40μs
BUCK2
65μs
87% REGULATION
OUT1
87% REGULATION
60ms
RESET
45μs
OUT2
EN3
(EN4)
15μs
OUT3
(OUT4)
EN2
Figure 2. Power-On/Off Sequence Diagram
______________________________________________________________________________________ 11
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
PWRON
Drive PWRON low or leave PWRON open to place the
MAX8621Y/MAX8621Z in power-down mode and
reduce supply current to 5µA (typ). In power-down, the
control circuitry, internal-switching p-channel MOSFET,
and the internal synchronous rectifier (n-channel
MOSFET) turn off (BUCK1 and BUCK2), and LX_
becomes high impedance. In addition, all four LDOs
are disabled. Connect PWRON to IN or logic-high to
enable the MAX8621Y/MAX8621Z. EN2 enables and
disables OUT2 when PWRON is high.
Thermal-Overload Protection
Thermal-overload protection limits total power dissipa-
tion in the MAX8621Y/MAX8621Z. Independent thermal-
protection circuits monitor the step-down converters
and the linear-regulator circuits. When the junction tem-
perature exceeds T = +160°C, the thermal-overload
J
protection circuit disables the corresponding circuitry,
allowing the IC to cool. The LDO thermal-overload pro-
tection circuit enables the LDOs after the LDO junction
temperature cools down, resulting in pulsed LDO out-
puts during continuous thermal-overload conditions. The
step-down converter’s thermal-overload protection
circuitry enables the step-down converter after the
junction temperature cools down. Thermal-overload
protection safeguards the MAX8621Y/MAX8621Z in the
event of fault conditions. For continuous operation, do
not exceed the absolute maximum junction-temperature
OUT2 Enable (EN2)
Drive EN2 high to disable OUT2. Drive EN2 low or
leave open to enable OUT2. EN2 is internally pulled to
GND by an 800kΩ (typ) pulldown resistor. If the
MAX8621Y/MAX8621Z are powered down using
PWRON (PWRON = low), OUT2 does not power
regardless of the status of EN2.
rating of T = +150°C.
J
Applications Information
Reset Output (RESET)
The reset circuit is active both at power-up and power-
Step-Down DC-DC Converter
down. RESET asserts low when V
drops below
OUT1
Setting the Step-Down Output Voltage
Select an output voltage for BUCK1 between 0.6V and
3.3V by connecting FB1 to a resistive voltage-divider
between LX1 and GND. Choose R2 (Figure 3) for a rea-
sonable bias current in the resistive divider. A wide range
of resistor values is acceptable, but a good starting point
is to choose R2 as 100kΩ. Then, R1 (Figure 3) is given by:
87% (typ) of regulation. RESET deasserts 60ms after
V
rises above 87% (typ) of regulation. RESET is
OUT1
pulled up through an internal 14kΩ resistor to OUT1.
Undervoltage Lockout
Initial power-up of the MAX8621Y/MAX8621Z occurs
when V is greater than 2.85V (typ) and PWRON
IN
asserts. Once V exceeds 2.85V (typ), the undervolt-
IN
⎛
⎞
V
V
OUT
age lockout has 0.5V of hysteresis, allowing the V
IN
R1=R2
−1
⎟
⎜
⎝
⎠
FB
operating range to drop down to 2.35V (typ) without
shutting down.
where V = 0.6V. For BUCK2, R3 and R4 are calculated
FB
using the same methods.
Current Limiting
The MAX8621Y/MAX8621Z OUT1 and OUT2 LDOs limit
their output current to 550mA (typ). OUT3 and OUT4
LDOs limit their output current to 360mA (typ). If the LDO
output current exceeds the current limit, the correspond-
ing LDO output voltage drops. The step-down converters
(BUCK1 and BUCK2) limit the p-channel MOSFET to
670mA (min) and the n-channel MOSFET to 750mA (min).
Input Capacitor
The input capacitor, C , reduces the current peaks
IN1
drawn from the battery or input power source and
reduces switching noise in the IC. The impedance of
C
at the switching frequency should be kept very
IN1
low. Ceramic capacitors with X5R or X7R dielectrics are
highly recommended due to their small size, low ESR,
and small temperature coefficients. Due to the
MAX8621Y/MAX8621Z step-down converter’s fast soft-
start, the input capacitance can be very low. Use a
10µF ceramic capacitor or an equivalent amount of
multiple capacitors in parallel between IN1 and ground.
Reference Bypass Capacitor
Node (REFBP)
An external 0.01µF bypass capacitor and an internal
100kΩ (typ) resistor at REFBP create a lowpass filter for
LDO noise reduction. OUT1, OUT2, OUT3, and OUT4
exhibit 45µV
of output voltage noise with C
=
OUT4
RMS
REFBP
= C
Connect C
as close to the IC as possible to minimize
IN1
0.01µF, C
= 2.2µF.
= C
= 4.7µF, and C
OUT1
OUT2
OUT3
the impact of PC board trace inductance. Use a 4.7µF
ceramic capacitor from IN2 to ground and a second
4.7µF ceramic capacitor from IN3 to ground.
12 ______________________________________________________________________________________
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
Inductor Selection
The MAX8621Y/MAX8621Z step-down converters oper-
ate with inductors between 1µH and 4.7µH. Low-induc-
tance values are physically smaller but require faster
switching, resulting in some efficiency loss. See the
Typical Operating Characteristics for efficiency and
switching frequency vs. inductor value plots. The
inductor’s DC current rating needs to be only 100mA
greater than the application’s maximum load current
because the step-down converter features zero-current
overshoot during startup and load transients.
For output voltages above 2.0V, when light-load effi-
ciency is important, the minimum recommended induc-
tor is 2.2µH. For optimum voltage-positioning load
transients, choose an inductor with DC series resis-
tance in the 50mΩ to 150mΩ range. For higher efficien-
cy at heavy loads (above 200mA) or minimal load
regulation (but some transient overshoot), the resis-
tance should be kept below 100mΩ. For light-load
applications up to 200mA, much higher resistance is
acceptable with very little impact on performance. See
Table 2 for some suggested inductors.
Table 2. Suggested Inductors
INDUCTANCE
ESR
(Ω)
CURRENT RATING
(mA)
MANUFACTURER
SERIES
CB2012
LB2012
DIMENSIONS
(µH)
2.2
4.7
0.23
0.40
410
300
2.0 x 1.25 x 1.25
= 3.1mm3
1.0
2.2
0.15
0.23
300
240
2.0 x 1.25 x 1.25
= 3.1mm3
1.0
1.5
2.2
3.3
0.09
0.11
0.13
0.20
455
350
315
280
2.0 x 1.6 x 1.8
= 5.8mm3
LB2016
LB2518
Taiyo Yuden
1.0
1.5
2.2
3.3
0.06
0.07
0.09
0.11
500
400
340
270
2.5 x 1.8 x 2.0
= 9mm3
1.0
1.5
2.2
3.3
4.7
0.08
0.11
0.13
0.16
0.20
775
660
600
500
430
2.5 x 1.8 x 2.0
= 9mm3
LBC2518
1.0
2.2
4.7
0.06
0.10
0.15
1000
790
650
3.2 x 2.5 x 1.7
= 14mm3
LQH32C_53
LQM43FN
D310F
Murata
2.2
4.7
0.10
0.17
400
300
4.5 x 3.2 x 0.9
= 13mm3
1.5
2.2
3.3
0.13
0.17
0.19
1230
1080
1010
3.6 x 3.6 x 1.0
= 13mm3
TOKO
1.5
2.2
2.7
3.3
0.10
0.12
0.15
0.17
1290
1140
980
3.6 x 3.6 x 1.2
= 16mm3
D312C
900
1.5
2.2
3.3
4.7
0.05
0.08
0.10
0.14
900
780
600
500
3.2 x 3.2 x 1.2
= 12mm3
Sumida
CDRH2D11
______________________________________________________________________________________ 13
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
Output Capacitor
The output capacitors, C7 and C9 in Figure 3, are
required to keep the output voltage ripple small and to
ensure regulation loop stability. C7 and C9 must have
low impedance at the switching frequency. Ceramic
capacitors with X5R or X7R dielectric are highly recom-
mended due to their small size, low ESR, and small
temperature coefficients. Due to the unique feedback
network, the output capacitance can be very low. For
most applications, a 2.2µF capacitor is sufficient. For
optimum load-transient performance and very low out-
put ripple, the output capacitor value in µF should be
equal or larger than the inductor value in µH.
Thermal Considerations
The MAX8621Y/MAX8621Z total power dissipation, P ,
D
is estimated using the following equations:
P = P
+ P
+ P
D
LOSS(BUCK1)
LOSS(BUCK2) LOSS(OUT1)
+ P
+ P
+ P
LOSS(OUT2)
LOSS(OUT3) LOSS(OUT4)
P
= P
× 1− η/100
LOSS(BUCK1)
IN(BUCK1)
(
)
2
−I
× R
BUCK1
DC(INDUCTOR)
P
= P
× 1− η/100
LOSS(BUCK2)
IN(BUCK2)
(
)
2
−I
× R
BUCK2
DC(INDUCTOR)
Feed-Forward Capacitor
P
=I
× V − V
LOSS(OUT1) OUT1
(
IN
OUT1
)
The feed-forward capacitors, C (C6 and C8 in Figure
FF
3), set the feedback loop response, control the switch-
ing frequency, and are critical in obtaining the best effi-
ciency possible. Choose a small ceramic X7R
capacitor with value given by:
P
=I
× V − V
LOSS(OUT2) OUT2
(
IN
OUT2
)
)
P
=I
× V − V
LOSS(OUT3) OUT3
(
IN
OUT3
P
=I
× V − V
LOSS(OUT4) OUT4
IN
OUT4
L1
R1
C6 =
×10Siemens
where P
is the input power for BUCK1, η is the
IN(BUCK1)
step-down converter efficiency, and R
the inductor’s DC resistance.
is
DC(INDUCTOR)
Select the closest standard value to C as possible.
FF
For BUCK2, C8, R3, and L1 are calculated using the
same methods.
For example, operating with V = 3.7V, V
BUCK2
OUT4
330mA, I
and η = 80%, P
= 1.376V,
IN
OUT2
BUCK1
V
V
= 1.8V, V
= V
= 2.6V, V
= 1.8V,
OUT1
OUT3
= 3V, I
OUT3
= I
= 300mA, I
= I
=
BUCK1
= I
IN(BUCK2)
BUCK2
OUT1
OUT2
= 100mA, P
= 516mW
LDO Output Capacitor and
Regulator Stability
OUT4
IN(BUCK1)
= 651mW and η = 83%:
= 363mW
LOSS(OUT2)
Connect a 4.7µF ceramic capacitor between OUT1 and
ground, and a second 4.7µF ceramic capacitor
between OUT2 and ground for 300mA applications. For
150mA applications, 2.2µF ceramic capacitors can be
used for OUT1 and OUT2. Connect a 2.2µF ceramic
capacitor between OUT3 and ground, and a second
2.2µF ceramic capacitor between OUT4 and ground.
P
= P
LOSS(OUT1)
P
= 190mW
= 70mW
= 94mW
LOSS(OUT3)
P
LOSS(OUT4)
P
LOSS(BUCK1)
The LDO output capacitor’s (C
) equivalent series
OUT
P
= 102mW
resistance (ESR) affects stability and output noise. Use
output capacitors with an ESR of 0.1Ω or less to ensure
stability and optimum transient response. Surface-
mount ceramic capacitors have very low ESR and are
commonly available in values up to 10µF. Connect
LOSS(BUCK2)
P
= 363mW + 363mW +190mW + 70mW
+ 94mW +102mW = 1182mW
D
C
as close to the IC as possible to minimize the
impact of PC board trace inductance.
OUT_
14 ______________________________________________________________________________________
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
INPUT
2.6V TO 5.5V
C3
C2
4.7μF
4.7μF
IN3
IN2
INP
OUT1
IN
OUT
UVLO
C5
4.7μF
REF
14kΩ
LDO1
GND
EN
REFBP
GND
9-BIT SEL
C4
0.01μF
REF
RESET
RESET
INPUT
2.6V TO 5.5V
DR
IN1
1.3Ω, 200mA
INP
IN
C1
10μF
N
L1
P
2.2μH
LX1
STEP-DOWN
DC-DC (1, BUCK1)
BUCK1
LX
REF
EN
R1
150kΩ
PGND1
PGND2
C7
2.2μF
C6
150pF
ENDR
N
PGND
FB
FB1
IN1
R2
115kΩ
INP
IN
INP
L2
2.2μH
OUT3
P
IN
OUT
C11
2.2μF
LX2
STEP-DOWN
DC-DC (2, BUCK2)
BUCK2
LX
REF
EN
R3
150kΩ
C8
150pF
C9
2.2μF
N
REF
EN
LDO3
PGND2
FB2
PGND
FB
R4
9-BIT SEL
75kΩ
GND
INP
IN
EN3
OUT2
OUT
C10
4.7μF
INP
REF
OUT4
LDO2
IN
OUT
C12
2.2μF
EN
REF
EN
LDO4
9-BIT SEL
GND
EN2
9-BIT SEL
GND
800kΩ
EN4
SEL1
SEL2
VOLTAGE
SELECTOR
PWRON
ON/OFF CONTROL
800kΩ
THERMAL
SHUTDOWN
MAX8621Y
MAX8621Z
Figure 3. Functional Diagram and Typical Application Schematic
______________________________________________________________________________________ 15
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
The die junction temperature can be calculated as follows:
Connect GND and PGND_ to the ground plane. The
external feedback network should be very close to the
FB pin, within 0.2in (5mm). Keep noisy traces, such as
the LX node, as short as possible. Connect GND to the
exposed paddle directly under the IC. Refer to the
MAX8621Y/MAX8621Z evaluation kit for an example PC
board layout and routing.
T = T +P × θ
JA
J
A
D
When operating at an ambient temp of +70°C under the
above conditions:
°C
W
⎛
⎝
⎞
T = 70°C +1.182W 36
= 112.6°C
⎜
⎟
⎠
J
Chip Information
TRANSISTOR COUNT: 5850
T should not exceed +150°C in normal operating con-
J
ditions.
PROCESS: BiCMOS
Printed Circuit Board Layout and Routing
High switching frequencies and relatively large peak
currents make the PC board layout a very important
aspect of design. Good design minimizes excessive
EMI on the feedback paths and voltage gradients in the
ground plane, both of which can result in instability or
Pin Configuration
TOP VIEW
regulation errors. Connect C
close to IN_ and GND.
IN_
Connect the inductor and output capacitors (C
) as
OUT_
18 17 16 15 14 13
close to the IC as possible and keep the traces short,
direct, and wide.
OUT1
RESET
IN2
DR 19
12
11
10
9
The traces between C , C , and FB_ are sensitive
OUT_ FF_
PGND2 20
to inductor magnetic field interference. Route these
traces between ground planes or keep the traces away
from the inductors.
21
22
23
24
LX2
IN1
MAX8621Y
MAX8621Z
OUT2
EN2
LX1
8
EN3
7
PGND1
3
4
5
6
1
2
A "+" SIGN WILL REPLACE THE FIRST PIN INDICATOR ON LEAD-FREE PACKAGES.
16 ______________________________________________________________________________________
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE,
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
1
E
21-0139
2
______________________________________________________________________________________ 17
Dual Step-Down DC-DC Power-Management ICs
for Portable Devices
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE,
12, 16, 20, 24, 28L THIN QFN, 4x4x0.8mm
2
E
21-0139
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2005 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products, Inc.
相关型号：
MAX8621YETG+T
Power Supply Support Circuit, Adjustable, 6 Channel, BICMOS, 4 X 4 MM, 0.80 MM HEIGHT, LEAD FREE, TQFN-24
MAXIM
MAX8621YETG-T
Power Supply Support Circuit, Adjustable, 6 Channel, BICMOS, 4 X 4 MM, 0.80 MM HEIGHT, TQFN-24
MAXIM
MAX8621ZETG+
Power Supply Support Circuit, Adjustable, 6 Channel, BICMOS, 4 X 4 MM, 0.80 MM HEIGHT, LEAD FREE, TQFN-24
MAXIM
MAX8621ZETG+T
Power Supply Support Circuit, Adjustable, 6 Channel, BICMOS, 4 X 4 MM, 0.80 MM HEIGHT, LEAD FREE, TQFN-24
MAXIM
MAX8621ZETG-T
Power Supply Support Circuit, Adjustable, 6 Channel, BICMOS, 4 X 4 MM, 0.80 MM HEIGHT, TQFN-24
MAXIM
MAX8622ETB+
1.76 A SWITCHING REGULATOR, 300 kHz SWITCHING FREQ-MAX, PDSO8, 3 X 3 MM, 0.80 MM HEIGHT, TDFN-8
ROCHESTER
©2020 ICPDF网 联系我们和版权申明