MAX745 [MAXIM]

Switch-Mode Lithium-Ion Battery-Charger; 开关模式锂离子电池充电器
MAX745
型号: MAX745
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

Switch-Mode Lithium-Ion Battery-Charger
开关模式锂离子电池充电器

电池 开关
文件: 总8页 (文件大小:93K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
19-1182; Rev 2; 12/98  
S w it c h -Mo d e Lit h iu m -Io n  
Ba t t e ry-Ch a rg e r  
MAX745  
Ge n e ra l De s c rip t io n  
____________________________Fe a t u re s  
The MAX745 p rovid e s a ll func tions ne c e s s a ry for  
charging lithium-ion battery packs. It provides a regu-  
lated charging current of up to 4A without getting hot,  
and a regulated voltage with only ±0.75% total error at  
the battery terminals. It uses low-cost, 1% resistors to  
set the output voltage, and a low-cost N-channel MOS-  
FET as the power switch.  
Charges 1 to 4 Lithium-Ion Battery Cells  
±0.75% Voltage-Regulation Accuracy  
Using 1% Resistors  
Provides up to 4A without Excessive Heating  
90% Efficient  
Uses Low-Cost Set Resistors and  
N-Channel Switch  
The MAX745 regulates the voltage set point and charg-  
ing current using two loops that work together to transi-  
tion smoothly between voltage and current regulation.  
The p e r-c e ll b a tte ry volta g e re g ula tion limit is s e t  
between 4.0V and 4.4V using standard 1% resistors,  
and then the number of cells is set from 1 to 4 by pin-  
strapping. Total output voltage error is less than ±0.75%.  
Up to 24V Input  
Up to 18V Maximum Battery Voltage  
300kHz PWM Operation: Low-Noise,  
Small Components  
Stand-Alone Operation; No Microcontroller  
Needed  
For a similar device with an SMBus™ microcontroller  
interface and the ability to charge NiCd and NiMH cells,  
refer to the MAX1647 and MAX1648. For a low-cost  
lithium-ion c ha rg e r us ing a line a r-re g ula tor c ontrol  
scheme, refer to the MAX846A.  
________________________Ap p lic a t io n s  
Lithium-Ion Battery Packs  
Desktop Cradle Chargers  
Cellular Phones  
Ord e rin g In fo rm a t io n  
Notebook Computers  
Hand-Held Instruments  
PART  
MAX745C/D  
MAX745EAP  
TEMP. RANGE  
0°C to +70°C  
PIN-PACKAGE  
Dice*  
-40°C to +85°C  
20 SSOP  
Pin Configuration appears on last page.  
*Dice are tested at T = +25°C.  
A
___________________________________________________Typ ic a l Op e ra t in g Circ u it  
V
IN  
(UP TO 24V)  
DCIN  
VL  
BST  
DHI  
CELL  
COUNT  
SELECT  
CELL0  
CELL1  
N
N
MAX745  
ON  
LX  
OFF  
THM/SHDN  
REF  
DLO  
I
CHARGE  
SETI  
CS  
VADJ  
R
SENSE  
SET PER  
CELL VOLTAGE  
WITH 1% RESISTORS  
STATUS  
BATT  
CCV CCI GND IBAT PGND  
VOUT  
1–4 Li+ CELLS  
(UP TO 18V)  
SMBus is a trademark of Intel Corp.  
________________________________________________________________ Maxim Integrated Products  
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.  
For small orders, phone 1-800-835-8769.  
S w it c h -Mo d e Lit h iu m -Io n  
Ba t t e ry Ch a rg e r  
ABSOLUTE MAXIMUM RATINGS  
DCIN to GND ............................................................-0.3V to 26V  
BST, DHI to GND ......................................................-0.3V to 30V  
BST to LX ....................................................................-0.3V to 6V  
DHI to LX............................................(LX - 0.3V) to (BST + 0.3V)  
LX to GND ................................................-0.3V to (DCIN + 0.3V)  
VL to GND...................................................................-0.3V to 6V  
CELL0, CELL1, IBAT, STATUS, CCI, CCV,  
BATT, CS to GND .....................................................-0.3V to 20V  
PGND to GND..........................................................-0.3V to 0.3V  
VL Current...........................................................................50mA  
Continuous Power Dissipation (T = +70°C)  
A
SSOP (derate 8.00mW/°C above +70°C) ......................640mW  
Operating Temperature Range ...........................-40°C to +85°C  
Storage Temperature .........................................-60°C to +150°C  
Lead Temperature (soldering, 10sec) .............................+300°C  
MAX745  
REF, SETI, VADJ, DLO, THM/SHDN to GND ..-0.3V to (VL + 0.3V)  
Stresses beyond those listed under Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional  
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to  
absolute maximum rating conditions for extended periods may affect device reliability.  
ELECTRICAL CHARACTERISTICS  
(V  
DCIN  
= 18V, V  
= 8.4V, T = 0°C to +85°C. Typical values are at T = +25°C, unless otherwise noted.)  
BATT  
A
A
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
SUPPLY AND REFERENCE  
DCIN Input Voltage Range  
6
24  
6
V
mA  
V
DCIN Quiescent Supply Current  
VL Output Voltage  
6.0V < V  
< 24V, logic inputs = VL  
< 24V, no load  
4
DCIN  
6.0V < V  
5.15  
4.17  
4.16  
5.40  
4.2  
4.2  
10  
5.65  
4.23  
4.24  
20  
DCIN  
T
A
= +25°C  
REF Output Voltage  
V
6.0V < V  
< 24V  
DCIN  
REF Output Load Regulation  
0 < I  
< 1mA  
mV/mA  
REF  
SWITCHING REGULATOR  
Oscillator Frequency  
DHI Maximum Duty Cycle  
DHI On-Resistance  
270  
89  
300  
93  
4
330  
kHz  
%
Output high or low  
Output high or low  
7
14  
5
DLO On-Resistance  
6
VL < 3.2V, V  
= 12V  
BATT  
µA  
µA  
BATT Input Current  
CS Input Current  
VL > 5.15V, V  
= 12V  
500  
5
BATT  
VL < 3.2V, V = 12V  
CS  
VL > 5.15V, V = 12V  
400  
19  
CS  
BATT, CS Input Voltage Range  
4V < V  
< 16V  
0
V
BATT  
CS to BATT Offset Voltage (Note 1)  
±1.5  
185  
18  
mV  
SETI = V  
(full scale)  
170  
14  
205  
22  
REF  
CS to BATT  
Current-Sense Voltage  
mV  
%
SETI = 400mV  
Not including VADJ resistor tolerance  
With 1% tolerance VADJ resistors  
-0.65  
-0.75  
0.65  
0.75  
Absolute Voltage Accuracy  
2
_______________________________________________________________________________________  
S w it c h -Mo d e Lit h iu m -Io n  
Ba t t e ry Ch a rg e r  
MAX745  
ELECTRICAL CHARACTERISTICS (continued)  
(V  
DCIN  
= 18V, V  
= 8.4V, T = 0°C to +85°C. Typical values are at T = +25°C, unless otherwise noted.)  
BATT  
A
A
PARAMETER  
ERROR AMPLIFIERS  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
µA/V  
µA/V  
µA  
GMV Amplifier Transconductance  
GMI Amplifier Transconductance  
GMV Amplifier Output Current  
800  
200  
±130  
±320  
80  
µA  
GMI Amplifier Output Current  
CCI Clamp Voltage with Respect to CCV  
CCV Clamp Voltage with Respect to CCI  
1.1V < V  
< 3.5V  
25  
25  
200  
200  
mV  
mV  
CCV  
1.1V < V  
< 3.5V  
80  
CCI  
CONTROL INPUTS/OUTPUTS  
CELL0, CELL1 Input Bias Current  
SETI Input Voltage Range (Note 1)  
VADJ Adjustment Range  
µA  
V
-1  
0
1
V
REF  
10  
%
nA  
V
SETI, VADJ Input Bias Current  
VADJ Input Voltage Range  
-10  
0
10  
V
REF  
2.20  
2.01  
2.3  
2.1  
2.34  
V
THM/SHDN Rising Threshold  
THM/SHDN Falling Threshold  
2.19  
V
Charger in current-regulation mode,  
STATUS sinking 1mA  
STATUS Output Low Voltage  
0.2  
V
Charger in voltage-regulation mode,  
µA  
STATUS Output Leakage Current  
1
2
V
= 5V  
STATUS  
IBAT Output Current vs.  
Current-Sense Voltage  
µA/mV  
V
IBAT  
= 2V  
0.9  
IBAT Compliance Voltage Range  
0
V
ELECTRICAL CHARACTERISTICS  
(V  
DCIN  
= 18V, V = 8.4V, T = -40°C to +85°C, unless otherwise noted. Limits over temperature are guaranteed by design.)  
BATT A  
PARAMETER  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
SUPPLY AND REFERENCE  
VL Output Voltage  
6.0V < V  
< 24V, no load  
< 24V  
5.10  
4.14  
5.70  
4.26  
V
V
DCIN  
REF Output Voltage  
6.0V < V  
DCIN  
SWITCHING REGULATOR (Note 1)  
Oscillator Frequency  
260  
340  
7
kHz  
DHI On-Resistance  
DLO On-Resistance  
Output high or low  
Output high or low  
14  
CS to BATT Full-Scale  
Current-Sense Voltage  
165  
-1.0  
205  
1.0  
mV  
%
Absolute Voltage Accuracy  
Not including VADJ resistors  
Note 1: When V  
= 0V, the battery charger turns off.  
SETI  
_______________________________________________________________________________________  
3
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Ba t t e ry Ch a rg e r  
__________________________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s  
(T = +25°C, V  
= 18V, V  
= 4.2V, CELL0 = CELL1 = GND, C = 4.7µF, C = 0.1µF. Circuit of Figure 1, unless  
REF  
A
DCIN  
BATT  
VL  
otherwise noted.)  
BATTERY VOLTAGE  
vs. CHARGING CURRENT  
CURRENT-SENSE VOLTAGE  
vs. SETI VOLTAGE  
4.5  
200  
R1 = 0.2  
180  
160  
4.0  
3.5  
MAX745  
140  
120  
3.0  
2.5  
100  
80  
2.0  
1.5  
1.0  
0.5  
60  
40  
R1 = 0.2Ω  
R16 = SHORT  
R12 = OPEN CIRCUIT  
20  
0
0
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0  
CHARGING CURRENT (A)  
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0  
SETI VOLTAGE (V)  
REFERENCE VOLTAGE  
vs. TEMPERATURE  
VOLTAGE LIMIT  
vs. VADJ VOLTAGE  
4.205  
4.204  
4.203  
4.45  
4.40  
4.35  
4.30  
4.25  
4.20  
4.15  
4.10  
4.05  
4.00  
3.95  
4.202  
4.201  
4.200  
4.199  
4.198  
4.197  
4.196  
4.195  
0
25  
50  
75  
100  
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5  
VADJ VOLTAGE (V)  
TEMPERATURE (°C)  
VL LOAD REGULATION  
REFERENCE LOAD REGULATION  
5.50  
5.45  
5.40  
4.25  
4.24  
4.23  
5.35  
5.30  
5.25  
5.20  
5.15  
5.10  
4.22  
4.21  
4.20  
4.19  
4.18  
4.17  
4.16  
4.15  
5.05  
0
0
5
10  
15  
20  
25  
0
500 1000 1500 2000 2500 3000  
VL OUTPUT CURRENT (mA)  
REFERENCE CURRENT (µA)  
4
_______________________________________________________________________________________  
S w it c h -Mo d e Lit h iu m -Io n  
Ba t t e ry Ch a rg e r  
MAX745  
______________________________________________________________P in De s c rip t io n  
PIN  
NAME  
FUNCTION  
Current-Sense Amplifiers Analog Current-Source Output. See Monitoring Charge Current section for  
detailed description.  
1
IBAT  
2
3
4
5
DCIN  
VL  
Charger Input Voltage. Bypass DCIN with a 0.1µF capacitor.  
Chip Power Supply. Output of the 5.4V linear regulator from DCIN. Bypass VL with a 4.7µF capacitor.  
Voltage-Regulation-Loop Compensation Point  
CCV  
CCI  
Current-Regulation-Loop Compensation Point  
THM/  
SHDN  
Thermistor Sense-Voltage Input. THM/SHDN also performs the shutdown function. If pulled low,  
the charger turns off.  
6
7
8
REF  
4.2V Reference Voltage Output. Bypass REF with a 0.1µF or greater capacitor.  
Voltage-Adjustment Pin. VADJ is tied to a 1% tolerance external resistor-divider to adjust the voltage set  
point by 10%, eliminating the need for precision 0.1% resistors. The input voltage range is 0V to V  
VADJ  
.
REF  
9
SETI  
GND  
SETI is externally tied to the resistor-divider between REF and GND to set the charging current.  
Analog Ground  
10  
CELL1,  
CELL0  
11, 12  
Logic Inputs to Select Cell Count. See Table 1 for cell-count programming.  
An open-drain MOSFET sinks current when in current-regulation mode, and is high impedance when in volt-  
age-regulation mode. Connect STATUS to VL through a 1kto 100kpull-up resistor. STATUS may also drive  
an LED for visual indication of regulation mode (see MAX745 evaluation kit). Leave STATUS floating if not used.  
13  
STATUS  
14  
15  
16  
17  
18  
19  
20  
BATT  
CS  
Battery-Voltage-Sense Input and Current-Sense Negative Input  
Current-Sense Positive Input  
PGND  
DLO  
DHI  
Power Ground  
Low-Side Power MOSFET Driver Output  
High-Side Power MOSFET Driver Output  
Power Connection for the High-Side Power MOSFET Source  
Power Input for the High-Side Power MOSFET Driver  
LX  
BST  
current-regulation limit before the voltage limit, causing  
_______________De t a ile d De s c rip t io n  
the system to regulate current. As the battery charges,  
the voltage rises to the point where the voltage limit is  
reached and the charger switches to regulating volt-  
age. The STATUS pin indicates whether the charger is  
regulating current or voltage.  
The MAX745 is a s witc h-mod e , lithium-ion b a tte ry  
charger that can achieve 90% efficiency. The charge  
voltage and current are set independently by external  
resistor-dividers at SETI and VADJ, and at pin connec-  
tions at CELL0 and CELL1. VADJ is connected to a  
resistor-divider to set the charging voltage. The output  
voltage-adjustment range is ±5%, eliminating the need  
for 0.1% resistors while still achieving 0.75% set accu-  
racy using 1% resistors.  
Vo lt a g e Co n t ro l  
To set the voltage limit on the battery, tie a resistor-  
divider to VADJ from REF. A 0V to V  
change at  
REF  
VADJ sets a ±5% change in the battery limit voltage  
around 4.2V. Since the 0 to 4.2V range on VADJ results  
in only a 10% change on the voltage limit, the resistor-  
dividers accuracy does not need to be as high as the  
output voltage accuracy. Using 1% resistors for the  
voltage dividers typically results in no more than 0.1%  
degradation in output voltage accuracy. VADJ is inter-  
nally buffered so that high-value resistors can be used  
to set the output voltage. When the voltage at VADJ is  
The MAX745 consists of a current-mode, pulse-width-  
modulated (PWM) controller and two transconductance  
error amplifiers: one for regulating current (GMI) and  
the other for regulating voltage (GMV) (Figure 2). The  
error amplifiers are controlled via the SETI and VADJ  
pins. Whether the MAX745 is controlling voltage or cur-  
rent at any time depends on the battery state. If the bat-  
tery is discharged, the MAX745 output reaches the  
_______________________________________________________________________________________  
5
S w it c h -Mo d e Lit h iu m -Io n  
Ba t t e ry Ch a rg e r  
V
REF  
/ 2, the voltage limit is 4.2V. Table 1 defines the  
whe re V  
= 4.2V a nd c e ll c ount is 1, 2, 3, or 4  
REF  
battery cell count.  
(Table 1).  
The battery limit voltage is set by the following:  
The voltage-regulation loop is compensated at the CCV  
pin. Typically, a series-resistor-capacitor combination  
can be used to form a pole-zero doublet. The pole  
introduced rolls off the gain starting at low frequencies.  
The zero of the doublet provides sufficient AC gain at  
mid-frequencies. The output capacitor (C1) rolls off the  
mid-frequency gain to below unity. This guarantees sta-  
bility before encountering the zero introduced by the  
C1s e q uiva le nt s e rie s re s is ta nc e (ESR). The GMV  
amplifiers output is internally clamped to between one-  
fourth and three-fourths of the voltage at REF.  
1
V
V
REF  
ADJ  
2
V
=
cell count x V  
+
(
)
BATT  
REF  
9.523  
MAX745  
Solving for V  
, we get:  
ADJ  
9.523 V  
BATT  
V
=
9.023V  
REF  
ADJ  
cell count  
(
)
Set V  
and determine R3 by:  
by choosing a value for R11 (typically 100k),  
Cu rre n t Co n t ro l  
The charging current is set by a combination of the cur-  
rent-sense resistor value and the SETI pin voltage. The  
current-sense amplifier measures the voltage across  
the current-sense resistor, between CS and BATT. The  
current-sense amplifiers gain is 6. The voltage on SETI  
is buffered and then divided by 4. This voltage is com-  
p a re d to the c urre nt-s e ns e a mp lifie rs outp ut.  
Therefore, full-scale current is accomplished by con-  
necting SETI to REF. The full-scale charging current  
ADJ  
R3 = [1 - (V  
/ V )] x R11 (Figure 1)  
ADJ  
REF  
Table 1. Cell-Count Programming Table  
CELL0  
GND  
VL  
CELL1  
GND  
GND  
VL  
CELL COUNT  
1
2
3
4
(I  
FS)  
is set by the following:  
GND  
VL  
I
FS  
= 185mV / R1 (Figure 1)  
VL  
(UP TO 24V)  
V
IN  
D2  
C6  
0.1µF  
C5  
4.7µF  
IN4148  
VL  
DCIN  
BST  
REF  
C7  
0.1µF  
M1A  
1/2 IRF7303  
R15  
10k  
R16  
R12  
L1  
22µH  
DHI  
LX  
C4  
0.1µF  
THM/SHDN  
R3  
100k  
1%  
MAX745  
1/2 IRF7303  
M1B  
THM 1  
D6  
MBRS  
340T3  
D1  
DLO  
MBRS  
340T3  
SETI  
PGND  
CS  
0.2Ω  
R1  
VADJ  
R2  
10k  
C2, 0.1µF  
BATT  
C1  
68µF  
CCV  
CCI  
R11  
100k  
1%  
BATTERY  
STATUS  
IBAT  
GND  
C3  
47nF  
Figure 1. Standard Application Circuit  
_______________________________________________________________________________________  
6
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Ba t t e ry Ch a rg e r  
MAX745  
To s e t c urre nts b e low full s c a le without c ha ng ing  
R1, adjust the voltage at SETI according to the follow-  
ing formula:  
R
must be chosen to limit V  
to voltages below  
IBAT  
IBAT  
2V for the maximum charging current. Connect IBAT to  
GND if unused.  
I
= I (V  
/ V  
)
SETI  
REF  
CHG  
FS  
P WM Co n t ro lle r  
The b a tte ry volta g e or c urre nt is c ontrolle d b y a  
current-mode, PWM DC/DC converter controller. This  
controller drives two external N-channel MOSFETs,  
which control power from the input source. The con-  
troller sets the switched voltages pulse width so that it  
supplies the desired voltage or current to the battery.  
Tota l c omp one nt c os t is re d uc e d b y us ing a d ua l,  
N-channel MOSFET.  
A capacitor at CCI sets the current-feedback loops  
dominant pole. While the current is in regulation, CCV  
voltage is clamped to within 80mV of the CCI voltage.  
This prevents the battery voltage from overshooting  
when the voltage setting is changed. The converse is  
true when the voltage is in regulation and the current  
setting is changed. Since the linear range of CCI or  
CCV is about 2V (1.5V to 3.5V), the 80mV clamp results  
in negligible overshoot when the loop switches from  
voltage regulation to current regulation, or vice versa.  
The heart of the PWM controller is a multi-input com-  
parator. This comparator sums three input signals to  
determine the switched signal’s pulse width, setting the  
battery voltage or current. The three signals are the  
current-sense amplifiers output, the GMV or GMI error  
amplifiers output, and a slope-compensation signal  
that ensures that the current-control loop is stable.  
Mo n it o rin g Ch a rg e Cu rre n t  
The battery-charging current can be externally moni-  
tored by placing a scaling resistor (R  
IBAT and GND. IBAT is the output of a voltage-con-  
trolled current source, with output current given by:  
) between  
IBAT  
The PWM c omp a ra tor c omp a re s the c urre nt-s e ns e  
amplifiers output to the lower output voltage of either  
the GMV or GMI amplifiers (the error voltage). This cur-  
rent-mode feedback reduces the effect of the inductor  
on the output filter LC formed by the output inductor  
(L1) and C1 (Figure 1). This makes stabilizing the cir-  
cuit much easier, since the output filter changes to a  
first-order RC from a complex, second-order RLC.  
I
= 0.9µA/V  
SENSE  
BAT  
where V  
is the voltage across the current-sense  
resistor (in millivolts) given by:  
SENSE  
V
= V - V  
= I  
x R1  
SENSE  
CS  
BATT  
CHG  
The voltage across R  
is then given by:  
IBAT  
R
0.9µA  
IBAT  
R
1
V
=
x
IBAT  
I
CHG  
IBAT  
DCIN  
CURRENT  
SENSE  
BATT  
CS  
5.4V  
REG  
4.2  
REF  
REF  
A = 6  
V
ON  
VL  
STATUS  
GMI  
1
/
SETI  
CCI  
4
BST  
DHI  
LX  
PWM  
VL  
LOGIC  
CLAMP  
DLO  
PGND  
THM/SHDN  
GMV  
VADJ  
CCV  
REF  
2
CELL0  
CELL1  
CELL  
LOGIC  
GND  
Figure 2. Functional Diagram  
_______________________________________________________________________________________  
7
S w it c h -Mo d e Lit h iu m -Io n  
Ba t t e ry Ch a rg e r  
MOS FET Drive rs  
The MAX745 drives external N-channel MOSFETs to  
switch the input source generating the battery voltage or  
current. Since the high-side N-channel MOSFETs gate  
must be driven to a voltage higher than the input source  
voltage, a charge pump is used to generate such a volt-  
age. The capacitor (C7) charges through D2 to approxi-  
mately 5V when the synchronous rectifier (M1B) turns on  
(Figure 1). Since one side of C7 is connected to LX (the  
source of M1A), the high-side driver (DHI) drives the gate  
up to the voltage at BST, which is greater than the input  
voltage while the high-side MOSFET is on.  
Min im u m In p u t Vo lt a g e  
The input voltage to the charger circuit must be greater  
than the maximum battery voltage by approximately 2V  
so the charger can regulate the voltage properly. The  
input voltage can have a large AC-ripple component  
when operating from a wall cube. The voltage at the low  
point of the ripple waveform must still be approximately  
2V greater than the maximum battery voltage.  
MAX745  
Using components as indicated in Figure 1, the minimum  
input voltage can be determined by the following formula:  
[V  
+ V + I (  
CHG  
R
+ R + R1)]  
L
DS(ON)  
BATT  
D6  
V
IN  
x
0.89  
where: V is the input voltage;  
The synchronous rectifier (M1B) behaves like a diode  
but has a smaller voltage drop, improving efficiency. A  
small dead time is added between the time when the  
high-side MOSFET is turned off and when the synchro-  
nous re c tifie r is turne d on, a nd vic e ve rs a . This  
prevents crowbar currents during switching transitions.  
Place a Schottky rectifier from LX to ground (D1, across  
M1Bs drain and source) to prevent the synchronous  
rectifiers body diode from conducting during the dead  
time. The body diode typically has slower switching-  
recovery times, so allowing it to conduct degrades  
e ffic ie nc y. D1 c a n b e omitte d if e ffic ie nc y is not a  
concern, but the resulting increased power dissipation  
in the synchronous rectifier must be considered.  
IN  
V
D6  
is the voltage drop across D6  
(typically 0.4V to 0.5V);  
I
is the charging current;  
CHG  
R
is the high-side  
DS(ON)  
MOSFET M1As on-resistance;  
R is the the inductors series resistance;  
L
R1 is the current-sense resistor R1s value.  
__________________P in Co n fig u ra t io n  
Since the BST capacitor is charged while the synchro-  
nous rectifier is on, the synchronous rectifier may not be  
replaced by a rectifier. The BST capacitor will not fully  
charge without the synchronous rectifier, leaving the high-  
side MOSFET with insufficient gate drive to turn on.  
However, the synchronous rectifier can be replaced with  
a small MOSFET (such as a 2N7002) to guarantee that  
the BST capacitor is allowed to charge. In this case, the  
majority of the high charging currents are carried by D1,  
and not by the synchronous rectifier.  
TOP VIEW  
IBAT  
DCIN  
BST  
20  
1
2
3
4
5
6
7
8
9
19 LX  
VL  
18 DHI  
17 DLO  
16 PGND  
CCV  
MAX745  
CCI  
THM/SHDN  
REF  
15  
14  
13  
CS  
BATT  
STATUS  
In t e rn a l Re g u la t o r a n d Re fe re n c e  
The MAX745 uses an internal low-dropout linear regula-  
tor to create a 5.4V power supply (VL), which powers its  
internal circuitry. The VL regulator can supply up to  
25mA. Since 4mA of this current powers the internal cir-  
cuitry, the remaining 21mA can be used for external cir-  
c uitry. MOSFET g a te -d rive c urre nt c ome s from VL,  
which must be considered when drawing current for  
other functions. To estimate the current required to drive  
the MOSFETs, multiply the sum of the MOSFET gate  
charges by the switching frequency (typically 300kHz).  
Bypass VL with a 4.7µF capacitor to ensure stability.  
VADJ  
SETI  
12 CELL0  
11 CELL1  
GND 10  
SSOP  
___________________Ch ip In fo rm a t io n  
TRANSISTOR COUNT: 1695  
SUBSTRATE CONNECTED TO GND  
The MAX745 internal 4.2V reference voltage must be  
bypassed with a 0.1µF or greater capacitor.  
8
_______________________________________________________________________________________  

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