MAX6753KA31+_技术文档

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

General Description

Beneﬁts and Features

● Configurable Reset and Watchdog Options Enables

Wide Variety of Applications

The MAX6746–MAX6753 low-power microprocessor

(μP) supervisory circuits monitor single/dual system

supply voltages from 1.575V to 5V and provide maximum

adjustability for reset and watchdog functions. These

devices assert a reset signal whenever the V

supply voltage or RESET IN falls below its reset threshold

• Factory-Set Reset Threshold Options from 1.575V

to 5V in ~100mV Increments

• Adjustable Reset Threshold Options

• Single/Dual Voltage Monitoring

CC

• Capacitor-Adjustable Reset Timeout

• Capacitor-Adjustable Watchdog Timeout

• Min/Max (Windowed) Watchdog Option

• Manual-Reset Input Option

or when manual reset is pulled low. The reset output

remains asserted for the reset timeout period after V

CC

and RESET IN rise above the reset threshold. The reset

function features immunity to power-supply transients.

• Push-Pull or Open-Drain RESET Output Options

The MAX6746–MAX6753 have ±2% factory-trimmed

reset threshold voltages in approximately 100mV

increments from 1.575V to 5.0V and/or adjustable reset

threshold voltages using external resistors.

● 3.7μA Supply Current Reduces System Power

Consumption

● Integrated Power Supply Protection Increases

Robustness

The reset and watchdog delays are adjustable with

external capacitors. The MAX6746–MAX6751 contain

a watchdog select input that extends the watchdog

timeout period by 128x. The MAX6752/MAX6753 contain

a window watchdog timer that looks for activity outside an

expected window of operation.

• Power-Supply Transient Immunity

• Guaranteed RESET Valid for V_CC≥ 1V

● 8-Pin SOT23 Packages Saves Board Space

● AEC-Q100 Qualified. Refer to Ordering Information

for Specific /V Trim Variants

The MAX6746–MAX6753 are available with a push-pull

or open-drain active-low RESET output. The MAX6746–

MAX6753 are available in an 8-pin SOT23 package and

are fully specified over the automotive temperature range

(-40°C to +125°C).

Typical Operating Circuit

V

IN

MAX6749

MAX6751

Applications

V

CC

● Medical Equipment

● Automotive

R1

R2

● Intelligent Instruments

● Portable Equipment

● Battery-Powered Computers/Controllers

● Embedded Controllers

● Critical μP Monitoring

● Set-Top Boxes

RESET IN

MAX674ꢀ

V

CC

µP

MAX674ꢁ

MAX675ꢂ

MAX675ꢃ

RESET

GND

● Computers

Selector Guide and Ordering Information appear at end of

data sheet.

SRT

C

SRT

I/O

WDI

SWT

WDS

C

SWT

WDS = 0 FOR NORMAL MODE

WDS = V FOR EXTENDED MODE

CC

19-2530; Rev 20; 2/19

MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

Absolute Maximum Ratings

V

to GND...........................................................-0.3V to +6.0V

Continuous Power Dissipation (T = +70°C)

CC

A

SRT, SWT, SET0, SET1, RESET IN, WDS, MR,

8-Pin SOT23 (derate 5.1mW/°C above +70°C)...........408.2mW

Operating Temperature Range .........................-40°C to +125°C

Storage Temperature Range ............................-65°C to +150°C

Junction Temperature......................................................+150°C

Lead Temperature (soldering, 10s) .................................+300°C

Soldering Temperature (reflow) .......................................+260°C

WDI, to GND......................................…-0.3V to (V

+ 0.3V)

CC

RESET (Push-Pull) to GND....................…-0.3V to (V

CC

RESET (Open-Drain) to GND.............................…-0.3V to +6.0V

Input Current (All Pins).....................................................±20mA

Output Current (RESET) ...................................................±20mA

Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any

other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

8 SOT23

PACKAGE CODE

K8+5, K8+5A

21-0078

Outline Number

Land Pattern Number

90-0176

Thermal Resistance, Single-Layer Board

Junction-to-Ambient (q

)

N/A

800

JA

Junction-to-Case (q

)

JC

Thermal Resistance, Four-Layer Board

Junction-to-Ambient (q

)

196

70

JA

Junction-to-Case (q

)

JC

For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,

“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing

pertains to the package regardless of RoHS status.

Package thermal resistances were obtained using the method described in JEDEC specification JESD51-7, using a four-layer board.

For detailed information on package thermal considerations, refer to www.maximintegrated.com/thermal-tutorial.

Electrical Characteristics

(V

= +1.2V to +5.5V, T = T

to T

, unless otherwise specified. Typical values are at V

= +5V and T = +25°C.) (Note 1)

CC A

CC

A

MIN

MAX

PARAMETER

SYMBOL

CONDITIONS

T = 0°C to +125°C

MIN

TYP

MAX

5.5

10

9

UNITS

1.0

1.2

A

Supply Voltage

V

CC

T = -40°C to 0°C

A

V

≤ 5.5V

≤ 3.3V

≤ 2.0V

5

CC

Supply Current

I

4.2

3.7

µA

CC

8

See V

selection table

V

2%

-

V

2%

+

TH

V

CC

Reset Threshold

V

T = -40°C to +125°C

A

V

TH

Hysteresis

Reset Threshold

(MAX6752AKA32 Only)

V

0.8

%

V

HYST

V

CC

TA = -40°C to +125°C

3.136

0.65

3.224

0.90

Hysteresis (MAX6752AKA32 Only)

V

0.80

20

%

HYST

V

falling from V + 100mV to V

TH TH

CC

V

to Reset Delay

µs

CC

-100mV at 1mV/µs

C

= 1500pF

5.692

7.590

0.506

250

9.487

SRT

Reset Timeout Period

t

ms

RP

= 100pF

SRT Ramp Current

I

V

= 0 to 1.23V; V

= 1.6V to 5V (V

= 1.6V to 5V

200

300

nA

V

RAMP

CC

SRT Ramp Threshold

V

rising)

1.173

1.235

1.297

RAMP

CC

RAMP

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

Electrical Characteristics (continued)

(V

= +1.2V to +5.5V, T = T

to T

, unless otherwise specified. Typical values are at V

= +5V and T = +25°C.) (Note 1)

CC A

CC

A

MIN

MAX

PARAMETER

SYMBOL

CONDITIONS

= 1500pF

MIN

TYP

7.590

0.506

MAX

UNITS

C

5.692

728.6

9.487

Normal Watchdog Timeout Period

(MAX6746–MAX6751)

SWT

t

ms

WD

= 100pF

= 1500pF

= 100pF

= 1500pF

= 100pF

971.5 1214.4

64.77

Extended Watchdog Timeout

(MAX6746–MAX6751)

t

ms

971.5 1214.4

64.77

Slow Watchdog Period

(MAX6752/MAX6753)

t

WD2

Fast Watchdog Timeout Period,

SET Ratio = 8,

(MAX6752/MAX6753)

C

= 1500pF

= 100pF

= 1500pF

= 100pF

= 1500pF

= 100pF

91.08 121.43 151.80

8.09

SWT

t

ms

WD1

Fast Watchdog Timeout Period,

SET Ratio = 16,

(MAX6752/MAX6753)

45.53

60.71

4.05

75.89

WD1

Fast Watchdog Timeout Period,

SET Ratio = 64,

(MAX6752/MAX6753)

11.38

15.18

1.01

18.98

ms

Fast Watchdog Minimum Period

(MAX6752/MAX6753)

2000

200

ns

SWT Ramp Current

I

V

= 0 to 1.23V, V

= 1.6V to 5V

250

300

1.297

0.3

nA

V

RAMP

SWT

CC

SWT Ramp Threshold

V

= 1.6V to 5V (V

rising)

1.173 1.235

RAMP

CC

RAMP

≥ 1.0V, I

≥ 2.7V, I

≥ 4.5V, I

≥ 1.8V, I

= 50µA

SINK

RESET Output-Voltage Low

Open-Drain, Push-Pull

(Asserted)

V

= 1.2mA

= 3.2mA

0.3

V

OL

0.4

= 200µA

0.8 x V

SOURCE

CC

RESET Output-Voltage High,

Push-Pull (Not Asserted)

V

≥ 2.25V, I

= 500µA

V

OH

SOURCE

≥ 4.5V, I

= 800µA

SOURCE

V

> V , reset not asserted,

RESET Output Leakage Current,

Open Drain

TH

I

1.0

0.8

µA

LKG

= 5.5V

RESET

DIGITAL INPUTS (MR, SET0, SET1, WDI, WDS)

V

IL

V

≥ 4.0V

CC

V

2.4

IH

Input Logic Levels

V

< 4.0V

0.3 x V

CC

IL

V

0.7 x V

1

IH

CC

µs

ns

kΩ

ns

MR Minimum Pulse Width

MR Glitch Rejection

100

200

20

MR-to-RESET Delay

Pullup to V

12

28

MR Pullup Resistance

WDI Minimum Pulse Width

CC

300

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

Electrical Characteristics (continued)

(V

= +1.2V to +5.5V, T = T

to T

, unless otherwise specified. Typical values are at V

= +5V and T = +25°C.) (Note 1)

CC A

CC

A

MIN

MAX

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

RESET IN

RESET IN Threshold

RESET IN Leakage Current

RESET IN to RESET Delay

V

I

T

= -40°C to +125°C

1.216

-50

1.235

1.254

+50

V

RESET IN

A

nA

µs

±1

RESET IN

RESET IN falling at 1mV/µs

20

Note 1: Production testing done at T = +25°C. Over temperature limits are guaranteed by design.

A

Typical Operating Characteristics

(V

= +5V, T = +25°C, unless otherwise noted.)

A

CC

SUPPLY CURRENT

vs. SUPPLY VOLTAGE

RESET TIMEOUT PERIOD vs. C

SRT

WATCHDOG TIMEOUT PERIOD vs. C

SWT

1000

100

10

100,000

10,000

1000

100

6

MAX6746–MAX6751

5

4

3

EXTENDED MODE

NORMAL MODE

10

2

1

0.1

0

100

1000

10,000

(pF)

100,000

100

1000

10,000

(pF)

100,000

1

2

3

4

5

6

C

SRT

C

SWT

SUPPLY VOLTAGE (V)

NORMALIZED RESET TIMEOUT PERIOD

vs. TEMPERATURE

NORMALIZED WATCHDOG TIMEOUT PERIOD

vs. TEMPERATURE

MAXIMUM TRANSIENT DURATION

vs. RESET THRESHOLD OVERDRIVE

1.20

1.15

1.10

1.05

1.00

0.95

0.90

1.20

175

1.15

1.10

1.05

1.00

0.95

0.90

0.85

0.80

150

125

100

75

C

SRT

= 100pF

C

SWT

= 100pF

RESET OCCURS

ABOVE THE CURVE

C

SWT

= 1500pF

50

C

SRT

= 1500pF

25

V

TH

= 2.92V

800

0

-50 -25

0

25

50

75 100 125

-50 -25

0

25

50

75 100 125

0

200

400

600

1000

TEMPERATURE (°C)

RESET THRESHOLD OVERDRIVE (mV)

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

Typical Operating Characteristics (continued)

(V

= +5V, T = +25°C, unless otherwise noted.)

CC

A

SUPPLY CURRENT

vs. TEMPERATURE

RESET IN THRESHOLD

vs. SUPPLY VOLTAGE

NORMALIZED RESET IN THRESHOLD VOLTAGE

vs. TEMPERATURE

1.010

6

5

4

3

1.240

1.239

1.238

1.237

1.236

1.235

V

CC

= 5V

1.008

1.006

1.004

1.002

1.000

0.998

0.996

0.994

0.992

V

CC

= 5V

V

CC

= 1.8V

V

CC

= 3.3V

2

1

0.990

0

-50 -25

0

25

50

75 100 125

-50 -25

0

25

50

75 100 125

1

2

3

4

5

6

TEMPERATURE (°C)

SUPPLY VOLTAGE (V)

RESET AND WATCHDOG

TIMEOUT PERIOD vs. SUPPLY VOLTAGE

RESET AND WATCHING TIMEOUT

PERIOD vs. SUPPLY VOLTAGE

V

TO RESET DELAY

CC

vs. TEMPERATURE (V FALLING)

CC

27.0

26.6

26.2

25.8

25.4

25.0

0.60

0.56

0.52

0.48

0.44

0.40

9.0

8.5

8.0

7.5

7.0

6.5

6.0

C

SWT

= C

= 100pF

C

SWT

= C

= 1500pF

SRT

V

CC

FALLING AT 1mV/µs

SRT

RESET

WATCHDOG

1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

(V)

-50 -25

0

25

50

75 100 125

1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0

(V)

V

CC

V

CC

TEMPERATURE (°C)

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

Pin Conﬁgurations

TOP VIEW

+

SET0

SWT

SRT

1

2

3

4

8

7

6

5

V

CC

RESET IN (MR)

1

2

3

4

8

7

6

5

V

CC

RESET

WDI

SWT

SRT

GND

RESET

WDI

MAX6752

MAX6753

MAX6746–

MAX6751

WDS

GND

SET1

SOT23

( ) ARE FOR MAX6746 AND MAX6747 ONLY.

Pin Descriptions

NAME

FUNCTION

MAX6746

MAX6747

MAX6748–

MAX6751

MAX6752

MAX6753

Manual-Reset Input. Pull MR low to manually reset the device. Reset

remains asserted for the reset timeout period after MR is released.

1

—

1

MR

Reset Input. High-impedance input to the adjustable reset comparator.

RESET IN Connect RESET IN to the center point of an external resistor-divider to

set the threshold of the externally monitored voltage.

—

1

Logic Input. SET0 selects watchdog window ratio or disables the

watchdog timer. See Table 1.

—

SET0

Watchdog Timeout Input.

MAX6746–MAX6751: Connect a capacitor between SWT and ground to

set the basic watchdog timeout period (t ). Determine the period by

WD

with t

6

the formula t

= 4.94 x 10 x C

in seconds and C

WD

SWT

WD SWT

in Farads. Extend the basic watchdog timeout period by using the WDS

input. Connect SWT to ground to disable the watchdog timer function.

2

SWT

MAX6752/MAX6753: Connect a capacitor between SWT and ground

to set the slow watchdog timeout period (t

). Determine the slow

WD2

9

watchdog period by the formula: t

= 0.65 x 10 x C

with t

in

WD2

SWT

WD2

seconds and C

in Farads. The fast watchdog timeout period is set

SWT

by pin strapping SET0 and SET1 (Connect SET0 high and SET1 low to

disable the watchdog timer function.) See Table 1.

Reset Timeout Input. Connect a capacitor from SRT to GND to select

3

4

3

4

3

4

SRT

the reset timeout period. Determine the period as follows: t

= 4.94 x

RP

6

10 x C

with t

in seconds and C

in Farads.

SRT

RP

SRT

GND

Ground

Watchdog Select Input. WDS selects the watchdog mode. Connect

WDS to ground to select normal mode and the watchdog timeout

5

—

WDS

period. Connect WDS to V

to select extended mode, multiplying the

CC

basic timeout period by a factor of 128. A change in the state of WDS

clears the watchdog timer.

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

Pin Descriptions (continued)

NAME

FUNCTION

MAX6746

MAX6747

MAX6748–

MAX6751

MAX6752

MAX6753

Logic Input. SET1 selects the watchdog window ratio or disables the

watchdog timer. See Table 1.

—

5

SET1

Watchdog Input.

MAX6746–MAX6751: A falling transition must occur on WDI within

the selected watchdog timeout period or a reset pulse occurs. The

watchdog timer clears when a transition occurs on WDI or whenever

RESET is asserted. Connect SWT to ground to disable the watchdog

timer function.

6

WDI

MAX6752/MAX6753: WDI falling transitions within periods shorter than

t

or longer than t

force RESET to assert low for the reset

WD1

WD2

timeout period. The watchdog timer begins to count after RESET is

deasserted. The watchdog timer clears when a valid transition occurs

on WDI or whenever RESET is asserted. Connect SET0 high and SET1

low to disable the watchdog timer function. See the Watchdog Timer

section.

Push/Pull or Open-Drain Reset Output. RESET asserts whenever V

CC

or RESET IN drops below the selected reset threshold voltage (V or

TH

V

, respectively) or manual reset is pulled low. RESET remains

RESET IN

low for the reset timeout period after all reset conditions are deasserted,

7

RESET

and then goes high. The watchdog timer triggers a reset pulse (t

whenever a watchdog fault occurs.

)

RP

Supply Voltage. V

is the power-supply input and the input for ﬁxed

CC

8

V

CC

threshold V

monitor.

CC

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

t

(MIN)

t

(MAX)

t

(MIN)

t

(MAX)

WD1

WD2

GUARANTEED

TO ASSERT

GUARANTEED TO

NOT ASSERT

GUARANTEED TO

ASSERT

RESET

*UNDETERMINED

WDI CONDITION 1

WDI CONDITION 2

FAST FAULT

NORMAL OPERATION

SLOW FAULT

WDI CONDITION 3

*UNDETERMINED STATES MAY OR MAY NOT GENERATE A FAULT CONDITION

Figure 1. MAX6752/MAX6753 Detailed Watchdog Input Timing Relationship

RESET is guaranteed to be in the correct logic

state for V greater than 1V. For applications

Detailed Description

The MAX6746–MAX6753 assert a reset signal whenever

CC

requiring valid reset logic when V

is less than 1V,

CC

the V

supply voltage or RESET IN falls below its reset

CC

see the Ensuring a Valid RESET Down to VCC = 0V

(Push-Pull RESET) section.

threshold. The reset output remains asserted for the reset

timeout period after V and RESET IN rise above its

CC

respective reset threshold. A watchdog timer triggers a

reset pulse whenever a watchdog fault occurs.

RESET IN Threshold

The MAX6748–MAX6751 monitor the voltage on RESET

The reset and watchdog delays are adjustable with

external capacitors. The MAX6746–MAX6751 contain a

watchdog select input that extends the watchdog timeout

period to 128x.

IN using an adjustable reset threshold (V

with an external resistor voltage-divider (Figure 2). Use

the following formula to calculate the externally monitored

) set

RESET IN

voltage (V

):

MON_TH

The MAX6752 and MAX6753 have a sophisticated watchdog

timer that detects when the processor is running outside

an expected window of operation. The watchdog signals a

fault when the input pulses arrive too early (faster that the

V

= V

x (R1 + R2)/R2

MON_TH

RESET IN

V

MON_TH

selected t

timeout period) or too late (slower than the

timeout period) (see Figure 1).

WD1

WD2

R1

V

CC

Reset Output

V

CC

RESET IN

The reset output is typically connected to the reset input

of a μP. A μP’s reset input starts or restarts the μP in a

known state. The MAX6746–MAX6753 μP supervisory

circuits provide the reset logic to prevent code-execution

errors during power-up, power-down, and brownout conditions

(see the Typical Operating Circuit). RESET changes from

high to low whenever the monitored voltage, RESET

MAX6748

MAX6749

MAX6750

MAX6751

R2

GND

V

= 1.235 x (R1 + R2) / R2

MON_TH

IN and/or V

drop below the reset threshold voltages.

CC

Once V

and/or V

exceeds its respective reset

RESET IN

CC

threshold voltage(s), RESET remains low for the reset

timeout period, then goes high.

Figure 2. Calculating the Monitored Threshold Voltage

(V

)

MON_TH

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

timing performance. The MAX6748 and MAX6749 can be

configured to monitor V

voltage by connecting V

to

CC

V

MON_TH

V

.

MON_TH

Dual-Voltage Monitoring (MAX6750/MAX6751)

R1

V

CC

The MAX6750 and MAX6751 contain both factory-trimmed

threshold voltages and an adjustable reset threshold input,

V

CC

RESET IN

allowing the monitoring of two voltages, V

and V

CC

MON_

(see Figure 2). RESET is asserted when either of the

TH

MAX6748

R2

voltages fall below its respective threshold voltages.

MAX6749

MAX6750

MAX6751

Manual Reset (MAX6746/MAX6747)

GND

Many μP-based products require manual-reset capability

to allow an operator or external logic circuitry to initiate a

reset. The manual-reset input (MR) can connect directly

to a switch without an external pullup resistor or debouncing

network. MR is internally pulled up to V

can be left unconnected if unused.

and, therefore,

CC

Figure 3. Adding an External Manual-Reset Function to the

MAX6748–MAX6751

MR is designed to reject fast, falling transients (typically

100ns pulses) and must be held low for a minimum of

1μs to assert the reset output. A 0.1μF capacitor from MR

to ground provides additional noise immunity. After MR

transitions from low to high, reset remains asserted for the

duration of the reset timeout period.

where V

is the desired reset threshold voltage

MON_TH

and V

is the reset input threshold (1.235V). Resistors

TH

R1 and R2 can have very high values to minimize

current consumption due to low leakage currents. Set R2

to some conveniently high value (500kΩ, for example)

and calculate R1 based on the desired reset threshold

voltage, using the following formula:

A manual-reset option can easily be implemented with

the MAX6748–MAX6751 by connecting a normally open

momentary switch in parallel with R2 (Figure 3). When

the switch is closed, the voltage on RESET IN goes to

zero, initiating a reset. Similar to the MAX6746/MAX6747

manual reset, reset remains asserted while the voltage at

RESET IN is zero and for the reset timeout period after

the switch is opened.

R1 = R2 x (V

/V

- 1) (Ω)

MON_TH RESET IN

The MAX6748 and MAX6749 do not monitor V

CC

supply voltage; therefore, V

must be greater than

CC

1.5V to guarantee RESET IN threshold accuracy and

V

CC

t

RP

WD

WDI

OV

V

CC

RESET

OV

NORMAL MODE (WDS = GND)

Figure 4a. Watchdog Timing Diagram, WDS = GND

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

V

CC

t

x 128

RP

WD

WDI

OV

V

CC

RESET

OV

EXTENDED MODE (WDS = V

)

CC

Figure 4b. Watchdog Timing Diagram, WDS = V

CC

Watchdog Timer

Table 1. Min/Max Watchdog Setting

MAX6746–MAX6751

SET0

Low

SET1

Low

RATIO

The watchdog’s circuit monitors the μP’s activity. It the μP

does not toggle the watchdog input (WDI) within t (user-

8

WD

Low

High

Low

16

Watchdog Disabled

64

selected), RESET asserts for the reset timeout period. The

internal watchdog timer is cleared by any event that asserts

RESET, by a falling transition at WDI (which can detect

pulses as short as 300ns), or by a transition at WDS. The

watchdog timer remains cleared while reset is asserted; as

soon as reset is released, the timer starts counting.

High

the SET0 and SET1 configuration for the 8, 16, and 64

window ratio ( t

/t

).

WD2 WD1

For example, if C

is 1500pF, and SET0 and SET1 are

The MAX6746–MAX6751 feature two modes of watch-

dog operation: normal mode and extended mode. In

normal mode (Figure 4a), the watchdog timeout period

is determined by the value of the capacitor connected

between SWT and ground. In extended mode (Figure

4b), the watchdog timeout period is multiplied by 128. For

example, in extended mode, a 0.1μF capacitor gives a

watchdog timeout period of 65s (see the Extended-Mode

SWT

low, then t

is 975ms (typ) and t

is 122ms (typ).

WD2

WD1

RESET asserts if the watchdog input has two falling edges

too close to each other (faster than t ) (Figure 5a) or

falling edges that are too far apart (slower than t

(Figure 5b). Normal watchdog operation is displayed in

Figure 5c. The internal watchdog timer is cleared when

a WDI falling edge is detected within the valid watchdog

window or when RESET is deasserted. All WDI inputs are

ignored while RESET is asserted.

WD1

)

WD2

Watchdog Timeout Period vs. C

graph in the Typical

SWT

Operating Circuit). To disable the watchdog timer function,

connect SWT to ground.

The watchdog timer begins to count after RESET is

deasserted. The watchdog timer clears and begins to

count after a valid WDI falling logic input. WDI falling

MAX6752/MAX6753

The MAX6752 and MAX6753 have a windowed watchdog

timer that asserts RESET for the adjusted reset timeout

period when the watchdog recognizes a fast watchdog fault

transitions within periods shorter than t

or longer than

WD1

t

force RESET to assert low for the reset timeout

WD2

period. WDI falling transitions within the t

and t

(t

< t

), or a slow watchdog fault (period > t

).

WD1

WD2

WDI

WD1

WD2

window do not assert RESET. WDI transitions between

and t or t and t

WD2(max)

The reset timeout period is adjusted independently of the

watchdog timeout period.

t

WD1(min)

WD1(max)

WD2(min)

are not guaranteed to assert or deassert RESET. To

The slow watchdog period (t

) is calculated as follows:

WD2

guarantee that the window watchdog does not assert

9

t

= 0.65 x 10 x C

WD2

SWT

RESET, strobe WDI between t

and t

.

WD1(max)

WD2(min)

The watchdog timer is cleared when RESET is asserted

or after a falling transition on WDI, or after a state

change on SET0 or SET1. Disable the watchdog timer by

connecting SET0 high and SET1 low.

with t

in seconds and C

in Farads.

WD2

SWT

The fast watchdog period (t

from the slow watchdog fault period (t

fast watchdog period by pin strapping SET0 and SET1,

) is selectable as a ratio

WD1

). Select the

WD2

where high is V and low is GND. Table 1 illustrates

CC

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

t

< t

(MIN)

WDI WD1

5V

3.3V

V

CC

WDI

MAX6747

MAX674ꢀ

MAX6753

100kΩ

RESET

V

CC

(a) FAST FAULT

RESET

µP

RESET

t

> t

(MAX)

WDI WD2

N

GND

WDI

RESET

(b) SLOW FAULT

Figure 6. Interfacing to Other Voltage Levels

t

(MAX) < t

< t

(MIN)

WD1

WDI WD2

with t

in seconds and C

in Farads.

SWT

WD

For the MAX6752 and MAX6753 windowed watchdog

function, calculate the slow watchdog period, t

as

WD2

follows:

WDI

9

t

= 0.65 x 10 x C

RESET

WD2

SWT

C

and C

must be a low-leakage (< 10nA) type

SWT

SRT

capacitor. Ceramic capacitors are recommended.

(c) NORMAL OPERATION (NO PULSING, OUTPUT STAYS HIGH)

Transient Immunity

Figure 5. MAX6752/MAX6753 Window Watchdog Diagram

In addition to issuing a reset to the μP during power-up,

power-down, and brownout conditions, these supervisors

are relatively immune to short-duration supply transients

(glitches). The Maximum Transient Duration vs. Reset

Threshold Overdrive graph in the Typical Operating

Characteristics shows this relationship.

Applications Information

Selecting Reset/Watchdog Timeout Capacitor

The reset timeout period is adjustable to accommodate a

variety of μP applications. Adjust the reset timeout period

(t ) by connecting a capacitor (C

ground. Calculate the reset timeout capacitor as follows:

) between SRT and

RP

SRT

The area below the curves of the graph is the region in

which these devices typically do not generate a reset

pulse. This graph was generated using a falling pulse

6

C

= t /(4.94 x 10 )

SRT

RP

applied to V , starting above the actual reset threshold

CC

with t

in seconds and C

in Farads.

SRT

RP

(V ) and ending below it by the magnitude indicated

TH

The watchdog timeout period is adjustable to

accommodate a variety of μP applications. With this

feature, the watchdog timeout can be optimized for soft-

ware execution. The programmer can determine how

often the watchdog timer should be serviced. Adjust

(reset threshold overdrive). As the magnitude of the transient

increases (farther below the reset threshold), the maxi-

mum allowable pulse width decreases. Typically, a V

CC

transient that goes 100mV below the reset threshold and

lasts 50μs or less does not cause a reset pulse to be

the watchdog timeout period (t ) by connecting a

WD

issued. For applications where the power supply to V

CC

specific value capacitor (C

) between SWT and GND.

SWT

has high transient rates, dV/dt > 5V/50µS, an RC filter

on V is required. See Figure 8. Application Circuit for

For normal mode operation, calculate the watchdog

timeout capacitor as follows:

CC

High-Input Voltage Transient Applications.

C

SWT

= t /(4.94 x 106)

WD

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

Interfacing to Other Voltages for

Logic Compatibility

The open-drain RESET output can be used to interface

to a μP with other logic levels. As shown in Figure 6, the

open-drain output can be connected to voltages from 0

to 6V.

Ensuring a Valid RESET Down to V

= 0V

CC

(Push-Pull RESET)

When V

falls below 1V, RESET current sinking capabilities

CC

decline drastically. The high-impedance CMOS logic

inputs connected to RESET can drift to undetermined

voltages. This presents no problems in most applications,

since most μPs and other circuitry do not operate with

Generally, the pullup resistor connected to RESET

connects to the supply voltage that is being monitored at

V

CC

below 1V.

the IC’s V

pin. However, some systems can use the

In those applications where RESET must be valid down to

0V, add a pulldown resistor between RESET and GND for

the MAX6746/MAX6748/MAX6750/MAX6752 push/pull

outputs. The resistor sinks any stray leakage currents,

holding RESET low (Figure 7). The value of the pulldown

resistor is not critical; 100kΩ is large enough not to load

RESET and small enough to pull RESET to ground. The

external pulldown cannot be used with the open-drain

reset outputs.

CC

open-drain output to level-shift from the monitored supply

to reset circuitry powered by some other supply. Keep

in mind that as the supervisor’s V

decreases towards

CC

1V, so does the IC’s ability to sink current at RESET.

Also, with any pullup resistor, RESET is pulled high as

V

CC

decays toward zero. The voltage where this occurs

depends on the pullup resistor value and the voltage to

which it is connected.

3.3V

V

CC

V

CC

100Ω

MAX6746

MAX6748

MAX6450

MAX6752

V_CC

RESET

1µF

MAX6753

RESET

100kΩ

GND

Figure 7. Ensuring RESET Valid to V

= 0V

Figure 8. Application Circuit for High-Input Voltage Transient

Applications

CC

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

Table 2. Reset Threshold Voltage Suffix

Table 3. Standard Version Table

(T = -40°C to +125°C)

A

PART

TOP MARK

AEDI

SUFFIX

MIN

4.900

4.802

TYP

5.000

4.900

MAX

5.100

4.998

MAX6746KA16

MAX6746KA23

MAX6746KA26

MAX6746KA29

MAX6746KA46

MAX6747KA16

MAX6747KA23

MAX6747KA26

MAX6747KA29

MAX6747KA46

MAX6748KA

50

AEDJ

AEDK

AALN

AEDL

AALO

AEDM

AEDN

AEDO

AEDP

AALP

AALQ

AEDQ

AALR

AEDR

AEDS

AEDT

AEDU

AEDV

AEDW

AEDX

AEDY

AEDZ

AEEA

AALT

49

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

32

4.704

4.606

4.533

4.410

4.288

4.214

4.116

4.018

3.920

3.822

3.724

3.626

3.528

3.430

3.332

3.234

3.136

4.800

4.700

4.625

4.500

4.375

4.300

4.200

4.100

4.000

3.900

3.800

3.700

3.600

3.500

3.400

3.300

3.200

4.896

4.794

4.718

4.590

4.463

4.386

4.284

4.182

4.080

3.978

3.876

3.774

3.672

3.570

3.468

3.366

3.264

MAX6749KA

MAX6750KA16

MAX6750KA23

MAX6750KA26

MAX6750KA29

MAX6750KA46

MAX6751KA16

MAX6751KA23

MAX6751KA26

MAX6751KA29

MAX6751KA46

MAX6752KA16

MAX6752KA23

MAX6752KA26

MAX6752KA29

MAX6752KA46

MAX6753KA16

MAX6753KA23

MAX6753KA26

MAX6753KA29

MAX6753KA46

32A

3.136

3.200

3.224

(MAX6752AKA32 Only)

31

30

3.014

2.940

3.075

3.000

3.137

3.060

29

28

27

26

25

24

23

2.867

2.744

2.646

2.573

2.450

2.352

2.267

2.925

2.800

2.700

2.625

2.500

2.400

2.313

2.984

2.856

2.754

2.678

2.550

2.448

2.359

AEEB

AEEC

AEED

AEEE

AEEF

AEEG

AEEH

22

21

20

19

18

17

16

2.144

2.058

1.960

1.862

1.764

1.632

1.544

2.188

2.100

2.000

1.900

1.800

1.665

1.575

2.232

2.142

2.040

1.938

1.836

1.698

1.607

Note: Standard versions are shown in bold. There is a 2500-piece

minimum order increment for standard versions.

Sample stock is typically held on standard versions only.

Nonstandard versions require a minimum order increment

of 10,000 pieces. Contact factory for availability

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

Selector Guide

FIXED V

RESET

THRESHOLD

ADJUSTABLE

RESET

THRESHOLD

STANDARD

WATCHDOG WATCHDOG

MIN/MAX

MANUAL-

RESET

INPUT

CC

PUSH/ PULL OPEN-DRAIN

PART

RESET

TIMER

MAX6746

MAX6747

MAX6748

MAX6749

MAX6750

MAX6751

MAX6752

MAX6753

X

—

X

—

X

—

X

—

X

—

X

—

X

—

X

—

X

—

X

—

X

—

X

—

Maxim Integrated

│ 14

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

Ordering Information

Chip Information

PROCESS: BiCMOS

PART

TEMP RANGE

PIN-PACKAGE

8 SOT23

MAX6746KA_ _-T

MAX6746KA_ _+T

MAX6747KA_ _+T

MAX6746KA_ _/V+T

MAX6746KA23/V+T

MAX6746KA28/V+T

MAX6746KA29/V+T

MAX6746KA31/V+T

MAX6747KA_ _-T

MAX6747KA_ _/V+T

MAX6747KA30/V+T

MAX6747KA31/V+T

MAX6747KA46/V+T

MAX6748KA+T

-40°C to +125°C

MAX6749KA+T

MAX6750KA_ _+T

MAX6750KA_ __/V+T

MAX6750KA30/V+T

MAX6750KA32/V+T

MAX6751KA_ _-T

MAX6751KA_ _+T

MAX6751KA_ _/V+T*

MAX6751KA17/V+T

MAX6751KA30/V+T

MAX6751KA50/V+T

MAX6752KA_ _+T

MAX6752KA_ _/V+T*

MAX6752AKA32+T

MAX6752AKA32/V+T

MAX6752KA32/V+T

MAX6753KA_ _-T

MAX6753KA_ _+T

MAX6753KA_ _/V+T

MAX6753KA28/V+T

MAX6753KA29/V+T

MAX6753KA30/V+T

MAX6753KA46/V+T

Note: “_ _” represents the two number suffix needed when ordering the reset

threshold voltage value for the MAX6746/MAX6747 and MAX6750–MAX6753.

The reset threshold voltages are available in approximately 100mV incre-

ments. Table 2 contains the suffix and reset factory-trimmed voltages. All

devices are available in tape-and-reel only. There is a 2500-piece minimum

order increment for standard versions (see Table 3). Sample stock is typically

held on standard versions only. Nonstandard versions require a minimum

order increment of 10,000 pieces. Contact factory for availability.

Devices are available in both leaded and lead(Pb)-free packaging.

+Denotes a lead(Pb)-free/RoHS-compliant package.

T = Tape and reel.

/V denotes an automotive qualified part.

*Future product—contact factory for availability.

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│ 15

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MAX6746–MAX6753

μP Reset Circuits with Capacitor-Adjustable

Reset/Watchdog Timeout Delay

Revision History

REVISION

NUMBER

REVISION

DATE

PAGES

CHANGED

DESCRIPTION

0

7/02

Initial release

—

3

12/05

Added the lead-free notation

1

Added the automotive version of the MAX6746 and the MAX6753 and

revised the Typical Operating Characteristics

4

9/10

1, 4

5

6

12/10

4/11

Added the automotive version of the MAX6750

Added the automotive version of the MAX6747

Added the automotive version of the MAX6751

Added a future product reference to MAX6751KA_ _ /V+T

Corrected typo

1

7

12/13

2/14

5/14

6/14

9/15

1

8

1

9

10

1

10

11

Added the automotive version of the MAX6752

Added MAX6752A to data sheet with new limits

2, 12, 14

Added lead-free part numbers to Ordering Information table and lead-free

package code to Package Information table

12

13

14

15

12/15

2/16

9/16

1/17

14

Added MAX6752AKA32+T to Ordering Information table

Updated t_WDequation value in Pin Conﬁguration table and Applications

Information section

6, 10

10, 11

Added text to Transient Immunity section and added Figure 8

Added AEC qualiﬁcation text to Beneﬁts and Features section and updated

Ordering Information table with additional part numbers

16

10/17

1, 14

17

18

19

20

12/17

3/18

Updated Ordering Information table with additional part numbers

Updated Absolute Maxim Rating and added Package Information section

Updated Package Information

14

2

12/18

2/19

2

Updated Typical Operating Circuit and Figure 6

1, 11

For pricing, delivery, and ordering information, please visit Maxim Integrated’s online storefront at https://www.maximintegrated.com/en/storefront/storefront.html.

Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses

are implied. Maxim Integrated reserves the right to change the circuitry and speciﬁcations without notice at any time. The parametric values (min and max limits)

shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.

©

Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.

2019 Maxim Integrated Products, Inc.

│ 16


型号：	MAX6753KA31+
厂家：	MAXIM INTEGRATED PRODUCTS
描述：	Power Management Circuit, Adjustable, 1 Channel, BICMOS, PDSO8, LEAD FREE, MO-178BA, SOT-23, 8 PIN 信息通信管理光电二极管
文件：	总16页 (文件大小：1402K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

MAX6753KA31+ [MAXIM]

相关型号：

MAX6753KA32

MAX6753KA32+

MAX6753KA32+T

MAX6753KA32-T

MAX6753KA32/V+T

MAX6753KA33/V+T

MAX6753KA34

MAX6753KA34+

MAX6753KA34/V+T

MAX6753KA35

MAX6753KA35+

MAX6753KA35+T