MAX6324BUT46+T [MAXIM]

Power Supply Management Circuit, Fixed, 1 Channel, BICMOS, PDSO6, ROHS COMPLIANT, SOT-23, 6 PIN;
MAX6324BUT46+T
型号: MAX6324BUT46+T
厂家: MAXIM INTEGRATED PRODUCTS    MAXIM INTEGRATED PRODUCTS
描述:

Power Supply Management Circuit, Fixed, 1 Channel, BICMOS, PDSO6, ROHS COMPLIANT, SOT-23, 6 PIN

信息通信管理 光电二极管
文件: 总13页 (文件大小:1244K)
中文:  中文翻译
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Click here for production status of specific part numbers.  
MAX6323/MAX6324  
μP Supervisory Circuits with Windowed  
(Min/Max) Watchdog and Manual Reset  
General Description  
Features  
The MAX6323/MAX6324 microprocessor (µP) supervi-  
sory circuits monitor power supplies and µP activity in  
digital systems. A watchdog timer looks for activity out-  
side an expected window of operation. Six laser-trimmed  
reset thresholds are available with ±2.5% accuracy from  
+2.32V to +4.63V. Valid RESET output is guaranteed  
Min/Max (Windowed) Watchdog,  
8 Factory-Trimmed Timing Options  
Pulsed Open-Drain, Active-Low Watchdog Output  
Power-On Reset  
Precision Monitoring of +2.5V, +3.0V, +3.3V,  
and +5.0V Power Supplies  
Open-Drain or Push-Pull RESET Outputs  
Low-Power Operation (23µA typ)  
Debounced Manual Reset Input  
down to V  
= +1.2V.  
CC  
The RESET output is either push-pull (MAX6323) or  
open-drain (MAX6324). RESET is asserted low when  
V
CC  
falls below the reset threshold, or when the manual  
Guaranteed Reset Valid to V  
AEC-Q100 Qualified MAX6324HUT44/V+T  
= +1.2V  
CC  
reset input (MR) is asserted low. RESET remains assert-  
ed for at least 100ms after V rises above the reset  
CC  
threshold and MR is deasserted.  
Ordering Information  
The watchdog pulse output (WDPO) utilizes an open-  
drain configuration. It can be triggered either by a fast  
timeout fault (watchdog input pulses are too close to each  
other) or a slow timeout fault (no watchdog input pulse is  
observed within the timeout period). The watchdog time-  
out is measured from the last falling edge of watchdog  
input (WDI) with a minimum pulse width of 300ns. WDPO  
is asserted for 1ms when a fault is observed. Eight laser-  
trimmed timeout periods are available.  
TEMP  
RANGE  
PIN-  
PACKAGE OUTPUT  
-40°C to +125°C 6 SOT23 Push-Pull  
RESET  
PART  
MAX6323_UT_ _-T  
Ordering Information continued at end of data sheet.  
*These devices are factory trimmed to one of eight watchdog-  
timeout windows and one of six reset voltage thresholds. Insert  
the letter corresponding to the desired watchdog-timeout window  
(A, B, C, D, E, F, G, or H) into the blank following the number  
6323 or 6324 (see Watchdog Timeout table). Insert the two-  
digit code (46, 44, 31, 29, 26, or 23) after the letters UT for the  
desired nominal reset threshold (see Reset Threshold Range  
table at end of data sheet).  
The MAX6323/MAX6324 are offered in a 6-pin SOT23  
package and operate over the extended temperature  
range (-40°C to +125°C).  
/V denotes an automotive qualified part.  
Devices are available in both leaded and lead-free packaging.  
Specify lead-free by replacing “-T” with “+T” when ordering.  
Note: There are eight standard versions of each device available  
(see Standard Versions table). Sample stock is generally held on  
standard versions only. Standard versions have an order  
increment requirement of 2500 pieces. Nonstandard versions  
have an order increment requirement of 10,000 pieces. Contact  
factory for availability of nonstandard versions.  
Applications  
Automotive  
Industrial  
Medical  
Embedded Control Systems  
Watchdog Timeout  
Pin Configuration  
WATCHDOG TIMEOUT*  
FAST  
SLOW  
UNITS  
TOP VIEW  
SUFFIX  
MAX  
1.5  
15  
UNITS  
ms  
MIN  
10  
MR  
GND  
WDI  
1
2
3
6
5
4
RESET  
WDPO  
A
B
C
D
E
F
ms  
100  
300  
10  
ms  
s
MAX6323  
MAX6324  
15  
ms  
15  
ms  
15  
ms  
60  
V
CC  
23  
ms  
47  
ms  
s
SOT23  
G
H
39  
ms  
82  
719  
ms  
1.3  
*See Figure 1 for operation.  
Typical Operating Circuit appears at end of data sheet.  
19-1838; Rev 7; 3/18  
MAX6323/MAX6324  
μP Supervisory Circuits with Windowed  
(Min/Max) Watchdog and Manual Reset  
Absolute Maximum Ratings  
Terminal Voltage (with respect to GND)  
Operating Temperature Range......................... -40°C to +125°C  
Junction Temperature......................................................+150°C  
Storage Temperature Range............................ -65°C to +150°C  
Lead Temperature (soldering, 10s) .................................+300°C  
Soldering Temperature (reflow)  
V
...................................................................-0.3V to +6.0V  
CC  
MR, RESET (MAX6323), WDI.............. -0.3V to (V  
+ 0.3V)  
CC  
WDPO, RESET (MAX6324).............................-0.3V to +6.0V  
Input Current, V , WDI, MR.............................................20mA  
CC  
Output Current, RESET, WDPO ........................................20mA  
Lead(Pb)-Free .............................................................+260°C  
Containing Lead ..........................................................+240°C  
Rate of Rise, V  
..........................................................100V/µs  
CC  
Continuous Power Dissipation (T = +70°C)  
A
6-Pin SOT23 (derate 8.7mW/°C above +70°C) ..........696mW  
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these  
or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect  
device reliability.  
Electrical Characteristics  
(V  
= full range, T = -40°C to +125°C, unless otherwise noted. Typical values are at V  
= 3V, T = +25°C.) (Note 1)  
CC  
A
CC A  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
5.5  
UNITS  
Operating Voltage Range  
V
1.2  
V
CC  
V
V
= 2.5V or 3.3V  
= 5.5  
23  
45  
No load, RESET  
deasserted  
CC  
Supply Current  
I
µA  
CC  
27  
57  
CC  
MAX632_ _UT46  
MAX632_ _UT44  
MAX632_ _UT31  
MAX632_ _UT29  
MAX632_ _UT26  
MAX632_ _UT23  
RESET deasserted  
4.50  
4.25  
3.00  
2.85  
2.55  
2.25  
100  
4.63  
4.38  
3.08  
2.93  
2.63  
2.32  
180  
20  
4.75  
4.50  
3.15  
3.00  
2.70  
2.38  
280  
Reset Threshold Voltage  
Reset Timeout Delay  
V
t
V
TH  
ms  
µs  
RP  
V
to RESET Delay  
10mV/ms, V +100mV to V - 100mV  
TH TH  
CC  
I
= 1.2mA, V  
= 2.25V  
SINK  
CC  
(MAX632_ _UT23, MAX632_ _UT26,  
MAX632_ _UT29, MAX632_ _UT31)  
0.4  
WDPO, RESET Output Voltage  
V
V
I
= 3.2mA, V  
= 4.25V  
OL  
SINK  
CC  
0.4  
0.4  
(MAX632_ _UT44, MAX632_ _UT46)  
I
= 100μA, V > 1.2V,  
SINK  
CC  
RESET asserted  
I
= 500μA, V = 3.15V,  
CC  
SOURCE  
RESET deasserted (MAX632_ _UT23,  
MAX632_ _UT26, MAX632_ _UT29,  
MAX632_ _UT31)  
0.8 x V  
CC  
RESET Output Voltage  
(MAX6323)  
V
V
OH  
I
= 800μA, V  
= 4.75V, RESET  
SOURCE  
CC  
deasserted, (MAX632_ _UT44,  
MAX632_ _UT46)  
V
- 1.5  
CC  
V
= V  
= +5.5V, RESET,  
RESET  
WDPO  
WDPO, RESET Output Leakage  
I
1
µA  
LKG  
WDPO deasserted  
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MAX6323/MAX6324  
μP Supervisory Circuits with Windowed  
(Min/Max) Watchdog and Manual Reset  
Electrical Characteristics (continued)  
(V  
= full range, T = -40°C to +125°C, unless otherwise noted. Typical values are at V  
= 3V, T = +25°C.) (Note 1)  
CC  
A
CC A  
PARAMETER  
SYMBOL  
CONDITIONS  
MIN  
TYP  
MAX  
UNITS  
WATCHDOG INPUT AND OUTPUT  
MAX632_AUT_ _  
1
1.5  
15  
MAX632_BUT_ _  
MAX632_CUT_ _  
MAX632_DUT_ _  
MAX632_EUT_ _  
MAX632_FUT_ _  
MAX632_GUT_ _  
MAX632_HUT_ _  
MAX632_AUT_ _  
MAX632_BUT_ _  
MAX632_CUT_ _  
MAX632_DUT_ _  
MAX632_EUT_ _  
MAX632_FUT_ _  
MAX632_GUT_ _  
MAX632_HUT_ _  
10  
10  
15  
10  
15  
Watchdog Timeout (Fast)  
(Notes 2, 3)  
t
ms  
WD1  
10  
15  
17  
23  
29  
39  
543  
10  
719  
15  
100  
300  
10  
150  
450  
15  
ms  
Watchdog Timeout (Slow)  
(Note 4)  
t
s
WD2  
60  
90  
47  
63  
ms  
82  
108  
1.8  
1.3  
s
Minimum Watchdog Input  
Pulse Width  
300  
ns  
ns  
WDI Glitch Immunity  
V
= 5.5V  
100  
CC  
V
0.75 x V  
-1.5  
IH  
CC  
WDI Input Voltage  
V
V
0.8  
IL  
V
V
V
= 0V  
-1  
1
WDI  
WDI Input Current  
µA  
ms  
= V  
1.5  
3
WDI  
CC  
WDPO Pulse Width  
= 0.8V, V = 0.75V x V  
IH  
0.5  
1
IL  
CC  
MANUAL RESET INPUT  
V
0.7 x V  
1
IH  
CC  
MR Input Voltage  
V
V
0.3 x V  
CC  
IL  
MR Minimum Pulse Width  
MR Glitch Immunity  
µs  
ns  
ns  
kΩ  
V
V
= 2.5V  
100  
120  
85  
CC  
MR to Reset Delay  
= 2.5V  
CC  
MR Pullup Resistance  
50  
Note 1: Devices are tested at T = +25°C and guaranteed by design for T = T  
to T  
, as specified.  
MAX  
A
A
MIN  
Note 2: WDPO will pulse low if a falling edge is detected on WDI before this timeout period expires.  
Note 3: To avoid a potential fake fault, the first WDI pulse after the rising edge of RESET or WDPO will not create a fast watchdog  
timeout fault.  
Note 4: WDPO will pulse low if no falling edge is detected on WDI after this timeout period expires.  
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MAX6323/MAX6324  
μP Supervisory Circuits with Windowed  
(Min/Max) Watchdog and Manual Reset  
Typical Operating Characteristics  
(V  
= full range, T = +25°C, unless otherwise noted.)  
A
CC  
POWER-DOWN RESET DELAY  
vs. TEMPERATURE  
MR TO RESET DELAY  
vs. TEMPERATURE  
SUPPLY CURRENT vs. TEMPERATURE  
40  
35  
30  
25  
20  
160  
140  
120  
100  
80  
V
CC  
= 5.5V  
V
OD  
= 20mV  
30  
25  
20  
15  
10  
5
15  
10  
V
CC  
= 3.3V  
60  
V
OD  
= 100mV  
40  
V
CC  
= 1.0V  
5
0
20  
0
0
-40  
-20  
0
20  
40  
60  
80  
-40  
-20  
0
20  
40  
60  
80  
-40  
-20  
0
20  
40  
60  
80  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
NORMALIZED RESET THRESHOLD  
vs. TEMPERATURE  
NORMALIZED POWER-UP RESET TIMEOUT  
vs. TEMPERATURE  
NORMALIZED WATCHDOG TIMEOUT  
PERIOD (FAST) vs. TEMPERATURE  
1.0005  
1.0000  
0.9995  
1.008  
1.006  
1.004  
1.008  
1.006  
1.004  
1.002  
1.000  
0.998  
1.002  
1.000  
0.998  
0.9990  
0.9985  
0.9980  
0.996  
0.994  
0.992  
0.996  
0.994  
-40  
-20  
0
20  
40  
60  
80  
-40 -20  
0
20  
40  
60  
80  
-40  
-20  
0
20  
40  
60  
80  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
MAXIMUM TRANSIENT DURATION  
vs. RESET THRESHOLD OVERDRIVE  
NORMALIZED WATCHDOG OUTPUT  
PULSE WIDTH vs. TEMPERATURE  
NORMALIZED WATCHDOG TIMEOUT  
PERIOD (SLOW) vs. TEMPERATURE  
1.003  
1.002  
1.001  
1.000  
0.999  
0.998  
1.008  
1.006  
1.004  
1.002  
1.000  
0.998  
400  
350  
300  
V
= V - V  
TH CC  
OD  
250  
200  
RESET ASSERTED  
ABOVE THIS LINE  
150  
100  
50  
0.996  
0.994  
0.992  
0.997  
0.996  
0.995  
MAX632_AUT23  
100  
0
-40  
-20  
0
20  
40  
60  
80  
-40  
-20  
0
20  
40  
60  
80  
1
10  
1000  
TEMPERATURE (°C)  
TEMPERATURE (°C)  
RESET COMPARATOR OVERDRIVE (mV)  
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MAX6323/MAX6324  
μP Supervisory Circuits with Windowed  
(Min/Max) Watchdog and Manual Reset  
Typical Operating Characteristics (continued)  
(V  
= full range, T = +25°C, unless otherwise noted.)  
A
CC  
FAST WATCHDOG TIMEOUT PERIOD  
SLOW WATCHDOG TIMEOUT PERIOD  
MAX6323/24-10  
MAX6323/24-11  
WDI  
WDI  
2V/div  
2V/div  
2V/div  
2V/div  
WDPO  
WDPO  
MAX6323AUT23  
500µs/div  
MAX6323AUT23  
5ms/div  
Pin Description  
PIN  
NAME  
FUNCTION  
Active-Low, Manual Reset Input. When MR is asserted low, RESET is asserted low, the internal watchdog  
timer is reset to zero, and WDPO is reset to high impedance (open drain). After the rising edge of MR,  
1
MR  
RESET is asserted for at least 100ms. Leave MR unconnected or connect to V  
if unused.  
CC  
2
GND  
Ground  
Watchdog Input. The internal watchdog timer clears to zero on the falling edge of WDI or when RESET goes  
high. If WDI sees another falling edge within the factory-trimmed watchdog window, WDPO will  
remain unasserted. Transitions outside this window, either faster or slower, will cause WDPO to pulse  
low for 1ms (typ).  
3
WDI  
Supply Voltage for the Device. Input for V  
(min) capacitor.  
reset monitor. For noisy systems, bypass V  
with a 500pF  
CC  
CC  
4
5
V
CC  
Watchdog Pulse Output. The open-drain WDPO output is pulsed low for 1ms (typ) upon detection of a fast  
or slow watchdog fault. WDPO is only active when RESET is high.  
WDPO  
RESET  
Active-Low. Reset is asserted when V  
drops below V and remains asserted until V  
rises above  
CC  
CC  
TH  
6
V
for the duration of the reset timeout period. The MAX6323 has a push-pull output and the MAX6324  
TH  
has an open-drain output. Connect a pullup resistor from RESET to any supply voltage up to +6V.  
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MAX6323/MAX6324  
μP Supervisory Circuits with Windowed  
(Min/Max) Watchdog and Manual Reset  
t
(min)  
)
t
(max)  
t
(min)  
t
(max)  
WD1  
WD1  
WD2  
WD2  
POSSIBLE STATES  
GUARANTEED TO  
ASSERT WDPO  
GUARANTEED NOT TO  
ASSERT WDPO  
GUARANTEED TO  
ASSERT WDPO  
*
*
UNDETERMINED  
UNDETERMINED  
CONDITION 1  
CONDITION 2  
CONDITION 3  
FAST FAULT  
NORMAL OPERATION  
SLOW FAULT  
*
UNDETERMINED STATES MAY OR MAY NOT GENERATE A FAULT CONDITION.  
Figure 1. Detailed Watchdog Input Timing Relationship  
than t  
apart (slower than t  
) (Figure 2) or falling edges that are too far  
WD1  
Detailed Description  
The MAX6323/MAX6324 μP supervisory circuits maintain  
) (Figure 3), WDPO is pulsed  
WD2  
low. Normal watchdog operation is displayed in Figure 4  
(WDPO is not asserted). The internal watchdog timer is  
cleared when a WDI falling edge is detected within the  
valid watchdog window or when the device’s RESET or  
WDPO outputs are deasserted. All WDI input pulses are  
ignored while either RESET or WDPO is asserted. Figure  
1 identifies the input timing regions where WDPO fault  
system integrity by alerting the μP to fault conditions. In  
addition to a standard V  
monitor (for power-on reset,  
CC  
brownout detect, and power-down reset), the devices  
include a sophisticated watchdog timer that detects when  
the processor is running outside an expected window of  
operation for a specific application. The watchdog signals  
a fault when the input pulses arrive too early (faster than  
outputs will be observed with respect to t  
and t  
.
WD1  
WD2  
the selected t  
timeout period) or too late (slower than  
WD1  
After RESET or WDPO deasserts, the first WDI falling  
edge is ignored for the fast fault condition (Figure 2).  
the selected t  
timeout period) (Figure 1). Incorrect  
WD2  
timing can lead to poor or dangerous system performance  
in tightly controlled operating environments. Incorrect  
timing could be the result of improper μP clocking or code  
execution errors. If a timing error occurs, the MAX6323/  
MAX6324 issue a watchdog pulse output, independent  
from the reset output, indicating that system maintenance  
may be required.  
Upon detecting a watchdog fault, the WDPO output  
will pulse low for 1ms. WDPO is an open-drain output.  
Connect a pullup resistor on WDPO to any supply up to  
+6V.  
V
Reset  
CC  
The MAX6323/MAX6324 also include a standard V  
CC  
Watchdog Function  
reset monitor to ensure that the μP is started in a  
known state and to prevent code execution errors  
during power-up, power-down, or brownout conditions.  
A pulse on the watchdog output WDPO can be triggered  
by a fast fault or a slow fault. If the watchdog input (WDI)  
has two falling edges too close to each other (faster  
RESET is asserted whenever the V  
supply voltage  
CC  
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MAX6323/MAX6324  
μP Supervisory Circuits with Windowed  
(Min/Max) Watchdog and Manual Reset  
t
< t  
(min)  
WDI WD1  
RESET  
WDI  
WDPO  
FAST FAULT  
Figure 2. Fast Fault Timing  
t
< t  
(max)  
WDI WD2  
RESET  
WDI  
WDPO  
SLOW FAULT  
Figure 3. Slow Fault Timing  
t
(max) < t < t (min)  
WDI WD2  
WD1  
RESET  
WDI  
H
WDPO  
L
NORMAL OPERATION (NO PULSING, OUTPUT STAYS HIGH)  
Figure 4. Normal Operation, WDPO Not Asserted  
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MAX6323/MAX6324  
μP Supervisory Circuits with Windowed  
(Min/Max) Watchdog and Manual Reset  
V
TH  
V
CC  
100ms (min)  
100ms (min)  
120ns (typ)  
20µs (typ)  
RESET  
MR  
1µs (min)  
Figure 5. RESET Timing Relationship  
falls below the preset threshold or when the manual  
Applications Information  
reset input (MR) is asserted. The RESET output remains  
Negative-Going V  
Transients  
CC  
The MAX6323/MAX6324 are relatively immune to short-  
duration negative-going V transients (glitches), which  
asserted for at least 100ms after V  
has risen above  
CC  
the reset threshold and MR is deasserted (Figure 5).  
For noisy environments, bybass V with a 500pF (min)  
CC  
CC  
usually do not require the entire system to shut down.  
Typically, 200ns large-amplitude pulses (from ground  
to V ) on the supply will not cause a reset. Lower  
CC  
amplitude pulses result in greater immunity. Typically,  
capacitor to ensure correct operation.  
The MAX6323 has a push-pull output stage, and the  
MAX6324 utilizes an open-drain output. Connect a  
pullup resistor on the RESET output of the MAX6324 to  
any supply up to +6V. Select a resistor value large enough  
to register a logic low (see Electrical Characteristics) and  
small enough to register a logic high while supplying all  
input leakage currents and leakage paths connected  
to the RESET line. A 10kΩ pullup is sufficient in most  
applications.  
a V  
transient that falls 100mV below the reset  
CC  
threshold and lasts less than 20μs will not trigger a  
reset (see Typical Operating Characteristics). An optional  
0.1μF bypass capacitor mounted close to V  
additional transient immunity.  
provides  
CC  
Ensuring a Valid Reset Output  
Down to V  
= 0V  
CC  
falls below +1.2V, the MAX6323 RESET out-  
Manual Reset Input  
When V  
CC  
Many μP-based products require manual reset capability  
to allow an operator or external logic circuitry to initiate a  
reset. The manual reset input (MR) can connect directly to  
a switch without an external pullup resistor or debouncing  
put no longer sinks current; it becomes an open circuit.  
Therefore, high-impedance CMOS logic inputs connected  
to RESET can drift to undetermined voltages. This does  
not present a problem in most applications, since most  
network. MR is internally pulled up to V  
and, there-  
CC  
μPs and other circuitry are inoperative with V  
below  
CC  
fore, can be left unconnected if unused. MR is designed  
to reject fast, negative-going transients (typically 100ns  
pulses), and it must be held low for a minimum of 1μs  
to assert the reset output (Figure 5). A 0.1μF capacitor  
from MR to ground provides additional noise immunity.  
After MR transitions from low to high, reset will remain  
asserted for the duration of the reset timeout period, at  
least 100ms.  
+1.2V. However, in applications where RESET must be  
valid down to 0, adding a pulldown resistor to RESET  
causes any stray leakage currents to flow to ground, hold-  
ing RESET low (Figure 6). R1’s value is not critical; 100kΩ  
is large enough not to load RESET and small enough to  
pull RESET to ground. This scheme does not work with  
the open-drain output of the MAX6324.  
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MAX6323/MAX6324  
μP Supervisory Circuits with Windowed  
(Min/Max) Watchdog and Manual Reset  
V
V
CC  
V
CC  
V
CC  
V
CC  
CC  
µP  
MAX6324  
MAX6323  
RESET  
INPUT  
RESET  
RESET  
R1  
100k  
GND  
GND  
GND  
Figure 6. RESET Valid to V  
= Ground Circuit  
Figure 7. Interfacing to μPs with Bidirectional Reset Pins  
CC  
Interfacing to μPs with  
Bidirectional Reset Pins  
+3.3V  
+5.0V  
Since the RESET output on the MAX6324 is open-  
drain, this device easily interfaces with μPs that have  
bidirectional reset pins, such as the Motorola 68HC11.  
Connecting the μP supervisor’s RESET output directly  
to the microcontroller’s (μC’s) RESET pin with a single  
pullup resistor allows either device to assert reset  
(Figure 7).  
R
PULLUP  
V
V
CC  
CC  
5V SYSTEM  
MAX6324  
RESET  
INPUT  
RESET  
MAX6324 Open-Drain RESET Output  
Allows Use with Multiple Supplies  
GND  
GND  
Generally, the pullup resistor connected to the MAX6324  
will connect to the supply voltage that is being monitored  
at the IC’s V  
pin. However, some systems may use  
CC  
the open-drain output to level-shift from the monitored  
supply to reset circuitry powered by some other supply  
Figure 8. MAX6324 Open-Drain RESET Output Allows Use  
with Multiple Supplies  
(Figure 8). Keep in mind that as the MAX6324’s V  
CC  
decreases below +1.2V, so does the IC’s ability to sink  
current at RESET. Also, with any pullup resistor, RESET  
to be reset within the loop, keeping the watchdog from  
timing out.  
will be pulled high as V  
decays toward 0. The voltage  
CC  
where this occurs depends on the pullup resistor value  
and the voltage to which it is connected.  
Figure 9 shows an example of a flow diagram where the  
I/O driving the watchdog input is set high at the beginning  
of the program, set low at the beginning of every subrou-  
tine or loop, then set high again when the program returns  
to the beginning. If the program should “hang” in any sub-  
routine, the problem would be quickly corrected, since the  
I/O is continually set low and the watchdog time is allowed  
to time out, causing a reset or interrupt to be issued.  
Watchdog Software Considerations  
To help the watchdog timer monitor software execution  
more closely, set and reset the watchdog input at different  
points in the program, rather than “pulsing” the watchdog  
input high-low-high or low-high-low. This technique avoids  
a “stuck” loop in which the watchdog time would continue  
Maxim Integrated  
9  
www.maximintegrated.com  
MAX6323/MAX6324  
μP Supervisory Circuits with Windowed  
(Min/Max) Watchdog and Manual Reset  
WDPO to MR Loopback  
An error detected by the watchdog often indicates that  
a problem has occurred in the μP code execution.  
This could be a stalled instruction or a loop from which  
the processor cannot free itself. If the μP will still respond  
to a nonmaskable input (NMI), the processor can be  
redirected to the proper code sequence by connecting the  
WDPO output to an NMI input. Internal RAM data should  
not be lost, but it may have been contaminated by the  
same error that caused the watchdog to time out.  
START  
SET WDI  
LOW  
SUBROUTINE OR  
PROGRAM LOOP  
SET WDI HIGH  
If the processor will not recognize NMI inputs, or if the  
internal data is considered potentially corrupted when a  
watchdog error occurs, the processor should be restarted  
with a reset function. To obtain proper reset timing  
characteristics, the WDPO output should be connected  
to the MR input, and the RESET output should drive the  
μP RESET input (Figure 10). The short 1ms WDPO pulse  
output will assert the manual reset input and force the  
RESET output to assert for the full reset timeout period  
(100ms min). All internal RAM data is lost during the reset  
period, but the processor is guaranteed to begin in the  
proper operating state.  
RETURN  
END  
Figure 9. Watchdog Flow Diagram  
V
CC  
500pF  
V
V
CC  
CC  
*R  
PULLUP  
µP  
MAX6323  
MAX6324  
RESET  
WDI  
RESET  
I/O  
MR  
WDPO  
GND  
*MAX6324 ONLY  
Figure 10. WDPO to MR Loopback Circuit  
Maxim Integrated  
10  
www.maximintegrated.com  
MAX6323/MAX6324  
μP Supervisory Circuits with Windowed  
(Min/Max) Watchdog and Manual Reset  
Standard Versions  
Reset Threshold Range  
(-40°C to +125°C)  
MAX6323AUT29  
MAX6323AUT46  
MAX6323CUT29  
MAX6323CUT46  
MAX6323DUT29  
MAX6323DUT46  
MAX6323HUT29  
MAX6323HUT46  
MAX6324AUT29  
MAX6324AUT46  
MAX6324BUT29  
MAX6324BUT46  
MAX6324EUT29  
MAX6324EUT46  
MAX6324HUT29  
MAX6324HUT46  
SUFFIX  
46  
MIN  
4.50  
4.25  
3.00  
2.85  
2.55  
2.25  
TYP  
4.63  
4.38  
3.08  
2.93  
2.63  
2.32  
MAX  
4.75  
4.50  
3.15  
3.00  
2.70  
2.38  
UNITS  
44  
31  
V
29  
26  
23  
Ordering Information (continued)  
Chip Information  
TRANSISTOR COUNT: 1371  
TEMP  
PIN-  
RESET  
PART  
RANGE  
PACKAGE OUTPUT  
PROCESS: BiCMOS  
Open  
Drain  
MAX6324_UT_ _-T  
-40°C to +125°C 6 SOT23  
Open  
Drain  
MAX6324_UT_ _/V+T -40°C to +125°C 6 SOT23  
MAX6324HUT44/V+T -40°C to +125°C 6 SOT23  
Open  
Drain  
*These devices are factory trimmed to one of eight watchdog-  
timeout windows and one of six reset voltage thresholds. Insert  
the letter corresponding to the desired watchdog-timeout window  
(A, B, C, D, E, F, G, or H) into the blank following the number  
6323 or 6324 (see Watchdog Timeout table). Insert the two-  
digit code (46, 44, 31, 29, 26, or 23) after the letters UT for the  
desired nominal reset threshold (see Reset Threshold Range  
table at end of data sheet).  
/V denotes an automotive qualified part.  
Devices are available in both leaded and lead-free packaging.  
Specify lead-free by replacing “-T” with “+T” when ordering.  
Note: There are eight standard versions of each device available  
(see Standard Versions table). Sample stock is generally held on  
standard versions only. Standard versions have an order  
increment requirement of 2500 pieces. Nonstandard versions  
have an order increment requirement of 10,000 pieces. Contact  
factory for availability of nonstandard versions.  
Maxim Integrated  
11  
www.maximintegrated.com  
MAX6323/MAX6324  
μP Supervisory Circuits with Windowed  
(Min/Max) Watchdog and Manual Reset  
Typical Operating Circuit  
V
CC  
500pF  
V
CC  
V
CC  
*R  
PULLUP  
µP  
MAX6323  
MAX6324  
RESET  
WDI  
RESET  
I/O  
MR  
WDPO  
NMI  
GND  
*MAX6324 ONLY  
Package Information  
For the latest package outline information and land patterns (footprints), go to www.maximintegrated.com/packages. Note that a “+”,  
“#”, or “-” in the package code indicates RoHS status only. Package drawings may show a different suffix character, but the drawing  
pertains to the package regardless of RoHS status.  
PACKAGE TYPE  
PACKAGE CODE  
OUTLINE NO.  
21-0058  
LAND PATTERN NO.  
90-0175  
6 SOT23  
U6-1  
Maxim Integrated  
12  
www.maximintegrated.com  
MAX6323/MAX6324  
μP Supervisory Circuits with Windowed  
(Min/Max) Watchdog and Manual Reset  
Revision History  
REVISION  
NUMBER  
REVISION  
DATE  
PAGES  
CHANGED  
DESCRIPTION  
0
5
6
7
10/00  
5/10  
1/11  
Initial release  
Updated the Ordering Information and Absolute Maximum Ratings.  
Corrected placement of /V in the Ordering Information section  
Updated Features section and Ordering Information table  
1, 2, 10  
11  
3/18  
1, 12  
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642, or visit Maxim Integrated’s website at www.maximintegrated.com.  
Maxim Integrated cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim Integrated product. No circuit patent licenses  
are implied. Maxim Integrated reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits)  
shown in the Electrical Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.  
©
Maxim Integrated and the Maxim Integrated logo are trademarks of Maxim Integrated Products, Inc.  
2018 Maxim Integrated Products, Inc.  
13  

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