MAX5931A [MAXIM]
Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers;
| 型号： | MAX5931A |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Low-Voltage, Triple, Hot-Swap Controllers/ Power Sequencers/Voltage Trackers |
| 文件： | 总23页 (文件大小：337K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-4200; Rev 0; 7/08
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
0/MAX5931B
General Description
Features
The MAX5930A/MAX5931A/MAX5931B +1V to +15V
triple hot-swap controllers provide complete protection
for multisupply systems. They allow the safe insertion
and removal of circuit cards into live backplanes. These
devices hot swap multiple supplies ranging from +1V to
+15V, provided one supply is at or above +2.7V. The
input voltage rails (channels) can be configured to
sequentially turn-on/off, track each other, or have com-
pletely independent operation.
o Safe Hot Swap for +1V to +15V Power Supplies
with Any Input Voltage (V ) ≥ 2.7V
IN_
o Adjustable Circuit-Breaker/Current-Limit
Threshold from 25mV to 100mV
o Configurable Tracking, Sequencing, or
Independent Operation Modes
o VariableSpeed/BiLevel Circuit-Breaker Response
o Internal Charge Pumps Generate n-Channel
The discharged filter capacitors of the circuit card provide
low impedance to the live backplane. High inrush cur-
rents from the backplane to the circuit card can burn up
connectors and components, or momentarily collapse the
backplane power supply leading to a system reset. The
MAX5930A/MAX5931A/MAX5931B hot-swap controllers
prevent such problems by gradually ramping up the out-
put voltage and regulating the current to a preset limit
when the board is plugged in, allowing the system to sta-
bilize safely. After the startup cycle is complete, on-chip
comparators provide VariableSpeed/BiLevel™ protection
against short-circuit and overcurrent faults, and provide
immunity against system noise and load transients.
MOSFET Gate Drives
o Inrush Current Regulated at Startup
o Autoretry or Latched Fault Management
o Programmable Undervoltage Lockout
o Status Outputs Indicate Fault/Safe Condition
Ordering Information
PART
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
24 QSOP
MAX5930AEEG+
MAX5931AEEP+
MAX5931BEEP+
20 QSOP
20 QSOP
The load is disconnected in the event of a fault condi-
tion. The MAX5930A/MAX5931A/MAX5931B fault-man-
agement mode is selectable, allowing latched fault or
autoretry after a fault condition.
+Denotes a lead-free/RoHS-compliant package.
Selector Guide and Typical Operating Circuit appear at end
of data sheet.
The MAX5930A/MAX5931A/MAX5931B offer a variety of
options to reduce external component count and
design time. All devices integrate an on-board charge
pump to drive the gates of low-cost, external n-channel
MOSFETs, an adjustable startup timer, and an
adjustable current limit. The devices offer integrated
features like startup current regulation and current
glitch protection to eliminate external timing resistors
and capacitors. The MAX5931A provides an open-
drain, active-low status output for each channel, the
MAX5931B provides an open-drain, active-high status
output for each channel, and the MAX5930A status out-
put polarity is selectable.
Pin Configurations
TOP VIEW
POL
ON2
1
2
3
4
5
6
7
8
9
24 MODE
23 ON3
ON1
22 LIM2
21 IN2
LIM1
MAX5930A
IN1
20 SENSE2
19 GATE2
18 LIM3
17 IN3
SENSE1
GATE1
STAT1
STAT2
The MAX5930A is available in a 24-pin QSOP package,
and the MAX5931A/MAX5931B are available in a 20-pin
QSOP package. All devices are specified over the
extended -40°C to +85°C temperature range.
16 SENSE3
15 GATE3
14 GND
13 BIAS
TIM 10
LATCH 11
STAT3 12
Applications
Network Switches, Routers, Power-Supply
QSOP
Hubs
Sequencing/Tracking
Hot Plug-In Daughter Cards Base-Station Line Cards
Pin Configurations continued at end of data sheet.
RAID
Portable Computer Device
Bays (Docking Stations)
VariableSpeed/BiLevel is a trademark of Maxim Integrated
Products, Inc.
Solid-State Circuit Breakers
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
ABSOLUTE MAXIMUM RATINGS
(All voltages referenced to GND, unless otherwise noted.)
IN_ ..........................................................................-0.3V to +16V
GATE_.............................................................-0.3V to (IN_ + 6V)
Continuous Power Dissipation (T = +70°C)
A
20-Pin QSOP (derate 9.1mW/°C above +70°C)............727mW
24-Pin QSOP (derate 9.5mW/°C above +70°C)............762mW
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature .....................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
BIAS (Note 1) .............................................. (V - 0.3V) to +16V
IN
ON_, STAT_, LIM_ (MAX5930A), TIM, MODE,
LATCH, POL (MAX5930A)........................-0.3V to (V + 0.3V)
SENSE_........................................................-0.3V to (IN_ + 0.3V)
Current into Any Pin.......................................................... 50mA
IN
Note 1: V is the largest of V , V , and V
.
IN3
IN
IN1 IN2
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
= +1V to +15V, provided at least one supply is larger than or equal to +2.7V, T = -40°C to +85°C, unless otherwise noted. Typical
A
IN_
values are at V
= 12.0V, V
= 5.0V, V
= 3.3V, V = +3.3V, and T = +25°C.) (Notes 1, 2)
IN1
IN2
IN3
ON_ A
PARAMETER
POWER SUPPLIES
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
IN_ Input Voltage Range
V
At least one V
≥ +2.7V
IN_
1.0
15
5
V
IN_
I
+ I
+ I , V
= 2.7V,
IN1
IN2
IN3 ON_
Supply Current
I
2.5
25
mA
Q
V
= +15V, after STAT_ high
IN_
CURRENT CONTROL
LIM_ = GND (Note 4)
22.5
80
28
Slow-Comparator Threshold
(V - V
R
LIM_
= 10kΩ (MAX5930A)
125
)
SENSE_
V
V
mV
IN_
SC,TH
R
x 7.5 x
LIM_
(Note 3)
R
LIM_
from LIM_ to GND (MAX5930A)
-6
10 + 25mV
0/MAX5931B
1mV overdrive
50mV overdrive
3
ms
µs
Slow-Comparator Response Time
(Note 4)
t
SCD
130
Fast-Comparator Threshold
2 x
mV
FC,TH
(V
IN_
- V
)
V
SENSE_
SC,TH
200
Fast-Comparator Response Time
SENSE_ Input Bias Current
MOSFET DRIVER
t
10mV overdrive, from overload condition
ns
FCD
I
V
= V
0.03
1
µA
B SENSE_
SENSE_
IN_
R
R
= 100kΩ
8.0
0.30
5
10.8
0.4
9
13.6
0.55
14
TIM
Startup Period (Note 5)
t
= 4kΩ (minimum value)
ms
START
TIM
TIM unconnected (default)
2
_______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
0/MAX5931B
ELECTRICAL CHARACTERISTICS (continued)
(V
= +1V to +15V, provided at least one supply is larger than or equal to +2.7V, T = -40°C to +85°C, unless otherwise noted. Typical
A
IN_
values are at V
= 12.0V, V
= 5.0V, V
= 3.3V, V = +3.3V, and T = +25°C.) (Notes 1, 2)
IN1
IN2
IN3
ON_ A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
100
100
MAX
UNITS
Charging, V
(Note 6)
= GND, V
= +5V
GATE_
IN_
80
125
µA
Discharging, during startup
Discharging, normal turn-off or triggered by
the slow comparator after startup; V
Average Gate Current
I
=
GATE_
2
3
7
GATE
5V, V
= 10V, V
= 0V
ON_
IN_
mA
V
Discharging, triggered by a fault after
startup; V = 5V, V = 10V, (V -
IN_
28
4.9
50
120
5.6
GATE_
IN_
V
) > V
(Note 7)
FC,TH_
SENSE_
Gate-Drive Voltage
V
V
- V , I = 1µA
IN_ GATE_
5.3
DRIVE
GATE_
ON COMPARATOR
Low to high
Hysteresis
0.83
0.875
25
0.90
V
mV
µs
V
ON_ Threshold
V
ON_,TH
ON_ Propagation Delay
ON_ Voltage Range
10mV overdrive
10
V
Without false output inversion
= V
V
IN
ON_
ON_ Input Bias Current
ON_ Pulse-Width Low
I
V
0.03
1
µA
µs
BON
ON_
IN
t
To unlatch after a latched fault
100
UNLATCH
DIGITAL OUTPUTS (STAT_)
Output Leakage Current
V
≤ 15V
1
µA
V
STAT_
POL = unconnected (MAX5930A),
= 1mA
Output Voltage Low
V
0.4
OL_
I
SINK
UNDERVOLTAGE LOCKOUT (UVLO)
Startup is initiated when this threshold is
UVLO Threshold
V
reached by any V
(Note 8)
and V > 0.9V
ON_
2.25
2.45
250
2.65
V
UVLO
IN_
UVLO Hysteresis
V
mV
µs
UVLO,HYST
UVLO Glitch Filter Reset Time
t
V
< V maximum pulse width to reset
UVLO
10
60
D,GF
IN
Time input voltage must exceed V
before startup is initiated
UVLO
UVLO to Startup Delay
t
20
37.5
ms
D,UVLO
Input Power-Ready Threshold
Input Power-Ready Hysteresis
LOGIC AND TIMING
V
(Note 9)
0.9
0.95
50
1.0
V
PWRRDY
V
mV
PWRHYST
POL Input Pullup
I
POL = GND (MAX5930A)
LATCH = GND
2
2
4
4
6
6
µA
µA
POL
LATCH Input Pullup
I
LATCH
MODE unconnected (default to sequencing
mode)
MODE Input Voltage
V
1.0
1.25
1.5
0.4
V
V
MODE
Independent-Mode Selection
Threshold
V
V
rising
MODE
INDEP,TH
_______________________________________________________________________________________
3
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
ELECTRICAL CHARACTERISTICS (continued)
(V
= +1V to +15V, provided at least one supply is larger than or equal to +2.7V, T = -40°C to +85°C, unless otherwise noted. Typical
A
IN_
values are at V
= 12.0V, V
= 5.0V, V
= 3.3V, V
= +3.3V, and T = +25°C.) (Notes 1, 2)
IN1
IN2
IN3
ON_
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V
Tracking-Mode Selection
Threshold
V
V
rising
2.7
TRACK,TH
MODE
MODE Input Impedance
R
200
kΩ
MODE
64 x
Autoretry Delay
t
Delay time to restart after fault shutdown
ms
RETRY
t
START
Note 2: All devices are 100% tested at T = +85°C. Limits over temperature are guaranteed by design.
A
Note 3: The slow-comparator threshold is adjustable. V
= R
x 7.5µA + 25mV (see theTypical Operating Characteristics
LIM_
SC,TH
section).
Note 4: The current-limit slow-comparator response time is weighed against the amount of overcurrent, the higher the overcurrent
condition, the faster the response time (see the Typical Operating Characteristics section).
Note 5: The startup period (t
) is the time during which the slow comparator is ignored and the device acts as a current-limiter
START
by regulating the sense current with the fast comparator (see the Startup Period section).
(see the Typical Operating Characteristics section).
Note 6: The current available at GATE is a function of V
GATE
Note 7: After a fault triggered by the fast comparator, the gate is discharged by the strong discharge current.
Note 8: Each channel input while the other inputs are at +1V.
Note 9: Each channel input while any other input is at +3.3V.
Typical Operating Characteristics
(Typical Operating Circuit, Q1 = Q2 = Q3 = Fairchild FDB7030L, V
= +12.0V, V
= +5.0V, V
= +1V, T = +25°C, unless oth-
IN1
IN2
IN3 A
erwise noted. Channels 1 through 3 are identical in performance. Where characteristics are interchangeable, channels 1 through 3
are referred to as X, Y, and Z.)
TOTAL SUPPLY CURRENT
vs. INPUT VOLTAGE
GATE-DRIVE VOLTAGE
vs. INPUT VOLTAGE
SUPPLY CURRENT vs. INPUT VOLTAGE
0/MAX5931B
8
6
4
2
0
5.0
4.0
3.0
2.0
1.0
4
3
2
1
0
I
V
V
= I + I + I
V
= V = 2.7V
INY INZ
V
= V = 2.7V
INZ
IN IN1 IN2 IN3
INY
= V = V = V
INX INY INZ
IN
= V
= V
= V
ON2 ON3
ON
ON1
I
+ I + I
INX INY INZ
V
= 0V
ON
I
INX
V
= 3.3V
ON
I
+ I
INY INZ
0
2
4
6
8
10
12
14
2
4
6
8
10
12
14
0
2
4
6
8
10
12
14
V
(V)
V
(V)
V (V)
IN
INX
INX
4
_______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
0/MAX5931B
Typical Operating Characteristics (continued)
(Typical Operating Circuit, Q1 = Q2 = Q3 = Fairchild FDB7030L, V
= +12.0V, V
= +5.0V, V = +1V, T = +25°C, unless oth-
IN3 A
IN1
IN2
erwise noted. Channels 1 through 3 are identical in performance. Where characteristics are interchangeable, channels 1 through 3
are referred to as X, Y, and Z.)
GATE CHARGE CURRENT
vs. TEMPERATURE
GATE-DRIVE VOLTAGE
vs. INPUT VOLTAGE
GATE CHARGE CURRENT
vs. GATE VOLTAGE
8
6
4
2
0
200
160
120
80
150
120
90
60
30
0
V
= V = 2.7V
INZ
V
= V = V = 2.7V
INY
ONW
INY
INZ
V
= 13.2V
= 5V
INX
V
= 13.2V
INX
V
= 5V
INX
V
INX
V
= 1V
INX
V
= 1V
60
INX
40
V
V
= V = V = 2.7V
INY INZ
ONX
= 0V
GATEX
0
-40
-15
10
35
85
125
500
0
2
4
6
8
10
12
14
0
5
10
15
20
TEMPERATURE (°C)
V
(V)
V
(V)
INX
GATEX
TURN-OFF TIME
vs. SENSE VOLTAGE
STRONG GATE DISCHARGE CURRENT
vs. TEMPERATURE
STRONG GATE DISCHARGE CURRENT
vs. GATE VOLTAGE
10
1
6
5
4
3
2
1
0
6
R
= 100Ω
LIMX
V
= 0V
V
V
= 0V
= V = 2.7V
INZ
ONX
ONX
V
= V = 2.7V
INZ
INY
INY
5
4
3
2
1
0
V
= 13.2V
INX
V
= 13.2V
INX
V
= 5V
INX
0.1
0.01
V
= 5V
INX
SLOW-COMPARATOR
THRESHOLD
V
= 3.3V
INX
V
= 3.3V
INX
FAST-COMPARATOR
THRESHOLD
0.001
V
= 1V
-15
INX
V
= 1V
INX
0.0001
0
25
50
- V
75
(mV)
100
-40
10
35
60
85
0
4
8
12
(V)
16
20
V
TEMPERATURE (°C)
INX
SENSEX
V
GATEX
TURN-OFF TIME vs. SENSE VOLTAGE
(EXPANDED SCALE)
SLOW-COMPARATOR THRESHOLD
STARTUP PERIOD
vs. R
vs. R
LIMX
TIM
10
120
100
80
60
40
20
0
R
= 100Ω
LIMX
1
60
40
20
0
SLOW-COMPARATOR THRESHOLD
0.1
20
25
30
35
40
45
50
4
6
8
2
10
0
0
100
200
R
300
(kΩ)
400
V
- V
(mV)
R
(kΩ)
INX
SENSEX
LIMX
TIM
_______________________________________________________________________________________
5
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
Typical Operating Characteristics (continued)
(Typical Operating Circuit, Q1 = Q2 = Q3 = Fairchild FDB7030L, V
= +12.0V, V
= +5.0V, V = +1V, T = +25°C, unless oth-
IN3 A
IN1
IN2
erwise noted. Channels 1 through 3 are identical in performance. Where characteristics are interchangeable, channels 1 through 3
are referred to as X, Y, and Z.)
TURN-OFF TIME
TURN-OFF TIME
FAST-COMPARATOR FAULT
SLOW-COMPARATOR FAULT
V
STATX
2V/div
V
STATX
2V/div
0V
0V
V
- V
SENSEX
V
- V
SENSEX
INX
INX
100mV/div
0V
25mV/div
AC-COUPLED
V
V
GATEX
GATEX
5V/div
5V/div
0V
0V
100ns/div
1ms/div
STARTUP WAVEFORMS SLOW TURN-ON
STARTUP WAVEFORMS FAST TURN-ON
(C
GATE
= 0.22μF, C
= 1000μF)
(C
= 0nF, C
= 1000μF)
BOARD
GATE
BOARD
V
ONX
V
ON
5V/div
5V/div
V
V
STATX
STATX
5V/div
5V/div
I
OUTX
I
OUTX
2A/div
2A/div
V
V
GATEX
GATEX
10V/div
10V/div
0/MAX5931B
V
V
OUTX
OUTX
5V/div
5V/div
2ms/div
2ms/div
TURN-ON IN
VOLTAGE-TRACKING MODE
AUTORETRY DELAY
V
INX
V
PWRRDY
V
GATEX
2V/div
2V/div
0V
0V
V
ONX
2V/div
V
OUTX
2V/div
0V
V
GATEY
I
OUTX
500mA/div
5V/div
0V
V
GATEX
0V
4ms/div
100ms/div
6
_______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
0/MAX5931B
Typical Operating Characteristics (continued)
(Typical Operating Circuit, Q1 = Q2 = Q3 = Fairchild FDB7030L, V
= +12.0V, V
= +5.0V, V = +1V, T = +25°C, unless oth-
IN3 A
IN1
IN2
erwise noted. Channels 1 through 3 are identical in performance. Where characteristics are interchangeable, channels 1 through 3
are referred to as X, Y, and Z.)
TURN-ON IN
XXXX
TURN-OFF IN
VOLTAGE-TRACKING MODE
XXXX
POWER-SEQUENCING MODE
V
INX
V
V
V
PWRRDY
PWRRDY
INX
2V/div
2V/div
0V
0V
V
ONX
V
2V/div
ONX
2V/div
0V
V
GATEY
V
GATEY
5V/div
0V
5V/div
0V
V
GATEX
V
GATEX
4ms/div
4ms/div
TURN-OFF IN
POWER-SEQUENCING MODE
TURN-ON IN
INDEPENDENT MODE
XXXX
XXXX
V
V
V
INX
INX
PWRRDY
2V/div
2V/div
0V
0V
ONX
V
V
2V/div
ONX
2V/div
0V
V
GATEY
V
GATEY
V
5V/div
0V
GATEX
5V/div
0V
V
GATEX
4ms/div
4ms/div
STRONG GATE DISCHARGE CURRENT
vs. OVERDRIVE
TURN-OFF IN
XXXX
INDEPENDENT MODE
50
40
30
20
10
0
V
V
= V
IN
ONX
V
INX
V
PWRRDY
= 5V
GATE
2V/div
0V
AFTER STARTUP
LIM_ = GND V = 12V
INX
V
ONX
V
= 5V
2V/div
INX
V
GATEY
V
= 2.7V
INX
5V/div
0V
V
GATEX
20
25
30
35
40
(mV)
45
50
4ms/div
V
- V
SENSE_
IN_
_______________________________________________________________________________________
7
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
Pin Description
PIN
MAX5931A/
NAME
FUNCTION
MAX5930A
MAX5931B
1
2
3
—
1
POL
ON2
ON1
STAT Output-Polarity Select. See Table 3 and the Status Outputs (STAT_) section.
On/Off Channel 2 Control Input. See the Mode section.
2
On/Off Channel 1 Control Input. See the Mode section.
Channel 1 Current-Limit Setting. Connect a resistor from LIM1 to GND to set current-trip
level. Connect to GND for the default 25mV threshold. Do not leave LIM1 unconnected.
4
5
—
3
LIM1
IN1
Channel 1 Supply Input. Connect to a 1V to 15V supply voltage and to one end of R
Bypass with a 0.1µF capacitor to ground.
.
SENSE1
Channel 1 Current-Sense Input. Connect SENSE1 to the drain of an external MOSFET and
to one end of R
6
7
8
4
5
6
SENSE1
.
SENSE1
GATE1 Channel 1 Gate-Drive Output. Connect to the gate of the external n-channel MOSFET.
Open-Drain Status Signal for Channel 1. STAT1 asserts when hot swap is successful and t
STAT1
START
has elapsed. STAT1 deasserts if ON1 is low, or if channel 1 is turned off for any fault condition.
Open-Drain Status Signal for Channel 2. STAT2 asserts when hot swap is successful and t
has elapsed. STAT2 deasserts if ON2 is low, or if channel 2 is turned off for any fault condition.
START
9
7
8
STAT2
TIM
Startup Timer Setting. Connect a resistor from TIM to GND to set the startup period. Leave
10
11
12
13
TIM unconnected for the default startup period of 9ms. R
must be between 4kΩ and
TIM
500kΩ.
Latch/Autoretry Selection Input. Connect LATCH to GND for autoretry mode after a fault.
Leave LATCH unconnected for latch mode.
9
LATCH
STAT3
Open-Drain Status Signal for Channel 3. STAT3 asserts when hot swap is successful and
10
t
has elapsed. STAT3 deasserts if ON3 is low, or if channel 3 is turned off for any fault
START
condition.
Supply Reference Output. The highest supply is available at BIAS for filtering. Connect a 1nF
to 10nF ceramic capacitor from BIAS to GND. No other connections are allowed to BIAS.
0/MAX5931B
11
BIAS
GND
14
15
12
13
Ground
GATE3 Channel 3 Gate-Drive Output. Connect to gate of external n-channel MOSFET.
Channel 3 Current-Sense Input. Connect SENSE3 to the drain of an external MOSFET and
SENSE3
16
17
14
15
to one end of R
.
SENSE3
Channel 3 Supply Input. Connect to a supply voltage from 1V to 15V and to one end of
. Bypass with a 0.1µF capacitor to ground.
IN3
R
SENSE3
Channel 3 Current-Limit Setting. Connect a resistor from LIM3 to GND to set current-trip
level. Connect to GND for the default 25mV threshold. Do not leave LIM3 unconnected.
18
19
20
—
16
17
LIM3
GATE2 Channel 2 Gate-Drive Output. Connect to gate of external n-channel MOSFET.
Channel 2 Current-Sense Input. Connect SENSE2 to the drain of an external MOSFET and
SENSE2
to one end of R
.
SENSE2
Channel 2 Supply Input. Connect to a 1V to 15V supply voltage and to one end of R
Bypass with a 0.1µF capacitor to ground.
.
SENSE2
21
22
18
—
IN2
Channel 2 Current-Limit Setting. Connect a resistor from LIM2 to GND to set current-trip
level. Connect to GND for the default 25mV threshold. Do not leave LIM2 unconnected.
LIM2
8
_______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
0/MAX5931B
Pin Description (continued)
PIN
MAX5931A/
NAME
FUNCTION
MAX5930A
MAX5931B
23
24
19
ON3
On/Off Channel 3 Control Input. See the Mode section.
Mode Configuration Input. Mode is configured according to Table 1 as soon as one of the
IN_ voltages exceeds UVLO and before turning on OUT_ (see the Mode section).
20
MODE
The MAX5930A/MAX5931A/MAX5931B turn off all
Detailed Description
channels if any of the above conditions are not met.
After a fault-latched shutdown, cycle any of the ON_
pins to unlatch and restart all channels.
The MAX5930A/MAX5931A/MAX5931B are circuit-
breaker ICs for hot-swap applications where a line card
is inserted into a live backplane. The MAX5931A/
MAX5931B operate down to 1V provided one of the
inputs is above 2.7V. Normally, when a line card is
plugged into a live backplane, the card’s discharged
filter capacitors provide low impedance that can
momentarily cause the main power supply to collapse.
The MAX5930A/MAX5931A/MAX5931B reside either on
the backplane or on the removable card to provide
inrush current limiting and short-circuit protection. This
is achieved by using external n-channel MOSFETs,
external current-sense resistors, and on-chip compara-
tors. The startup period and current-limit threshold of
the MAX5930A/MAX5931A/MAX5931B can be adjusted
with external resistors. Figure 1 shows the MAX5930A/
MAX5931A/MAX5931B functional diagram.
Power-Sequencing Mode
Leave MODE unconnected to enter power-sequencing
mode. While in power-sequencing mode, the
MAX5930A/MAX5931A/MAX5931B turn on and off each
channel depending on the state of the corresponding
V . To turn on a given channel:
ON_
• At least one V
must exceed V
(2.45V) for the
IN_
UVLO
UVLO to startup delay (37.5ms).
• All V
must exceed V
(0.95V).
IN_
PWRRDY
• The corresponding V
(0.875V).
must exceed V
ON_
ON,TH
• No faults may be present on any channel.
The MAX5930A/MAX5931A/MAX5931B turn off all chan-
nels if any of the above conditions are not met. After a
fault-latched shutdown, cycle any of the ON_ inputs to
unlatch and restart all channels, dependent on the corre-
The MAX5930A offers three programmable current lim-
its, selectable fault-management mode, and selectable
STAT_ output polarity. The MAX5930A features fixed
current limits, selectable fault-management mode, and
fixed STAT_ output polarity.
sponding V
state.
ON_
Independent Mode
Mode
The MAX5930A/MAX5931A/MAX5931B support three
modes of operation: voltage-tracking, power-sequenc-
ing, and independent mode. Select the appropriate
mode according to Table 1.
Connect MODE to GND to enter independent mode.
While in independent mode the MAX5930A/
MAX5931A/MAX5931B provide complete independent
control for each channel. To turn on a given channel:
• At least one V
must exceed V
(2.45V) for the
IN_
UVLO
UVLO to startup delay (37.5ms).
Voltage-Tracking Mode
Connect MODE high to enter voltage-tracking mode.
While in voltage-tracking mode, all channels turn on
and off together. To turn all channels on:
• The corresponding V
(0.95V).
must exceed V
PWRRDY
IN_
• The corresponding V
(0.875V).
must exceed V
ON,TH
ON_
• At least one V
must exceed V
(2.45V) for the
IN_
UVLO
UVLO to startup delay (37.5ms).
Table 1. Operational Mode Selection
• All V
• All V
must exceed V
(0.95V).
IN_
PWRRDY
MODE
High (Connect to BIAS)
Unconnected
GND
OPERATION
Voltage Tracking
must exceed V
(0.875V).
ON_
ON,TH
• No faults may be present on any channel.
Voltage Sequencing
Independent
_______________________________________________________________________________________
9
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
R
R
LIM2
R
LIM1
TIM
1nF
LIM1*
LIM2*
TIM
BIAS
POL*
2.45V
IN1
IN2
V
V
V
V
SC, TH
SC, TH
FC, TH
FC, TH
STARTUP
OSCILLATOR
R
R
SENSE2
SENSE1
FAST
COMPARATOR
FAST
COMPARATOR
UVLO
BIAS AND
REFERENCES
UVLO
SENSE1
GATE1
SENSE2
GATE2
SLOW
COMPARATOR
SLOW
COMPARATOR
TIMING
OSCILLATOR
CURRENT CONTROL
AND
STARTUP LOGIC
CURRENT CONTROL
AND
STARTUP LOGIC
CHARGE
PUMP
CHARGE
PUMP
DEVICE CONTROL
LOGIC
Q1
Q2
OUT1
OUT2
SLOW DISCHARGE
SLOW DISCHARGE
FAST DISCHARGE
FAST DISCHARGE
3mA
50mA
3mA
50mA
100μA
100μA
STAT1
LIM3*
STAT2
R
LIM3
IN3
V
V
FC, TH
SC, TH
R
SENSE3
MAX5930A
MAX5931A
MAX5931B
FAST
COMPARATOR
UVLO
SENSE3
GATE3
SLOW
COMPARATOR
CURRENT CONTROL
AND
STARTUP LOGIC
CHARGE
PUMP
Q3
0/MAX5931B
OUT3
SLOW DISCHARGE
FAST DISCHARGE
ON
INPUT
COMPARATORS
FAULT
MANAGEMENT
OPERATION
MODE
3mA
50mA
100μA
*MAX5930A ONLY.
STAT3
LATCH*
ON1 ON2 ON3
MODE
Figure 1. Functional Diagram
The MAX5930A/MAX5931A/MAX5931B turn off the cor-
responding channel if any of the above conditions are
not met. During a fault condition on a given channel
only, the affected channel is disabled. After a fault-
latched shutdown, recycle the corresponding ON_
inputs to unlatch and restart only the corresponding
channel.
Startup Period
sets the duration of the startup period from 0.4ms
R
TIM
(R
= 4kΩ) to 51ms (R
= 500kΩ) (see the Setting
TIM
TIM
the Startup Period, R
section). The default startup
TIM
period is fixed at 9ms when TIM is unconnected. The
startup period begins after the turn-on conditions are
met as described in the Mode section, and the device
is not latched or in its autoretry delay (see the Latched
and Autoretry Fault Management section).
10 ______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
0/MAX5931B
ON1
ON2
ON3
V
V
(2.45V)
UVLO
ANY
IN_
(0.95V)
PWRRDY
IN2
V
(0.95V)
PWRRDY
IN3
V
(0.95V)
PWRRDY
OUT1*
OUT2*
OUT3*
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 2. Voltage-Tracking Timing Diagram (Provided t
Requirement is Met)
D, UVLO
______________________________________________________________________________________ 11
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
ON1
ON2
ON3
V
(2.45V)
UVLO
ANY
IN_
V
(0.95V)
PWRRDY
IN2
IN3
V
(0.95V)
PWRRDY
V
(0.95V)
PWRRDY
0/MAX5931B
*
OUT1
OUT2
*
*
OUT3
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 3. Power-Sequencing Timing Diagram (Provided t
Requirement is Met)
D, UVLO
12 ______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
0/MAX5931B
voltage to ensure that the voltage across the sense resis-
tor does not exceed V
. This effectively regulates
SU,TH
the inrush current during startup.
ON1 = ON2 = ON3
Figure 6 shows the startup waveforms. STAT_ is assert-
ed immediately after the startup period if no fault condi-
tion is present.
OVERCURRENT
FAULT
CONDITION
VariableSpeed/BiLevel Fault Protection
VariableSpeed/BiLevel fault protection incorporates
comparators with different thresholds and response
times to monitor the load current (Figure 7). During the
startup period, protection is provided by limiting the
load current. Protection is provided in normal operation
(after the startup period has expired) by discharging
the MOSFET gates with a strong 3mA/50mA pulldown
current in response to a fault condition. After a fault,
STAT_ is deasserted. Use the LATCH input to control
whether the STAT_ outputs latch off or autoretry (see
the Latched and Autoretry Fault Management section).
*
OUT1
*
OUT2
OUT3
Slow-Comparator Startup Period
The slow comparator is disabled during the startup
period while the external MOSFETs are turning on.
Disabling the slow comparator allows the device to
ignore the higher-than-normal inrush current charging
the board capacitors when a card is first plugged into a
live backplane.
*
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY
OF THE LOAD RESISTANCE AND CAPACITANCE.
Slow-Comparator Normal Operation
After the startup period is complete, the slow comparator
is enabled and the device enters normal operation. The
Figure 4. Power-Sequencing Fault Turn-Off
comparator threshold voltage (V
) is adjustable from
SC,TH
25mV to 100mV. The slow-comparator response time is
3ms for a 1mV overdrive. The response time decreases
to 100µs with a large overdrive. The variable-speed
response time allows the MAX5930A/MAX5931A/
MAX5931B to ignore low-amplitude momentary glitches,
thus increasing system noise immunity. After an extend-
ed overcurrent condition, a fault is generated, STAT_ out-
puts are deasserted and the MOSFET gates are
discharged with a 3mA pulldown current.
The MAX5930A/MAX5931A/MAX5931B limit the load
current if an overcurrent fault occurs during startup
instead of completely turning off the external MOSFETs.
The slow comparator is disabled during the startup
period and the load current can be limited in two ways:
1) Slowly enhancing the MOSFETs by limiting the
MOSFET gate-charging current.
2) Limiting the voltage across the external current-
sense resistor.
Fast-Comparator Startup Period
During the startup period, the fast comparator regu-
lates the gate voltages to ensure that the voltage
across the sense resistor does not exceed the startup
During the startup period, the gate-drive current is limit-
ed to 100µA and decreases with the increase of the gate
voltage (see the Typical Operating Characteristics sec-
tion). This allows the controller to slowly enhance the
MOSFETs. If the fast comparator detects an overcurrent,
the MAX5930A/MAX5931A/MAX5931B regulate the gate
fast-comparator threshold voltage (V
), V
is
SU,TH
SU,TH
scaled to two times the slow-comparator threshold
(V ).
SC,TH
______________________________________________________________________________________ 13
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
ON1
ON2
ON3
V
(2.45V)
UVLO
IN1
IN2
V
(0.95V)
PWRRDY
V
(0.95V)
PWRRDY
IN3
V
(0.95V)
PWRRDY
0/MAX5931B
t
D,UVLO
*
OUT1
OUT2
*
*
OUT3
*THE OUT_ DISCHARGE RATE IS A RESULT OF NATURAL DECAY OF THE LOAD RESISTANCE AND CAPACITANCE.
Figure 5. Independent-Mode Timing Diagram
14 ______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
0/MAX5931B
ON_
STAT_
SLOW
COMPARATOR
t
START
V
GATE_
3ms
V
DRIVE
FAST
COMPARATOR
V
OUT_
V
TH
V
V
GATE_
130μs
OUT_
V
C
= LARGE
= 0
200ns
FC,TH
BOARD_
R
SENSE_
C
BOARD_
V
SC,TH
V
FC,TH
I
LOAD_
(2 x V
)
SC,TH
SENSE VOLTAGE (V - V
)
IN
SENSE
t
ON
Figure 6. Independent-Mode Startup Waveforms
Figure 7. VariableSpeed/BiLevel Response
Fast-Comparator Normal Operation
In normal operation, if the load current reaches the fast-
comparator threshold, a fault is generated, STAT_ is
deasserted, and the MOSFET gates are discharged
with a strong 50mA pulldown current. This happens in
the event of a serious current overload or a dead short.
below the UVLO threshold for longer than t
reinitiates
D,GF
. See Figure 8 for
t
and the startup period, t
D,UVLO
START
an example of automatic turn-on function.
Latched and Autoretry Fault Management
The MAX5930A can be configured to latch the external
MOSFETs off or to autoretry (see Table 2). Toggling
ON_ below 0.875V for at least 100µs clears the
MAX5930A/MAX5931A/MAX5931B (LATCH = uncon-
nected) fault and reinitiates the startup period.
Similarly, the MAX5930A/MAX5931A/MAX5931B
(LATCH = GND) turn the external MOSFETs off when
an overcurrent fault is detected, then automatically
restart after the autoretry delay that is internally set to
The fast-comparator threshold voltage (V
) is
FC,TH
scaled to two times the slow-comparator threshold
(V ). This comparator has a fast response time of
SC,TH
200ns (Figure 7).
Undervoltage Lockout (UVLO)
The UVLO prevents the MAX5930A/MAX5931A/
MAX5931B from turning on the external MOSFETs until
one input voltage exceeds the UVLO threshold (2.45V)
64 times t
.
START
for t
. The MAX5930A/MAX5931A/MAX5931B use
D,UVLO
Status Outputs (STAT_)
The status (STAT_) outputs are open-drain outputs that
assert when hot swap is successful and t has
elapsed. STAT_ deasserts if ON_ is low or if the chan-
nel is turned off for any fault condition.
power from the highest input voltage rail for the charge
pumps. This allows for more efficient charge-pump oper-
START
ation. The highest V
is provided as an output at BIAS.
IN_
The UVLO protects the external MOSFETs from an insuffi-
cient gate-drive voltage. t ensures that the board
D,UVLO
is fully inserted into the backplane and that the input volt-
ages are stable. The MAX5930A/MAX5931A/MAX5931B
The polarity of the STAT_ outputs is selected using POL
for the MAX5930A (see Table 3). Tables 4 and 5 con-
tain the MAX5930A/MAX5931A/MAX5931B truth tables.
include a UVLO glitch filter (t
) to reject all input volt-
D,GF
age noise and transients. Bringing all input supplies
______________________________________________________________________________________ 15
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
Table 2. Selecting Fault-Management
BACKPLANE
REMOVABLE CARD
Mode (MAX5930A)
V
V
V
1
LATCH
FAULT MANAGEMENT
2
3
Unconnected
Low
Fault condition latches MOSFETs off
Autoretry mode
Table 3. Selecting STAT_ Polarity
(MAX5930A)
ON1
ON2
ON3
ON1
ON2
ON3
POL
STAT_
MAX5930A
MAX5931A
MAX5931B
Low
Unconnected
Asserts low
Asserts high (open-drain)
GND
Applications Information
GND
Component Selection
n-Channel MOSFETs
Select the external MOSFETs according to the applica-
tion’s current levels. Table 6 lists recommended com-
Figure 8. Automatic Turn-On When Input Voltages are Above
their Respective Undervoltage Lockout Threshold (Provided
ponents. The MOSFET’s on-resistance (R
)
DS(ON)
should be chosen low enough to have a minimum volt-
age drop at full load to limit the MOSFET power dissi-
t
Requirement is Met)
D,UVLO
pation. High R
causes output ripple if there is a
DS(ON)
Slow-Comparator Threshold, R
(MAX5930A)
LIM_
pulsating load. Determine the device power rating to
accommodate a short-circuit condition on the board at
startup and when the device is in autoretry mode (see
the MOSFET Thermal Considerations section).
The slow-comparator threshold voltage is adjustable
from 25mV to 100mV, allowing designers to fine-tune
the current-limit threshold for use with standard-value
sense resistors. Low slow-comparator thresholds allow
for increased efficiency by reducing the power dissi-
pated by the sense resistor. Furthermore, the low 25mV
slow-comparator threshold is beneficial when operating
with supply rails down to 1V because it allows a small
percentage of the overall output voltage to be used for
current sensing. The VariableSpeed/BiLevel fault pro-
tection feature offers inherent system immunity against
load transients and noise. This allows the slow-com-
parator threshold to be set close to the maximum nor-
mal operating level without experiencing nuisance
faults. To adjust the slow-comparator threshold, calcu-
Using these devices in latched mode allows the use of
MOSFETs with lower power ratings. A MOSFET typical-
ly withstands single-shot pulses with higher dissipation
than the specified package rating. Table 7 lists some
recommended MOSFET manufacturers.
0/MAX5931B
Sense Resistor
The slow-comparator threshold voltage is adjustable
from 25mV to 100mV. Select a sense resistor that caus-
es a drop equal to the slow-comparator threshold volt-
age at a current level above the maximum normal
operating current. Typically, set the overload current at
1.2 to 1.5 times the full load current. The fast-compara-
tor threshold is two times the slow-comparator thresh-
old in normal operating mode. Choose the sense-
resistor power rating to be greater than or equal to 2 x
late R
as follows:
LIM_
V
− 25mV
7.5μA
TH
R
=
LIM_
(I
) x V
. Table 7 lists some recommend-
SC,TH
where V
is the desired slow-comparator threshold
OVERLOAD
ed sense-resistor manufacturers.
TH
voltage. Shorting LIM_ to GND sets V
to 25mV. Do
TH
not leave LIM_ unconnected.
16 ______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
0/MAX5931B
Table 4. Status Output Truth Table: Voltage-Tracking and Power-Sequencing Modes
CHANNEL 1
FAULT
CHANNEL 2
FAULT
CHANNEL 3
FAULT
STAT1/
GATE1*
STAT2/
GATE2*
STAT3/
GATE3*
PART
Yes
X
X
Yes
X
X
X
L/OFF
L/OFF
L/OFF
L/OFF
H/ON
H/OFF
H/OFF
H/OFF
H/OFF
L/ON
L/OFF
L/OFF
L/OFF
L/OFF
H/ON
H/OFF
H/OFF
H/OFF
H/OFF
L/ON
L/OFF
L/OFF
L/OFF
L/OFF
H/ON
H/OFF
H/OFF
H/OFF
H/OFF
L/ON
MAX5930A (POL = 1),
MAX5931B
X
Yes
X
X
X
No
Yes
X
No
X
No
X
Yes
X
X
MAX5930A (POL = 0),
MAX5931A
X
Yes
X
X
X
No
No
No
*L = Low, H = High.
Table 5. Status Output Truth Table: Independent Mode
CHANNEL 1
FAULT
CHANNEL 2
FAULT
CHANNEL 3
FAULT
STAT1/
GATE1
STAT2/
GATE2
STAT3/
GATE3
Yes
Yes
Yes
Yes
No
Yes
Yes
No
Yes
No
Unasserted/OFF
Unasserted/OFF
Unasserted/OFF
Unasserted/OFF
Asserted/ON
Unasserted/OFF
Unasserted/OFF
Asserted/ON
Unasserted/OFF
Asserted/ON
Yes
No
Unasserted/OFF
Asserted/ON
No
Asserted/ON
Yes
Yes
No
Yes
No
Unasserted/OFF
Unasserted/OFF
Asserted/ON
Unasserted/OFF
Asserted/ON
No
Asserted/ON
No
Yes
No
Asserted/ON
Unasserted/OFF
Asserted/ON
No
No
Asserted/ON
Asserted/ON
Note: STAT_ is asserted when hot swap is successful and t
has elapsed. STAT_ is unasserted during a fault.
ON
Table 6. Recommended n-Channel MOSFETs
PART NUMBER
MANUFACTURER
DESCRIPTION
10mΩ, 8-pin SO, 30V
FDB8030L
FDC653N
FDS6670A
FDS6692A
55mΩ, SuperSOT-6, 30V, 5A
3.5mΩ, D2PAK, 30V
Fairchild Semiconductor
14mΩ, 8-pin SO, 30V
IRF6635TRPBF
IRF7413
1.8mΩ, DirectFET MX, 30V
11mΩ, 8-pin SO, 30V
International Rectifier
IRF7401
22mΩ, 8-pin SO, 20V
IRF7805ZPBF
7mΩ, 8-pin SO, 30V
NTMS4N01R2G
NTB75N06L
HAT2099H
40mΩ, 8-pin SO, 20V
ON Semiconductor
11mΩ, D2PAK, 60V
Renesas Technology Corp.
5mΩ, 8-pin SO (thermal land), 30V
______________________________________________________________________________________ 17
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
Table 7. Component Manufacturers
COMPONENT
MANUFACTURER
PHONE
WEBSITE
www.vishay.com
Vishay
402-563-6325
361-992-7900
888-522-5372
310-322-3331
602-244-6600
Sense Resistors
IRC, Inc.
www.irctt.com
Fairchild Semiconductor
International Rectifier
ON Semiconductor
www.fairchildsemi.com
www.irf.com
MOSFETs
www.onsemi.com
Setting the Startup Period, R
START
TIM
C
× ΔV
+ Q
GATE
GATE GATE
The startup period (t
) is adjustable from 0.4ms to
t =
I
50ms. The adjustable startup period feature allows sys-
tems to be customized for MOSFET gate capacitance
GATE
where:
and board capacitance (C ). The startup period is
BOARD
C
is the external gate to ground capacitance
adjusted with a resistor connected from TIM to GND
(R ). R must be between 4kΩ and 500kΩ. The
GATE
(Figure 9),
TIM
TIM
startup period has a default value of 9ms when TIM is left
ΔV
is the change in gate charge,
GATE
unconnected. Calculate R
with the following equation:
TIM
Q
GATE
is the MOSFET total gate charge,
I
is the gate-charging/discharging current.
GATE
t
START
R
=
TIM
In this case, the inrush current depends on the MOSFET
gate-to-drain capacitance (C ) plus any additional
capacitance from GATE to GND (C
load current (I
128 × 800pF
is the desired startup period.
RSS
), and on any
where t
GATE
START
) present during the startup period.
LOAD
Startup Sequence
There are two ways of completing the startup
sequence. Case A describes a startup sequence that
slowly turns on the MOSFETs by limiting the gate
charge. Case B uses the current-limiting feature and
turns on the MOSFETs as fast as possible while still
preventing a high inrush current. The output voltage
C
BOARD
I
=
× I
+ I
INRUSH
GATE LOAD
C
+ C
RSS
GATE
Example: Charging and discharging times using the
Fairchild FDB7030L MOSFET
0/MAX5931B
If V
V
= 5V then GATE1 charges up to 10.4V (V
+
ramp-up time (t ) is determined by the longer of the
ON
IN1
DRIVE
IN1
), therefore ΔV
= 10.4V. The manufacturer’s
two timings, case A and case B. Set the startup timer
GATE
data sheet specifies that the FDB7030L has approxi-
mately 60nC of gate charge and C = 600pF. The
(t
) to be longer than t
to guarantee enough
ON
START
time for the output voltage to settle.
RSS
MAX5930A/MAX5931A/MAX5931B have a 100µA gate
charging current and a 3mA/50mA normal/strong dis-
Case A: Slow Turn-On (Without Current Limit)
There are two ways to turn on the MOSFETs without
reaching the fast-comparator current limit:
charging current. C
= 6µF and the load does not
BOARD
draw any current during the startup period. With no gate
capacitor, the inrush current, charge, and discharge
times are:
• If the board capacitance (C
inrush current is low.
) is small, the
BOARD
• If the gate capacitance is high, the MOSFETs turn
on slowly.
6μF
600pF + 0
0 × 10.4V + 60nC
100μA
I
=
× 100μA + 0 = 1A
INRUSH
In both cases, the turn-on time is determined only by
the charge required to enhance the MOSFET. The
small 100µA gate-charging current effectively limits
the output voltage dV/dt. Connecting an external
capacitor between GATE and GND extends the turn-
on time. The time required to charge/discharge a
MOSFET is as follows:
t
=
= 0.6ms
CHARGE
0 × 10.4V + 60nC
t
=
= 0.02ms
=1.2μs
DISCHARGE(NORMAL)
3mA
0 × 10.4V + 60nC
t
=
DISCHARGE(STRONG)
50mA
18 ______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
0/MAX5931B
R
SENSE_
V
OUT_
V
V
IN
IN_
C
BOARD
R
PULLUP
R
R
1
C
GATE
IN_
SENSE_
GATE_
IN_
ON_
SENSE_
GATE_
STAT_
MAX5930A
MAX5931A
MAX5931B
(R x R ) V ,
ON TH
MAX5930A
MAX5931A
MAX5931B
2
1
V
-
TURN-ON
R
2
2
ON_
GND
Figure 9. Operating with an External Gate Capacitor
Figure 10. Adjustable Undervoltage Lockout
ON Comparators
The ON comparators control the on/off function of the
MAX5930A/MAX5931A/MAX5931B. ON_ is also used to
With a 22nF gate capacitor, the inrush current, charge,
and discharge times are:
6μF
600pF + 22nF
I
=
× 100μA + 0 = 26.5mA
reset the fault latch (latch mode). Pull V
low for
ON_
INRUSH
100µs, t
, to reset the shutdown latch. ON_ also
UNLATCH
22nF × 10.4V + 60nC
programs the UVLO threshold (see Figure 10). A resis-
tive divider between V , V , and GND sets the
t
=
= 2.89ms
CHARGE
100μA
IN_
ON_
user-programmable turn-on voltage. In power-sequenc-
ing mode, an RC circuit can be used at ON_ to set the
delay timing (see Figure 11).
22nF ×10.4V + 60nC
t
=
= 0.096ms
DISCHARGE(NORMAL)
3mA
22nF × 10.4V + 60nC
t
=
= 5.8μs
DISCHARGE(STRONG)
50mA
Using the MAX5930A/MAX5931A/
MAX5931B on the Backplane
Case B: Fast Turn-On (With Current Limit)
In applications where the board capacitance (C
is high, the inrush current causes a voltage drop across
that exceeds the startup fast-comparator
Using the MAX5930A/MAX5931A/MAX5931B on the
backplane allows multiple cards with different input
capacitance to be inserted into the same slot even if
the card does not have on-board hot-swap protection.
The startup period can be triggered if IN_ is connected
to ON_ through a trace on the card (Figure 12).
)
BOARD
R
SENSE
threshold. The fast comparator regulates the voltage
across the sense resistor to V . This effectively reg-
FC,TH
ulates the inrush current during startup. In this case,
the current charging C can be considered con-
Input Transients
BOARD
stant and the turn-on time is:
× V × R
SENSE
The voltage at IN1, IN2, or IN3 must be above V
dur-
UVLO
ing inrush and fault conditions. When a short-circuit con-
dition occurs on the board, the fast-comparator trips
cause the external MOSFET gates to be discharged at
50mA according to the mode of operation (see the Mode
section). The main system power supply must be able to
sustain a temporary fault current, without dropping below
the UVLO threshold of 2.45V, until the external MOSFET is
completely off. If the main system power supply collapses
below UVLO, the MAX5930A/MAX5931A/MAX5931B
force the device to restart once the supply has recov-
ered. The MOSFET is turned off in a very short time result-
ing in a high di/dt. The backplane delivering the power to
the external card must have low inductance to minimize
voltage transients caused by this high di/dt.
C
BOARD
IN
t
=
ON
V
FC,TH
The maximum inrush current in this case is:
V
FC,TH
I
=
INRUSH
R
SENSE
Figure 6 shows the waveforms and timing diagrams for
a startup transient with current regulation (see the
Typical Operating Characteristics section). When oper-
ating under this condition, an external gate capaci-
tor is not required.
______________________________________________________________________________________ 19
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
R
SENSEY
Q1
V
Y
OUTY
C
BOARDY
INY
SENSEY
GATEY
R
1
ON
OFF
V
ON
EN
MAX5930A
MAX5931A
MAX5931B
C
1
GND
GND
INZ
SENSEZ
GATEZ
Q2
OUTZ
V
Z
R
SENSEZ
C
BOARDZ
V
EN
V
V
- V
ONY, TH
EN
t = -R C ln
(
(
)
1
1 1
V
EN
V
ONZ, TH
V
ON
V
ONY, TH
- V
EN
ONZ, TH
V
t = -R C ln
)
Y
2
1 1
V
EN
V
Z
V
V
- V
EN
ONY, TH
t
= -R C ln
1 1
(
)
DELAY
- V
EN
ONZ, TH
t
0
t
1
t
2
0/MAX5931B
t
DELAY
Figure 11. Power Sequencing: Channel Z Turns On t
After Channel Y
DELAY
2) The continuous autoretry after a fault: MAX5930A/
MAX5931A/MAX5931B (LATCH = low).
MOSFET Thermal Considerations
During normal operation, the external MOSFETs dissi-
pate little power. The MOSFET R
is low when the
DS(ON)
MOSFET manufacturers typically include the package
MOSFET is fully enhanced. The power dissipated in nor-
thermal resistance from junction to ambient (R ) and
θJA
θJC
2
mal operation is P = I
x R
. The most
DS(ON)
D
LOAD
thermal resistance from junction to case (R
), which
power dissipation occurs during the turn-on and turn-off
transients when the MOSFETs are in their linear regions.
By taking into consideration the worst-case scenario of a
continuous short-circuit fault, consider these two cases:
determine the startup time and the retry duty cycle (d =
/(t + t ). Calculate the required tran-
t
START START
RETRY
sient thermal resistance with the following equation:
T
− T
JMAX
× I
A
1) The single turn-on with the device latched after a
fault: MAX5930A/MAX5931A/MAX5931B (LATCH =
high or unconnected).
Z
≤
θJA(MAX)
V
IN
START
where I
= V
/R
.
START
SU,TH SENSE
20 ______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
0/MAX5931B
REMOVABLE CARD
WITH NO HOT-INSERTION
BACKPLANE
PROTECTION
HIGH-CURRENT PATH
V
IN
V
OUT
POWER
SUPPLY
C
BOARD
IN_
SENSE RESISTOR
SENSE_ GATE_
MAX5930A
MAX5931A
MAX5931B
ON_
MAX5930A
MAX5931A
MAX5931B
Figure 13. Kelvin Connection for the Current-Sense Resistors
Figure 12. Using the MAX5930A/MAX5931A/MAX5931B on a
Backplane
When the output is short circuited, the voltage drop
across the external MOSFET becomes large. Hence, the
power dissipation across the switch increases, as does
the die temperature. An efficient way to achieve good
power dissipation on a surface-mount package is to lay
out two copper pads directly under the MOSFET pack-
age on both sides of the board. Connect the two pads
to the ground plane through vias, and use enlarged
copper mounting pads on the topside of the board.
Layout Considerations
To take full tracking advantage of the switch response
time to an output fault condition, it is important to keep all
traces as short as possible and to maximize the high-cur-
rent trace dimensions to reduce the effect of undesirable
parasitic inductance. Place the MAX5930A/
MAX5931A/MAX5931B close to the card’s connector.
Use a ground plane to minimize impedance and induc-
tance. Minimize the current-sense resistor trace length
(<10mm), and ensure accurate current sensing with
Kelvin connections (Figure 13).
______________________________________________________________________________________ 21
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
Typical Operating Circuit
BACKPLANE
REMOVABLE CARD
R
R
R
SENSE1
SENSE2
SENSE3
Q1
V
V
V
OUT1
1
Q2
OUT2
2
3
Q3
OUT3
STAT1
STAT2
ON1
ON2
ON3
ON1
ON2
ON3
MAX5930A
MAX5931A
MAX5931B
STAT3
GND
GND
1nF
16V
R
LIM1
**
R
LIM2
**
R
LIM3
**
R
TIM
**
*MAX5930A ONLY.
**OPTIONAL COMPONENT.
0/MAX5931B
Selector Guide
PART
MAX5930AEEG+
MAX5931AEEP+
MAX5931BEEP+
CURRENT LIMIT
Programmable
Fixed
FAULT MANAGEMENT
Selectable
STAT_ POLARITY
Selectable
Selectable
Asserted Low
Fixed
Selectable
Asserted High (Open-Drain)
22 ______________________________________________________________________________________
Low-Voltage, Triple, Hot-Swap Controllers/
Power Sequencers/Voltage Trackers
0/MAX5931B
Pin Configurations (continued)
Chip Information
PROCESS: BiCMOS
TOP VIEW
ON2
ON1
1
2
3
4
5
6
7
8
9
20 MODE
19 ON3
Package Information
For the latest package outline information and land patterns, go
IN1
18 IN2
to www.maxim-ic.com/packages.
SENSE1
GATE1
STAT1
STAT2
TIM
17 SENSE2
16 GATE2
15 IN3
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
MAX5931A
MAX5931B
20 QSOP
E20-1
21-0055
21-0055
24 QSOP
E24-1
14
SENSE3
13 GATE3
12 GND
11 BIAS
LATCH
STAT3 10
QSOP
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 ____________________ 23
© 2008 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
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