MAX5876EVKIT [MAXIM]
MAX5876/MAX5877/MAX5878 Evaluation Kits;
| 型号： | MAX5876EVKIT |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | MAX5876/MAX5877/MAX5878 Evaluation Kits |
| 文件： | 总14页 (文件大小：300K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-3636; Rev 1; 6/07
MAX5876/MAX5877/MAX5878 Evaluation Kits
General Description
Features
♦ Fast Evaluation and Performance Testing
The MAX5876/MAX5877/MAX5878 evaluation kits (EV
kit) are fully assembled and tested printed circuit boards
(PCBs) that contain all the components necessary to
evaluate the performance of the MAX5876/MAX5877/
MAX5878 digital-to-analog converters (DACs). The
MAX5876 (12-bit)/MAX5877 (14-bit)/MAX5878 (16-bit)
are 250Msps, dual DACs with interleaved LVDS inputs,
integrated 1.2V voltage reference, and differential cur-
rent outputs. The EV kits operate with LVDS-compatible
digital data inputs, a single-ended clock input, and a
3.3V/1.8V dual power supply for simple board operation.
The MAX5876/MAX5877/MAX5878 EV kits also contain
an external 1.25V voltage-reference circuit that can be
used to drive the MAX5876/MAX5877/MAX5878 input
reference voltage pin.
♦ LVDS-Compatible Inputs
♦ SMA Coaxial Connectors for Clock Input and
Analog Outputs
♦ On-Board External 1.25V Voltage-Reference Circuit
♦ 50Ω Matched Clock Input and Analog Output
Signal Lines
♦ Single-Ended-to-Differential Clock Signal
Conversion Circuitry
♦ Differential-Current-to-Single-Ended-Voltage
Output Conversion Circuitry
♦ Full-Scale Current Output Configured for 20mA
♦ Fully Assembled and Tested
Part Selection Table
Ordering Information
PART
BITS
SPEED (Msps)
PART
TEMP RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
IC PACKAGE
68 QFN-EP*
68 QFN-EP*
68 QFN-EP*
MAX5876EGK+D
MAX5877EGK+D
MAX5878EGK+D
12
250
250
250
MAX5876EVKIT#
MAX5877EVKIT#
MAX5878EVKIT#
14
16
#Denotes lead-free and RoHS-compliant EV Kit.
*EP = Exposed paddle.
Component List
DESIGNATION QTY
DESCRIPTION
DESIGNATION QTY
DESCRIPTION
CLK, OUTPUTI,
OUTPUTQ
0.1µF 10%, 10V X5R ceramic
capacitors (0402)
3
SMA PC-mount vertical connectors
C1, C2, C4–C14,
14
C37
TDK C1005X5R1A104KT or
Taiyo Yuden LMK105BJ104KV
2 x 20-pin surface-mount headers
(0.1in)
J1, J2
2
1µF 10%, 6.3V X5R ceramic
capacitor (0402)
TDK C1005X5R0J105K
JU1, JU2
JU3, JU4
2
2
3-pin headers
2-pin headers
C3
1
5
Ferrite bead cores (0805)
Fair-Rite 2508051217Z0
L1–L5
5
0
1µF 10%, 10V X5R ceramic
capacitors (0603)
TDK C1608X5R1A105KT
C15–C19
OUTIP, OUTIN,
OUTQP, OUTQN
Not installed, SMA PC-mount
vertical connectors
10µF 10%, 10V tantalum
capacitors (A)
AVX TAJA106K010R or
Kemet T494A106K010AS
49.9Ω 0.1% resistors (0603)
IRC PFC-W0603RLF-03-49R9-B
Panasonic ERA3EHB49R9V
C20–C24
5
R1, R2, R4, R5
4
47µF 10%, 6.3V tantalum
capacitors (B)
AVX TAJB476K006R or
Kemet T494B476K006AS
R3, R6
R7
2
1
2
0
2
100Ω 1% resistors (0603)
2kΩ 1% resistor (0603)
C25–C29
C30–C36
5
0
R8, R9
R10–R14
R15, R16
24.9Ω 1% resistors (0603)
Not installed, resistors (0603)
10kΩ 5% resistors (0603)
Not installed, ceramic capacitors
(0603)
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim's website at www.maxim-ic.com.
MAX5876/MAX5877/MAX5878 Evaluation Kits
Component List (continued)
Quick Start
Recommended equipment:
DESIGNATION QTY
DESCRIPTION
•
•
•
Three 3.3V, 100mA DC power supplies
Two 1.8V, 100mA DC power supplies
1:1 RF transformers
Mini-Circuits ADTL1-12
T1, T2, T3
T4, T5
U1
3
2
1
1
Two signal generators with low phase noise and low
jitter for clock input (e.g., HP 8664A)
1:1 RF transformers
Coilcraft TTWB3010-1
•
One 20-bit LVDS digital pattern generator for data
inputs (e.g., HP 81250)
See the EV Kit-Specific
Component List
•
•
One spectrum analyzer (e.g., HP 8560E)
One voltmeter
1.25V voltage reference (8-pin SO)
MAX6161AESA or MAX6161BESA
U2
The MAX5876/MAX5877/MAX5878 EV kits are fully
assembled and tested surface-mount boards. Follow
the steps below for board operation. Do not turn on
power supplies or enable signal generators until all
connections are completed (Figure 1):
None
None
4
1
Shunts (JU1–JU4)
PCB: MAX5876/7/8 Evaluation Kit #
EV Kit-Specific Component List
EV KIT
1) Verify that shunts are installed across pins 2 and 3
of jumpers JU1 (normal operation) and JU2 (offset
binary input mode).
DESIGNATION
DESCRIPTION
MAX5876EGK+D (68-pin
QFN-EP, 10mm x 10mm
x 0.9mm)
2) Verify that shunts are not installed across jumpers
JU3 and JU4 (internal reference).
MAX5876EVKIT#
3) Synchronize the digital pattern generator with the
clock signal generator.
MAX5877EGK+D (68-pin
QFN-EP, 10mm x 10mm
x 0.9mm)
U1
MAX5877EVKIT#
MAX5878EVKIT#
4) Connect the clock signal generator to the EV kit
CLK SMA connector.
MAX5878EGK+D (68-pin
QFN-EP, 10mm x 10mm
x 0.9mm)
5) Verify that the digital pattern generator HP 81250 is
programmed for valid LVDS output voltage levels
and binary digital output.
6) Connect the digital pattern generator output to the
J1 and J2 input header connectors on the EV kit
board. The input header pins are labeled for proper
connection to the digital pattern generator.
Component Suppliers
SUPPLIER
PHONE
WEBSITE
www.avxcorp.com
AVX
843-946-0238
847-639-6400
845-895-2055
361-992-7900
864-963-6300
718-934-4500
800-344-2112
800-348-2496
847-803-6100
Coilcraft
Fair-Rite Products
IRC
www.coilcraft.com
www.fair-rite.com
www.irctt.com
Kemet
www.kemet.com
Mini-Circuits
Panasonic
Taiyo Yuden
TDK
www.minicircuits.com
www.panasonic.com
www.t-yuden.com
www.component.tdk.com
Note: Indicate that you are using the MAX5876/MAX5877/MAX5878 when contacting these component suppliers.
2
_______________________________________________________________________________________
MAX5876/MAX5877/MAX5878 Evaluation Kits
DATA GENERATOR
PATTERN GENERATOR
MASTER
HP 81250
SIGNAL GENERATOR
HP 8664A
LVDS
DATA
RF
OUTPUT
CLOCK
INPUT*
INT*
36
(B0P/N–B15P/N,
SELIQP/N, XORP/N)
SLAVE
MAX5876/MAX5877/MAX5878 EV KIT
SIGNAL GENERATOR
SPECTRUM ANALYZER
HP 8560E
J1
HP 8664A
RF
OUTPUT
EXT*
CLK
OUTPUTI OUTPUTQ
INPUT
EXT*
J2
*THESE CONNECTORS ARE LOCATED ON THE BACK SIDE OF THE EQUIPMENT.
Figure 1. MAX5876/MAX5877/MAX5878 EV Kit Quick Start Setup
7) Connect a 1.8V power supply to the AVDD1 PC
board pad. Connect the ground terminal of this
supply to the AGND pad.
15) An LVDS logic-high signal at SELIQP/SELIQN
directs data into the I-DAC register. An LVDS logic-
low signal at SELIQP/SELIQN directs data into the
Q-DAC register. Refer to the LVDS-Compatible
Digital Inputs section in the MAX5876/MAX5877/
MAX5878 IC data sheets for detailed information on
the SELIQ function.
8) Connect a 3.3V power supply to the AVDD2 PC
board pad. Connect the ground terminal of this
supply to the AGND pad.
9) Connect a 1.8V power supply to the DVDD1 PC
board pad. Connect the ground terminal of this
supply to the DGND pad.
16) Use the spectrum analyzer to view the MAX5876/
MAX5877/MAX5878 output spectrums or view the
single-ended output waveforms by connecting an
oscilloscope to OUTPUTQ or OUTPUTI SMA con-
nectors.
10) Connect a 3.3V power supply to the DVDD2 PC
board pad. Connect the ground terminal of this
supply to the DGND pad.
Detailed Description
11) Connect a 3.3V power supply to the VDD_CK PC
board pad. Connect the ground terminal of this
supply to the GND_CK pad.
The MAX5876/MAX5877/MAX5878 EV kits are designed
to simplify the evaluation of the MAX5876/MAX5877/
MAX5878 dual, 12-bit/14-bit/16-bit, 250Msps, current-
output DACs. The MAX5876/MAX5877/MAX5878 operate
with LVDS-compatible digital data inputs, a differential or
single-ended clock input signal, and two power supplies
(3.3V and 1.8V). The MAX5876/MAX5877/MAX5878
feature internal 1.2V reference voltage.
12) Turn on all five power supplies.
13) Enable the clock signal generator and the digital
pattern generator.
14) Set the clock signal generator output power
between +8dBm to +12dBm and the frequency
(f
) to ≤ 500MHz.
CLK
_______________________________________________________________________________________
3
MAX5876/MAX5877/MAX5878 Evaluation Kits
The MAX5876/MAX5877/MAX5878 EV kits provide head-
er connectors J1 and J2 to interface with a pattern gen-
erator, circuitry that converts the differential current
outputs to single-ended voltage signals, and circuitry to
convert a user-supplied single-ended clock signal to a
differential clock signal. The EV kit circuit also includes
an external 1.25V reference source U2 (MAX6161) and
a test point connector that can be used to overdrive the
MAX5876/MAX5877/MAX5878 internal 1.2V bandgap
reference. The EV kit board layout separates the circuit
power into digital, analog, and clock planes to improve
dynamic performance. The input data PC traces are
100Ω differential controlled impedance and the analog
output PC traces are 50Ω controlled impedance.
Clock Signal
The MAX5876/MAX5877/MAX5878 operate with a differ-
ential clock input signal. However, the EV kit boards only
require an external single-ended clock signal connected
to the CLK SMA connector. The EV kits feature circuitry
that converts the single-ended clock signal to a differen-
tial clock signal. The clock signal can be either a sine or
a square wave. A minimum signal power amplitude of
+8dBm is recommended to drive the clock input. The
MAX5876/MAX5877/MAX5878 accept a clock input fre-
quency in the 2MHz to 500MHz range.
Two’s-Complement/Offset-Binary
Input Format
The two’s-complement or offset-binary input modes of
the MAX5876/MAX5877/MAX5878 are configured with
jumper JU2. Apply either a two’s-complement or offset-
binary formatted input pattern to connectors J1 and J2.
See Table 1 for the jumper JU2 configuration.
Power Supplies
The MAX5876/MAX5877/MAX5878 EV kits operate from
a single 1.8V power supply connected to the DVDD1
and AVDD1 input power pads, and a single 3.3V power
supply connected to the DVDD2, AVDD2, and VDD_CK
input power pads for simple operation. However, five
separate power supplies are recommended to optimize
dynamic performance. The EV kit PCB layout is divided
into three sections: digital, analog, and clock. Using sep-
arate power supplies for each section reduces noise and
improves the integrity of the analog output signal. When
using separate power supplies, connect a 1.8V power
supply across the DVDD1 and DGND pads and a 3.3V
power supply across DVDD2 and DGND pads (digital).
Connect a 1.8V power supply across the AVDD1 and
AGND pads and a 3.3V power supply across AVDD2
and AGND pads (analog). Connect a 3.3V power supply
across VDD_CK and GND_CK pads (clock).
Reference Voltage
The MAX5876/MAX5877/MAX5878 require a reference
voltage to set the full-scale output current of the DAC.
The MAX5876/MAX5877/MAX5878 integrate a stable on-
chip bandgap reference of 1.2V that is selected by
default during initial power-up. An external voltage ref-
erence must be connected to test point TP1 when the
internal voltage reference is overdriven. The EV kits cir-
cuit also features an on-board, external 1.25V voltage
reference (U2, MAX6161) that can be used to overdrive
the internal bandgap reference. U2 has a tighter volt-
age-output tolerance and is less susceptible to temper-
ature variations. See Table 2 to select the voltage refer-
ence source.
LVDS Digital Input Data
The MAX5876/MAX5877/MAX5878 EV kits provide two
0.1in, 2 x 20 headers (J1, J2) to interface an LVDS pat-
tern generator to the EV kit. The header data pins are
labeled on the PCB with their appropriate LVDS data bit
designator. Use the labels on the EV kit board to match
the data bits from the pattern generator to the corre-
sponding data pins on headers J1 and J2. The input
data is latched on the rising edge of the clock signal.
Full-Scale Output Current
The MAX5876/MAX5877/MAX5878 require an external
resistor to set the full-scale output current. The
MAX5876/MAX5877/MAX5878 EV kits full-scale current
are set to 20mA with resistor R7 (2kΩ). Replace resistor
R7 to adjust the full-scale output current. Refer to the
Reference Architecture and Operation section in the
MAX5876/MAX5877/MAX5878 IC data sheets to select
different values for resistor R7.
The MAX5876/MAX5877/MAX5878 SELIQ and XOR func-
tions can also be controlled by applying an LVDS logic
signal to the J1 header pins labeled SELIQP, SELIQN,
XORP, and XORN. Refer to the LVDS-Compatible Digital
Inputs section in the MAX5876/MAX5877/MAX5878 IC
data sheets for detailed information on the SELIQ and
XOR functions. When using the XOR function, install a
100Ω resistor at the EV kit R14 PCB pad.
4
_______________________________________________________________________________________
MAX5876/MAX5877/MAX5878 Evaluation Kits
OUTIN SMA connectors for I-DAC. Probe the single-
ended signals at the OUTQP and OUTQN SMA con-
nectors for Q-DAC. In a single-ended configuration the
Outputs
The dual-output channels of the MAX5876/MAX5877/
MAX5878 are configured for differential current mode to
achieve the best dynamic performance. The resistor
and transformer networks at the DAC outputs are
designed to convert the differential current signals into
single-ended voltage signals with a 50Ω output imped-
ance. When an LVDS logic-high input signal is applied
to the SELIQP/SELIQN pins, the data on the input bus
(J1 and J2) is loaded into I-DAC and the reconstructed
single-ended signal is available at the OUTPUTI SMA
connector. When an LVDS logic-low input signal is
applied to the SELIQP/SELIQN pins, the data on the
input bus is loaded into Q-DAC and the reconstructed
single-ended signal is available at the OUTPUTQ SMA
connector. When outputs OUTPUTQ and OUTPUTI are
terminated with 50Ω external loads, the full-scale output
signal level is equal to -2dBm.
DAC output signal amplitude is equal to 1V
of the outputs.
at each
P-P
Power-Down Mode
The MAX5876/MAX5877/MAX5878 EV kits power-
down/normal operation mode can be configured with
jumper JU1. See Table 3 for jumper JU1 configuration.
PCB Layout
The MAX5876/MAX5877/MAX5878 EV kits are 4-layer
PCB designs optimized for high-speed signals. All
high-speed digital signal lines are routed through 100Ω
differential impedance-matched transmission lines. All
analog output traces are routed through 50Ω imped-
ance-matched transmission lines. The length of these
100Ω and 50Ω transmission lines is matched to within
40 mils (1mm) to minimize layout-dependent data skew.
The PCB layout separates the digital, analog, and clock
sections of the circuit for optimum performance.
To evaluate the converter’s single-ended outputs,
remove transformers T1, T2, and install SMA connec-
tors at the OUTIP, OUTIN, OUTQP, and OUTQN loca-
tions. Probe the single-ended signals at the OUTIP and
Table 1. Jumper JU2 TORB Configuration
SHUNT POSITION
TORB PIN CONNECTION
Connected to DVDD2
EV KIT FUNCTION
1-2
2-3
Two’s-complement digital signal input format
Connected to DGND
Offset-binary digital signal input format
MAX5876/MAX5877/MAX5878 have an
internal pulldown resistor
Not installed
Table 2. Reference Voltage
JUMPER JU3
SHUNT POSITION
JUMPER JU4
SHUNT POSITION
REFIO PIN CONNECTION
EV KIT FUNCTION
Open (REFIO becomes the output of
the internal bandgap reference)
Internal 1.2V reference enabled or
connect an external reference to TP1
Not installed
Installed
Not installed
U2 provides a precise 1.25V voltage
reference
Installed
Connected to U2 (MAX6161)
Table 3. JUMPER JU1 Power-Down Configuration
SHUNT POSITION
PD PIN CONNECTION
Connected to DVDD2
EV KIT FUNCTION
1-2
2-3
Power-down mode
Connected to DGND
Normal operation
MAX5876/MAX5877/MAX5878 have an
internal pulldown resistor
Not installed
_______________________________________________________________________________________
5
MAX5876/MAX5877/MAX5878 Evaluation Kits
Table 4. MAX5876/MAX5877/MAX5878 EV Kit Board Connector Guide
EV KIT
CONNECTOR PIN
MAX5878 INPUT
MAX5877 INPUT
MAX5876 INPUT
J1-39
J1-37
J1-35
J1-33
J1-31
J1-29
J1-27
J1-25
J1-23
J1-21
J1-19
J1-17
J1-15
J1-13
J1-11
J1-9
XORN
XORP
SELIQP
SELIQN
B15P (MSB)
B15N (MSB)
B14P
B14N
B13P
B13N
B12P
B12N
B11P
B11N
B10P
B10N
B9P
XORN
XORP
SELIQP
SELIQN
B13P (MSB)
B13N (MSB)
B12P
B12N
B11P
B11N
B10P
B10N
B9P
XORN
XORP
SELIQP
SELIQN
B11P (MSB)
B11N (MSB)
B10P
B10N
B9P
B9N
B8P
B8N
B7P
B9N
B7N
B8P
B6P
B8N
B6N
J1-7
B7P
B5P
J1-5
B9N
B7N
B5N
J1-3
B8P
B6P
B4P
J1-1
B8N
B6N
B4N
J2-39
J2-37
J2-35
J2-33
J2-31
J2-29
J2-27
J2-25
J2-23
J2-21
J2-19
J2-17
J2-15
J2-13
J2-11
J2-9
B7P
B5P
B3P
B7N
B5N
B3N
B6P
B4P
B2P
B6N
B4N
B2N
B5P
B3P
B1P
B5N
B3N
B1N
B4P
B2P
B0P (LSB)
B0N (LSB)
N.C.
B4N
B2N
B3P
B1P
B3N
B1N
N.C.
B2P
B0P (LSB)
B0N (LSB)
N.C.
N.C.
B2N
N.C.
B1P
N.C.
B1N
N.C.
N.C.
B0P (LSB)
B0N (LSB)
N.C.
N.C.
N.C.
N.C.
N.C. = No connection.
6
_______________________________________________________________________________________
MAX5876/MAX5877/MAX5878 Evaluation Kits
DVDD1.8
J1
DVDD3.3
R15
10kΩ
HEADER 2 x 20
1
2
3
40
JU1
41
42
PD
J1-40
J1-38
J1-36
J1-34
J1-32
J1-30
J1-28
J1-26
J1-24
J1-22
J1-20
J1-18
J1-16
J1-14
J1-12
J1-10
J1-8
J1-39
XORN
XORP
DVDD3.3
1
2
3
R14
OPEN
39
38
JU2
TORB
CLKP
J1-37
C12
0.1μF
R16
10kΩ
DVDD1.8
CLK
R8
24.9Ω
1%
C30
OPEN
DVDD1
DGND
L1
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
J1-35
J1-33
J1-31
J1-29
J1-27
J1-25
J1-23
J1-21
J1-19
J1-17
J1-15
J1-13
J1-11
J1-9
SELIQP
SELIQN
B11P
B11N
B10P
B10N
B9P
T3
3
1
4
6
C25
47μF
6.3V
C20
10μF
10V
R9
24.9Ω
1%
C31
OPEN
C11
0.1μF
GND_CK
37
35
CLKN
GND_CK
VDD_CK
L5
AV
CLK
C24
10μF
10V
C29
47μF
6.3V
C10
0.1μF
C19
1μF
GND_CK
36
34
GND
AVDD1.8
GND_CK
DVDD3.3
B9N
AV
DD1.8
C9
0.1μF
DVDD2
L2
B8P
33
32
GND
DD3.3
DD3.3
C26
47μF
6.3V
C21
10μF
10V
C16
1μF
AVDD3.3
C8
0.1μF
B8N
AV
AV
U1
31
B7P
C7
0.1μF
OUTIP
OPEN
MAX5876
30
GND
B7N
OUTPUTI
J1-6
B6P
29
4
5
6
T4
3
2
1
OUTIP
R1
49.9Ω
0.1%
J1-4
B6N
R12
OPEN
R1O
OPEN
T1
3
1
4
6
J1-2
J1-7
B5P
R3
100Ω
1%
AVDD1.8
J1-5
B5N
R2
49.9Ω
0.1%
C32
OPEN
AVDD1
L3
J1-3
B4P
C27
47μF
6.3V
C22
10μF
10V
28
27
C17
1μF
OUTIN
GND
AGND
J1-1
B4N
OUTQP
OPEN
26
25
DVDD1.8
GND
OUTIN
OPEN
61
OUTPUTQ
DV
DD1.8
4
5
6
T5
3
2
1
J2
HEADER 2 x 20
J2-39
OUTQP
C15
1μF
C13
0.1μF
R4
49.9Ω
0.1%
R13
OPEN
R11
OPEN
T2
3
62
63
64
65
66
67
68
1
4
6
R6
100Ω
1%
J2-40
J2-38
J2-36
J2-34
J2-32
J2-30
J2-28
J2-26
J2-24
J2-22
J2-20
J2-18
J2-16
J2-14
J2-12
J2-10
J2-8
B3P
B3N
B2P
B2N
B1P
B1N
B0P
B0N
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
N.C.
J2-37
J2-35
J2-33
J2-31
J2-29
J2-27
J2-25
J2-23
J2-21
J2-19
J2-17
J2-15
J2-13
J2-11
J2-9
R5
49.9Ω
0.1%
1
C33
OPEN
AVDD3.3
AVDD2
L4
24
23
OUTQN
GND
C28
47μF
6.3V
C23
10μF
10V
C18
1μF
AVDD3.3
C6
0.1μF
OUTQN
OPEN
22
21
AV
AV
DD3.3
DD3.3
GND
C5
0.1μF
20
AVDD1.8
C4
0.1μF
19
18
AV
DD1.8
AVDD3.3
2
DACREF
8
7
6
5
1
2
3
4
N.C.
N.C.
IN
R7
2kΩ
1%
3
JU4
C3
1μF
C34
OPEN
17
16
4
N.C.
OUT
N.C.
U2
MAX6161
FSADJ
REFIO
TP1
C14
0.1μF
JU3
5
N.C.
GND
GND_CK
C35
OPEN
C36
OPEN
C37
0.1μF
6
15
GND
AVDD3.3
C2
0.1μF
7
14
13
12
AV
DD3.3
GND
GND
8
9
J2-7
J2-6
J2-5
DVDD3.3
11
10
J2-4
J2-3
DV
DD3.3
C1
0.1μF
J2-2
J2-1
GND
Figure 2a. MAX5876 EV Kit Schematic
_______________________________________________________________________________________
7
MAX5876/MAX5877/MAX5878 Evaluation Kits
DVDD1.8
J1
DVDD3.3
R15
10kΩ
HEADER 2 x 20
1
2
3
40
JU1
41
42
PD
J1-40
J1-38
J1-36
J1-34
J1-32
J1-30
J1-28
J1-26
J1-24
J1-22
J1-20
J1-18
J1-16
J1-14
J1-12
J1-10
J1-8
J1-39
XORN
XORP
DVDD3.3
1
2
3
R14
OPEN
39
38
JU2
TORB
CLKP
J1-37
C12
0.1μF
R16
10kΩ
DVDD1.8
CLK
R8
24.9Ω
1%
C30
OPEN
DVDD1
DGND
L1
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
J1-35
J1-33
J1-31
J1-29
J1-27
J1-25
J1-23
J1-21
J1-19
J1-17
J1-15
J1-13
J1-11
J1-9
SELIQP
SELIQN
B13P
B13N
B12P
B12N
B11P
B11N
B10P
B10N
B9P
T3
3
1
4
6
C25
47μF
6.3V
C20
10μF
10V
R9
24.9Ω
1%
C31
OPEN
C11
0.1μF
GND_CK
37
35
CLKN
GND_CK
VDD_CK
L5
AV
CLK
C24
10μF
10V
C29
47μF
6.3V
C10
0.1μF
C19
1μF
GND_CK
36
34
GND
AVDD1.8
GND_CK
DVDD3.3
AV
DD1.8
C9
0.1μF
DVDD2
L2
33
32
GND
DD3.3
DD3.3
C26
47μF
6.3V
C21
10μF
10V
C16
1μF
AVDD3.3
C8
0.1μF
AV
AV
U1
31
C7
0.1μF
OUTIP
OPEN
MAX5877
30
GND
B9N
OUTPUTI
J1-6
B8P
29
4
5
6
T4
3
2
1
OUTIP
R1
49.9Ω
0.1%
J1-4
B8N
R12
OPEN
R1O
OPEN
T1
3
1
4
6
J1-2
J1-7
B7P
R3
100Ω
1%
AVDD1.8
J1-5
B7N
R2
49.9Ω
0.1%
C32
OPEN
AVDD1
L3
J1-3
B6P
C27
47μF
6.3V
C22
10μF
10V
28
27
C17
1μF
OUTIN
GND
AGND
J1-1
B6N
OUTQP
OPEN
26
25
DVDD1.8
GND
OUTIN
OPEN
61
OUTPUTQ
DV
DD1.8
4
5
6
T5
3
2
1
J2
HEADER 2 x 20
J2-39
OUTQP
C15
1μF
C13
0.1μF
R4
49.9Ω
0.1%
R13
OPEN
R11
OPEN
T2
3
62
63
64
65
66
67
68
1
4
6
R6
100Ω
1%
J2-40
J2-38
J2-36
J2-34
J2-32
J2-30
J2-28
J2-26
J2-24
J2-22
J2-20
J2-18
J2-16
J2-14
J2-12
J2-10
J2-8
B5P
B5N
B4P
B4N
B3P
B3N
B2P
B2N
B1P
B1N
B0P
B0N
N.C.
N.C.
N.C.
N.C.
J2-37
J2-35
J2-33
J2-31
J2-29
J2-27
J2-25
J2-23
J2-21
J2-19
J2-17
J2-15
J2-13
J2-11
J2-9
R5
49.9Ω
0.1%
1
C33
OPEN
AVDD3.3
AVDD2
L4
24
23
OUTQN
GND
C28
47μF
6.3V
C23
10μF
10V
C18
1μF
AVDD3.3
C6
0.1μF
OUTQN
OPEN
22
21
AV
AV
DD3.3
DD3.3
GND
C5
0.1μF
20
AVDD1.8
C4
0.1μF
19
18
AV
DD1.8
AVDD3.3
2
DACREF
8
7
6
5
1
2
3
4
N.C.
N.C.
IN
R7
2kΩ
1%
3
JU4
C3
1μF
C34
OPEN
17
16
4
N.C.
OUT
N.C.
U2
MAX6161
FSADJ
REFIO
TP1
C14
0.1μF
JU3
5
N.C.
GND
GND_CK
C35
OPEN
C36
OPEN
C37
0.1μF
6
15
GND
AVDD3.3
C2
0.1μF
7
14
13
12
AV
DD3.3
GND
GND
8
9
J2-7
J2-6
J2-5
DVDD3.3
11
10
J2-4
J2-3
DV
DD3.3
C1
0.1μF
J2-2
J2-1
GND
Figure 2b. MAX5877 EV Kit Schematic
_______________________________________________________________________________________
8
MAX5876/MAX5877/MAX5878 Evaluation Kits
DVDD1.8
J1
DVDD3.3
R15
10kΩ
HEADER 2 x 20
1
2
3
40
JU1
41
42
PD
J1-40
J1-38
J1-36
J1-34
J1-32
J1-30
J1-28
J1-26
J1-24
J1-22
J1-20
J1-18
J1-16
J1-14
J1-12
J1-10
J1-8
J1-39
XORN
XORP
DVDD3.3
1
2
3
R14
OPEN
39
38
JU2
TORB
CLKP
J1-37
C12
0.1μF
R16
10kΩ
DVDD1.8
CLK
R8
24.9Ω
1%
C30
OPEN
DVDD1
DGND
L1
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
J1-35
J1-33
J1-31
J1-29
J1-27
J1-25
J1-23
J1-21
J1-19
J1-17
J1-15
J1-13
J1-11
J1-9
SELIQP
SELIQN
B15P
B15N
B14P
B14N
B13P
B13N
B12P
B12N
B11P
B11N
B10P
B10N
B9P
T3
3
1
4
6
C25
47μF
6.3V
C20
10μF
10V
R9
24.9Ω
1%
C31
OPEN
C11
0.1μF
GND_CK
37
35
CLKN
GND_CK
VDD_CK
L5
AV
CLK
C24
10μF
10V
C29
47μF
6.3V
C10
0.1μF
C19
1μF
GND_CK
36
34
GND
AVDD1.8
GND_CK
DVDD3.3
AV
DD1.8
C9
0.1μF
DVDD2
L2
33
32
GND
DD3.3
DD3.3
C26
47μF
6.3V
C21
10μF
10V
C16
1μF
AVDD3.3
C8
0.1μF
AV
AV
U1
31
C7
0.1μF
OUTIP
OPEN
MAX5878
30
GND
OUTPUTI
J1-6
29
4
5
6
T4
3
2
1
OUTIP
R1
49.9Ω
0.1%
J1-4
R12
OPEN
R1O
OPEN
T1
3
1
4
6
J1-2
J1-7
R3
100Ω
1%
AVDD1.8
J1-5
B9N
R2
49.9Ω
0.1%
C32
OPEN
AVDD1
L3
J1-3
B8P
C27
47μF
6.3V
C22
10μF
10V
28
27
C17
1μF
OUTIN
GND
AGND
J1-1
B8N
OUTQP
OPEN
26
25
DVDD1.8
GND
OUTIN
OPEN
61
OUTPUTQ
DV
DD1.8
4
5
6
T5
3
2
1
J2
HEADER 2 x 20
J2-39
OUTQP
C15
1μF
C13
0.1μF
R4
49.9Ω
0.1%
R13
OPEN
R11
OPEN
T2
3
62
63
64
65
66
67
68
1
4
6
R6
100Ω
1%
J2-40
J2-38
J2-36
J2-34
J2-32
J2-30
J2-28
J2-26
J2-24
J2-22
J2-20
J2-18
J2-16
J2-14
J2-12
J2-10
J2-8
B7P
B7N
B6P
B6N
B5P
B5N
B4P
B4N
B3P
B3N
B2P
B2N
B1P
B1N
B0P
B0N
J2-37
J2-35
J2-33
J2-31
J2-29
J2-27
J2-25
J2-23
J2-21
J2-19
J2-17
J2-15
J2-13
J2-11
J2-9
R5
49.9Ω
0.1%
1
C33
OPEN
AVDD3.3
AVDD2
L4
24
23
OUTQN
GND
C28
47μF
6.3V
C23
10μF
10V
C18
1μF
AVDD3.3
C6
0.1μF
OUTQN
OPEN
22
21
AV
AV
DD3.3
DD3.3
GND
C5
0.1μF
20
AVDD1.8
C4
0.1μF
19
18
AV
DD1.8
AVDD3.3
2
DACREF
8
7
6
5
1
2
3
4
N.C.
N.C.
IN
R7
2kΩ
1%
3
JU4
C3
1μF
C34
OPEN
17
16
4
N.C.
OUT
N.C.
U2
MAX6161
FSADJ
REFIO
TP1
C14
0.1μF
JU3
5
N.C.
GND
GND_CK
C35
OPEN
C36
OPEN
C37
0.1μF
6
15
GND
AVDD3.3
C2
0.1μF
7
14
13
12
AV
DD3.3
GND
GND
8
9
J2-7
J2-6
J2-5
DVDD3.3
11
10
J2-4
J2-3
DV
DD3.3
C1
0.1μF
J2-2
J2-1
GND
Figure 2c. MAX5878 EV Kit Schematic
_______________________________________________________________________________________
9
MAX5876/MAX5877/MAX5878 Evaluation Kits
Figure 3. MAX5876/MAX5877/MAX5878 EV Kit Component Placement Guide—Component Side
10 ______________________________________________________________________________________
MAX5876/MAX5877/MAX5878 Evaluation Kits
Figure 4. MAX5876/MAX5877/MAX5878 EV Kit PCB Layout—Component Side (Layer 1)
______________________________________________________________________________________ 11
MAX5876/MAX5877/MAX5878 Evaluation Kits
Figure 5. MAX5876/MAX5877/MAX5878 EV Kit PCB Layout—Ground Planes (Layer 2)
12 ______________________________________________________________________________________
MAX5876/MAX5877/MAX5878 Evaluation Kits
Figure 6. MAX5876/MAX5877/MAX5878 EV Kit PCB Layout—Power Planes (Layer 3)
______________________________________________________________________________________ 13
MAX5876/MAX5877/MAX5878 Evaluation Kits
Figure 7. MAX5876/MAX5877/MAX5878 EV Kit PCB Layout—Solder Side (Layer 4)
Revision History
All pages changed at Rev 1.
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
14 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2007 Maxim Integrated Products
is a registered trademark of Maxim Integrated Products, Inc.
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