MAX4940EVKIT+ [MAXIM]
3.5mm Scope Probe Jacks;
| 型号： | MAX4940EVKIT+ |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 3.5mm Scope Probe Jacks |
| 文件： | 总18页 (文件大小：1515K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-5045; Rev 0; 11/09
MAX4940 Evaluation Kit/Master Board
General Description
Features
The MAX4940 evaluation kit (EV kit) provides a proven
design to evaluate the MAX4940 quad, high-voltage
pulse driver. The MAX4940 EV kit can be driven by the
MAX4940 Master Board, a signal generator based on the
Altera EPM1270F256C5N MAX II CPLD.
Sꢀ 3.5mm_Scope_Probe_Jacks
Sꢀ Proven_PCB_Layout
Sꢀ Fully_Assembled_and_Tested
Sꢀ Stand-Alone_Waveform_Generation_(MAX4940MB+)
The MAX4940 EV kit comes with a MAX4940CTN+
installed. Contact the factory for free samples of the pin-
compatible MAX4940ACTN+ to evaluate this device.
Ordering Information
For complete evaluation, including test waveform gen-
eration, order the MAX4940MB+ together with the
MAX4940EVKIT+.
PART
TYPE
EV Kit
MAX4940EVKIT+
MAX4940MB+
Master Board (signal generator)
+Denotes lead(Pb)-free and RoHS compliant.
Component Lists
MAX4940 EV Kit
DESIGNATION
QTY
DESCRIPTION
DESIGNATION
QTY
DESCRIPTION
Dual-row, right-angle header
(2 x 8)
220pF Q10%, 100V X7R ceramic
capacitors (0402)
H1
1
COUT1–COUT4
4
Murata GRM155R72A221K
HOUT1A,
HOUT1B,
HOUT2A,
HOUT2B, JU1–
JU13
3300pF Q10%, 100V X7R ceram-
ic capacitors (0402)
Murata GRM155R72A332K
C1–C8
C9–C15
8
7
4
3
4
17
2-pin headers
0.1FF Q10%, 100V X7R ceramic
capacitors (0603)
Murata GRM188R72A104K
1kI Q5%, 1W resistors (2512)
Panasonic ERJ-1TYJ102U
ROUT1–ROUT4
4
4
T1A, T1B, T2A,
T2B
0.1FF Q10%, 16V X7R ceramic
capacitors (0402)
Murata GRM155R71C104K
Scope probe jacks, 3.5mm
C16–C19
Quad high-voltage pulse driver
(56 TQFN-EP*)
Maxim MAX4940CTN+
U1
1
10FF Q10%, 25V X7R ceramic
capacitors (1206)
Murata GRM31CR71E106K
C20, C21, C22
C23–C26
—
11
1
Shunts
PCB: MAX4940 EVALUATION
KIT+
10FF Q20%, 160V aluminum elec-
trolytic capacitors (G13)
—
Panasonic EEV-EB2C100Q
*EP = Exposed pad.
_ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ _Maxim Integrated Products_ _ 1
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
MAX4940 Evaluation Kit/Master Board
Component Lists (continued)
MAX4940 Master Board
DESIGNATION
QTY
DESCRIPTION
DESIGNATION
JU1
QTY
0
DESCRIPTION
Not installed, 2-pin header
Red LEDs (0805)
560pF Q5%, 50V C0G ceramic
capacitor (0603)
TDK C1608C0G1H561J
C8
1
LED0–LED16
RLED0–RLED16
R13
17
17
1
200I Q5% resistors (0603)
1kI Q5% resistor (0603)
4.7FF Q10%, 6.3V X5R ceramic
capacitor (0603)
TDK C1608X5R0J475K
C14
1
12
13
1
R14, R16, R19,
R20, RSW1–
RSW7
11
10kI Q5% resistors (0603)
C15, C26, C27,
C34, C35,
CSW1–CSW7
0.01FF Q10%, 50V X7R ceramic
capacitors (0603)
TDK C1608X7R1H103K
R15
R17
0
1
Not installed, resistor (0603)
33I Q5% resistor (0603)
C25, C31, C32,
C33, C36–C39,
C55–C59
0.1FF Q10%, 50V X7R ceramic
capacitors (0603)
TDK C1608X7R1H104K
Momentary pushbutton switch-
es, normally open
SW1–SW7
TP0–TP4
7
0
Not installed, multipurpose test
points
10pF Q5%, 50V C0G ceramic
capacitor (0603)
C69
CPLD, 1270 logic elements
(256 FBGA)
Altera EPM1270F256C5N
TDK C1608C0G1H100J
U1
1
1
1FF Q10%, 10V X7R ceramic
capacitors (0603)
TDK C1608X7R1A105K
C201, C202
FB1
2
1
3.3V, 1000mA LDO regulator
(16 TSSOP-EP*)
Maxim MAX8869EUE33+
U2
Y1
Ferrite bead (0603)
TDK MMZ1608R301A
66MHz crystal oscillator
(7.5mm x 5mm)
Dual-row, right-angle header
(2 x 8)
1
1
H1
J2
1
1
PCB: MAX4940 MASTER
BOARD+
10-pin header (2 x 5)
—
*EP = Exposed pad.
Component Suppliers
SUPPLIER
PHONE
WEBSITE
www.altera.com
Altera Corp.
800-800-3753
770-436-1300
800-344-2112
847-803-6100
Murata Electronics North America, Inc.
Panasonic Corp.
www.murata-northamerica.com
www.panasonic.com
TDK Corp.
www.component.tdk.com
Note: Indicate that you are using the MAX4940 when contacting these component suppliers.
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MAX4940 Evaluation Kit/Master Board
8) Connect the +100V DC power supply to VPP1 on
Quick Start
Required Equipment
the MAX4940 EV kit.
9) Connect the -100V DC power supply to VNN1 on the
•
•
MAX4940 EV kit
MAX4940 EV kit.
MAX4940 Master Board (or equivalent signal
generator)
10) Enable the +5V DC power supply.
11) Enable the Q12V DC power supplies.
12) Enable the Q100V DC power supplies.
•
•
•
+5V DC power supply
Q12V DC dual-tracking power supplies
13) Set the MAX4940 Master Board to generate wave-
form A by pressing SW2 until LED2 is lit.
Q100V DC at 20mA high-voltage, dual-tracking
power supplies
14) Verify that the oscilloscope shows expected high-
voltage outputs from waveform A (OUT1A).
•
Recommended: Oscilloscope to view high-voltage
outputs
15) Set the MAX4940 Master Board to generate wave-
form B by pressing SW2 until LED3 is lit.
Procedure
The MAX4940 EV kit is fully assembled and tested.
Follow the steps below to verify board operation:
16) Verify that the oscilloscope shows expected high-
voltage outputs from waveform B (OUT1A).
1) Verify that the jumpers are in their default positions,
as shown in Table 1 with one exception (JU1 must
be open).
17) Set the MAX4940 Master Board to generate wave-
form C by pressing SW2 until LED4 is lit.
18) Verify that the oscilloscope shows expected high-
voltage outputs from waveform C (OUT1A).
2) Connect the MAX4940 EV kit to the MAX4940
Master Board signal generator.
19) Set the MAX4940 Master Board to generate wave-
form D by pressing SW2 until LED5 is lit.
3) Connect an oscilloscope probe to T1A on the
MAX4940 EV kit.
20) Verify that the oscilloscope shows expected high-
voltage outputs from waveform D (OUT1A).
4) Connect all power-supply ground returns to GND.
5) Connect the +5V DC power supply to the IN +5V
pad on the MAX4940 Master Board. This powers the
on-board MAX8869 +3.3V linear regulator, which
drives the CPLD and the MAX4940’s VDD supply.
21) Reduce the VPP/VNN supplies to Q5V DC.
22) Set the MAX4940 Master Board to generate wave-
form E by pressing SW2 until LED6 is lit.
23) Verify that the oscilloscope shows expected outputs
from waveform E (OUT1A).
6) Connect the +12V DC power supply to VCC on the
MAX4940 EV kit.
24) Repeat steps 13–23 to view waveforms OUT1B,
OUT2A, and OUT2B.
7) Connect the -12V DC power supply to VEE on the
MAX4940 EV kit.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ_ _ 3
MAX4940 Evaluation Kit/Master Board
Figure 1. MAX4940 EV Kit System Operation Guide
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MAX4940 Evaluation Kit/Master Board
the MAX4940’s internal charge pump. Jumpers JU1–JU5
Detailed Description of Hardware
MAX4940 EV Kit
The MAX4940 EV kit provides a proven layout for the
MAX4940. Capacitors C1–C8 are the “flying caps” for
are used to drive EN and the clamp inputs when the EV
kit board is used without the master board. On-board
dummy-load circuits are enabled by jumpers JU10–JU13.
Figure 2. MAX4940 Jumper Guide
Table_1._MAX4940_EV_Kit_Jumper_Descriptions_(JU1–JU13)
JUMPER
SIGNAL
SHUNT_POSITION
DESCRIPTION
Enable input EN connects to VDD, enabling the high-voltage outputs for nor-
mal operation
1-2*
JU1
EN
Enable input EN is not connected to VDD (required when driven with
MAX4940 Master Board, or other external signal source)
Open
1-2
Clamp input CLP1A connects to VDD, enabling the always-on active clamp
feature (MAX4940 only)
JU2
JU3
CLP1A
CLP2A
CLP1A is not connected to VDD (required when driven with MAX4940 Master
Board, or other external signal source)
Open*
1-2
Clamp input CLP2A connects to VDD, enabling the always-on active clamp
feature (MAX4940 only)
CLP2A is not connected to VDD (required when driven with MAX4940 Master
Board, or other external signal source)
Open*
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ_ _ 5
MAX4940 Evaluation Kit/Master Board
Table_1._MAX4940_EV_Kit_Jumper_Descriptions_(JU1–JU13)_(continued)
JUMPER
SIGNAL
SHUNT_POSITION
DESCRIPTION
Clamp input CLP2B connects to VDD, enabling the always-on active clamp
feature (MAX4940 only)
1-2
JU4
CLP2B
CLP2B is not connected to VDD (required when driven with MAX4940 Master
Board, or other external signal source)
Open*
1-2
Clamp input CLP1B connects to VDD, enabling the always-on active clamp
feature (MAX4940 only).
JU5
CLP1B
CLP1B is not connected to VDD (required when driven with MAX4940 Master
Board, or other external signal source)
Open*
JU6
JU7
JU8
JU9
VNN1, VNN2
VPP1, VPP2
1-2*
1-2*
VNN1 and VNN2 are connected together (required when U1 = MAX4940)
VPP1 and VPP2 are connected together (required when U1 = MAX4940)
OUT1A and OUT2A are independent (required when U1 = MAX4940)
OUT1B and OUT2B are independent (required when U1 = MAX4940)
Dummy load ROUT1/COUT1 connects to OUT1A
OUT1A, OUT2A
OUT1B, OUT2B
Open*
Open*
1-2*
JU10
JU11
JU12
JU13
Load-1A
Load-2A
Load-2B
Load-1B
Open
1-2*
Dummy load ROUT1/COUT1 is disconnected
Dummy load ROUT2/COUT2 connects to OUT2A
Open
1-2*
Dummy load ROUT2/COUT2 is disconnected
Dummy load ROUT3/COUT3 connects to OUT2B
Open
1-2*
Dummy load ROUT3/COUT3 is disconnected
Dummy load ROUT4/COUT4 connects to OUT1B
Open
Dummy load ROUT4/COUT4 is disconnected
*Default position.
Figure 3. MAX4940A Jumper Guide
6_ _ _ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ
MAX4940 Evaluation Kit/Master Board
SW2. The burst frequency is determined by SW3, and
the number of times the waveform repeats is determined
by SW4. Waveform E automatically activates continuous-
wave mode, repeating the waveform continuously. For
waveform E, the enable output EN is driven with a 10%
duty-cycle signal with approximately a 100ms period.
MAX4940 Master Board
The EPM1270F256C5N (U1) is from Altera’s MAX II fam-
ily of CPLDs. Contact Altera for any questions regarding
the CPLD. See the Component Suppliers table for con-
tact information.
The MAX8869 (U2) is a high-current, low-dropout (LDO)
linear regulator, preset to 3V output. This regulator sup-
plies the CPLD and the MAX4940 EV kit VDD supply.
The use of an oscilloscope is recommended to confirm
that the correct operation mode is selected.
Pushbutton Switch Operation
The MAX4940 Master Board firmware is controlled by
pushbutton switches SW1–SW7. SW1 toggles between
run and stop mode. Pressing and releasing SW2 selects
the waveform. Pressing and releasing SW3 selects the
burst frequency. SW4 selects the number of times to
repeat the waveform. Pressing SW7 resets the MAX4940
Master Board configuration to run waveform A at the fast-
est burst clock, one pulse every 50Fs.
Evaluating the MAX4940A
With power disconnected, replace U1 with the MAX4940A
IC. Configure the jumpers according to Table 2. Jumpers
JU2–JU7 must be open. Move the shunts from JU6
and JU7 to JU8 and JU9. Follow the steps in the
Quick Start section except a signal source must be used
in place of the master board. In addition, use two separate
power supplies for VPP1/VNN1 and VPP2/VNN2. Refer to
the MAX4940A IC data sheet for more information.
Every 50Fs the MAX4940 Master Board self-triggers the
selected waveform. The waveform data is determined by
Table_2._MAX4940A_Jumper_Descriptions_(JU1–JU13)
JUMPER
SIGNAL
SHUNT_POSITION
DESCRIPTION
Enable input EN connects to VDD, enabling the high-voltage outputs for
normal operation
1-2*
JU1
EN
Enable input EN is not connected to VDD (required when driven with
MAX4940 Master Board, or other external signal source)
Open
JU2
JU3
JU4
JU5
JU6
JU7
CLP1A
CLP2A
Open*
Open*
Open*
Open*
Open
CLP1A is not connected to VDD (required when U1 = MAX4940A)
CLP2A is not connected to VDD (required when U1 = MAX4940A)
CLP2B is not connected to VDD (required when U1 = MAX4940A)
CLP1B is not connected to VDD (required when U1 = MAX4940A)
VNN1 and VNN2 are independent (required when U1 = MAX4940A)
VPP1 and VPP2 are independent (required when U1 = MAX4940A)
CLP2B
CLP1B
VNN1, VNN2
VPP1, VPP2
Open
OUT1A and OUT2A are connected together (required when U1 =
MAX4940A)
JU8
JU9
OUT1A, OUT2A
OUT1B, OUT2B
Load-1A
1-2
1-2
OUT1B and OUT2B are connected together (required when U1 =
MAX4940A)
1-2*
Open
1-2*
Dummy load ROUT1/COUT1 connects to OUT1A
Dummy load ROUT1/COUT1 is disconnected
Dummy load ROUT2/COUT2 and in connects to OUT2A
Dummy load ROUT2/COUT2 is disconnected
Dummy load ROUT3/COUT3 connects to OUT2B
Dummy load ROUT3/COUT3 is disconnected
Dummy load ROUT4/COUT4 connects to OUT1B
Dummy load ROUT4/COUT4 is disconnected
JU10
JU11
JU12
JU13
Load-2A
Open
1-2*
Load-2B
Open
1-2*
Load-1B
Open
*Default position.
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ_ _ 7
MAX4940 Evaluation Kit/Master Board
Table_3._MAX4940_Master_Board_Control_Table
SIGNAL
SWITCH
LED
STATE
MEANING
Blinking
Run mode
Stop mode
Run/Stop
SW1
LED1
On
LED2
LED3
On
Waveform A (see Figure 4)
Waveform B (see Figure 5)
Waveform C (see Figure 6)
Waveform D (see Figure 7)
Waveform E (see Figure 8)
Reserved
On
LED4
On
Waveform
SW2
LED5
On
LED6
On
LED7
On
LED8
On
0.5MHz
LED9
On
1MHz
LED10
LED11
LED12
LED13
LED14
LED15
On
2.53MHz
On
On
5.5MHz
Burst clock timebase
SW3
SW4
8.25MHz
On
11MHz
On
15MHz
On
33MHz
Flashes 1 time
Flashes 2 times
Flashes 3 times
Flashes 4 times
1 pulse every 50Fs
2 pulses every 50Fs
3 pulses every 50Fs
4 pulses every 50Fs
Pulse repeat
LED16
Table_4._SW1_Run/Stop_Functions
Table_6._SW3_Burst_Clock_Functions
FUNCTION
Run mode
Stop mode
INDICATOR
LED1 blinking
LED1 on
FUNCTION__(MHz)
INDICATOR
0.5
1
LED8
LED9
2.53
5.5
8.25
11
LED10
LED11
LED12
LED13
LED14
LED15
Note: Each time SW1 is pressed and released, the next func-
tion is selected.
Table_5._SW2_Waveform_Functions
15
FUNCTION
INDICATOR
REMARKS
33
NRZ pulses with EN, INP
first (see Figure 4)
Waveform A
LED2
Note: Each time SW3 is pressed and released, the next func-
tion is selected.
NRZ pulses with EN, INN
first (see Figure 5)
Waveform B
Waveform C
Waveform D
LED3
LED4
LED5
Table_7._SW4_Functions
RZ pulses with clamp, INP
first (see Figure 6)
FUNCTION
INDICATOR
1 pulse every 50Fs
2 pulses every 50Fs
3 pulses every 50Fs
4 pulses every 50Fs
LED16 flashes 1 time
LED16 flashes 2 times
LED16 flashes 3 times
LED16 flashes 4 times
RZ pulses with clamp, INN
first (see Figure 7)
Waveform E
Reserved
LED6
LED7
CW pulses (see Figure 8)
Reserved
Note: Each time SW2 is pressed and released, the next func-
tion is selected.
Note: Each time SW4 is pressed and released, the next func-
tion is selected.
8_ _ _ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ
MAX4940 Evaluation Kit/Master Board
Figure 4. Waveform A: NRZ Pulses with EN, INP First
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ_ _ 9
MAX4940 Evaluation Kit/Master Board
Figure 5. Waveform B: NRZ Pulses with EN, INN First
10_ _ _ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ
MAX4940 Evaluation Kit/Master Board
Figure 6. Waveform C: RZ Pulses with Clamp, INP First
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ_ _ 11
MAX4940 Evaluation Kit/Master Board
Figure 7. Waveform D: RZ Pulses with Clamp, INN First
12_ _ _ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ
MAX4940 Evaluation Kit/Master Board
Figure 8. Waveform E: Alternating INP and INN
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ_ _ 13
MAX4940 Evaluation Kit/Master Board
Figure 9. MAX4940 EV Kit Schematic
14_ _ _ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ
MAX4940 Evaluation Kit/Master Board
1.0”
1.0”
Figure 10. MAX4940 EV Kit Component Placement Guide—
Component Side
Figure 11. MAX4940 EV Kit PCB Layout—Component Side
1.0”
Figure 12. MAX4940 EV Kit PCB Layout—Solder Side
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ_ _ 15
MAX4940 Evaluation Kit/Master Board
Figure 13. MAX4940 Master Board Schematic
16_ _ _ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ
MAX4940 Evaluation Kit/Master Board
1.0”
1.0”
Figure 14. MAX4940 Master Board Component Placement
Guide—Component Side
Figure 15. MAX4940 Master Board PCB Layout—Component
Side
1.0”
Figure 16. MAX4940 Master Board PCB Layout—Ground Layer 2
ꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀꢀ_ _ 17
MAX4940 Evaluation Kit/Master Board
1.0”
1.0”
Figure 17. MAX4940 Master Board PCB Layout—Power Layer 3
Figure 18. MAX4940 Master Board PCB Layout—Solder Side
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time.
18_____________________ ________ Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
©
2009 Maxim Integrated Products
Maxim is a registered trademark of Maxim Integrated Products, Inc.
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