MAX4717ETB [MAXIM]
4.5OHM/20OHM, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP; 4.5OHM / 20OHM ， 300MHz的带宽，双路SPDT模拟开关，UCSP封装
| 型号： | MAX4717ETB |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | 4.5OHM/20OHM, 300MHz Bandwidth, Dual SPDT Analog Switches in UCSP |
| 文件： | 总16页 (文件大小：309K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-2627; Rev 2; 9/05
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
General Description
Features
♦ USB 1.1 Signal Switching Compliant
The MAX4717/MAX4718 low-voltage, low on-resistance
(TID = 4000231)
(R ), dual single-pole/double throw (SPDT) analog
ON
switches operate from a single +1.8V to +5.5V supply.
These devices are designed for USB 1.1 and audio
switching applications.
♦ 2ns (max) Differential Skew
♦ -3dB Bandwidth: > 300MHz
♦ Low 15pF On-Channel Capacitance
The MAX4717 features two 4.5Ω R
(max) SPDT
ON
♦ Single-Supply Operation from +1.8V to +5.5V
♦ 4.5Ω R (max) Switches (MAX4717/MAX4718)
switches with 1.2Ω flatness and 0.3Ω matching between
channels. The MAX4718 features one 4.5Ω R (max)
ON
ON
0.3Ω (max) R Match (+3.0V Supply)
ON
SPDT switch and one 20Ω R
(max) SPDT switch. The
ON
1.2Ω (max) Flatness (+3.0V Supply)
♦ 20Ω R (max) Switch (MAX4718)
20Ω switch has a guaranteed matching and flatness of
0.4Ω and 1.2Ω, respectively. These switches offer break-
before-make switching (1ns) with t
ON
<80ns and t
OFF
0.4Ω (max) R
Match (+3.0V Supply)
ON
ON
<40ns at +2.7V. The digital logic inputs are +1.8V logic
compatible with a +2.7V to +3.6V supply.
1.2Ω (max) Flatness (+3.0V Supply)
♦ Rail-to-Rail Signal Handling
These switches are packaged in a chip-scale package
(UCSP™), significantly reducing the required PC board
area. The chip occupies only a 2.0mm ✕ 1.50mm area
and has a 4 ✕ 3 bump array with a bump pitch of 0.5mm.
These switches are also available in 10-pin µMAX® and
10-pin TDFN packages.
♦ High Off-Isolation: -55dB (10MHz)
♦ Low Crosstalk: -80dB (10MHz)
♦ Low Distortion: 0.03%
♦ +1.8V CMOS-Logic Compatible
♦ < 0.5nA Leakage Current at +25°C
Applications
USB 1.1 Signal Switching Circuits
Battery-Operated Equipment
Audio/Video-Signal Routing
Headphone Switching
Ordering Information
PIN/BUMP-
PACKAGE
TOP
MARK
PART
TEMP RANGE
MAX4717EUB
MAX4717ETB
MAX4717EBC-T
MAX4718EUB
MAX4718ETB
MAX4718EBC-T
-40°C to +85°C 10 µMAX
-40°C to +85°C 10 TDFN-EP*
-40°C to +85°C 12 UCSP-12
-40°C to +85°C 10 µMAX
-40°C to +85°C 10 TDFN-EP*
-40°C to +85°C 12 UCSP-12
—
ACV
ABH
—
Low-Voltage Data-Acquisition Systems
Sample-and-Hold Circuits
Cell Phones
ACW
ABI
PDAs
*EP = Exposed paddle.
UCSP is a trademark of Maxim Integrated Products, Inc.
µMAX is a registered trademark of Maxim Integrated Products, Inc.
Pin Configurations/Functional Diagrams/Truth Tables
TOP VIEW
MAX4717/MAX4718
(BUMP SIDE DOWN)
MAX4717/MAX4718
PART
SPDT1
4.5Ω
SPDT2
4.5Ω
20Ω
MAX4717/MAX4718
GND
MAX4717
MAX4718
C1
B1
A1
NC1
IN1
NC2
IN2
V+
1
10 NO2
1
2
3
4
5
10 NO2
V+
NO1
4.5Ω
2
3
4
5
9
8
7
6
NO1
COM2
IN2
9
COM2
C2
A2
MAX4717/MAX4718
COM1
IN1
IN2
8
7
COM1
IN1
IN_
0
NO_
OFF
ON
NC_
ON
COM1 C3
A3 COM2
NC2
GND
NC2
GND
NO1
NO2
C4
B4
A4
1
OFF
NC1
NC1
6
SWITCHES SHOWN FOR LOGIC "0" INPUT
V+
UCSP
TDFN
µMAX
________________________________________________________________ Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
ABSOLUTE MAXIMUM RATINGS
(All voltages are referenced to GND.)
ESD Method 3015.7.............................................................>2kV
V+, IN_...................................................................-0.3V to +6.0V
COM_, NO_, NC_ (Note 1) ...........................-0.3V to (V+ + 0.3V)
Continuous Current COM_, NO_, NC_ ........................... 100mA
Peak Current COM_, NO_, NC_
Operating Temperature Range ...........................-40°C to +85°C
Junction Temperature......................................................+150°C
Storage Temperature Range.............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Bump Temperature (soldering)
(pulsed at 1ms, 10% duty cycle)................................ 200mA
Continuous Power Dissipation (T = +70°C)
Infrared (15s) ...............................................................+220°C
Vapor Phase (60s) .......................................................+215°C
A
10-Pin µMAX (derate 5.6mW/°C above +70°C)...........444mW
10-Pin TDFN (derate 24.4mW/°C above +70°C) .......1951mW
12-Bump UCSP (derate 11.4mW/°C above +70°C) ....909mW
Note 1: Signals on COM_, NO_, or NC_ exceeding V+ or GND are clamped by internal diodes. Limit forward-diode current to
maximum current rating.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = +2.7V to +3.6V, V = +1.4V, V = +0.5V, T = T
to T
, unless otherwise noted. Typical values are at V+ = +3.0V,
MAX
IH
IL
A
MIN
T
A
= +25°C, unless otherwise noted.) (Notes 2, 3)
PARAMETER
Analog Signal Range
ANALOG SWITCH (Low R —MAX4717/MAX4718 SPDT 1)
SYMBOL
CONDITIONS
T
MIN
TYP
MAX
UNITS
A
V
,
T
to
COM_
MIN
T
MAX
0
V+
V
V
, V
NO_ NC_
ON
+25°C
to
3.0
0.1
4.5
5
On-Resistance
(Note 4)
V+ = 2.7V, I
= 10mA;
= 1.5V
COM_
COM_
COM_
R
Ω
Ω
ON
T
MIN
V
or V
NO_
NC_
T
MAX
+25°C
0.3
0.4
1.2
1.5
+0.5
+1
On-Resistance Match Between
Channels (Notes 4, 5)
V+ = 2.7V, I
or V
= 10mA;
= 1.5V
∆R
ON
T
MIN
to
V
NO_
NC_
T
MAX
+25°C
0.6
On-Resistance Flatness
(Note 6)
V+ = 2.7V, I
or V
= 10mA;
R
Ω
FLAT(ON)
T
MIN
to
V
= 1.0V, 1.5V, 2.0V
NC_
NO_
T
MAX
+25°C
-0.5
-1
+0.01
+0.01
NO_, NC_ Off-Leakage Current
(Note 7)
I
I
V+ = 3.6V, V
= 0.3V, 3.3V;
NO_(OFF),
COM_
nA
nA
T
MIN
to
V
or V
= 3.3V, 0.3V
NC_(OFF)
NO_
NC_
T
MAX
+25°C
T to
MIN
-1
+1
V+ = 3.6V, V
or V
= 0.3V, 3.3V;
COM_
COM_ On-Leakage Current
(Note 7)
I
V
= 0.3V, 3.3V, or
COM_(ON)
NO_
NC_
-2
+2
floating
T
MAX
ANALOG SWITCH (High R —MAX4718 SPDT 2)
ON
+25°C
to
15
20
25
V+ = 2.7V, I
= 10mA;
COM_
On-Resistance (Note 4)
R
Ω
ON
T
MIN
V
or V
= 1.5V
NC_
NO_
T
MAX
2
_______________________________________________________________________________________
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
(V+ = +2.7V to +3.6V, V = +1.4V, V = +0.5V, T = T
to T
, unless otherwise noted. Typical values are at V+ = +3.0V,
MAX
IH
IL
A
MIN
T
A
= +25°C, unless otherwise noted.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
T
MIN
TYP
MAX
UNITS
A
+25°C
0.15
0.4
On-Resistance Match Between
Channels (Notes 4, 5)
V+ = 2.7V, I
= 10mA;
= 1.5V
COM_
∆R
Ω
ON
T
MIN
to
V
or V
NO_
NC_
0.5
1.2
1.5
+0.5
+1
T
MAX
+25°C
0.6
On-Resistance Flatness
(Note 6)
V+ = 2.7V, I
or V
= 10mA;
COM_
R
Ω
FLAT(ON)
T
MIN
to
V
= 1.0V, 1.5V, 2.0V
NC_
NO_
T
MAX
+25°C
-0.5
-1
+0.01
+0.01
NO_, NC_ Off-Leakage Current
(Note 7)
I
I
V+ = 3.6V, V
= 0.3V, 3.3V;
NO_(OFF),
COM_
nA
nA
T
MIN
to
V
or V
= 3.3V, 0.3V
NC_(OFF)
NO_
NC_
T
MAX
+25°C
-1
+1
V+ = 3.6V, V
or V
= 0.3V, 3.3V;
COM_
COM_ On-Leakage Current
(Note 7)
I
V
= 0.3V, 3.3V, or
NC_
COM_(ON)
NO_
T
MIN
to
-2
+2
floating
T
MAX
DYNAMIC CHARACTERISTICS
+25°C
to
40
20
8
80
100
40
V
, V
= 1.5V;
NO_ NC_
Turn-On Time
t
ns
ns
ns
R = 300Ω, C = 35pF, Figure 1;
V
ON
L
L
T
MIN
= 1.5V, V = 0V
IL
IH
T
MAX
+25°C
V
, V
NO_ NC_
= 1.5V;
Turn-Off Time
t
R = 300Ω, C = 35pF, Figure 1;
V
OFF
L
L
T
MIN
to
50
= 1.5V, V = 0V
IL
IH
T
MAX
+25°C
Break-Before-Make Time Delay
(Note 7)
V
, V
NO_ NC_
= 1.5V;
L
t
BBM
T
to
MIN
R = 300Ω, C = 35pF, Figure 2
L
1
T
MAX
T
T
to
MIN
Skew (Note 7)
t
R = 39Ω, C = 50pF, Figure 3
0.15
5
2
ns
SKEW
Q
S
L
MAX
V
= 1.5V, R
= 0Ω,
GEN
GEN
Charge Injection
+25°C
+25°C
pC
C = 1.0nF, Figure 4
L
f = 10MHz; V
, V
NO_ NC_
= 1V
;
;
P-P
-55
-80
-80
-110
R = 50Ω, C = 5pF, Figure 5
L
L
Off-Isolation
V
dB
dB
ISO
f = 1MHz; V
, V
NO_ NC_
= 1V
;
P-P
R = 50Ω, C = 5pF, Figure 5
L
L
f = 10MHz; V
, V
= 1V
NO_ NC_ P-P
R = 50Ω, C = 5pF, Figure 5
L
L
Crosstalk (Note 8)
V
+25°C
CT
f = 1MHz; V
, V
NO_ NC_
= 1V
;
P-P
R = 50Ω, C = 5pF, Figure 5
L
L
Signal = 0dBm, R = 50Ω,
C = 5pF, Figure 5
L
L
On-Channel -3dB Bandwidth
Total Harmonic Distortion
NO_, NC_ Off-Capacitance
BW
+25°C
+25°C
+25°C
>300
0.03
9
MHz
%
THD
V
= 2V , R = 600Ω
COM_ P-P L
C
C
NO_(OFF),
f = 1MHz, Figure 6
pF
NC_(OFF)
_______________________________________________________________________________________
3
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
(V+ = +2.7V to +3.6V, V = +1.4V, V = +0.5V, T = T
to T
, unless otherwise noted. Typical values are at V+ = +3.0V,
MAX
IH
IL
A
MIN
T
A
= +25°C, unless otherwise noted.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
f = 1MHz, Figure 6
T
MIN
TYP
MAX
UNITS
A
Switch On-Capacitance
C
+25°C
15
pF
(ON)
DIGITAL I/O
T
T
to
MAX
MIN
Input Logic High Voltage
Input Logic Low Voltage
V
1.4
V
V
IH
T
MIN
to
MAX
V
0.5
IL
T
T
T
to
MAX
MIN
Input Leakage Current
POWER SUPPLY
I
V+ = +3.6V, V
V+ = +5.5V, V
= 0 or 5.5V
= 0V or V+
-100
1.8
+100
nA
IN
IN_
IN_
T
MIN
to
Power-Supply Range
V+
I+
5.5
1
V
T
MAX
T
MIN
to
Supply Current
µA
T
MAX
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +4.2V to +5.5V, V = +2.0V, V = +0.8V, T = T
to T
, unless otherwise noted. Typical values are at V+ = +5.0V,
MAX
IH
IL
A
MIN
T
A
= +25°C, unless otherwise noted.) (Notes 2, 3)
PARAMETER
Analog Signal Range
ANALOG SWITCH (Low R —MAX4717/MAX4718 SPDT 1)
SYMBOL
CONDITIONS
T
MIN
TYP
MAX
UNITS
A
V
,
T
to
COM_
MIN
T
MAX
0
V+
V
V
, V
NO_ NC_
ON
+25°C
to
1.7
0.1
3
3.5
0.3
0.4
1.2
1.5
+0.5
+1
V+ = 4.2V, I
= 10mA;
= 3.5V
COM_
COM_
COM_
On-Resistance (Note 4)
R
Ω
Ω
ON
T
MIN
V
or V
NO_
NC_
T
MAX
+25°C
On-Resistance Match Between
Channels (Notes 4, 5)
V+ = 4.2V, I
or V
= 10mA;
= 3.5V
∆R
ON
T
MIN
to
V
NO_
NC_
T
MAX
+25°C
0.4
On-Resistance Flatness
(Note 6)
V+ = 4.2V, I
or V
= 10mA;
R
Ω
FLAT(ON)
T
MIN
to
V
= 1.0V, 2.0V, 3.5V
NC_
NO_
T
MAX
+25°C
-0.5
-1
+0.01
+0.01
NO_, NC_ Off-Leakage Current
(Note 7)
I
I
V+ = 5.5V; V
= 1.0V, 4.5V;
NO_(OFF),
COM_
nA
nA
T
MIN
to
V
or V
= 1.0V, 4.5V
NC_(OFF)
NO_
NC_
T
MAX
+25°C
T to
MIN
-1
+1
V+ = 5.5V; V
or V
= 1.0V, 4.5V;
COM_
COM_ On-Leakage Current
(Note 7)
I
V
= 1.0V, 4.5V, or
COM_(ON)
NO_
NC_
-2
+2
floating
T
MAX
4
_______________________________________________________________________________________
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
(V+ = +4.2V to +5.5V, V = +2.0V, V = +0.8V, T = T
to T
, unless otherwise noted. Typical values are at V+ = +5.0V,
MAX
IH
IL
A
MIN
T
A
= +25°C, unless otherwise noted.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
T
MIN
TYP
MAX
UNITS
Ω
A
ANALOG SWITCH (High R —MAX4718 SPDT 2)
ON
+25°C
to
12
20
25
V+ = 4.2V, I
= 10mA;
= 3.5V
COM_
COM_
COM_
On-Resistance (Note 4)
R
ON
T
T
MIN
V
or V
NO_
NC_
MAX
+25°C
0.15
0.4
0.4
0.5
1.2
1.5
+0.5
+1
On-Resistance Match Between
Channels (Notes 4, 5)
V+ = 4.2V, I
or V
= 10mA;
= 3.5V
∆R
Ω
ON
T
T
to
MIN
V
NO_
NC_
MAX
+25°C
On-Resistance Flatness
(Note 6)
V+ = 4.2V, I
or V
= 10mA;
R
Ω
FLAT(ON)
T
T
to
MIN
V
= 1.0V, 2.0V, 4.5V
NC_
NO_
MAX
+25°C
-0.5
-1
+0.01
+0.01
NO_, NC_ Off-Leakage Current
(Note 7)
I
V+ = 5.5V; V
= 1.0V, 4.5V;
COM_
NO_(OFF),
nA
nA
T
T
to
MIN
I
V
or V
= 1.0V, 4.5V
NC_
NC_(OFF)
NO_
MAX
+25°C
-1
+1
V+ = 5.5V, V
= 1.0V, 4.5V;
COM_
COM_ On-Leakage Current
(Note 7)
I
V
or V
= 1.0V, 4.5V, or
NC_
COM_(ON)
NO_
T
T
to
MIN
-2
+2
floating
MAX
DYNAMIC CHARACTERISTICS
+25°C
to
30
20
8
80
100
40
V
, V
= 3.0V;
NO_ NC_
Turn-On Time
t
ns
ns
ON
T
MIN
R = 300Ω, C = 35pF, Figure 1
L
L
T
MAX
+25°C
V
, V
NO_ NC_
= 3.0V;
Turn-Off Time
t
OFF
T
MIN
to
R = 300Ω, C = 35pF, Figure 1
L
L
50
T
MAX
+25°C
Break-Before-Make Time Delay
(Note 7)
V
, V
NO_ NC_
= 3.0V;
L
t
ns
ns
BBM
T
MIN
to
R = 300Ω, C = 35pF, Figure 2
L
1
T
MAX
T
MIN
to
Skew (Note 7)
t
R = 39Ω, C = 50pF, Figure 3
0.15
2
SKEW
S
L
T
MAX
DIGITAL I/O
T
T
to
MAX
MIN
MIN
MIN
Input Logic High Voltage
V
2.0
V
V
IH
T
T
to
MAX
Input Logic Low Voltage
Input Leakage Current
V
0.8
IL
T
T
to
I
V+ = 5.5V, V _ = 0V or V+
-100
+100
nA
IN
IN
MAX
_______________________________________________________________________________________
5
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
(V+ = +4.2V to +5.5V, V = +2.0V, V = +0.8V, T = T
to T
, unless otherwise noted. Typical values are at V+ = +5.0V,
MAX
IH
IL
A
MIN
T
A
= +25°C, unless otherwise noted.) (Notes 2, 3)
PARAMETER
SYMBOL
CONDITIONS
T
MIN
TYP
MAX
UNITS
A
POWER SUPPLY
T
T
to
MAX
MIN
Power-Supply Range
V+
I+
1.8
5.5
1
V
T
MIN
to
MAX
Supply Current
V+ = 5.5V, V
= 0V or V+
µA
IN_
T
Note 2: UCSP and TDFN parts are 100% tested at +25°C only, and guaranteed by design over the specified temperature range.
µMAX parts are 100% tested at T and guaranteed by design over the specified temperature range.
MAX
Note 3: The algebraic convention used in this data sheet is where the most negative value is a minimum and the most positive
value is a maximum.
Note 4: Guaranteed by design for UCSP and TDFN parts.
Note 5: ∆R
= R
- R
.
ON
ON(MAX)
ON(MIN)
Note 6: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges.
Note 7: Guaranteed by design.
Note 8: Between any two switches.
Typical Operating Characteristics
(T = +25°C, unless otherwise noted.)
A
ON-RESISTANCE vs. COM_ VOLTAGE
ON-RESISTANCE vs. COM_ VOLTAGE
ON-RESISTANCE vs. COM_ VOLTAGE
10
6
5
4
3
2
1
5
4
3
2
1
0
LOW R SWITCH
ON
V+ = 5V
LOW R SWITCH
ON
V+ = 3V
LOW R SWITCH
ON
8
V+ = 1.8V
6
T
= +85°C
A
V+ = 2.5V
T
= +85°C
T
= +25°C
A
A
T
= +25°C
A
V+ = 3V
4
2
0
V+ = 4.2V
V+ = 5V
T = -40°C
A
T
= -40°C
A
0
1
2
3
(V)
4
5
0
0.5
1.0
1.5
2.0
(V)
2.5
3.0
0
1
2
3
4
5
V
V
V
_ (V)
COM
COM_
COM_
6
_______________________________________________________________________________________
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
ON-RESISTANCE vs. COM VOLTAGE
_
ON-RESISTANCE vs. COM_ VOLTAGE
ON-RESISTANCE vs. COM_ VOLTAGE
20
18
16
14
12
10
15
14
13
12
11
10
15
14
13
12
11
10
HIGH R SWITCH
ON
V+ = 5V
HIGH R SWITCH
ON
V+ = 3V
V+ = 1.8V
T = +85°C
A
HIGH R SWITCH
ON
T
= +85°C
A
V+ = 2.5V
V+ = 4.2V
T
= -40°C
A
T
= +25°C
A
T
= +25°C
A
T
= -40°C
A
V+ = 5V
0
1
2
3
4
5
0
0.5
1.0
1.5
_ (V)
2.0
2.5
3.0
0
1
2
3
4
5
V
_ (V)
V
V
_ (V)
COM
COM
COM
LEAKAGE CURRENT vs. TEMPERATURE
LEAKAGE CURRENT vs. TEMPERATURE
LEAKAGE CURRENT vs. TEMPERATURE
500
400
300
200
100
0
1000
800
600
400
200
0
700
500
V+ = 3V
V+ = 3V
V+ = 5V
LOW R SWITCH
HIGH R SWITCH
LOW R SWITCH
ON
ON
ON
COM_ ON-LEAKAGE
COM_ ON-LEAKAGE
COM_ OFF-LEAKAGE
COM_ ON-LEAKAGE
COM_ OFF-LEAKAGE
300
COM_ OFF-LEAKAGE
100
-100
-40
-15
10
35
60
85
-40
-15
10
35
60
85
-40
-15
10
35
60
85
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
LEAKAGE CURRENT vs. TEMPERATURE
CHARGE INJECTION vs. V
SUPPLY CURRENT vs. TEMPERATURE
COM
900
700
500
300
100
50
40
30
20
10
0
6
5
4
3
2
1
0
V+ = 5V
HIGH R SWITCH
ON
C = 1nF
L
V+ = 5V
COM_ ON-LEAKAGE
V+ = 5V
C = 1nF
L
V+ = 3V
COM_ OFF-LEAKAGE
V+ = 3V
-100
-40
-15
10
35
60
85
0
1
2
3
4
5
-40
-15
10
35
60
85
V
_ (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
COM
_______________________________________________________________________________________
7
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
TURN-ON/OFF TIME
vs. SUPPLY VOLTAGE
SUPPLY CURRENT vs. LOGIC LEVEL
LOGIC THRESHOLD vs. SUPPLY VOLTAGE
100
2.0
1.6
1.2
0.8
0.4
0
100
80
60
40
20
0
LOW R SWITCH
ON
80
V
TH+
V
V+ = 5V
60
40
t
TH-
ON
t
OFF
V+ = 3V
20
0
0
1
2
3
4
5
1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5
SUPPLY VOLTAGE (V)
1.5
2.5
3.5
4.5
5.5
LOGIC LEVEL (V)
SUPPLY VOLTAGE (V)
TURN-ON/OFF TIME
vs. SUPPLY VOLTAGE
TURN-ON/OFF TIME
vs. TEMPERATURE
TURN-ON/OFF TIME
vs. TEMPERATURE
100
80
60
40
20
0
60
50
40
30
60
50
HIGH R SWITCH
ON
LOW R SWITCH
HIGH R SWITCH
ON
ON
t
, V+ = 3.0V
ON
t
, V+ = 3.0V
ON
t
, V+ = 5.0V
ON
t
, V+ = 5.0V
40
30
20
10
0
ON
t
ON
20
10
0
t
, V+ = 5.0V
t
OFF
OFF
t
, V+ = 5.0V
t
, V+ = 3.0V
OFF
OFF
t
, V+ = 3.0V
OFF
1.5
2.5
3.5
4.5
5.5
-40
-15
10
35
60
85
-40
-15
10
35
60
85
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
TEMPERATURE (°C)
RISE/FALL-TIME DELAY
vs. TEMPERATURE
RISE TIME TO FALL TIME MISMATCH
vs. SUPPLY VOLTAGE
RISE/FALL-TIME DELAY
vs. SUPPLY VOLTAGE
3.0
2.5
2.0
1.5
1.0
0.5
0
2.0
1.5
1.0
0.5
0
400
300
200
100
0
INPUT RISE/FALL TIME = 15ns
INPUT RISE/FALL TIME = 15ns
INPUT RISE/FALL TIME = 15ns
FIGURE 4, C = 50pF
FIGURE 4, C = 50pF
FIGURE 4, C = 50pF
L
L
L
V+ = 4.2V
LOW R SWITCH
ON
LOW R SWITCH
ON
LOW R SWITCH
ON
RISE DELAY
RISE DELAY
FALL DELAY
FALL DELAY
1.5
2.5
3.5
4.5
5.5
-40
-15
10
35
60
85
1.5
2.5
3.5
4.5
5.5
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
8
_______________________________________________________________________________________
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
Typical Operating Characteristics (continued)
(T = +25°C, unless otherwise noted.)
A
RISE TIME TO FALL TIME MISMATCH
vs. TEMPERATURE
SKEW vs. SUPPLY VOLTAGE
SKEW vs. TEMPERATURE
200
150
100
50
400
300
200
100
0
200
150
100
50
INPUT RISE/FALL TIME = 15ns
INPUT RISE/FALL TIME = 15ns
INPUT RISE/FALL TIME = 15ns
FIGURE 4, C = 50pF
L
FIGURE 4, C = 50pF
FIGURE 4, C = 50pF
L
L
V+ = 4.2V
MAX4717 ONLY
V+ = 4.2V
MAX4717 ONLY
LOW R SWITCH
ON
0
0
-40
-15
10
35
60
85
1.5
2.5
3.5
4.5
5.5
-40
-15
10
35
60
85
TEMPERATURE (°C)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
FREQUENCY RESPONSE
FREQUENCY RESPONSE
20
0
20
0
LOW R SWITCH
ON
V+ = 3V/5V
HIGH R SWITCH
V+ = 3V/5V
ON
-20
-40
-60
-80
-100
-120
-140
-20
-40
ON-LOSS
ON-LOSS
-60
OFF-ISOLATION
OFF-ISOLATION
-80
-100
-120
-140
CROSSTALK
100
CROSSTALK
100
0.0001
0.01
1
0.0001
0.01
1
FREQUENCY (MHz)
FREQUENCY (MHz)
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
1
1
V+ = 3V
V+ = 3V
HIGH R SWITCH
LOW R SWITCH
ON
ON
R = 600Ω
L
R = 600Ω
L
0.1
0.1
0.01
0.01
10
100
1k
FREQUENCY (Hz)
10k
100k
10
100
1k
FREQUENCY (Hz)
10k
100k
_______________________________________________________________________________________
9
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
Pin Description
Applications Information
PIN
µMAX/
Digital Control Inputs
The MAX4717/MAX4718 logic inputs accept up to
+5.5V regardless of supply voltage. For example, with
a +3.3V supply, IN_ can be driven low to GND and high
to +5.5V allowing for mixing of logic levels in a system.
Driving the control logic inputs rail-to-rail minimizes
power consumption. For a +3V supply voltage, the
logic thresholds are 0.5V (low) and 1.4V (high); for a
+5V supply voltage, the logic thresholds are 0.8V (low)
and 2.0V (high).
NAME
FUNCTION
UCSP
TDFN
Analog Switch 2—Normally Closed
Terminal
A1
7
NC2
IN2
Analog Switch 2—Digital Control
Input
A2
8
9
Analog Switch 2—Common
Terminal
A3
COM2
NO2
Analog Signal Levels
The on-resistance of the MAX4717/MAX4718 changes
very little for analog input signals across the entire supply
voltage range (see the Typical Operating Characteristics).
The switches are bidirectional, so the NO_, NC_, and
COM_ pins can be either inputs or outputs.
Analog Switch 2—Normally Open
Terminal
A4
10
B1
B4
6
1
GND Ground. Connection.
V+
Positive-Supply Voltage
Analog Switch 1—Normally Closed
Terminal
C1
C2
C3
C4
—
5
4
NC1
Power-Supply Sequencing and
Overvoltage Protection
Caution: Do not exceed the absolute maximum rat-
ings because stresses beyond the listed ratings
may cause permanent damage to the device.
Analog Switch 1—Digital Control
Input
IN1
COM1
NO1
EP
Analog Switch 1—Common
Terminal
3
Proper power-supply sequencing is recommended for
all CMOS devices. Always apply V+ before applying
analog signals, especially if the analog signal is not
current-limited.
Analog Switch 1—Normally Open
Terminal
2
Exposed Pad (for TDFN package
only). Connect to ground.
—
UCSP Application Information
For the latest application details on UCSP construction,
dimensions, tape carrier information, printed circuit
board techniques, bump-pad layout, and recommend-
ed reflow temperature profile as well as the latest infor-
mation on reliability testing results, go to the Maxim
web site at www.maxim-ic.com/ucsp to find the
Application Note: USCP—A Wafer-Level Chip-Scale
Package.
Detailed Description
The MAX4717/MAX4718 high-speed, low-voltage, low on-
resistance (R ), dual SPDT analog switches operate
ON
from a single +1.8V to +5.5V supply. The switches feature
break-before-make switching operation and fast switch-
ing speeds (t
= 80ns (max), t
= 40ns (max)).
ON
OFF
These switches have low 15pF on-channel capaci-
tance, which allows for 12Mbps switching of the data
signals for USB 1.0/1.1 applications. The MAX4717 is
designed to switch D+ and D- USB signals with a guar-
anteed skew of less than 2ns (see Figure 4) as mea-
sured from 50% of the input signal to 50% of the output
signal.
Chip Information
TRANSISTOR COUNT: 235
PROCESS: BiCMOS
10 ______________________________________________________________________________________
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
Test Circuits/Timing Diagrams
MAX4717/
MAX4718
V+
t < 5ns
t < 5ns
f
r
V
IH
LOGIC
INPUT
50%
V+
COM_
V
IL
NO_
V
N_
V
OUT
OR NC_
t
OFF
R
L
C
L
IN_
V
OUT
0.9 x V
0.9 x V
OUT
0UT
GND
LOGIC
INPUT
SWITCH
OUTPUT
0V
t
ON
C INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
IN DEPENDS ON SWITCH CONFIGURATION;
INPUT POLARITY DETERMINED BY SENSE OF SWITCH.
R
L
V
OUT
= V
N_
(
)
ON
R + R
L
Figure 1. Switching Time
V+
V+
MAX4717/
MAX4718
V
V
IH
LOGIC
INPUT
50%
IL
NC_
NO_
V
OUT
V
N_
COM_
R
L
C
35pF
L
300Ω
IN_
LOGIC
INPUT
GND
0.9 x V
OUT
V
OUT
t
BBM
C INCLUDES FIXTURE AND STRAY CAPACITANCE.
L
Figure 2. Break-Before-Make Interval
______________________________________________________________________________________ 11
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
Test Circuits/Timing Diagrams (continued)
RISE TIME DELAY = |t
- t
|
INRISE OUTRISE
MAX4717
NC1 OR
NO1
R
S
S
FALL TIME DELAY = |t
- t
|
INFALL OUTFALL
COM1
COM2
IN+
IN-
OUT+
OUT-
RISE TIME TO FALL TIME MISMATCH = |t
- t
|
OUTFALL OUTRISE
C
C
L
NC2 OR
NO2
R
L
IN1
IN2
V
IL
TO V
IH
t
INFALL
t
INRISE
10%
V+
90%
90%
V
IN+
50%
10%
0V
V+
V
IN-
50%
0V
V+
t
OUTFALL
t
OUTRISE
90%
90%
V
OUT+
50%
10%
10%
0V
V+
50%
V
OUT-
0V
t
SKEW
Figure 3. Output Signal Skew
12 ______________________________________________________________________________________
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
Test Circuits/Timing Diagrams (continued)
V+
∆V
OUT
MAX4717/
MAX4718
V+
V
OUT
R
GEN
COM_
NC_
V
OUT
IN
OR NO_
OFF
OFF
OFF
OFF
C
L
ON
V
GEN
GND
IN_
ON
V
TO V
IH
IL
IN
Q = (∆V )(C )
OUT
L
LOGIC INPUT WAVEFORMS INVERTED FOR SWITCHES
THAT HAVE THE OPPOSITE LOGIC SENSE.
Figure 4. Charge Injection
+5V 10nF
V+
V
V
OUT
OFF-ISOLATION = 20log
ON-LOSS = 20log
V
IN
NETWORK
ANALYZER
50Ω
50Ω
OUT
V
V
0V OR V+
IN
IN_
V
IN
COM1
V
OUT
MAX4717/
MAX4718
CROSSTALK = 20log
NC1
V
IN
MEAS
REF
OUT
NO1*
50Ω
GND
50Ω
50Ω
*FOR CROSSTALK THIS PIN IS NO2.
NC2 AND COM2 ARE OPEN.
MEASUREMENTS ARE STANDARDIZED AGAINST SHORTS AT IC TERMINALS.
OFF-ISOLATION IS MEASURED BETWEEN COM_ AND "OFF" NO_ OR NC_ TERMINAL ON EACH SWITCH.
ON-LOSS IS MEASURED BETWEEN COM_ AND "ON" NO_ OR NC_ TERMINAL ON EACH SWITCH.
CROSSTALK IS MEASURED FROM ONE CHANNEL TO THE OTHER CHANNEL.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 5. On-Loss, Off-Isolation, and Crosstalk
V+
V+
10nF
COM_
MAX4717/
MAX4718
IN
V
IL
OR V
IH
CAPACITANCE
METER
NC_ or
NO_
f = 1MHz
GND
Figure 6. Channel Off/On-Capacitance
______________________________________________________________________________________ 13
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
PACKAGE OUTLINE, 4x3 UCSP
1
21-0104
F
1
14 ______________________________________________________________________________________
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
e
4X S
10
10
INCHES
MAX
MILLIMETERS
MAX
1.10
0.15
0.95
3.05
3.00
3.05
3.00
5.05
0.70
DIM MIN
MIN
-
A
-
0.043
0.006
0.037
0.120
0.118
0.120
0.118
0.199
A1
A2
D1
D2
E1
E2
H
0.002
0.030
0.116
0.114
0.116
0.114
0.187
0.05
0.75
2.95
2.89
2.95
2.89
4.75
0.40
H
Ø0.50±0.1
0.6±0.1
L
0.0157 0.0275
0.037 REF
L1
b
0.940 REF
0.007
0.0106
0.177
0.270
0.200
1
1
e
0.0197 BSC
0.500 BSC
0.6±0.1
c
0.0035 0.0078
0.0196 REF
0.090
BOTTOM VIEW
0.498 REF
S
α
TOP VIEW
0°
6°
0°
6°
D2
E2
GAGE PLANE
A2
c
A
E1
b
L
α
A1
D1
L1
FRONT VIEW
SIDE VIEW
PROPRIETARY INFORMATION
TITLE:
PACKAGE OUTLINE, 10L uMAX/uSOP
APPROVAL
DOCUMENT CONTROL NO.
REV.
1
21-0061
I
1
______________________________________________________________________________________ 15
4.5Ω/20Ω, 300MHz Bandwidth, Dual SPDT
Analog Switches in UCSP
Package Information (continued)
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information
go to www.maxim-ic.com/packages.)
D2
D
A2
PIN 1 ID
N
0.35x0.35
b
[(N/2)-1] x e
REF.
PIN 1
INDEX
AREA
E
E2
DETAIL A
e
A1
k
C
C
L
L
A
L
L
e
e
PACKAGE OUTLINE, 6,8,10 & 14L,
TDFN, EXPOSED PAD, 3x3x0.80 mm
1
-DRAWING NOT TO SCALE-
21-0137
G
2
COMMON DIMENSIONS
SYMBOL
MIN.
0.70
2.90
2.90
0.00
0.20
MAX.
0.80
3.10
3.10
0.05
0.40
A
D
E
A1
L
k
0.25 MIN.
0.20 REF.
A2
PACKAGE VARIATIONS
DOWNBONDS
ALLOWED
PKG. CODE
T633-1
N
6
D2
E2
e
JEDEC SPEC
b
[(N/2)-1] x e
1.90 REF
1.90 REF
1.95 REF
1.95 REF
1.95 REF
2.00 REF
2.40 REF
2.40 REF
1.50±0.10 2.30±0.10 0.95 BSC
1.50±0.10 2.30±0.10 0.95 BSC
1.50±0.10 2.30±0.10 0.65 BSC
1.50±0.10 2.30±0.10 0.65 BSC
1.50±0.10 2.30±0.10 0.65 BSC
MO229 / WEEA
MO229 / WEEA
MO229 / WEEC
MO229 / WEEC
MO229 / WEEC
0.40±0.05
0.40±0.05
0.30±0.05
0.30±0.05
0.30±0.05
NO
NO
T633-2
6
T833-1
8
NO
T833-2
8
NO
T833-3
8
YES
NO
T1033-1
T1433-1
T1433-2
10
14
14
1.50±0.10 2.30±0.10 0.50 BSC MO229 / WEED-3 0.25±0.05
1.70±0.10 2.30±0.10 0.40 BSC
1.70±0.10 2.30±0.10 0.40 BSC
- - - -
- - - -
0.20±0.05
0.20±0.05
YES
NO
PACKAGE OUTLINE, 6,8,10 & 14L,
TDFN, EXPOSED PAD, 3x3x0.80 mm
2
-DRAWING NOT TO SCALE-
21-0137
G
2
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2005 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products, Inc.
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