MAX4581EGE [MAXIM]
ANALOG MUX|SINGLE|8-CHANNEL|CMOS|LLCC|16PIN|PLASTIC ; 模拟多路复用器|单| 8路| CMOS | LLCC | 16PIN |塑料\n型号: | MAX4581EGE |
厂家: | MAXIM INTEGRATED PRODUCTS |
描述: | ANALOG MUX|SINGLE|8-CHANNEL|CMOS|LLCC|16PIN|PLASTIC
|
文件: | 总18页 (文件大小:458K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
ECN PRF 3 - K.O.
1 • 25 • 02
19-1328; Rev 2; 10/01
Low-Voltage, CMOS Analog
Multiplexers/Switches
________________General Description
____________________________Features
ꢀ Pin Compatible with Industry-Standard
74HC4051/74HC4052/74HC4053 and
MAX4051/MAX4052/MAX4053
The MAX4581/MAX4582/MAX4583 are low-voltage,
CMOS analog ICs configured as an 8-channel multiplexer
(MAX4581), two 4-channel multiplexers (MAX4582), and
three single-pole/double-throw (SPDT) switches
(MAX4583).
ꢀ Offered in Automotive Temperature Range
(-40°C to +125°C)
These CMOS devices can operate continuously with
2ꢀ to ꢁꢀ dual power supplies or a ꢂ2ꢀ to ꢂ12ꢀ sin-
ꢀ Guaranteed On-Resistance:
80Ω with 5V Supplies
®
gle supply. Each switch can handle Rail-to-Rail ana-
150Ω with Single +5V Supply
log signals. The off-leakage current is only 1nA at
ꢂ25°C or 5nA at ꢂ85°C.
ꢀ Guaranteed On-Resistance Match Between
Channels
All digital inputs have 0.8ꢀ to 2.4ꢀ logic thresholds,
ensuring TTL/CMOS-logic compatibility when using a
single ꢂ5ꢀ or dual 5ꢀ supplies.
ꢀ Guaranteed Low Off-Leakage Current:
1nA at +25°C
ꢀ Guaranteed Low On-Leakage Current:
1nA at +25°C
________________________Applications
Battery-Operated Equipment
ꢀ +2V to +12V Single-Supply Operation
2V to 6V Dual-Supply Operation
Audio and ꢀideo Signal Routing
Low-ꢀoltage Data-Acquisition Systems
Communications Circuits
ꢀ TTL/CMOS-Logic Compatible
ꢀ Low Distortion: < 0.02% (600Ω)
ꢀ Low Crosstalk: < -96dB (50Ω, MAX4582)
ꢀ High Off-Isolation: < -74dB (50Ω)
Automotive
_______________Ordering Information
PART
TEMP. RANGE
0°C to ꢂ70°C
0°C to ꢂ70°C
0°C to ꢂ70°C
PIN-PACKAGE
1ꢁ Plastic DIP
1ꢁ Narrow SO
1ꢁ TSSOP
MAX4581CPE
MAX4581CSE
MAX4581CUE
Ordering Information continued at end of data sheet.
____________________________________Pin Configurations/Functional Diagrams
TOP VIEW
MAX4582
MAX4583
MAX4581
Y0
Y2
Y1
Y0
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
X4
X6
V
V
Y
X
1
2
3
4
5
6
7
8
16
15
14
13
12
16
15
14
13
12
11
10
9
V
16
15
14
CC
CC
CC
X2
X1
X
X2
X1
Y
Z1
X
Y3
Z
X7
X1
X0
A
13 X0
12 X3
Y1
Z0
X5
X0
Enable
Enable
Enable
11 X3
11
10
9
A
B
C
V
V
V
10
9
A
B
B
LOGIC
EE
EE
LOGIC
EE
GND
GND
GND
C
DIP/SO/QSOP/TSSOP
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
DIP/SO/QSOP/TSSOP
DIP/SO/QSOP/TSSOP
________________________________________________________________ Maxim Integrated Products
1
For pricing delivery, and ordering information please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
Low-Voltage, CMOS Analog
Multiplexers/Switches
ABSOLUTE MAXIMUM RATINGS
ꢀoltages Referenced to ꢀ
QSOP (derate 8.3mW/°C above ꢂ70°C) .......................ꢁꢁ7mW
TSSOP (derate ꢁ.7mW/°C above ꢂ70°C)......................457mW
QFN (derate 18.5mW/°C above ꢂ70°C)......................1481mW
Operating Temperature Ranges
EE
ꢀ
CC
.........................................................................-0.3ꢀ to 13ꢀ
ꢀoltage into Any Terminal (Note 1) ...(ꢀ - 0.3ꢀ) to (ꢀ ꢂ 0.3ꢀ)
EE
CC
Continuous Current into Any Terminal.............................. 20mA
Peak Current, X_, Y_, Z_
(pulsed at 1ms, 10% duty cycle) ................................... 40mA
ESD per Method 3015.7 ..................................................>2000ꢀ
Continuous Power Dissipation (T = ꢂ70°C)
Plastic DIP (derate 10.53mW/°C above ꢂ70°C)............842mW
Narrow SO (derate 8.70mW/°C above ꢂ70°C)..............ꢁ9ꢁmW
MAX458_C_ .........................................................0°C to ꢂ70°C
MAX458_E_ ......................................................-40°C to ꢂ85°C
MAX458_A_.....................................................-40°C to ꢂ125°C
Storage Temperature Range.............................-ꢁ5°C to ꢂ150°C
Lead Temperature (soldering, 10s) .................................ꢂ300°C
A
Note 1: ꢀoltages exceeding ꢀ
or ꢀ on any signal terminal are clamped by internal diodes. Limit forward-diode current to maxi-
EE
CC
mum current rating.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—Dual Supplies
(ꢀ
= 4.5ꢀ to 5.5ꢀ, ꢀ = -4.5ꢀ to -5.5ꢀ, ꢀ = 2.4ꢀ, ꢀ = 0.8ꢀ, T = T
to T
, unless otherwise noted. Typical values are at
MAX
CC
EE
_H
_L
A
MIN
T
A
= ꢂ25°C.)
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
TEMP
UNITS
ANALOG SWITCH
Analog-Signal Range
ꢀ , ꢀ , ꢀ
C, E, A
ꢀ
EE
ꢀ
CC
ꢀ
X
Y
Z
ꢂ25°C
C, E, A
50
1
80
ꢀ
= 4.5ꢀ; ꢀ = -4.5ꢀ;
EE
CC
Switch On-Resistance
R
Ω
ON
I , I , I = 1mA; ꢀ , ꢀ , ꢀ = 3.5ꢀ
X
Y
Z
X
Y
Z
100
Switch On-Resistance
Match Between
Channels (Note 3)
ꢂ25°C
C, E, A
4
ꢁ
ꢀ
CC
= 4.5ꢀ; ꢀ = -4.5ꢀ;
EE
∆R
Ω
Ω
ON
I , I , I = 1mA; ꢀ , ꢀ , ꢀ = 3.5ꢀ
X
Y
Z
X
Y
Z
ꢂ25°C
C, E, A
4
10
12
Switch On-Resistance
Flatness (Note 4)
ꢀ
CC
= 5ꢀ; ꢀ = -5ꢀ; I , I , I = 1mA;
EE X Y Z
R
FLAT(ON)
ꢀ , ꢀ , ꢀ = 3ꢀ, 0ꢀ, -3ꢀ
X
Y
Z
I
I
I
,
,
X_(OFF)
Y_(OFF)
ꢂ25°C
C, E, A
-1
1
X_, Y_, Z_ Off Leakage
(Note 5)
ꢀ
ꢀ
= 5.5ꢀ; ꢀ = -5.5ꢀ;
EE
CC
nA
, ꢀ , ꢀ
= 4.5ꢀ; ꢀ , ꢀ , ꢀ = 4.5ꢀ
X_ Y_ Z_
X Y Z
-10
10
Z_(OFF)
ꢂ25°C
C, E, A
ꢂ25°C
C, E, A
ꢂ25°C
C, E, A
ꢂ25°C
C, E, A
-2
-100
-1
2
100
1
MAX4581
I
,
,
ꢀ
= 5.5ꢀ; ꢀ = -5.5ꢀ;
CC EE
X(OFF)
X, Y, Z Off Leakage
(Note 5)
I
ꢀ
, ꢀ , ꢀ
=
4.5ꢀ;
nA
nA
Y(OFF)
X_ Y_ Z_
MAX4582
MAX4583
I
ꢀ , ꢀ , ꢀ = 4.5ꢀ
X
Z(OFF)
Y
Z
-50
-2
50
2
MAX4581
I
I
,
,
X(ON)
Y(ON)
-100
-1
100
1
X, Y, Z On Leakage
(Note 5)
ꢀ
CC
= 5.5ꢀ; ꢀ = -5.5ꢀ;
EE
ꢀ , ꢀ , ꢀ = 4.5ꢀ
X
Y
Z
MAX4582
MAX4583
I
Z(ON)
-50
50
DIGITAL I/O
Logic Input Logic
Threshold High
ꢀ
, ꢀ
,
AH BH
C, E, A
C, E, A
1.5
1.5
2.4
ꢀ
ꢀ
ꢀ
CH
Logic Input Logic
Threshold Low
ꢀ
, ꢀ
,
AL BL
0.8
ꢀ
CL
2
_______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)
(ꢀ
= 4.5ꢀ to 5.5ꢀ, ꢀ = -4.5ꢀ to -5.5ꢀ, ꢀ = 2.4ꢀ, ꢀ = 0.8ꢀ, T = T
= ꢂ25°C.)
to T
, unless otherwise noted. Typical values are at
MAX
CC
EE
_H
_L
A
MIN
T
A
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
, I
CONDITIONS
ꢀ , ꢀ , ꢀ = 2.4ꢀ
TEMP
C, E, A
C, E, A
UNITS
µA
I
,
AH BH
Input Current High
Input Current Low
-1
-1
1
1
A
B
C
I
CH
I , I
AL BL
,
ꢀ , ꢀ , ꢀ = 0.8ꢀ
µA
A
B
C
I
CL
SWITCH DYNAMIC CHARACTERISTICS
T = ꢂ25°C
A
100
40
200
200
100
150
200
200
ꢀ
, ꢀ , ꢀ = 3ꢀ; R = 300Ω; C = 35pF;
X_ Y_ Z_
L
L
Inhibit Turn-On Time
Inhibit Turn-Off Time
Address Transition Time
t
ns
ns
ns
(ON)
Figure 3
C, E, A
= ꢂ25°C
T
A
ꢀ
, ꢀ , ꢀ = 3ꢀ; R = 300Ω; C = 35pF;
X_ Y_ Z_
L
L
t
(OFF)
Figure 3
C, E, A
= ꢂ25°C
T
A
90
ꢀ
, ꢀ , ꢀ
=
3ꢀ; R = 300Ω; C = 35pF;
X_ Y_ Z_
L
L
t
TRANS
Figure 2
C, E, A
ꢀ
, ꢀ , ꢀ = 3ꢀ; R = 300Ω; C = 35pF;
X_ Y_ Z_
L
L
Break-Before-Make Time
Charge Injection (Note ꢁ)
t
T
= ꢂ25°C
4
20
ns
BBM
A
A
Figure 4
Q
C = 1nF, R = 0Ω, ꢀ = 0ꢀ
T
= ꢂ25°C
= ꢂ25°C
0.5
5
pC
S
S
C
C
C
,
,
X_(OFF)
Y_(OFF)
Z_(OFF)
Input Off Capacitance
Output Off Capacitance
ꢀ
ꢀ
, ꢀ , ꢀ = 0ꢀ; f = 1MHz; Figure 7
T
A
T
A
T
A
4
pF
pF
pF
X_ Y_ Z_
MAX4581
MAX4582
MAX4583
MAX4581
MAX4582
MAX4583
18
10
C
C
,
,
X(OFF)
Y(OFF)
, ꢀ , ꢀ = 0ꢀ; f = 1MHz;
X_ Y_ Z_
= ꢂ25°C
= ꢂ25°C
Figure 7
C
Z(OFF)
ꢁ
25
C
C
,
,
X(ON)
Y(ON)
ꢀ
, ꢀ , ꢀ = 0ꢀ; f = 1MHz;
X_ Y_ Z_
Output On Capacitance
Off Isolation
17
Figure 7
C
Z(ON)
12.5
-73
-9ꢁ
-73
ꢀ
R = 50Ω, f = 1MHz, Figure ꢁ
T
A
T
A
T
A
= ꢂ25°C
= ꢂ25°C
= ꢂ25°C
dB
pF
ISO
L
MAX4582
MAX4583
Channel-to-Channel
Crosstalk
ꢀ
R = 50Ω, f = 1MHz, Figure ꢁ
L
CT
Total Harmonic
Distortion
THD
R = ꢁ00Ω, 5ꢀp-p, f = 20Hz to 20kHz
L
T
A
= ꢂ25°C
0.02
%
POWER SUPPLY
Power-Supply Range
ꢀ
I
, ꢀ
C, E, A
= ꢂ25°C
2
-1
ꢁ
1
ꢀ
CC EE
T
A
ꢀ
= 5.5ꢀ, ꢀ = -5.5ꢀ,
CC
EE
Power-Supply Current
, I
CC EE
µA
ꢀ , ꢀ , ꢀ , ꢀ = ꢀꢂ or 0
A
B
C
Enable
C, E, A
-10
10
Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 3: ∆R = R - R
.
ON(MIN)
ON
ON(MAX)
Note 4: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified
analog signal ranges; i.e., ꢀ , ꢀ , ꢀ = 3ꢀ to 0 and 0 to -3ꢀ.
X_ Y_ Z_
Note 5: Leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at T = ꢂ25°C.
A
Note 6: Guaranteed by design, not production tested.
_______________________________________________________________________________________
3
Low-Voltage, CMOS Analog
Multiplexers/Switches
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(ꢀ
= 4.5ꢀ to 5.5ꢀ, ꢀ = 0ꢀ, ꢀ = 2.4ꢀ, ꢀ = 0.8ꢀ, T = T
to T
, unless otherwise noted. Typical values are at T = ꢂ25°C.)
MAX A
CC
EE
_H
_L
A
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
ANALOG SWITCH
SYMBOL
CONDITIONS
TEMP
UNITS
ꢀ
, ꢀ , ꢀ ,
X_ Y_ Z_
Analog-Signal Range
Switch On-Resistance
C, E, A
ꢀ
ꢀ
ꢀ
EE
CC
ꢀ , ꢀ , ꢀ
X
Y
Z
T
A
= ꢂ25°C
90
2
150
200
ꢀ
= 4.5ꢀ; I , I , I = 1mA;
X Y Z
CC
Ω
R
ON
ꢀ , ꢀ , ꢀ = 3.5ꢀ
X
Y
Z
C, E, A
Switch On-Resistance
Match Between
Channels (Note 3)
T
A
= ꢂ25°C
8
10
1
ꢀ
CC
= 4.5ꢀ; I , I , I = 1mA;
X Y Z
∆R
Ω
ON
ꢀ , ꢀ , ꢀ = 3.5ꢀ
X
Y
Z
C, E, A
= ꢂ25°C
I
I
I
,
,
X_(OFF)
Y_(OFF)
T
A
-1
X_, Y_, Z_ Off
Leakage (Note 5)
ꢀ
CC
= 5.5ꢀ; ꢀ , ꢀ , ꢀ = 1ꢀ, 4.5ꢀ;
X_ Y_ Z_
nA
ꢀ , ꢀ , ꢀ = 4.5ꢀ, 1ꢀ
X
Y
Z
C, E, A
= ꢂ25°C
-10
10
Z_(OFF)
T
A
-2
-100
-1
-50
-2
-100
-1
-50
2
100
1
50
2
100
1
50
MAX4581
I
I
,
,
ꢀ = 5.5ꢀ;
CC
X(OFF)
Y(OFF)
C, E, A
= ꢂ25°C
X, Y, Z Off Leakage
(Note 5)
ꢀ
, ꢀ , ꢀ = 1ꢀ, 4.5ꢀ;
nA
nA
X_ Y_ Z_
T
A
MAX4582
MAX4583
I
ꢀ , ꢀ , ꢀ = 4.5ꢀ, 1ꢀ
X
Z(OFF)
Y
Z
C, E, A
= ꢂ25°C
T
A
MAX4581
I
I
,
,
X(ON)
Y(ON)
C, E, A
T = ꢂ25°C
A
X, Y, Z On Leakage
(Note 5)
ꢀ
CC
= 5.5ꢀ;
ꢀ , ꢀ , ꢀ = 4.5ꢀ, 1ꢀ
X
Y
Z
MAX4582
MAX4583
I
Z(ON)
C, E, A
DIGITAL I/O
Logic Input Logic
Threshold High
ꢀ
, ꢀ , ꢀ
,
AH BH CH
C, E, A
C, E, A
C, E, A
C, E, A
1.5
1.5
2.4
ꢀ
ꢀ
ꢀ
EnableH
Logic Input Logic
Threshold Low
ꢀ
, ꢀ , ꢀ
,
AL BL CL
0.8
-1
ꢀ
EnableL
I
, I , I
,
AH BH CH
Input Current High
Input Current Low
ꢀ
ꢀ
, ꢀ , ꢀ , ꢀ
= 2.4ꢀ
= 0.8ꢀ
1
1
µA
µA
AL BL CL EnableL
I
EnableH
I
, I , I
,
AL BL CL
, ꢀ , ꢀ , ꢀ
AL BL CL EnableL
-1
I
EnableL
SWITCH DYNAMIC CHARACTERISTICS
Charge Injection (Note ꢁ)
Q
C = 1nF, R = 0Ω, ꢀ = 2.5ꢀ
T
T
= ꢂ25°C
0.8
100
5
pC
ns
S
S
A
= ꢂ25°C
200
250
100
150
200
250
ꢀ
, ꢀ , ꢀ = 3ꢀ, R = 300Ω, C = 35pF,
L L
A
X_ Y_ Z_
Enable Turn-On Time
t
(ON)
Figure 3
C, E, A
= ꢂ25°C
T
A
40
80
ꢀ
, ꢀ , ꢀ = 3ꢀ, R = 300Ω, C = 35pF,
X_ Y_ Z_
L
L
Enable Turn-Off Time
t
ns
ns
ns
(OFF)
Figure 3
C, E, A
= ꢂ25°C
T
A
Address Transition
Time
ꢀ
, ꢀ , ꢀ = 3ꢀ/0ꢀ, R = 300Ω,
X_ Y_ Z_
L
L
t
TRANS
C = 35pF, Figure 2
C, E, A
Break-Before-Make
Time
ꢀ
, ꢀ , ꢀ = 3ꢀ, R = 300Ω, C = 35pF,
L L
X_ Y_ Z_
t
T
A
= ꢂ25°C
10
30
BBM
Figure 4
Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 3: ∆R = R - R
.
ON(MIN)
ON
ON(MAX)
Note 4: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the specified
analog signal ranges; i.e., ꢀ , ꢀ , ꢀ = 3ꢀ to 0 and 0 to -3ꢀ.
X_ Y_ Z_
Note 5: Leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at T = ꢂ25°C.
A
Note 6: Guaranteed by design, not production tested.
4
_______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(ꢀ
= 2.7ꢀ to 3.ꢁꢀ, ꢀ = 0ꢀ, ꢀ = 2.0ꢀ, ꢀ = 0.5ꢀ, T = T
to T
, unless otherwise noted. Typical values are at T = ꢂ25°C.)
MAX A
CC
EE
_H
_L
A
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
TEMP
UNITS
POWER SUPPLY
Power-Supply Range
ꢀ
I
, ꢀ
C, E, A
= ꢂ25°C
2
-1
-10
12
1
10
ꢀ
CC EE
T
ꢀ
= 3.ꢁꢀ;
A
CC
Power-Supply Current
, I
CC EE
µA
ꢀ , ꢀ , ꢀ , ꢀ
A
= ꢀꢂ or 0
B
C
Enable
C, E, A
ANALOG SWITCH
ꢀ
, ꢀ , ꢀ ,
X_ Y_ Z_
Analog-Signal Range
C, E, A
ꢀ
EE
ꢀ
CC
ꢀ
ꢀ , ꢀ , ꢀ
X
Y
Z
T
= ꢂ25°C
190
450
550
ꢀ
= 2.7ꢀ; I , I , I = 0.1mA;
X Y Z
A
CC
Ω
Switch On-Resistance
R
ON
ꢀ , ꢀ , ꢀ = 1.5ꢀ
X
Y
Z
C, E, A
I
I
I
,
,
X_(OFF)
Y_(OFF)
T
= ꢂ25°C
-1
1
A
X_, Y_, Z_ Off Leakage
(Note 5)
ꢀ
= 3.ꢁꢀ; ꢀ , ꢀ , ꢀ = 1ꢀ, 3ꢀ;
X_ Y_ Z_
CC
nA
nA
ꢀ , ꢀ , ꢀ = 3ꢀ, 1ꢀ
X
Y
Z
C, E, A
= ꢂ25°C
-10
10
Z_(OFF)
T
A
-2
-100
-1
-50
-2
-100
-1
-50
2
100
1
50
2
100
1
50
MAX4581
I
I
,
,
ꢀ = 3.ꢁꢀ;
CC
X(OFF)
Y(OFF)
C, E, A
= ꢂ25°C
X, Y, Z Off Leakage
(Note ꢁ)
ꢀ
, ꢀ , ꢀ = 1ꢀ, 3.0ꢀ;
X_ Y_ Z_
T
A
MAX4582
MAX4583
I
ꢀ , ꢀ , ꢀ = 3.0ꢀ, 1ꢀ
X
Z(OFF)
Y
Z
C, E, A
= ꢂ25°C
T
A
MAX4581
I
,
,
X(ON)
C, E, A
T = ꢂ25°C
A
C, E, A
X, Y, Z On Leakage
(Note ꢁ)
ꢀ
CC
= 3.ꢁꢀ;
I
nA
Y(ON)
ꢀ , ꢀ , ꢀ = 3.0ꢀ, 1ꢀ
X
Y
Z
MAX4582
MAX4583
I
Z(ON)
DIGITAL I/O
Logic Input Logic
Threshold High
ꢀ
, ꢀ , ꢀ
,
AH BH CH
C, E, A
C, E, A
C, E, A
C, E, A
1.0
1.0
2.0
ꢀ
ꢀ
ꢀ
EnableH
Logic Input Logic
Threshold Low
ꢀ
, ꢀ , ꢀ
,
AL BL CL
0.5
-1
ꢀ
EnableL
I
, I , I
,
AH BH CH
Input Current High
Input Current Low
ꢀ , ꢀ , ꢀ = ꢀ
= 2.0ꢀ
= 0.5ꢀ
1
1
µA
µA
A
B
C
Enable
I
EnableH
I
, I , I
,
AL BL CL
ꢀ , ꢀ , ꢀ = ꢀ
-1
A
B
C
Enable
I
EnableL
(Note ꢁ)
SWITCH DYNAMIC CHARACTERISTICS
T
= ꢂ25°C
170
50
300
400
200
300
300
400
ꢀ
, ꢀ , ꢀ = 1.5ꢀ; R = 300Ω;
L
A
X_ Y_ Z_
Enable Turn-On Time
t
ns
ns
(ON)
C = 35pF; Figure 3
L
C, E, A
= ꢂ25°C
T
A
ꢀ
, ꢀ , ꢀ = 1.5ꢀ; R = 300Ω;
L
X_ Y_ Z_
L
Enable Turn-Off Time
t
(OFF)
C = 35pF; Figure 3
C, E, A
= ꢂ25°C
T
A
130
40
Address Transition
Time
ꢀ
, ꢀ , ꢀ = 1.5ꢀ/0ꢀ; R = 300Ω;
L
X_ Y_ Z_
L
t
ns
ns
TRANS
C = 35pF; Figure 2
C, E, A
Break-Before-Make Time
t
ꢀ
, ꢀ , ꢀ = 1.5ꢀ; R = 300Ω; C = 35pF
T
A
= ꢂ25°C
15
BBM
X_ Y_ Z_
L
L
POWER SUPPLY
T
= ꢂ25°C
-1
-10
1
10
ꢀ
= 3.ꢁꢀ,
CC
A
Power-Supply Current
I , I
CC EE
µA
ꢀ , ꢀ , ꢀ , ꢀ
A
= ꢀꢂ or 0
B
C
Enable
C, E, A
Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 5: Leakage parameters are 100% tested at maximum-rated hot operating temperature, and guaranteed by correlation at T = ꢂ25°C.
A
Note 6: Guaranteed by design, not production tested.
_______________________________________________________________________________________
5
Low-Voltage, CMOS Analog
Multiplexers/Switches
Typical Operating Characteristics
(ꢀ
= 5ꢀ, ꢀ = -5ꢀ, GND = 0ꢀ, T = ꢂ25°C, unless otherwise noted.)
EE A
CC
ON-RESISTANCE
vs. V , V , V AND TEMPERATURE
ON-RESISTANCE vs. V , V , V
ON-RESISTANCE vs. V , V , V
X
Y
Z
X
Y
Z
X
Y
Z
(SINGLE SUPPLY)
(DUAL SUPPLIES)
(DUAL SUPPLIES)
10,000
1000
65
55
45
35
25
15
5
T
= +85°C
A
V
= 1.2V,
= -1.2V
V
= 1.2V
CC
CC
V
EE
V
= 2V
CC
V
= 2.7V,
= -2.7V
T = +70°C
A
CC
1000
100
V
EE
V
= 2V,
= -2V
V
= 2.7V
CC
CC
V
EE
V
= 3.3V
CC
100
V
CC
= 5V
T
= +25°C
A
V
= 7.5V
CC
V
T
= -40°C
T
1
= 0°C
A
A
V
= 3.3V,
= -3.3V
CC
V
= 5V,
= -5V
CC
V
EE
V
= 10V
EE
CC
10
10
0
1
2
3
4
5
6
7
8
9
10
-5 -4 -3 -2 -1
0
2
3
4
5
-5 -4 -3 -2 -1
0
1
2
3
4
5
V , V , V (V)
V , V , V (V)
V , V , V (V)
X
Y
Z
X
Y
Z
X
Y
Z
ON-RESISTANCE
vs. V , V , V AND TEMPERATURE
OFF LEAKAGE
vs. TEMPERATURE
X
Y
Z
(SINGLE SUPPLY)
100
130
110
90
V
V
= 5.5V
CC
EE
T
= +85°C
A
T
= +70°C
A
= -5.5V
10
T
= +25°C
= -40°C
A
70
1
0.1
50
T
= 0°C
A
I , I , I
X Y Z
T
A
30
I
, I , I
X_ Y_ Z_
10
0.01
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
V , V , V (V)
-50 -25
0
25
50
75 100 125
TEMPERATURE (°C)
X
Y
Z
ON LEAKAGE
vs. TEMPERATURE
CHARGE INJECTION vs. V , V , V
X
Y
Z
100,000
10,000
1,000
1.5
1.0
V
V
= 5.5V
= -5.5V
CC
EE
0.5
0
-0.5
-1.0
-1.5
-2.0
-2.5
V
V
= 5V
= 0V
CC
EE
100
10
V
V
= 5V
CC
EE
= -5V
1
-50 -25
0
25
50
75 100 125
-5 -4 -3 -2 -1
0
1
2
3
4
5
TEMPERATURE (°C)
V , V , V (V)
X
Y
Z
6
_______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
Typical Operating Characteristics (continued)
(ꢀ
= 5ꢀ, ꢀ = -5ꢀ, GND = 0ꢀ, T = ꢂ25°C, unless otherwise noted.)
CC
EE
A
SUPPLY CURRENT
vs. TEMPERATURE
FREQUENCY RESPONSE
MAX4581-09
100
0
-10
-20
-30
-40
-50
-60
120
100
80
60
40
20
0
V
V
A
= 5V
CC
EE
ON LOSS
= -5V
V , V ,V ,V = 0V, 5V
B C Enable
10
1
I
OFF LOSS
CC
I
EE
-70
-80
-20
-40
ON PHASE
0.1
0.01
-90
-60
-80
-100
-110
-120
-110
-120
-50 -25
0
25
50
75 100 125
0.1
1
10
100
TEMPERATURE (°C)
FREQUENCY (MHz)
V
CURRENT vs. LOGIC LEVEL
TOTAL HARMONIC DISTORTION
vs. FREQUENCY
CC
(V , V , V , V
)
A
B
C
Enable
100
10
1
-1
600Ω IN AND OUT
10
-2
10
-3
V
= 12V
CC
10
-4
10
-5
10
1
0.1
-6
10
V
= 5V
CC
-7
10
-8
10
-9
10
-10
10
-11
10
0.01
0
1
2
3
4
5
6
7
8
9 10 11 12
10
100
1k
10k
100k
V , V , V , V
FREQUENCY (Hz)
A
B
C
Enable
LOGIC-LEVEL THRESHOLD vs. V
CC
3.0
2.5
2.0
1.5
1.0
0.5
0
0
1
2
3
4
5
6
7
8
9 10 11 12
V
(V)
CC
_______________________________________________________________________________________
7
Low-Voltage, CMOS Analog
Multiplexers/Switches
Pin Description
PIN
MAX4581
MAX4582
MAX4583
NAME
FUNCTION
DIP, SO,
DIP, SO,
DIP, SO,
QFN
QFN
QFN
TSSOP
TSSOP
TSSOP
11, 12,
13, 10,
15, 3,
16, 2
13, 14,
15, 12,
1, 5, 2, 4
—
—
—
—
X0–X7
Analog Switch Inputs 0–7
3
1
13
11
14
12
X
Analog Switch “X” Output
12, 14,
15, 11
10, 12,
13, 9
X0, X1,
X2, X3
—
—
—
—
Analog Switch “X” Inputs 0–3
1, 5, 2,
4
15, 3,
16, 2
Y0, Y1,
Y2, Y3
—
—
—
—
Analog Switch “Y” Inputs 0–3
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
3
1
15
13
12
1
13
11
10
15
16
1
Y
Analog Switch “Y” Output
—
—
—
—
—
—
—
—
—
—
—
—
—
—
X1
X0
Y1
Y0
Z1
Z0
Z
Analog Switch “X” Normally Open Input
Analog Switch “X” Normally Closed Input
Analog Switch “Y” Normally Open Input
Analog Switch “Y” Normally Open Input
Analog Switch “Z” Normally Open Input
Analog Switch “Z” Normally Open Input
Analog Switch “Z” Output
2
3
5
3
4
2
Positive Analog and Digital Supply-Voltage
Input
16
14
16
14
16
14
V
CC
11
10
9
9
8
7
10
9
8
7
11
10
9
9
8
7
A
B
Digital Address “A” Input
Digital Address “B” Input
Digital Address “C” Input
—
—
C
Ground. Connect to digital ground. (Analog
signals have no ground reference; they are
8
6
8
6
8
6
GND
limited to V
and V .)
EE
CC
Negative Analog Supply-Voltage Input.
Connect to GND for
single-supply operation.
7
6
5
4
7
6
5
4
7
6
5
4
V
EE
Digital Enable Input. Normally connected to
GND.
Enable
Note: Input and output pins are identical and interchangeable. Any may be considered an input or output; signals pass equally well
in both directions.
supply pins: ꢀ , ꢀ , and GND. ꢀ
and ꢀ are used
EE
CC EE
CC
__________Applications Information
to drive the internal CMOS switches and set the limits of
the analog voltage on any switch. Reverse ESD-
protection diodes are internally connected between
Power-Supply Considerations
Overview
The MAX4581/MAX4582/MAX4583 construction is typi-
cal of most CMOS analog switches. They have three
each analog-signal pin and both ꢀ
and ꢀ . If any
EE
CC
analog signal exceeds ꢀ
or ꢀ , one of these diodes
CC
EE
8
_______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
Table 1. Truth Table/Switch Programming
SELECT INPUTS
ON SWITCHES
MAX4582
ENABLE
INPUT
C*
B
A
MAX4581
MAX4583
H
L
X
X
X
All switches open
All switches open
All switches open
X–X0,
Y–Y0,
Z–Z0
X–X0,
Y–Y0
L
L
L
L
L
H
L
X–X0
X–X1
X–X2
X–X3
X–X4
X–X5
X–X6
X–X7
X–X1,
Y–Y0,
Z–Z0
X–X1,
Y–Y1
L
L
L
L
L
L
X–X0,
Y–Y1,
Z–Z0
X–X2,
Y–Y2
L
H
H
L
X–X1,
Y–Y1,
Z–Z0
X–X3,
Y–Y3
L
H
L
X–X0,
Y–Y0,
Z–Z1
X–X0,
Y–Y0
H
H
H
H
X–X1,
Y–Y0,
Z–Z1
X–X1,
Y–Y1
L
H
L
X–X0,
Y–Y1,
Z–Z1
X–X2,
Y–Y2
H
H
X–X1,
Y–Y1,
Z–Z1
X–X3,
Y–Y3
L
H
X = Don’t care
*C not present on MAX4582.
Note: Input and output pins are identical and interchangeable. Either may be considered an input or output; signals pass equally
well in either direction.
will conduct. During normal operation, these and other
reverse-biased ESD diodes leak, forming the only cur-
show leakage currents of either the same or opposite
polarity.
rent drawn from V
or V
.
CC
EE
There is no connection between the analog-signal
paths and GND.
Virtually all the analog leakage current comes from the
ESD diodes. Although the ESD diodes on a given sig-
nal pin are identical and therefore fairly well balanced,
they are reverse biased differently. Each is biased by
V
and GND power the internal logic and logic-level
CC
translators, and set the input logic limits. The logic-level
translators convert the logic levels into switched V
CC
either V
or V and the analog signal. This means
EE
CC
and V
signals to drive the gates of the analog sig-
EE
their leakages will vary as the signal varies. The differ-
ence in the two diode leakages to the V and V
nals. This drive signal is the only connection between
CC
EE
the logic supplies and signals and the analog supplies.
pins constitutes the analog-signal-path leakage current.
All analog leakage current flows between each pin and
one of the supply terminals, not to the other switch ter-
minal. This is why both sides of a given switch can
V
CC
and V have ESD-protection diodes to GND.
EE
The logic-level thresholds are TTL/CMOS compatible
when V is +5V. As V rises, the threshold increases
CC
CC
_______________________________________________________________________________________
9
Low-Voltage, CMOS Analog
Multiplexers/Switches
slightly, so when V
reaches +12V the threshold is
CC
about 3.1V (above the TTL-guaranteed high-level mini-
V
mum of 2.8V, but still compatible with CMOS outputs).
CC
D1
EXTERNAL
BLOCKING DIODE
Bipolar Supplies
These devices operate with bipolar supplies between
MAX4581
MAX4582
MAX4583
2V and 5V. The V
and V supplies need not be
EE
symmetrical, but their sum cannot exceed the +13V
CC
V
V
CC
absolute maximum rating
*
*
*
Single Supply
X, Y, Z
X_, Y_, Z_
These devices operate from a single supply between
*
+2V and +12V when V is connected to GND. All of
EE
the bipolar precautions must be observed. At room
temperature, they actually “work” with a single supply
near or below +1.7V, although as supply voltage
decreases, switch on-resistance and switching times
become very high.
EE
D2
EXTERNAL
BLOCKING DIODE
Overvoltage Protection
Proper power-supply sequencing is recommended for
all CMOS devices. Do not exceed the absolute maxi-
mum ratings because stresses beyond the listed rat-
ings can cause permanent damage to the devices.
V
EE
*INTERNAL PROTECTION DIODES
Always sequence V
on first, then V , followed by
EE
CC
Figure 1. Overvoltage Protection Using External Blocking
Diodes
the logic inputs and analog signals. If power-supply
sequencing is not possible, add two small signal diodes
(D1, D2) in series with the supply pins for overvoltage
protection (Figure 1).
peaks which are highly layout dependent. The problem
is not turning the switch on, but turning it off. The off-
state switch acts like a capacitor and passes higher
frequencies with less attenuation. At 10MHz, off isola-
tion is about -50dB in 50Ω systems, becoming worse
(approximately 20dB per decade) as frequency in-
creases. Higher circuit impedances also degrade off
isolation. Adjacent channel attenuation is about 3dB
above that of a bare IC socket and is entirely due to
capacitive coupling.
Adding diodes reduces the analog-signal range to one
diode drop below V
and one diode drop above V
,
CC
EE
but does not affect the devices’ low switch resistance
and low leakage characteristics. Device operation is
unchanged, and the difference between V
and V
EE
CC
should not exceed 13V. These protection diodes are
not recommended when using a single supply if signal
levels must extend to ground.
Pin Nomenclature
The MAX4581/MAX4582/MAX4583 are pin-compatible
with the industry-standard 74HC4051/74HC4052/
74HC4053 and the MAX4051/MAX4052/MAX4053.
High-Frequency Performance
In 50Ω systems, signal response is reasonably flat up
to 50MHz (see Typical Operating Characteristics).
Above 20MHz, the on response has several minor
10 ______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
______________________________________________Test Circuits/Timing Diagrams
V
CC
V
CC
0V
V , V , V
50%
A
B
C
V , V , V
V
A
B
C
CC
X0
A
B
C
V
V
CC
X1–X6
50Ω
V
X0
90%
X7
X
EE
MAX4581
V
OUT
Enable
0V
V
GND
90%
V
OUT
EE
35pF
35pF
35pF
V
X7
t
300Ω
V
EE
t
TRANS
TRANS
V
CC
V
CC
0V
50%
V , V
A
B
V , V
V
CC
A
B
X , Y
A
B
0
0
V
V
CC
EE
X1, X2, Y1, Y2
50Ω
V
,
X0
V
Y0
90%
MAX4582
X3, Y3
X, Y
Enable
0V
V
OUT
GND
V
OUT
V
90%
EE
V
,
Y3
X3
V
300Ω
V
EE
t
t
TRANS
TRANS
V
CC
V
CC
0V
V
CC
V , V , V
50%
A
B
C
V , V , V
A
B
C
X1, Y1, Z1
A, B, C
Enable
V
V
EE
V
V
,
,
X0
Y0
50Ω
MAX4583
V
Z0
90%
X2, Y2, Z2
CC
X, Y, Z
0V
V
OUT
GND
90%
V
V
OUT
EE
V
V
,
,
X1
Y1
300Ω
V
Z1
V
EE
t
t
TRANS
TRANS
V
= 0V FOR SINGLE-SUPPLY OPERATION.
EE
TEST EACH SECTION INDIVIDUALLY.
Figure 2. Address Transition Times
______________________________________________________________________________________ 11
Low-Voltage, CMOS Analog
Multiplexers/Switches
_________________________________Test Circuits/Timing Diagrams (continued)
V
CC
V
CC
0V
V
50%
Enable
V
CC
X0
A
B
C
V
CC
X1–X7
V
X0
90%
MAX4581
V
Enable
V
OUT
V
OUT
Enable
X
90%
GND
V
EE
35pF
50Ω
50Ω
50Ω
0V
300Ω
V
EE
t
t
OFF
ON
V
CC
V
CC
0V
50%
V
Enable
V
CC
X0, Y0
A
B
V
CC
X1–X3, Y1–Y3
V
,
Y0
X0
V
90%
MAX4582
V
Enable
Enable
X, Y
V
OUT
V
GND
90%
V
OUT
EE
35pF
0V
300Ω
V
EE
t
t
OFF
ON
V
CC
V
CC
0V
V
50%
Enable
V
CC
X1, Y1, Z1
A
B
C
V
V
CC
EE
V
V
,
,
Z0
X0
Y0
V
MAX4583
X0, Y0, Z0
90%
V
Enable
Enable
X, Y, Z
V
OUT
V
OUT
GND
V
90%
EE
35pF
V
V
,
,
Z1
X1
Y1
V
300Ω
V
EE
t
t
OFF
ON
V
= 0V FOR SINGLE-SUPPLY OPERATION.
EE
TEST EACH SECTION INDIVIDUALLY.
Figure 3. Inhibit Switching Times
12 ______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
_________________________________Test Circuits/Timing Diagrams (continued)
V
V
CC
CC
V , V , V
V , V
A
B
C
V
CC
V
CC
A
B
X0–X7
X0–X3,
Y0–Y3
A
B
C
A
B
V
V
CC
CC
50Ω
50Ω
MAX4582
MAX4581
V
OUT
Enable
Enable
X
X, Y
V
EE
V
OUT
GND
GND
V
EE
35pF
35pF
300Ω
300Ω
V
V
EE
EE
V
CC
t < 20ns
F
R
V , V , V
V
V+
0V
A
B
C
CC
t < 20ns
V , V , V
C
50%
A
B
X0, X1, Y0,
Y1, Z0, Z1
A, B, C
Enable
V
CC
50Ω
V , V , V
X
Y
Z
MAX4583
80%
X, Y, Z
V
OUT
GND
V
EE
35pF
V
OUT
300Ω
V
EE
0V
V
= 0V FOR SINGLE-SUPPLY OPERATION.
EE
t
BBM
TEST EACH SECTION INDIVIDUALLY.
Figure 4. Break-Before-Make Interval
V
CC
V
CC
V
CC
V
Enable
X_, Y_, Z_
A
B
C
0V
CHANNEL
SELECT
MAX4581
MAX4582
MAX4583
∆ V
V
OUT
OUT
V
Enable
V
OUT
Enable
X, Y, Z
GND
V
V
EE
C = 1000pF
L
50Ω
∆ V
IS THE MEASURED VOLTAGE DUE TO CHARGE
OUT
EE
TRANSFER ERROR Q WHEN THE CHANNEL TURNS OFF.
V
= 0V FOR SINGLE-SUPPLY OPERATION.
EE
Q = ∆ V
X C
L
OUT
TEST EACH SECTION INDIVIDUALLY.
Figure 5. Charge Injection
______________________________________________________________________________________ 13
Low-Voltage, CMOS Analog
Multiplexers/Switches
_________________________________Test Circuits/Timing Diagrams (continued)
V
10nF
CC
NETWORK
ANALYZER
V
V
IN
50Ω
50Ω
OUT
V
CC
OFF ISOLATION = 20log
V
X_, Y_, Z_
A
B
C
IN
CHANNEL
SELECT
V
MAX4581
MAX4582
MAX4583
OUT
ON LOSS = 20log
V
IN
V
OUT
MEAS.
REF.
Enable
X, Y, Z
V
OUT
CROSSTALK = 20log
GND
V
EE
V
IN
50Ω
50Ω
10nF
V
EE
MEASUREMENTS ARE STANDARDIZED AGAINST SHORT AT SOCKET TERMINALS.
OFF ISOLATION IS MEASURED BETWEEN COM AND "OFF" NO TERMINAL ON EACH SWITCH.
ON LOSS IS MEASURED BETWEEN COM AND "ON" NO TERMINAL ON EACH SWITCH.
CROSSTALK (MAX4582/MAX4583) IS MEASURED FROM ONE CHANNEL (A, B, C) TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 6. Off Isolation, On Loss, and Crosstalk
V
CC
V
CC
X_, Y_, Z_
A
B
C
CHANNEL
SELECT
MAX4581
MAX4582
MAX4583
1MHz
Enable
X, Y, Z
CAPACITANCE
ANALYZER
GND
V
EE
V
EE
Figure 7. Capacitance
14 ______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
Ordering Information (continued)
PART
TEMP. RANGE
0°C to +70°C
PIN-PACKAGE
16 QSOP
PART
TEMP. RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +125°C
-40°C to +125°C
0°C to +70°C
PIN-PACKAGE
16 TSSOP
16 QSOP
MAX4581CEE
MAX4581C/D
MAX4581EPE
MAX4581ESE
MAX4581EUE
MAX4581EEE
MAX4581EGE
MAX4581ASE
MAX4581AUE
MAX4582CPE
MAX4582CSE
MAX4582CUE
MAX4582CEE
MAX4582C/D
MAX4582EPE
MAX4582ESE
MAX4582EUE
MAX4582EEE
MAX4582EGE
MAX4582ASE
MAX4582AUE
MAX4583CPE
MAX4583CSE
MAX4583CUE
MAX4583CEE
MAX4583C/D
MAX4583EPE
MAX4583ESE
MAX4583EUE
MAX4583EEE
MAX4583EGE
MAX4583ASE
MAX4583AUE
0°C to +70°C
Dice*
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +125°C
-40°C to +125°C
0°C to +70°C
16 Plastic DIP
16 Narrow SO
16 TSSOP
16 QFN
16 Narrow SO
16 TSSOP
16 Plastic DIP
16 Narrow SO
16 TSSOP
16 QSOP
16 QSOP
16 QFN
0°C to +70°C
16 Narrow SO
16 TSSOP
0°C to +70°C
0°C to +70°C
16 Plastic DIP
16 Narrow SO
16 TSSOP
0°C to +70°C
Dice*
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
-40°C to +125°C
-40°C to +125°C
16 Plastic DIP
16 Narrow SO
16 TSSOP
16 QSOP
0°C to +70°C
0°C to +70°C
16 QSOP
0°C to +70°C
Dice*
-40°C to +85°C
-40°C to +85°C
16 Plastic DIP
16 Narrow SO
16 QFN
16 Narrow SO
16 TSSOP
*Contact factory for availability.
__________________________________________________________Chip Topographies
MAX4581
MAX4582
X6 X4
V
CC
X2
Y2 Y0
V
CC
X2
X1
X1
X
X
Y
N.C.
X7
Y3
X0
X3
X0
X3
X5
Y1
0.069"
(1.75mm)
0.069"
(1.75mm)
A
A
Enable
Enable
V
GND
0.053"
(1.35mm)
B
N.C.
EE
V
GND
0.053"
(1.35mm)
C
B
EE
N.C. = NO CONNECTION
TRANSISTOR COUNT: 219
SUBSTRATE CONNECTED TO V+.
TRANSISTOR COUNT: 219
SUBSTRATE CONNECTED TO V+.
______________________________________________________________________________________ 15
Low-Voltage, CMOS Analog
Multiplexers/Switches
____Chip Topographies (continued)
MAX4583
Y0 Y1
V
Y
CC
X
Z1
Z
N.C.
X1
X0
Z0
0.069"
(1.75mm)
A
Enable
V
GND
0.053"
(1.35mm)
C
B
EE
N.C. = NO CONNECTION
TRANSISTOR COUNT: 219
SUBSTRATE CONNECTED TO V+.
16 ______________________________________________________________________________________
Low-Voltage, CMOS Analog
Multiplexers/Switches
________________________________________________________Package Information
______________________________________________________________________________________ 17
Low-Voltage, CMOS Analog
Multiplexers/Switches
___________________________________________Package Information (continued)
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
18 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600
© 2001 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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