MAX4574CWI-T [MAXIM]
Audio/Video Switch, 8 Func, 1 Channel, PDSO28, 0.300 INCH, MS-013AE, SOIC-28;
| 型号： | MAX4574CWI-T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Audio/Video Switch, 8 Func, 1 Channel, PDSO28, 0.300 INCH, MS-013AE, SOIC-28 光电二极管 |
| 文件： | 总16页 (文件大小：311K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1404; Rev 1; 4/99
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
1–MAX574
Ge n e ra l De s c rip t io n
Fe a t u re s
The MAX4571–MAX4574 s e ria l-inte rfa c e c ontrolle d
switches are ideal for multimedia applications. Each
device features 35Ω max on-resistance, -90dB audio
off-is ola tion a t 20kHz, -60d B vid e o off-is ola tion a t
1.0MHz, a nd “c lic kle s s ” mod e op e ra tion for a ud io
applications.
♦ Selectable Soft Switching Mode for “Clickless”
Audio Operation
♦ 35Ω max On-Resistance
♦ -90dB Audio Off-Isolation at 20kHz
-50dB Video Off-Isolation at 10MHz
The MAX4571/MAX4573 contain eleven SPST switches,
while the MAX4572/MAX4574 contain two SPST switch-
es and six SPDT switches. The MAX4571/MAX4572 fea-
ture a 2-wire, I2C™-compatible serial interface. The
MAX4573/MAX4574 feature a 3-wire, SPI™/QSPI™/
MICROWIRE™-c omp a tib le s e ria l inte rfa c e . All four
parts are available in 28-pin QSOP, SSOP, and wide
SO packages and operate over the commercial and
extended temperature ranges.
♦ -90dB Audio Crosstalk at 20kHz
-52dB Video Crosstalk at 10MHz
♦ Serial Interface
2
2-Wire, Fast-Mode, I C-Compatible (MAX4571/72)
3-Wire, SPI/QSPI/MICROWIRE-Compatible
(MAX4573/74)
♦ Single-Supply Operation from +2.7V to +5.25V
Ord e rin g In fo rm a t io n
Ap p lic a t io n s
PART
TEMP. RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
28 QSOP
Set-Top Boxes
Audio Systems
MAX4571CEI
MAX4571CAI
MAX4571CWI
MAX4571EEI
MAX4571EAI
MAX4571EWI
MAX4572CEI
MAX4572CAI
MAX4572CWI
MAX4572EEI
MAX4572EAI
MAX4572EWI
MAX4573CEI
MAX4573CAI
MAX4573CWI
MAX4573EEI
MAX4573EAI
MAX4573EWI
MAX4574CEI
MAX4574CAI
MAX4574CWI
MAX4574EEI
MAX4574EAI
MAX4574EWI
PC Multimedia Boards
Video Conferencing Systems
28 SSOP
28 Wide SO
28 QSOP
P in Co n fig u ra t io n s
28 SSOP
28 Wide SO
28 QSOP
TOP VIEW
28 SSOP
MAX4571/MAX4573
28 Wide SO
28 QSOP
NO1
COM1
NO2
1
2
3
4
5
6
7
8
9
28 V+
28 SSOP
27 SDA (DOUT)
26 SCL (DIN)
25 A1 (SCLK)
24 A0 (CS)
23 GND
28 Wide SO
28 QSOP
COM2
NO3
28 SSOP
28 Wide SO
28 QSOP
COM3
NO4
28 SSOP
22 NO8
28 Wide SO
28 QSOP
COM4
NO5
21 COM8
20 NO9
28 SSOP
COM5 10
NO6 11
19 COM9
18 NO10
28 Wide SO
28 QSOP
COM6 12
NO7 13
17 COM10
16 NO11
28 SSOP
28 Wide SO
COM7 14
15 COM11
2
QSOP/SSOP/SO
I C is a trademark of Philips Corp.
( ) ARE FOR MAX4573
SPI/QSPI are trademarks of Motorola, Inc.
Pin Configurations continued at end of data sheet.
MICROWIRE is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
ABSOLUTE MAXIMUM RATINGS
V+ to GND................................................................-0.3V to +6V
NO_ _, COM_, DOUT to GND (Note 1) ........-0.3V to (V+ + 0.3V)
SCL, SDA, CS, SCLK, DIN, A0, A1 to GND..............-0.3V to +6V
Continuous Current into Any Terminal..............................±10mA
Peak Current (pulsed at 1ms, 10% duty cycle)................±50mA
SSOP (derate 9.5mW/°C above +70°C) .....................762mW
Wide SO (derate 12.5mW/°C above +70°C).............1000mW
Operating Temperature Ranges
MAX457_C_ _ ....................................................0°C to +70°C
MAX457_E_ _..................................................-40°C to +85°C
Storage Temperature Range .............................-65°C to +160°C
Lead Temperature (soldering, 10sec) .............................+300°C
Continuous Power Dissipation (T = +70°C)
A
QSOP (derate 10.8mW/°C above +70°C)...................860mW
Note 1: Signals on NO_ _ or COM_ exceeding V+ or V- are clamped by internal diodes. Limit forward-diode current to maximum
current rating.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +5V ±5%, T = T
A
to T , unless otherwise noted. Typical values are at T = +25°C.) (Note 2)
MAX A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG SWITCHES
1–MAX574
V
V
_ _,
NO
Analog Signal Range (Note 3)
0
V+
V
_
COM
I
V
_ = 4mA,
_ _ = 3V,
T
= +25°C
25
0.8
35
45
3
COM
A
On-Resistance
R
Ω
ON
NO
T = T
A
to T
MAX
V+ = 4.75V
MIN
I
_ = 4mA,
T
= +25°C
COM
A
On-Resistance Match
Between Channels (Note 4)
∆R
V
_ _ = 3V,
Ω
ON
NO
T = T
to T
MAX
3
V+ = 4.75V
A
MIN
I
_ = 4mA;
T
= +25°C
2
6
COM
A
On-Resistance
Flatness (Note 5)
R
V+ = 4.75V;
_ _ = 1V, 2V, 3V
Ω
FLAT
T = T
A
to T
MAX
6
V
MIN
NO
V
_ _ = 4.5V, 1V;
T
= +25°C
-0.2
-10
0.01
0.01
0.01
0.2
10
0.2
10
0.2
10
NO
A
NO_ _ Off-Leakage
Current (Note 6)
I
_ _
V _ = 1V, 4.5V;
COM
V+ = 5.25V
nA
nA
nA
NO
(OFF)
T = T
A
to T
MAX
MIN
V
_ _ = 4.5V, 1V;
_ = 1V, 4.5V;
T
A
= +25°C
-0.2
-10
NO
COM_ Off-Leakage
Current (Note 6)
I
_
V
COM (OFF)
COM
T = T
A
to T
MAX
V+ = 5.25V
MIN
V
_ = 4.5V, 1V;
_ _ = 4.5V, 1V, or
T
A
= +25°C
-0.2
-10
COM
COM _ On-Leakage
Current (Note 6)
I
_
V
COM (ON)
NO
T = T
A
to T
MAX
floating; V+ = 5.25V
MIN
AUDIO PERFORMANCE
Total Harmonic Distortion
plus Noise
f
V
= 1kHz, R = 600Ω, V _ _ = 1V
,
IN
L
NO
RMS
THD+N
0.07
-90
%
= 2.5V
NO_ _
V
R
_ _ = 1V , f = 20kHz,
RMS IN
NO
Off-Isolation (Note 7)
V
ISO(A)
dB
dB
= 600Ω, Figure 1
L
V
R
_ _ = 1V , f = 20kHz,
RMS IN
NO
Channel-to-Channel Crosstalk
V
CT(A)
-90
= 600Ω, Figure 1
S
2
_______________________________________________________________________________________
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
1–MAX574
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
(V+ = 5V ±5%, T = T
to T , unless otherwise noted. Typical values are at T = +25°C.) (Note 2)
MAX A
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VIDEO PERFORMANCE
V
_ _ = 1V
= 50Ω, Figure 1
, f = 1.0MHz,
NO
RMS IN
Off-Isolation (Note 7)
V
-50
-52
dB
dB
ISO(V)
R
L
V
_ _ = 1V
, f = 1.0MHz,
NO
RMS IN
Channel-to-Channel Crosstalk
V
CT(V)
R
= 50Ω, Figure 1
S
-3dB Bandwidth
Off-Capacitance
BW
R
= 50Ω, R = 50Ω
>150
9
MHz
pF
SOURCE
L
C
f
IN
= 1MHz
OFF(NO)
DYNAMIC TIMING WITH CLICKLESS MODE DISABLED (Notes 8 and 12, Figure 2)
V
_ _ = 1.5V,
= 5kΩ,
= 35pF
T
= +25°C
200
75
500
700
300
400
NO
A
Turn-On Time
t
R
C
ns
ONSD
L
L
T = T
A
to T
MAX
MIN
V
_ _ = 1.5V,
= 300Ω,
= 35pF
T
A
= +25°C
NO
Turn-Off Time
t
R
C
ns
ns
OFFSD
L
L
T = T
A
to T
MAX
MIN
MAX4572/MAX4574, V _ _ = 1.5V,
NO
Break-Before-Make Time
t
10
125
BBM
T
= T to T
MIN MAX
A
DYNAMIC TIMING WITH CLICKLESS MODE ENABLED (Note 8, Figure 2)
V
T
A
_ _ = 1.5V, R = 5kΩ, C = 35pF,
L
L
= +25°C
NO
Turn-On Time
Turn-Off Time
t
8
3
ms
ms
ONSE
V
_ _ or = 1.5V, R = 300Ω, C = 35pF,
L
L
= +25°C
NO
t
OFFSE
T
A
POWER SUPPLY
Supply Voltage Range
V+
I+
T = T
to T
MAX
+2.7
+5.25
10
V
A
MIN
All logic inputs = 0 or V+,
T = T to T
Supply Current (Note 9)
6
µA
A
MIN
MAX
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = 3V ±10%, T = T
to T , unless otherwise noted. Typical values are at T = +25°C.) (Note 2)
MAX A
A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG SWITCHES
V
V
_ _,
NO
Analog Signal Range (Note 3)
On-Resistance
0
V+
V
_
COM
I
V
_ = 4mA,
_ _ =2V,
T
= +25°C
43
1
90
110
5
COM
A
R
Ω
ON
NO
V+ = 2.7V
T = T
A
to T
MIN MAX
I
_ = 4mA,
_ _ = 2V,
NO
T = +25°C
A
COM
On-Resistance Match
Between Channels (Note 4)
∆R
V
Ω
ON
V+ = 2.7V
T = T
A
to T
MAX
5
MIN
_______________________________________________________________________________________
3
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
(V+ = +3V ±10%, T = T
A
to T , unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)
MAX
MIN
PARAMETER
SYMBOL
CONDITIONS
= +25°C
MIN
TYP
MAX
UNITS
I
= 4mA;
T
A
4
10
COM_
On-Resistance
Flatness (Note 5)
R
V+ = 2.7V;
V
Ω
FLAT
= 1V, 5V, 2V
T = T
to T
MAX
10
0.2
10
NO_ _
A
MIN
V
V
= 3V, 0.5V;
T
A
= +25°C
-0.2
-10
0.01
0.01
NO_ _
NO_ _Off-Leakage
Current (Notes 6 and 10)
I
_ = 0.5V, 3V;
nA
nA
NO_ _ (OFF)
COM
V+ = 3.6V
T = T
to T
MIN MAX
A
V
V
= 3V, 0.5V;
T
A
= +25°C
-0.2
-10
0.2
10
NO_ _
COM_ Off-Leakage
Current (Notes 6 and 10)
I
_
_ = 0.5V, 3V;
COM (OFF)
COM
V+ = 3.6V
T = T
to T
MIN MAX
A
V
= 3V, 0.5V;
_ _ = 3V, 0.5V,
COM_
T
= +25°C
-0.2
-10
0.01
0.2
10
A
COM _ On-Leakage
Current (Notes 6 and 10)
V
NO
I
_
nA
COM (ON)
or floating;
V+ = 3.6V
T = T
A
to T
MAX
MIN
1–MAX574
AUDIO PERFORMANCE
Total Harmonic Distortion
plus Noise
f
V
= 1kHz, R = 600Ω, V _ = 0.5V
,
IN
L
NO
RMS
THD+N
0.07
-90
%
= 1.5V
NO_ _
V
= 0.5V , f = 20kHz, R = 600Ω,
RMS IN L
NO_ _
Off-Isolation (Note 7)
V
ISO(A)
dB
dB
Figure 1
V
= 0.5V , f = 20kHz, R = 600Ω,
RMS IN S
NO_ _
Channel-to-Channel Crosstalk
VIDEO PERFORMANCE
Off-Isolation (Note 7)
V
CT(A)
-90
Figure 1
V
= 0.5V , f = 10MHz, R = 50Ω,
RMS IN L
NO_ _
V
ISO(V)
-50
-52
dB
dB
Figure 1
V
= 0.5V , f = 10MHz, R = 50Ω,
RMS IN S
NO_ _
Channel-to-Channel Crosstalk
V
CT(V)
Figure 1
-3dB Bandwidth
Off Capacitance
BW
R
= 50Ω, R = 50Ω, C = 35pF
>150
9
MHz
pF
L
SOURCE
L
C
f
IN
= 1MHz
OFF(NO)
DYNAMIC TIMING WITH CLICKLESS MODE DISABLED (Notes 8 and 12, Figure 2)
T
= +25°C
300
100
200
900
1000
300
A
V
= 1.5V,
= 5kΩ, C = 35pF
L
NO_ _
Turn-On Time
t
ns
ONSD
R
L
T = T
A
to T
MAX
MIN
T
A
= +25°C
V
NO_ _
= 1.5V,
Turn-Off Time
t
ns
ns
OFFSD
R
L
= 300Ω, C = 35pF
L
T = T
to T
MAX
400
A
MIN
Break-Before-Make Time
t
V
NO_ _
= 1.5V, T = T
to T
MAX
10
BBM
A
MIN
DYNAMIC TIMING WITH CLICKLESS MODE ENABLED (Notes 8 and 12, Figure 2)
V
T
A
= 1.5V, R = 5kΩ, C = 35pF,
L
L
NO_ _
Turn-On Time
Turn-Off Time
t
8
3
ms
ms
ONSE
= +25°C
V
NO_ _
= 1.5V, R = 300Ω, C = 35pF,
L
L
t
OFFSE
T
A
= +25°C
4
_______________________________________________________________________________________
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
1–MAX574
I/O INTERFACE CHARACTERISTICS
(V+ = +2.7V to +5.25V, T = T
A
to T , unless otherwise noted. Typical values are at TA = +25°C.)
MAX
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS (SCLK, DIN, CS, SCL, SDA, A0, A1)
V+ = 5V
0.8
0.6
Input Low Voltage
Input High Voltage
V
V
V
IL
V+ = 3V
V+ = 5V
V+ = 3V
3
2
V
IH
Input Hysteresis
V
0.2
0.01
5
V
HYST
Input Leakage Current
Input Capacitance
I
Digital inputs = 0 or V+
-1
1
µA
pF
LEAK
C
IN
DIGITAL OUTPUTS (DOUT, SDA)
Output Low Voltage
V
I
= 6mA
0.4
V
V
OL
SINK
V+
- 0.5
DOUT Output High Voltage
V
OH
I
= 0.5mA
SOURCE
2-WIRE INTERFACE TIMING (Figure 3)
SCL Clock Frequency
f
DC
1.3
400
0.9
kHz
µs
SCL
Bus Free Time between Stop
and Start Condition
t
BUF
START Condition Hold Time
STOP Condition Setup Time
Data Hold Time
t
t
0.6
0.6
0
µs
µs
µs
ns
µs
µs
HD:STA
SU:STO
HD:DAT
t
Data Setup Time
t
100
1.3
0.6
SU:DAT
Clock Low Period
t
LOW
Clock High Period
t
HIGH
20 +
SCL/SDA Rise Time
SCL/SDA Fall Time
t
(Note 11)
(Note 11)
ns
ns
300
300
R
0.1C
b
20 +
t
F
0.1C
b
3-WIRE TIMING (Figure 5)
Operating Frequency
DIN to SCLK Setup
f
DC
2.1
MHz
ns
OP
t
100
DS
DH
DO
DIN to SCLK Hold
t
0
ns
SCLK Fall to Output Data Valid
CS to SCLK Rise Setup
CS to SCLK Rise Hold
CS High Pulse Width
t
C
= 50pF
20
100
0
200
ns
LOAD
t
ns
CSS
CSH
t
ns
t
200
200
200
ns
CSW
SCLK Pulse Width Low
SCLK Pulse Width High
Rise Time (SCLK, DIN, CS)
Fall Time (SCLK, DIN, CS)
t
ns
CL
t
ns
CH
t
2
2
µs
R
t
µs
F
_______________________________________________________________________________________
5
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 3: Guaranteed by design. Not subject to production testing.
Note 4: ∆R
= R
- R
.
ON
ON(MAX)
ON(MIN)
Note 5: Resistance flatness is defined as the difference between the maximum and minimum on-resistance values, as measured
over the specified analog signal range.
Note 6: Leakage parameters are 100% tested at maximum rated temperature, and guaranteed by correlation at T = +25°C.
A
Note 7: Off-isolation = 20 log [V
_ / V _ _ ], V
_ = output, V _ _ = input to off switch.
COM NO
COM
NO
Note 8: All timing is measured from the rising clock edge of the ACK bit for 2-wire, and from the rising edge of CS for 3-wire. Turn-
off time is defined at the output of the switch for a 0.5V change, tested with a 300Ω load to ground. Turn-on time is mea-
sured with a 5kΩ load resistor to GND. All timing is shown with respect to 20% V+ and 70% V+, unless otherwise noted.
Note 9: Supply current can be as high as 2mA per switch during switch transitions in the clickless mode, corresponding to a 28mA
total supply transient current requirement.
Note 10: Leakage testing for single-supply operation is guaranteed by testing with a single +5.25V supply.
Note 11: C = capacitance of one bus line in pF. Tested with C = 400pF.
b
b
Note 12: Typical values are for MAX4573/MAX4574 devices.
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s
(V+ = +5V, T = +25°C, unless otherwise noted.)
A
1–MAX574
ON-RESISTANCE vs.
ON-RESISTANCE vs. V
V
COM
AND TEMPERATURE
LEAKAGE CURRENT vs. TEMPERATURE
COM
32
30
28
26
24
22
20
18
100
10
50
45
40
35
30
25
20
V+ = 2.7V
T = +85°C
A
T = +70°C
A
1
COM_ OFF
NO_ _ OFF
T = +25°C
A
V+ = 3.3V
0.1
0.01
0.001
T = -40°C
A
V+ = 5.0V
NO_ _ ON
0
1
2
3
4
5
-40
-20
0
20
40
60
80
0
1
2
3
4
5
V
COM
(V)
TEMPERATURE (°C)
V
COM
(V)
ON/OFF TIME vs. TEMPERATURE
(HARD MODE)
SUPPLY CURRENT vs. TEMPERATURE
CHARGE INJECTION vs. V
COM
600
500
400
300
200
100
0
5.1
5.0
4.9
4.8
4.7
4.6
4.5
3
2
t
, V+ = 3V
ON
1
t
, V+ = 5V
0
ON
-1
-2
-3
t
, V+ = 3V
OFF
t
, V+ = 5V
60
OFF
-40
-20
0
20
40
80
-40
-20
0
20
40
60
80
0
1
2
3
4
5
TEMPERATURE (°C)
TEMPERATURE (°C)
V
COM
(V)
6
_______________________________________________________________________________________
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
1–MAX574
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V+ = 5V,T = +25°C, unless otherwise noted.)
A
TOTAL HARMONIC DISTORTION + NOISE
vs. FREQUENCY
VIDEO FREQUENCY RESPONSE
AUDIO FREQUENCY RESPONSE
0
-20
-40
-60
-80
1
0
-20
-40
600Ω IN AND OUT
INSERTION-LOSS
SIGNAL = 1V
RMS
600Ω IN AND OUT
OFF-ISOLATION
0.1
-60
-80
CROSSTALK
CROSSTALK
-100
OFF-ISOLATION
50Ω IN AND OUT
10 100
FREQUENCY (MHz)
0.01
-100
-120
10
100
1000
10,000
100,000
0.1
1
10
100
1000
10,000
100,000
FREQUENCY (Hz)
FREQUENCY (Hz)
ON/OFF TIMES
(SOFT MODE)
ON/OFF TIMES
(HARD MODE)
CS
5V/div
CS
5V/div
t
ON
t
ON
1V/div
1V/div
1V/div
1V/div
t
t
OFF
OFF
TIME (2ms/div)
TIME (50ns/div)
SOFT MODE FALL TIME
SOFT MODE RISE TIME
TIME (500µs/div)
TIME (500µs/div)
_______________________________________________________________________________________
7
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
P in De s c rip t io n s
PIN
NAME
FUNCTION
MAX4571
MAX4572
MAX4571
MAX4572
1, 3, 5, 7, 9,
11, 13, 22, 20,
18, 16
–
NO1–NO11
–
Normally Open Terminals
–
–
–
1, 4, 7, 10
3, 6, 9, 12
13, 16
–
–
–
NO1A–NO4A
NO1B–NO4B
NO5, NO8
Normally Open Terminals
Normally Open Terminals
Normally Open Terminals
NO6A, NO7A,
NO6B, NO7B
–
22, 19, 20, 17
–
Normally Open Terminals
2, 4, 6, 8, 10,
12, 14, 21, 19,
17, 15
2, 5, 8, 11, 14,
21, 18, 15
COM1–COM11 COM1–COM8
Common Terminals
Ground
23
24
25
26
27
28
23
24
25
26
27
28
GND
A0
GND
A0
1–MAX574
LSB + 1 of 2-Wire Serial Interface Address Field
LSB + 2 of 2-Wire Serial Interface Address Field
Clock Input of 2-Wire Serial Interface
Data Input of 2-Wire Serial Interface
Positive Supply Voltage
A1
A1
SCL
SDA
V+
SCL
SDA
V+
PIN
NAME
FUNCTION
MAX4573
MAX4574
MAX4573
MAX4574
1, 3, 5, 7, 9,
11, 13, 22, 20,
18, 16
–
NO1–NO11
–
Normally Open Terminals
–
–
–
1, 4, 7, 10
3, 6, 9, 12
13, 16
–
–
–
NO1A–NO4A
NO1B–NO4B
NO5, NO8
Normally Open Terminals
Normally Open Terminals
Normally Open Terminals
NO6A, NO7A,
NO6B, NO7B
–
22, 19, 20, 17
–
Normally Open Terminals
2, 4, 6, 8, 10,
12, 14, 21, 19,
17, 15
2, 5, 8, 11, 14,
21, 18, 15
COM1–COM11 COM1–COM8
Common Terminals
23
24
25
26
27
28
23
24
25
26
27
28
GND
CS
GND
CS
Ground
Chip Select of 3-Wire Serial Interface
Clock Input of 3-Wire Serial Interface
Clock Input of 3-Wire Serial Interface
Data Output of 3-Wire Serial Interface
Positive Supply Voltage
SCLK
DIN
SCLK
DIN
DOUT
V+
DOUT
V+
8
_______________________________________________________________________________________
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
1–MAX574
MAX4571
MAX4572
MAX4573
MAX4574
MAX4571
MAX4572
MAX4573
MAX4574
V+
V+
V+
V+
10nF
10nF
ANALYZER
SIGNAL
50Ω
COM_
NO1
COM1
2/3
ANALYZER
SIGNAL
R
L
2/3
DECODER/
CONTROLLER
R
L
DECODER/
CONTROLLER
GENERATOR 0dBm
NO_ _
GND
GENERATOR 0dBm
COM2
NO2
N.C.
GND
a) Off-Isolation
b) Crosstalk
Figure 1. Off-Isolation and Crosstalk
ACKNOWLEDGE
BIT
t < 20ns
3V
0
r
50%
t < 20ns
f
SCL
MAX4571
MAX4572
MAX4573
V
OUT
•
0.9
0.1
V
OUT
MAX4574
2-Wire
V+
0
t
ON
V+
V
OUT
NO_ _
COM_
NO
•
V
OUT
V
OUT
0
t
OFF
R
L
C
L
300Ω
35pF
2 OR 3
3V
0
DECODER/
CONTROLLER
SERIAL
INTERFACE
µP
CS
50%
V
OUT
•
0.9
0.1
V
OUT
GND
3-Wire
0
t
ON
C INCLUDES FIXTURE AND STRAY CAPACITANCE
V
OUT
L
V
= V
[R / (R + R )]
OUT COM L L ON
•
V
OUT
0
t
OFF
Figure 2. Switching Time
_______________________________________________________________________________________
9
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
uration of the data bits and their related switches. The
De t a ile d De s c rip t io n
arrangement of the command bits and the data bits
depends on the interface type (2-wire or 3-wire). After a
SWITCHSET command is issued, a logic 1 in any data-
bit location closes the associated switch, while a logic 0
opens it. After a MODESET command, a logic 1 in any
data-bit location sets the associated switch into hard
mode, while a logic 0 sets it into soft mode.
The MAX4571–MAX4574 are serial-interface controlled
switches with soft-mode “clickless” and hard-mode oper-
ating capability. The MAX4571/MAX4573 contain 11
SPST switches, while the MAX4572/MAX4574 contain
two SPST switches and six SPDT switches. The SPDT
switches are actually 2-to-1 multiplexers, in that each
SPDT is really two independent SPST switches with a
common node, as shown in the Pin Configurations. Each
switch is controlled independently by either the SPI or
I2C interface.
2 -Wire S e ria l In t e rfa c e
2
The MAX4571/MAX4572 use a 2-wire, I C-compatible
serial interface requiring only two I/O lines of a stan-
dard microprocessor port for communication. These
devices use the SendByte™ and WriteWord™ proto-
cols. The SendByte protocol is used only for the RESET
c omma nd . The Write Word p rotoc ol is us e d for the
MODESET and SWITCHSET commands.
Audio off-isolation is -90dB at 20kHz, crosstalk is at
least -90dB at 20kHz, and video off-isolation is at least
-50dB at 10MHz.
Each switch of any device may be set to operate in
either soft or hard mode. In soft mode, the switching
transition is slowed to avoid the audible “clicking” that
can occur when switches are used to route audio sig-
nals. In hard mode, the switches are not slowed down,
making this mode useful when a faster response is
required. If a new command is issued while any soft-
mode switch is transitioning, the switch transition time
is decreased so it reaches its final state before the new
c omma nd is e xe c ute d . Soft mod e is the p owe r-up
default state for all switches. Switches in the same
mode are guaranteed to be break-before-make relative
to e a c h othe r. Bre a k-b e fore -ma ke d oe s not a p p ly
between switches operating in different modes.
The first byte of any 2-wire serial-interface transaction is
always the address byte. To address a given chip, the
A0 and A1 bits in the address byte (Table 3) must dupli-
cate the values present at the A0 and A1 pins of that
chip, and the rest of the address bits must be config-
ured as shown in Table 3. Connect the A0 and A1 pins
to V+ or to GND, or drive them with CMOS logic levels.
1–MAX574
The second byte is the command byte. The possible
commands are RESET, MODESET, and SWITCHSET.
RESET sets all switches to the initial power-up state
(open and in soft switching mode). The RESET com-
ma nd is e xe c ute d on the ris ing c loc k e d g e of the
acknowledge bit after the command byte. The MODE-
SET and SWITCHSET commands are each followed by
two data bytes. The first data byte is buffered so all the
data latches switch together. MODESET and SWITCH-
SET a re e xe c ute d on the ris ing c loc k e d g e of the
acknowledge bit after the second data byte. Table 3
details the 2-wire interface data structure. Figures 3
and 4 and the I/O Interface Characteristics detail the
timing of the 2-wire serial-interface protocol. All bytes of
the transmission, whether address, command, or data,
are sent MSB first.
These devices operate from a single supply of +2.7V to
2
+5.25V. The MAX4571/MAX4572 feature a 2-wire, I C-
c omp a tib le s e ria l inte rfa c e , a nd the MAX4573/
MAX4574 feature a 3-wire, SPI/QSPI/MICROWIRE-com-
patible serial interface.
Ap p lic a t io n s In fo rm a t io n
S w it c h Co n t ro l
The MAX4571–MAX4574 have a common command
and control-bit structure, the differences being only in
the interface type (2-wire or 3-wire) and in the switch
configurations.
The MAX4571/MAX4572 are receive-only devices and
must be controlled by a bus master device. A bus mas-
ter signals the beginning of a transmission with a start
condition by transitioning SDA from high to low while
SCL is high. The slave devices monitor the serial bus
continuously, waiting for a start condition followed by an
address byte. When a device recognizes its address
byte, it acknowledges by pulling the SDA line low for
one clock period; it is then ready to accept command
a nd d a ta b yte s . The d e vic e the n is s ue s a s imila r
acknowledgment after the command byte, and again
after each data byte. When the master has finished
The SWITCHSET command controls the open/closed
s ta te s of the va rious s witc he s . MODESET c ontrols
soft/hard-mode states of the switches. There are also
NO_OP and RESET commands. The NO_OP command
is useful for daisy-chaining multiple 3-wire parts. The
RESET command places a device in a state identical to
its power-up state, with all switches open and in soft
switching mode.
Table 1 shows the configuration of the command bits
and their related commands. Table 2 shows the config-
SendByte and WriteWord are trademarks of Philips Corp.
10 ______________________________________________________________________________________
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
1–MAX574
Table 1. Command Bit Mapping
MSB
MSB - 1
COMMAND
DESCRIPTION
Sets all switches open and in soft switching mode.
Sets specified switches to soft or hard mode.
No Operation.
0
0
1
1
0
1
0
1
RESET
MODESET
NO_OP
SWITCHSET
Sets specified switches open or closed.
Table 2. Data-Bit Switch Control
MAX4571/MAX4573
MAX4572/MAX4574
DATA BIT
SWITCH
X
SWITCH TERMINALS
SWITCH
SW8
SWITCH TERMINALS
D13
D12
D11
D10
D9
X
15, 16
13, 14
17, 18
18, 19
20, 21
21, 22
11, 12
10, 11
8, 9
X
X
SW5
X
X
SW7B
SW7A
SW6B
SW6A
SW4B
SW4A
SW3B
SW3A
SW2B
SW2A
SW1B
SW1A
SW11
SW10
SW9
SW8
SW7
SW6
SW5
SW4
SW3
SW2
SW1
15, 16
17, 18
19, 20
21, 22
13, 14
11, 12
9, 10
7, 8
D8
D7
D6
D5
D4
7, 8
D3
5, 6
D2
5, 6
4, 5
D1
3, 4
2, 3
D0 (LSB)
1, 2
1, 2
X = Don’t care
communicating with the slave, it issues a stop condition
by transitioning SDA from low to high while SCL is high.
The bus is then free for another transmission.
Figures 5 and 6 and the I/O Interface Characteristics
show the timing details of the 3-wire interface. If the
two command bits initiate a SWITCHSET command, a
logic 1 in a switch control location closes the associat-
ed switch, while a logic 0 opens it. If the command bits
initiate a MODESET command, a logic 1 in a switch
control location sets the associated switch into hard
mode, while a logic 0 sets it into soft, “clickless” mode.
For command-bit configurations, see Table 1.
3 -Wire S e ria l In t e rfa c e
The MAX4573/MAX4574 us e a 3-wire SPI/QSPI/
MICROWIRE-compatible serial interface. An active-low
chip-select pin, CS, enables the device to receive data
from the serial input pin, DIN. Command and data infor-
mation are clocked in on the rising edge of the serial-
clock signal (SCLK) MSB first. A total of 16 bits are
needed in each write cycle. The write cycle allows two
8-bit-wide transfers if CS remains low for the entire 16
bits. The command code is contained in the two MSBs
of the 16-b it word . The re ma ining b its c ontrol the
switches as shown in Table 4. While shifting in the seri-
al data, the device remains in its original configuration.
A ris ing e d g e on CS la tc he s the d a ta into the
MAX4573/MAX4574 internal registers, initiating the
device’s change of state. Table 4 shows the details of
the 3-wire interface data structure.
Us in g Mu lt ip le De vic e s
There are two ways to connect multiple devices to the
same 3-wire serial interface. The first involves using the
DOUT pin. DOUT presents a copy of the last bit of the
internal shift register, useful for daisy-chaining multiple
d e vic e s . Da ta a t DOUT a re s imp ly the inp ut d a ta
delayed by 16 clock cycles, appearing synchronous
with SCLK’s falling edge. After CS goes high, DOUT
holds the last bit in the shift register until new data are
shifted into DIN. For a simple interface using several
MAX4573/MAX4574 devices, daisy-chain the shift reg-
______________________________________________________________________________________ 11
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
Table 3. 2-Wire Serial-Interface Data Format
RESET Command
Address Byte
Command Byte (RESET)
MSB
MSB
LSB
LSB
S
R
T
0
1
1
0
1
A
1
A
0
0
A
C
K
0
0
X
X
X
X
X
X
A
C
K
S
T
P
SWITCHSET Command
Address Byte
Command Byte (SWITCHSET)
MSB
LSB
LSB
MSB
S
R
T
0
1
1
0
1
A
A
0
A
C
K
1
1
X
X
X
X
X
X
A
C
K
1
0
MAX4571
First Data Byte
Second Data Byte
LSB
LSB
SW
MSB
MSB
X
X
X
X
X
SW
11
SW
10
SW
9
A
C
K
SW
8
SW
7
SW
SW
SW
4
SW
3
SW
2
A
C
K
S
T
P
1–MAX574
6
5
1
MAX4572
First Data Byte
Second Data Byte
LSB
LSB
MSB
MSB
X
X
SW
8
SW
SW
7B
SW
7A
SW
6B
SW
6A
A
C
K
SW
4B
SW
4A
SW
3B
SW
3A
SW
2B
SW
2A
SW
1B
SW
1A
A
C
K
S
T
P
5
MODESET Command
Address Byte
Command Byte (MODESET)
MSB
LSB
MSB
S
R
T
0
1
1
0
1
A
1
A
0
0
A
0
1
X
X
X
X
X
X
A
C
K
C
K
MAX4571
First Data Byte
Second Data Byte
LSB
LSB
MSB
MSB
X
X
X
X
X
SW
11
SW
10
SW
9
A
C
K
SW
8
SW
7
SW
6
SW
5
SW
4
SW
3
SW
2
SW
1
A
C
K
S
T
P
MAX4572
First Data Byte
Second Data Byte
LSB
LSB
MSB
MSB
X
X
SW
8
SW
SW
7B
SW
7A
SW
6B
SW
6A
A
C
K
SW
4B
SW
4A
SW
3B
SW
3A
SW
2B
SW
2A
SW
1B
SW
1A
A
C
K
S
T
P
5
X = Don't Care
STP = Stop Condition
SRT = Start Condition
ACK = Acknowledge Condition
Logic "0" in any data bit location places the associated switch open or in soft (clickless) switching mode.
Logic "1" in any data bit location places the associated switch closed or in hard switching mode.
For command bit configuration see Table 1.
12 ______________________________________________________________________________________
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
1–MAX574
Table 4. 3-Wire Serial-Interface Data Format
MAX4573 (11 SPST)
MSB
LSB
COMMAND
SWITCH CONTROL
D15
C1
D14
C0
D13
X
D12
X
D11
X
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
SW11 SW10 SW9
SW8
SW7
SW6
SW5
SW4
SW3
SW2
SW1
MAX4574 (6 SPDT + 2 SPST)
MSB
LSB
COMMAND
SWITCH CONTROL
D15
C1
D14
C0
D13
D12
D11
D10
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
SW8
SW5 SW7B SW7A SW6B SW6A SW4B SW4A SW3B SW3A SW2B SW2A SW1B SW1A
70%
70%
20%
70%
20%
70%
20%
70%
20%
SDA
SCL
20%
t
BUF
t
,
t ,
SU STA
SU DAT
t
,
HD STA
t
,
SU STO
t
t ,
HD DAT
LOW
70%
20%
70%
20%
70%
20%
70%
70%
70%
t
HIGH
t
,
HD STA
t
R
t
F
START CONDITION
REPEATED START CONDITION
STOP CONDITION START CONDITION
Figure 3. 2-Wire Serial-Interface Timing Diagram
SECOND DATA BYTE
COMMAND BYTE
FIRST DATA BYTE
ADDRESS BYTE
SDA
SCL
MSB
MSB
LSB ACK
LSB ACK
MSB
LSB ACK
MSB
ACK
LSB
STOP CONDITION
START CONDITION
Figure 4. A Complete 2-Wire Serial-Interface Transmission
______________________________________________________________________________________ 13
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
isters by connecting DOUT of the first device to DIN of
the second, etc. Connect the CS pins of all devices
tog e the r. Da ta a re s hifte d throug h the MAX4573/
MAX4574s in s e rie s . Whe n CS is b roug ht hig h, a ll
d e vic e s a re up d a te d s imulta ne ous ly. If a ny of the
devices in the chain are to be left unchanged, use a
NO_OP command for that device, as shown in Table 1.
An alternate way of connecting multiple devices is to
decode the CS line. In this case the DOUT pin is not
used and the DIN pins of all devices are connected
together. Address decode logic individually controls the
CS line of each device. When a device is to be selected
its CS line is brought low, data are shifted in, and its CS
is then brought high to execute the command.
70%
20%
CS
20%
t
CSW
t
t
CSO
CSH
t
CL
t
CH
t
CSS
70%
70%
70%
SCLK
20%
20%
20% 20%
20%
1–MAX574
t
DH
t
DS
D15
D14
D1
D0
DIN
t
DO
DOUT
Figure 5. 3-Wire Serial-Interface Timing Diagram
CS
COMMAND
EXECUTED
SCLK
1
8
9
16
DIN
D15 D14 D13....
MSB
D2 D1 D0....
LSB
DOUT
.........00
Q15........
MSB FROM
PREVIOUS WRITE
LSB FROM
PREVIOUS WRITE
Figure 6. A Complete 3-Wire Serial-Interface Transmission
14 ______________________________________________________________________________________
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
1–MAX574
P in Co n fig u ra t io n s (c o n t in u e d )
___________________Ch ip In fo rm a t io n
TOP VIEW
TRANSISTOR COUNT: 5397
MAX4572/MAX4574
NO1A 1
28 V+
COM1
NO1B
2
3
27 SDA (DOUT)
26 SCL (DIN)
25 A1 (SCLK)
24 A0 (CS)
23 GND
NO2A 4
COM2
NO2B
5
6
NO3A 7
22 NO6A
21 COM6
20 NO6B
19 NO7A
18 COM7
17 NO7B
16 NO8
COM3
NO3B
8
9
NO4A 10
COM4 11
NO4B 12
NO5 13
COM5 14
15 COM8
QSOP/SSOP/SO
( ) ARE FOR MAX4574
P a c k a g e In fo rm a t io n
______________________________________________________________________________________ 15
S e ria lly Co n t ro lle d , Clic k le s s
Au d io /Vid e o S w it c h e s
P a c k a g e In fo rm a t io n (c o n t in u e d )
1–MAX574
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Ma x im In t e g ra t e d P ro d u c t s , 1 2 0 S a n Ga b rie l Drive , S u n n yva le , CA 9 4 0 8 6 4 0 8 -7 3 7 -7 6 0 0
© 1999 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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