MAX4548EAX-T [MAXIM]
Cross Point Switch, 1 Func, 3 Channel, PDSO36, 0.300 INCH, 0.80 MM PITCH, SSOP-36;
| 型号： | MAX4548EAX-T |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Cross Point Switch, 1 Func, 3 Channel, PDSO36, 0.300 INCH, 0.80 MM PITCH, SSOP-36 光电二极管 |
| 文件： | 总20页 (文件大小：269K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1496; Rev 0; 6/99
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
8/MAX549
Ge n e ra l De s c rip t io n
Fe a t u re s
The MAX4548/MAX4549 serial-interface, programmable,
triple 3x2 audio/video crosspoint switches are ideal for
multimedia applications. The devices include three
crosspoint switch matrices, each containing three inputs
and two outputs. To improve off-isolation, each switch
matrix has a shunt input and each output is selectively
programmable for clickless or regular-mode operation. A
selectable set of internal resistive voltage dividers sup-
plies DC bias for each output when using AC-coupled
inputs. To improve crosstalk, the voltage dividers include
four externally accessible bypass points.
♦ Selectable Soft-Switching Mode for “Clickless”
Audio Operation
♦ 22Ω Typical On-Resistance (+5V Supply)
♦ 5Ω Typical On-Resistance Matching Between
Channels
♦ 2Ω Typical On-Resistance Flatness
♦ Audio Performance
-85dB Off-Isolation at 20kHz
-85dB Crosstalk at 20kHz
0.07% THD with 600Ω Load
The MAX4548/MAX4549 fe a ture 35Ω ma x on-re sis-
tance, 7Ω on-resistance matching between channels,
5Ω on-resistance flatness, and 0.07% total harmonic
distortion (THD). Additionally, they feature off-isolation
of -85dB at 20kHz and -72dB at 10MHz, with crosstalk
of -85dB at 20kHz and -55dB at 10MHz. The MAX4548
uses a 2-wire I2C™-compatible serial interface, while
the MAX4549 uses a 3-wire SPI™/QSPI™/MICROWIRE™-
compatible serial interface. These parts are available in
36-p in SSOP p a c ka g e s a nd a re s p e c ifie d for the
extended (-40°C to +85°C) operating range.
♦ Video Performance
-72dB Off-Isolation at 10MHz
-55dB Crosstalk at 10MHz
♦ Serial Interface
2-Wire I2C-Compatible (MAX4548)
3-Wire SPI/QSPI/MICROWIRE-Compatible
(MAX4549)
♦ Single-Supply Operation from +2.7V to +5.5V
P in Co n fig u ra t io n
Ap p lic a t io n s
TOP VIEW
Set-Top Boxes
NO1C
CBIASH
NO2C
SC
1
2
3
4
5
6
7
8
9
36 CBIASL
35 COM1C
34 MID5
PC Multimedia Boards
Video Conferencing Systems
High-End Audio Systems
Security Systems
33 COM2C
32 GND
NO3C
V+
MAX4548
MAX4549
31 COM1A
30 MID1
Ord e rin g In fo rm a t io n
NO1A
N01B
SA
COM1B
29
PART
TEMP. RANGE
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
36 SSOP
MAX4548EAX
MAX4549EAX
28 MID2
36 SSOP
NO2A 10
N02B 11
27 COM2A
26 MID3
SB 12
25 COM2B
24 MID4
N03A 13
N03B 14
23 ABIASH
22 ABIASL
21 V+
Functional Diagram appears at end of data sheet.
GND 15
GND 16
SDA (DIN) 17
SCL (SCLK) 18
20 A0 (CS)
19 A1 (DOUT)
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor Corp.
2
I C is a trademark of Philips Corp.
SSOP
( ) ARE FOR MAX4549
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800.
For small orders, phone 1-800-835-8769.
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
ABSOLUTE MAXIMUM RATINGS
V+ to GND................................................................-0.3V to +6V
NO_ _, S_, MID_, BYP, COM_ _, CBIASL,
Peak Current, NO_ _, S_, COM_ _
(pulsed at 1ms, 10% duty cycle max)...........................±40mA
ABIASL, CBIASH, ABIASH, DOUT to GND
Continuous Power Dissipation (T = +70°C)
A
(Note 1)......................................................-0.3V to (V+ + 0.3V)
CS, A0, A1, SDA, SCL, DIN,
SCLK to GND ........................................................-0.3V to +6V
Continuous Current into Any Terminal..............................±20mA
36-Pin SSOP (derate 11.8mW/°C above +70°C) ..........941mW
Operating Temperature Range ............................-40°C to+85°C
Storage Temperature Range ..............................-65°C to+150°C
Lead Temperature (soldering, 10sec) .............................+300°C
Note 1: Signals on NO_ _, S_, or COM_ _ exceeding V+ or GND are clamped by internal diodes. Limit forward diode current to
maximum rating.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +5V ±5%, T = T
A
to T , unless otherwise noted. Typical values are at T = +25°C.) (Note 2)
MAX A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG SWITCHES
8/MAX549
V
NO
_ _,
Analog Signal Range (Note 3)
On-Resistance
V
_ _,
V _
0
V+
V
COM
S
I
V
= 4mA,
or V = 3V,
S_
T
= +25°C
22
5
35
45
7
COM_ _
A
R
Ω
ON
NO_ _
T = T
A
to T
MAX
V+ = 4.75V
MIN
COM_ _ to NO_ _ or S_
On-Resistance Match
Between Channels (Note 4)
I
COM_ _
V
V+ = 4.75V
= 4mA,
T
= +25°C
A
∆R
or V = 3V,
Ω
Ω
ON
NO_ _
S_
T = T
to T
MAX
8
A
MIN
COM_ _ to NO_ _ or S_
On-Resistance Flatness
(Note 5)
I
COM_ _
V+ = 4.75V; V
NO_ _
or V = 1V, 2V, 3V
= 4mA;
T
= +25°C
2
5
A
R
FLAT
T = T
to T
MAX
7
A
MIN
S_
V
or V = 4.5V,
S_
T
= +25°C
-2
-10
-2
0.04
0.04
2
NO_ _
A
NO_ _ or S_ Off-Leakage
Current (Note 6)
I
_ _
1V; V = 1V,
COM_ _
4.5V; V+ = 5.25V
nA
nA
NO
(OFF)
T = T
A
to T
MAX
10
2
MIN
V
NO_ _
or V = 4.5V,
T
A
= +25°C
S_
COM_ _ Off-Leakage
Current (Note 6)
I
_ _
1V; V
4.5V; V+ = 5.25V
= 1V,
COM (OFF)
COM_ _
T = T
A
to T
MAX
-10
10
MIN
V
_ _ or V = 4.5V,
NO
S_
T
= +25°C
-2
0.04
2
A
COM_ _On-Leakage
Current (Note 6)
1V, or floating;
= 4.5V, 1V;
I
_ _
nA
COM (ON)
V
COM_ _
T = T
A
to T
MAX
-10
10
MIN
V+ = 5.25V
AUDIO PERFORMANCE
f
= 1kHz, V
NO_ _
IN
R
= 600Ω
0.07
L
L
Total Harmonic Distortion
plus Noise
THD+N
or V = 1V
2.5V
+
%
S_
RMS
R
=10kΩ
0.006
DC
V
_ _ = 1V
= GND, shunt switch on or off
, f = 20kHz, R = 600Ω,
NO
RMS IN L
Off-Isolation (Note 7)
V
-85
-85
dB
dB
ISO(A)
S
_
V
_ _ = 1V
, f = 20kHz,
NO
RMS IN
Channel-to-Channel Crosstalk
V
CT(A)
R = R = 600Ω
L
S
2
_______________________________________________________________________________________
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
8/MAX549
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
(V+ = +5V ±5%, T = T
to T
, unless otherwise noted. Typical values are at T = +25°C.) (Note 2)
A
MIN
MAX
A
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
VIDEO PERFORMANCE
V
or V = 1V
,
NO_ _
S_
RMS
Shunt switch on
Shunt switch off
-72
-62
Off-Isolation (Note 7)
V
f
= 10MHz, R = 50Ω,
dB
dB
ISO(V)
IN
L
R
=50Ω, S_ = GND
S
V
f
IN
or V = 0.5V
= 10MHz, R = 50Ω,
L
, R = 50Ω,
NO_ _
S_
RMS S
Channel-to-Channel Crosstalk
V
-55
CT(V)
-3dB Bandwidth
Off-Capacitance
BW
R
= 50Ω, R = 50Ω
250
10
MHz
pF
S
L
C
f = 1MHz
OFF(NO)
DYNAMIC TIMING WITH CLICKLESS MODE DISABLED (Note 8, Figure 1)
T
or V = 2.5V,
S_
= +25°C
200
100
400
500
A
V
NO_ _
Turn-On Time
t
ns
ONSD
R
= 5kΩ, C = 35pF
L
L
T
A
= T
to T
MIN
MAX
MAX
V
NO_ _
or V = 2.5V,
T
A
= +25°C
200
250
S_
Turn-Off Time
t
R
C
= 300Ω,
= 35pF
ns
ns
OFFSD
L
L
T
A
= T
to T
MIN
Break-Before-Make Time
t
V
NO_ _
or V = 2.5V
10
50
BBM
S_
DYNAMIC TIMING WITH CLICKLESS MODE ENABLED (Note 8, Figure 1)
V
T
A
or V = 2.5V, R = 5kΩ, C = 35pF,
S_ L L
= +25°C
NO_ _
Turn-On Time
Turn-Off Time
t
12
3
ms
ms
ONSE
V
or V = 2.5V, R = 300Ω, C = 35pF,
L
S_ L
NO_ _
t
OFFSE
T
A
= +25°C
BIAS NETWORKS
Bias Network Resistance
POWER SUPPLIES
Supply Voltage Range
Supply Current (Note 9)
R
110
6
kΩ
BIAS
V+
I+
2.7
5.5
10
V
All logic inputs = GND or V+
µA
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = +3V ±10%, T = T
A
to T , unless otherwise noted. Typical values are at T = +25°C.) (Note 2)
MAX A
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
ANALOG SWITCHES
V
NO
_ _,
Analog Signal Range (Note 3)
On-Resistance
V
_ _,
V _
0
V+
V
Ω
Ω
Ω
COM
S
I
V
_ _ = 4mA,
_ _ or V = 1V,
S_
COM
T
= +25°C
40
5
60
80
7
A
R
ON
NO
T = T
A
to T
MAX
V+ = 2.7V
I _ _ = 4mA,
COM
MIN
COM_ _ to NO_ _ or S_
On-Resistance Match
Between Channels (Note 4)
T = +25°C
A
∆R
V
_ _ or V = 1V,
NO S_
ON
T = T
A
to T
MAX
8
V+ = 2.7V
I = 4mA;
COM_ _
MIN
COM_ _ to NO_ _ or S_
On-Resistance Flatness
(Note 5)
T
A
= +25°C
3
6
R
V+ = 2.7V;
= 1V, 1.5V, 2V
FLAT
T = T
A
to T
MAX
8
V
MIN
NO_ _
_______________________________________________________________________________________
3
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
ELECTRICAL CHARACTERISTICS—Single +3V Supply (continued)
(V+ = +3V ±10%, T = T
A
to T , unless otherwise noted. Typical values are at TA = +25°C.) (Note 2)
MAX
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
-2
TYP
MAX
2
UNITS
V
or V = 3V,
S_
NO_ _
T
A
= +25°C
0.04
NO_ _ or S_ Off-Leakage
Current (Notes 6, 10)
I
0.5V; V
3V; V+ = 3.6V
= 0.5V,
nA
NO_ _(OFF)
COM_ _
T
A
= T
to T
-10
-2
10
2
MIN
MAX
V
or V = 3V,
NO_ _
S_
T
A
= +25°C
0.04
0.04
COM _ Off-Leakage
Current (Notes 6, 10)
I
_ _
0.5V; V
3V; V+ = 3.6V
= 0.5V,
nA
nA
COM (OFF)
COM_ _
T
A
= T
to T
-10
10
MIN
MAX
V
NO_ _
or V = 0.5V,
S_
3V, or floating;
= 0.5V, 3V;
T
= +25°C
-2
2
A
COM _ On-Leakage
Current (Notes 6, 10)
I
_ _
COM (ON)
V
COM_ _
T
A
= T
to T
-10
10
MIN
MAX
V+ = 3.6V
AUDIO PERFORMANCE
f
= 1kHz, V
NO_ _
IN
R
R
= 600Ω
= 10Ω
0.1
L
L
Total Harmonic Distortion
plus Noise
THD+N
or V = 1.5V
0.5V
+
%
S_
DC
0.01
8/MAX549
RMS
V
NO_ _
= 0.5V , f = 20kHz,
RMS IN
Off-Isolation (Note 7)
V
R
= 600Ω, S = GND,
-85
-85
dB
dB
ISO(A)
L
–
shunt switch on or off
V
NO_ _
= 0.5V , f = 20kHz,
RMS IN
Channel-to-Channel Crosstalk
V
CT(A)
R
= 600kΩ, R = 600Ω
S
L
VIDEO PERFORMANCE
V
0.5V
or V
=
_
S
NO_ _
Shunt switch on
-72
-62
,
RMS
Off-Isolation (Note 7)
V
dB
dB
ISO(V)
f
= 10MHz,
= 50Ω, R = 50Ω
S
IN
Shunt switch off
,
R
L
V
NO_ _
or V = 0.5V
S_ RMS
= 50Ω, f = 10MHz, R = 50Ω
IN L
Channel-to-Channel Crosstalk
V
-55
(V)
CT
R
S
-3dB Bandwidth
Off-Capacitance
BW
R
= 50Ω, R = 50Ω
200
10
MHz
pF
S
L
C
f = 1MHz
OFF(NO)
DYNAMIC TIMING WITH CLICKLESS MODE DISABLED (Notes 8 and 12, Figure 1)
= +25°C
T
A
400
800
1000
350
V
NO_ _
or V = 1.5V,
S_
Turn-On Time
t
ns
ONSD
R
= 5kΩ, C = 35pF
L
L
T = T
to T
MAX
A
MIN
T
= +25°C
200
100
A
V
or V = 1.5V,
S_
= 300Ω, C = 35pF
L
NO_ _
Turn-Off Time
t
ns
ns
OFFSD
R
L
T = T
A
to T
MAX
500
MIN
Break-Before-Make Time
t
V
NO_ _
or V = 1.5V
10
BBM
S_
DYNAMIC TIMING WITH CLICKLESS MODE ENABLED (Notes 8 and 12, Figure 1)
Turn-On Time
t
V
or V = 1.5V, R = 5kΩ, C = 35pF
12
3
ms
ms
L
ONSE
NO_ _
S_
L
Turn-Off Time
t
V
or V = 1.5V, R = 300Ω, C = 35pF
OFFSE
NO_ _ S_ L L
BIAS NETWORK
Bias Network Resistance
R
110
kΩ
BIAS
4
_______________________________________________________________________________________
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
8/MAX549
I/O INTERFACE CHARACTERISTICS
(V+ = +2.7V to +5.25V, T = T
A
to T , unless otherwise noted. Typical values are at TA = +25°C.)
MAX
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
DIGITAL INPUTS (SCLK, DIN, CS, SCL, SDA, A0, A1)
V+ = 5V
0.8
0.6
Input Low Voltage
Input High Voltage
V
V
V
IL
V+ = 3V
V+ = 5V
V+ = 3V
3
2
V
IH
Input Hysteresis
V
0.2
0.001
5
V
HYST
Input Leakage Current
Input Capacitance
I
Digital inputs = GND or V+
f = 1MHz
-1
1
µA
pF
LEAK
C
IN
DIGITAL OUTPUTS (DOUT, SDA)
Output Low Voltage
V
I
= 6mA
0.4
V
V
OL
SINK
DOUT Output High Voltage
V
OH
I
= 0.5mA
V+ - 0.5
SOURCE
2-WIRE TIMING CHARACTERISTICS (Figure 3)
(V+ = +2.7V to +5.25V, f
= 100kHz, T = T
A
to T , unless otherwise noted.)
MAX
SCL
MIN
PARAMETER
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
V+ = 4.75V to 5.25V
V+ = 2.7V to 5.25V
0
0
400
100
SCL Clock Frequency
f
kHz
SCL
Bus-Free Time between Stop
and Start Condition
t
4.7
4
µs
µs
ns
BUF
Hold Time After Start Condition
t
t
HD:STA
Pulse Width of Suppressed
Spike (Note 3)
0
50
STOP Condition Setup Time
Data Hold Time
4
0
µs
µs
ns
µs
µs
SU:STO
HD:DAT
t
Data Setup Time
t
250
4.7
4
SU:DAT
Clock Low Period
Clock High Period
t
LOW
t
HIGH
20 +
SCL/SDA Rise Time (Note 11)
SCL/SDA Fall Time (Note 11)
t
ns
ns
300
300
R
0.1C
b
20 +
0.01C
t
F
b
_______________________________________________________________________________________
5
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
3-WIRE TIMING CHARACTERISTICS (Figure 5)
(V+ = +2.7V to +5.25V, T = T
A
to T , unless otherwise noted.)
MAX
MIN
PARAMETER
SYMBOL
CONDITIONS
V+ = 4.75V to 5.25V
V+ = 2.7V to 5.25V
MIN
0
TYP
MAX
10
UNITS
Operating Frequency
f
OP
MHz
0
2.1
DIN to SCLK Setup
DIN to SCLK Hold
t
100
0
ns
ns
ns
ns
ns
ns
ns
ns
µs
µs
DS
DH
DO
t
SCLK Fall to Output Data Valid
CS to SCLK Rise Setup
CS to SCLK Rise Hold
t
C
= 50pF
200
LOAD
t
100
0
CSS
t
CSH
t
40
CS Pulse Width High
CSW
SCLK Pulse Width High
SCLK Pulse Width Low
Rise Time (SCLK, DIN, CS)
Fall Time (SCLK, DIN, CS)
t
200
200
CH
t
CL
t
R
2
2
t
F
4
Note 2: The algebraic convention is used in this data sheet; the most negative value is shown in the minimum column.
Note 3: Guaranteed by design. Not subject to production testing.
Note 4: ∆R
= R
- R
.
ON
ON(MAX)
ON(MIN)
Note 5: Resistance flatness is defined as the difference between the maximum and minimum on-resistance values, as measured
over the specified analog signal range.
Note 6: Leakage parameters are 100% tested at maximum rated temperature and guaranteed by correlation at T = +25°C.
A
Note 7: Off-isolation = 20log (V
_ / V _ _ ), V
_ = output, V _ _ = input to off switch.
COM NO
COM
NO
Note 8: All timing is measured from the clock’s falling edge preceding the ACK signal for 2-wire and from the rising edge of CS for
3-wire. Turn-off time is defined at the output of the switch for a 0.5V change, tested with a 300Ω load to ground. Turn-on
time is defined at the output of the switch for a 0.5V change and measured with a 5kΩ load resistor to GND. All timing is
shown with respect to 20% V+ and 70% V+, unless otherwise noted.
Note 9: Supply current can be as high as 2mA per switch during switch transitions in the clickless mode, corresponding to a 48mA
total supply transient current requirement.
Note 10: Leakage testing is guaranteed by testing with a +5.25V supply.
Note 11: C = capacitance of one bus line in pF. Tested with C = 400pF.
b
b
Note 12: Typical values are for MAX4548 devices.
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s
(V+ = +5V, T = +25°C, unless otherwise noted.)
A
ON-RESISTANCE
vs. V AND TEMPERATURE
COM
LEAKAGE CURRENT vs. TEMPERATURE
ON-RESISTANCE vs. V
COM
10,000
1000
100
10
40
35
30
25
20
15
28
26
24
22
20
18
16
14
T = +85°C
A
V+ = 2.7V
T = +70°C
A
COM_ON
COM_OFF
V+ = 3.3V
T = +25°C
A
1
V+ = 5.0V
NO_OFF
T = -40°C
A
0.1
-40
-20
0
20
40
60
80
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
(V)
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
(V)
TEMPERATURE (°C)
V
V
COM
COM
6
_______________________________________________________________________________________
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
8/MAX549
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V+ = +5V, T = +25°C, unless otherwise noted.)
A
TOTAL HARMONIC
DISTORTION PLUS NOISE vs. FREQUENCY
CHARGE INJECTION vs. V
SUPPLY CURRENT vs. TEMPERATURE
COM
1
3
2
6.8
600Ω IN AND OUT
.
6.6
V+ = 5V
SIGNAL = 1V
RMS
6.4
6.2
1
6.0
5.8
V+ = 3.3V
0
0.1
5.6
5.4
-1
-2
-3
5.2
5.0
4.8
0.01
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
-40
-20
0
20
40
60
80
10
100
1000
10,000
100,000
V
COM
TEMPERATURE (°C)
FREQUENCY (Hz)
AUDIO FREQUENCY CHARACTERISTICS
VIDEO FREQUENCY CHARACTERISTICS
0
-20
0
600Ω IN AND OUT
-10
-20
-30
-40
-50
-60
-70
-80
ALL-HOSTILE CROSSTALK
CROSSTALK
-40
-60
OFF-ISOLATION
(WITH SHUNT)
OFF-ISOLATION
CROSSTALK
-80
OFF-ISOLATION
(WITHOUT SHUNT)
-100
-120
-90
-100
0.5
1
10
100
10
100
1k
10k
100k
FREQUENCY (MHz)
FREQUENCY (Hz)
AUDIO FREQUENCY RESPONSE
VIDEO FREQUENCY RESPONSE
0
-0.01
-0.02
-0.03
-0.04
-0.05
-0.06
-0.07
-0.08
-0.09
-0.10
0
2
4
6
8
10
12
R
= R = 50Ω
IN OUT
50Ω IN AND OUT
10
100
1k
10k
100k
0.1
1
10
100
1000
FREQUENCY (Hz)
FREQUENCY (MHz)
_______________________________________________________________________________________
7
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s (c o n t in u e d )
(V+ = +5V, T = +25°C, unless otherwise noted.)
A
ON/OFF TIME vs. TEMPERATURE
COM RISE TIME (SOFT MODE)
(HARD MODE)
300
TURN-ON TIME, V+ = 3V
250
200
TURN-ON TIME, V+ = 5V
150
V
(1V/div)
COM
TURN-OFF TIME, V+ = 3V
100
50
0
TURN-OFF TIME, V+ = 5V
0
-40
-20
0
20
40
60
80
8/MAX549
100µs/div
TEMPERATURE (°C)
COM FALL TIME (SOFT MODE)
COM TURN-ON TIME (HARD MODE)
V
CS
(5V/div)
0
V
(1V/div)
COM
V
(2V/div)
COM
0
0
100µs/div
50ns/div
COM ON/OFF TIMES (SOFT MODE)
COM TURN-OFF TIME (HARD MODE)
V
(5V/div)
0
CS
V
(5V/div)
0
CS
TURN-OFF TIME
V
COM
(2V/div)
0
V
(2V/div)
0
COM
V
(2V/div)
COM
TURN-ON TIME
0
0
2
3
6
8
10 12 14 16 18 20
25ns/div
TIME (ms)
8
_______________________________________________________________________________________
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
8/MAX549
P in De s c rip t io n
PIN
NAME
NO1C
CBIASH
NO2C
SC
FUNCTION
MAX4548 MAX4549
1
2
3
4
1
2
3
4
Input 1 to Crosspoint C
High Side of Bias Network for Crosspoint C. Use to give the C outputs a DC bias when
inputs are AC-coupled (refer to the Using the Internal Bias Resistors section).
Input 2 to Crosspoint C
Shunt Input to Crosspoint C. Use for shunt capacitor of AC ground connection to improve
off-isolation, or as an additional input to switch matrix C.
5
6, 21
7
5
6, 21
7
NO3C
V+
Input 3 to Crosspoint C
Positive Supply Voltage. Supply range is 2.7V to 5.5V.
Input 1 to Crosspoint A
NO1A
NO1B
8
8
Input 1 to Crosspoint B
Shunt Input to Crosspoint A. Use for shunt capacitor of AC ground connection to improve
off-isolation, or as an additional input to switch matrix A.
9
9
SA
10
11
10
11
NO2A
NO2B
Input 2 to Crosspoint A
Input 2 to Crosspoint B
Shunt Input to Crosspoint B. Use for shunt capacitor of AC ground connection to improve
off-isolation, or as an additional input to switch matrix B.
12
12
SB
13
14
13
14
NO3A
NO3B
GND
SDA
DIN
Input 3 to Crosspoint A
Input 3 to Crosspoint B
15, 16, 32 15, 16, 32
Ground
17
–
–
17
–
2-Wire Serial-Interface Data Input. Data is clocked in on SCL’s rising edge.
3-Wire Serial-Interface Data Input. Data is clocked in on SCLK’s rising edge.
2-Wire Serial-Interface Clock Input
18
–
SCL
18
–
SCLK
A1
3-Wire Serial-Interface Clock Input
19
LSB+1 of 2-Wire Serial-Interface Address Field
Data Output of 3-Wire Serial-Interface. Input data is clocked on SCLK’s falling edge
delayed by 24 clock cycles. DOUT remains active when CS is high.
–
20
–
19
–
DOUT
A0
LSB of 2-Wire Serial-Interface Address Field
Chip Select of 3-Wire Serial Interface. Logic low on CS enables serial data to be clocked
in to device. Programming commands are executed on CS’s rising edge.
20
CS
Low Side of Bias Network for Crosspoint A and B. Use to give the A and B outputs a DC
bias when inputs are AC-coupled (refer to the Using the Internal Bias Resistors section).
22
23
22
23
ABIASL
ABIASH
High Side of Bias Network for Crosspoint A and B. Use to give the A and B outputs a DC
bias when inputs are AC-coupled (refer to the Using the Internal Bias Resistors section).
24
25
24
25
MID4
Audio Bypass for SA and SB Inputs
Output 2 of Crosspoint B
COM2B
_______________________________________________________________________________________
9
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
P in De s c rip t io n (c o n t in u e d )
PIN
NAME
FUNCTION
MAX4548 MAX4549
26
27
28
29
30
31
33
34
35
26
27
28
29
30
31
33
34
35
MID3
COM2A
MID2
Audio Bypass for IN3A and IN3B Inputs
Output 2 of Crosspoint A
Audio Bypass for IN2A and IN2B Inputs
Output 1 of Crosspoint B
COM1B
MID1
Audio Bypass for IN1A and IN1B Inputs
Output 1 of Crosspoint A
COM1A
COM2C
MID5
Output 2 of Crosspoint C
Video Bypass for All Inputs to Crosspoint C
Output 1 of Crosspoint C
COM1C
8/MAX549
High Side of Bias Network for Crosspoint C. Use to give the C outputs a DC bias when
inputs are AC-coupled (refer to the Using the Internal Bias Resistors section).
36
36
CBIASL
ACKNOWLEDGE
BIT
3V
t > 20ns
t > 20ns
F
R
50%
SCL
MAX4548
MAX4549
0
V
OUT
V+
V+
10nF
2-WIRE
+0.5V
0
t
ON
V
OUT
V
OUT -
0.5V
NO_ _
COM _
V
NO_ _
V
OUT
0
t
OFF
R
L
C
L
300Ω
35pF
2 OR 3
3V
0
DECODER/
µP
CS
50%
CONTROLLER
SERIAL
INTERFACE
V
OUT
•
0.9
0.1
V
OUT
GND
3-WIRE
0
t
ON
C INCLUDES FIXTURE AND STRAY CAPACITANCE.
V
OUT
L
V
= V
[R / (R + R )]
OUT COM L L ON
•
V
OUT
0
t
OFF
Figure 1. Switching Times
10 ______________________________________________________________________________________
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
8/MAX549
V+/2
MAX4548
MAX4549
V
OUT
R
L
10k
10k
R
S
NO1_
COM1_
COM2_
ANALYZER
ANALYZER
SIGNAL
GENERATOR
2/3
R
L
DECODER/
ENCODER
V+/2
V+
S_
GND
10nF
1µF
10k
V
IN
Figure 2a. Off-Isolation
R
S
R
S
V
IN
10k
10k
SIGNAL
GENERATOR
10k
V
OUT
MAX4548
MAX4549
SIGNAL
GENERATOR
Figure 2c. All-Hostile Crosstalk
De t a ile d De s c rip t io n
The MAX4548/MAX4549 are serial-interface, program-
mable, triple 3x2 audio/video crosspoint switches. Each
device contains two crosspoint switches with a com-
mon bypass network and another crosspoint switch
with its own bypass network. The switches are indepen-
dently controlled through the on-chip serial interface.
The MAX4548 uses a 2-wire I2C-compatible serial com-
munications protocol, while the MAX4549 uses a 3-wire
SPI/QSPI/MICROWIRE-compatible serial communica-
tions protocol.
These ICs include twelve selectable bias-resistor net-
works (one for each input) for use with AC-coupled
input signals. They operate from a single supply of
+2.7V to +5.5V and are optimized for use in the audio
frequency range to 20kHz and at video frequencies to
10MHz. They feature 35Ω max on-resistance, 7Ω on-
resistance matching between channels, 5Ω on-resis-
tance flatness, and as low as 0.07% total harmonic
distortion.
MAX4548
MAX4549
10k
10k
Figure 2b. Crosstalk
______________________________________________________________________________________ 11
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
Table 2. COM Data-Byte Format
(C0, C1, C2, C3, C4, C5 = “1”)
Table 1. Command-Byte Format
BIT
REGISTER
C7
C6
C5
C4
C3
C2
C1
C0
Clickless Mode
POWER-UP
DEFAULT
STATE
BIT
DESCRIPTION
Bias
COM2C
COM1C
COM2B
COM1B
COM2A
COM1A
D7
D6
D5
D4
Don’t care
Don’t care
Don’t care
Don’t care
—
—
—
—
Controls the switch connected to S_;
1 = close switch, 0 = open switch.
D3
D2
D1
D0
1
0
0
0
Aud io off-is ola tion is -85d B a t 20kHz, c ros s ta lk is
-85dB at 20kHz, and video off-isolation is -62dB at
10MHz. The SA, SB, a nd SC (s hunt) inp uts furthe r
improve off-isolation, allowing for the addition of exter-
na l s hunt c a p a c itors to c onne c t the outp uts to AC
grounds. When using the bias resistors, MID_ inputs
improve crosstalk by providing an AC ground at the
common bias points. Resistance from the bias points to
the inputs allows AC signals to pass through the device
a nd imp rove c ros s ta lk p e rforma nc e (re fe r to the
Functional Diagram). These devices feature a clickless
operation mode for noiseless audio switching. Use the
s e ria l inte rfa c e to s e le c t the c lic kle s s or s ta nd a rd -
switching mode for each individual output.
Controls the switch connected to NO3_;
1 = close switch, 0 = open switch.
Controls the switch connected to NO2_;
1 = close switch, 0 = open switch.
8/MAX549
Controls the switch connected to NO1_;
1 = close switch, 0 = open switch.
Ap p lic a t io n s In fo rm a t io n
The MAX4548/MAX4549 are divided into five functional
bloc ks: the c ontrol-logic bloc k, thre e switc h-ma trix
blocks, and the bias-resistor block (see Functional
Diagram). The control-logic block accepts commands
through the serial interface and uses those commands
to control the four remaining blocks.
SCL
SDA
A7
A0
C7
C0
D7
D0
SRT
ACK
ACK
ACK
STOP
Figure 3. 2-Wire Serial-Interface Timing Diagram (“WriteByte’’)
SCL
SDA
A7
A0
C7
C0
D15
D8
D7
D0
SRT
ACK
ACK
ACK
ACK
STOP
Figure 4. 2-Wire Serial-Interface Timing Diagram (“WriteWord’’)
12 ______________________________________________________________________________________
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
8/MAX549
controls which bias network is active (see Functional
Diagram).
Co m m a n d -Byt e a n d Da t a -Byt e
P ro g ra m m in g
The devices are programmed with a command byte and
a data byte or data word (2 bytes). Each bit of the
command byte selects one of the functional blocks to be
controlled by the subsequent data byte (word). The data
byte (word) sets the state of the selected block(s). For
the three switch-matrix blocks, the data byte sets the
switch state. For the bias-resistor block, the data word
A logic “1” in any bit position of the data byte makes
that function active, while a logic “0” makes it inactive.
Tables 1–4 describe the command byte and the corre-
sponding data byte. If more than one bit of the com-
mand byte is set, the data byte programs all of the
corresponding blocks. This operation is useful, for
instance, to simultaneously set all switch matrices to
A
B
C
D
E
F
G
H
I
J
t
t
LOW HIGH
SCL
SDA
t
t
t
t
HD:DAT
HD:STA
SU:STA
SU:DAT
t
t
SU:STO
BUF
A = START CONDITION
F = LSB OF COMMAND BYTE
B = MSB OF ADDRESS BYTE
C = LSB OF ADDRESS BYTE
G = ACKNOWLEDGE CLOCKED INTO MASTER
H = MSB OF DATA BYTE/WORD
D = ACKNOWLEDGE CLOCKED INTO MASTER
E = MSB OF COMMAND BYTE
I = LSB OF DATA BYTE/WORD
J = ACKNOWLEDGE CLOCKED INTO MASTER
Figure 5. 2-Wire Serial-Interface Timing Details
Table 3. Bias Data-Byte (C6 = “1”)
BIT
POWER-UP
DEFAULT
STATE
DESCRIPTION
D15
D14
D13
D12
D11
D10
D9
Don’t care
Don’t care
Don’t care
Don’t care
–
–
–
–
1
1
1
1
1
1
1
1
1
1
1
1
Controls SC bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors.
Controls NO3C bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors.
Controls NO2C bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors.
Controls NO1C bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors.
Controls SB bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors.
Controls SA bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors.
Controls NO3B bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors.
Controls NO3A bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors.
Controls NO2B bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors.
Controls NO2A bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors.
Controls NO1B bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors.
Controls NO1A bias resistors; 1 = connect bias resistors, 0 = disconnect bias resistors.
D8
D7
D6
D5
D4
D3
D2
D1
D0
______________________________________________________________________________________ 13
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
Table 4. Clickless Mode Format (C7 = “1”)
POWER-UP
DEFAULT
STATE
BIT
DESCRIPTION
D7
D6
D5
D4
D3
D2
D1
D0
Don’t care
Don’t care
—
—
1
Controls COM2C clickless mode; 1 = enables clickless mode, 0 = disables clickless mode.
Controls COM1C clickless mode; 1 = enables clickless mode, 0 = disables clickless mode.
Controls COM2B clickless mode; 1 = enables clickless mode, 0 = disables clickless mode.
Controls COM1B clickless mode; 1 = enables clickless mode, 0 = disables clickless mode.
Controls COM2A clickless mode; 1 = enables clickless mode, 0 = disables clickless mode.
Controls COM1A clickless mode; 1 = enables clickless mode, 0 = disables clickless mode.
1
1
1
1
1
Table 5. “WriteByte” Protocol
ADDRESS BYTE
COMMAND BYTE
DATA BYTE
8/MAX549
A7 A6 A5 A4 A3 A2 A1 A0
C7 C6 C5 C4 C3 C2 C1 C0
D7 D6 D5 D4 D3 D2 D1 D0
S
R
T
1
0
0
1
1
A1 A0
0
A
C
K
C
L
I
C
K
B
I
A
S
C
O
M
2
C
O
M
1
C
O
M
2
C
O
M
1
C
O
M
2
C
O
M
1
A
C
K
A
C
K
S
T
O
P
C
C
B
B
A
A
SRT = Start Condition
ACK = Acknowledge Condition
STOP = Stop Condition
Table 6. “WriteWord” Protocol
ADDRESS BYTE
COMMAND BYTE
C7 C6 C5 C4 C3 C2 C1 C0
DATA WORD
A7 A6 A5 A4 A3 A2 A1 A0
D15 D14 D13 D12 D11 D10 D9 D8
D7 D6 D5 D4 D3 D2 D1 D0
S
R
T
1
0
0
1
1
A1 A0
0
A
C
K
C
L
I
C
K
B
I
A
S
C
O
M
2
C
O
M
1
C
O
M
2
C
O
M
1
C
O
M
2
C
O
M
1
A
C
K
A
C
K
A
C
K
S
T
O
P
C
C
B
B
A
A
SRT = Start Condition
ACK = Acknowledge Condition
STOP = Stop Condition
Table 7. “SPI” Protocol
COMMAND BYTE
DATA WORD
C7 C6 C5 C4 C3 C2 C1 C0 D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
C
L
I
C
K
B
I
A
S
C
O
M
2
C
O
M
1
C
O
M
2
C
O
M
1
C
O
M
2
C
O
M
1
C
C
B
B
A
A
SRT = Start Condition
ACK = Acknowledge Condition
STOP = Stop Condition
14 ______________________________________________________________________________________
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
8/MAX549
CS
SCLK
1
24
D0
DIN
C7
C0 D15
COMMAND BYTE
DATA BYTE
Figure 6. 3-Wire Serial-Interface Communication
• • •
CS
t
t
CH
t
CSH
CSS
t
t
CL
CSH
SCLK
• • •
t
DS
t
DH
DIN
• • •
t
DV
t
DO
t
TR
DOUT
• • •
Figure 7. 3-Wire Serial-Interface Timing Details
the same configuration. Any block that is not selected
in the command byte remains unchanged.
while Tables 5 and 6 detail the format of the signals.
The MAX4548 is a receive-only device and must be
controlled by the bus master device. A bus master
device communicates by transmitting the address byte
of the slave device over the bus and then transmitting
the desired information. Each transmission consists of
a start condition, a command byte, a data byte or word,
and finally a stop condition. The slave device acknowl-
edges the recognition of its address by pulling the SDA
line low for one clock period after the address byte is
transmitted. The slave device also issues a similar
acknowledgment after the command byte and again
after each data byte.
2 -Wire S e ria l In t e rfa c e
The MAX4548 uses a 2-wire I2C-compatible serial inter-
face. The COM_ _ registers and the Clickless Mode
register use the “WriteByte” protocol, which consists of
an address byte, followed by a command byte, fol-
lowed by a data byte (Table 5). The Bias register uses
the “WriteWord” protocol, which consists of an address
byte, followed by a command byte, followed by a data
word (Table 6).
To address a given chip, the A0 and A1 bits in the
address byte must duplicate the values present at the
A0 and A1 pins of that chip. The rest of the address bits
must match those shown in Tables 5 and 6. The com-
ma nd a nd d a ta -b yte d e ta ils a re d e s c rib e d in the
Command-Byte and Data-Byte Programming section.
Start and Stop Conditions
The bus master signals the beginning of a transmission
with a start condition by transitioning SDA from high to
low while SCL is high. When the master has finished
communicating with the slave, it issues a stop condition
by transitioning SDA from low to high while SCL is high.
The bus is then free for another transmission.
The 2-wire serial interface requires only two I/O lines of
a standard microprocessor port. Figures 3, 4, and 5
detail the timing diagram for signals on the 2-wire bus,
______________________________________________________________________________________ 15
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
Slave Address (Address Byte)
The MAX4548 uses an 8-bit slave address. To select a
slave address, connect A0 and A1 to V+ or GND. The
MAX4548 has four possible slave addresses, thus a
maximum of four of these devices may share the same
2-bit address bus. The slave devices on the MAX4548
monitor the serial bus continuously, waiting for a start
condition followed by an address byte. When a slave
device recognizes its address, it acknowledges that it is
ready for further communication by pulling the SDA line
low for one clock period.
Im p ro vin g Off-Is o la t io n
To improve off-isolation, connect the S_ input to ground
either directly (DC ground) or through capacitors (AC
ground). Closing S_ then effectively grounds the unused
outputs.
Us in g t h e In t e rn a l Bia s Re s is t o rs
Us e the inte rna l b ia s -re s is tor ne tworks to g ive the
switch outputs a DC bias when the switch terminals are
AC-coupled. Programming the switches that connect
the bias resistors to the inputs is accomplished via bit
C6 of the command byte. Connect _BIASH and _BIASL
inputs to DC levels (for example, V+ and GND), and
activate the switch connecting the appropriate outputs.
This applies a voltage midway between _BIASH and
_BIASL to the input (refer to Tables 1 and 4, and the
Functional Diagram). To improve crosstalk when using
the bias resistors, connect the MID_ inputs to ground
through capacitors.
3 -Wire S e ria l In t e rfa c e
The MAX4549 3-wire s e ria l inte rfa c e is SPI/QSPI/
MICROWIRE-compatible. An active-low chip-select (CS)
input enables the device to receive data for the serial
input (DIN). Data is clocked in on the rising edge of the
serial-clock (SCLK) signal. A total of 24 bits is needed in
each write cycle. Segmented write cycles are allowed
(three 8-bit-wide transfers) if CS remains low. The first
bit clock into the MAX4549 is the command byte’s MSB,
and the last bit clocked in is the data byte’s LSB. When
programming the COM_ _ registers and the Clickless
Mode register, the last eight bits of the data word are
“don’t care.” While shifting data, the device remains in
its original configuration. After all 24 bits are clocked
into the input shift register, a rising edge on CS latches
the data into the MAX4549 internal registers, initiating
the device’s change of state. Figures 6 and 7 and Table
7 show the details of the 3-wire protocol, as it applies to
the MAX4549.
8/MAX549
Clic k le s s S w it c h in g
Audible switching transients (“clicks”) are eliminated in
this mode of operation. When an output is configured as
“clickless,” the gate signal of the switches connected to
the output are controlled with slow-moving voltages. As
a result, the output slew rates are significantly reduced.
Program clickless operation via bit C7 of the command
b yte (re fe r to Ta b le s 1 a nd 4, a nd the Func tiona l
Diagram). Each operating switch may draw 2mA during
a transition. When another command is given while a
s witc h is c ha ng ing s ta te in the s oft mod e , the
MAX4548/MAX4549 will complete the previous com-
mand in the hard mode. To avoid this situation, do not
issue a second command until the transition of the
switch is complete.
DOUT is the shift register’s output. Data at DOUT is sim-
ply the input data delayed by 24 clock cycles, with data
a p p e a ring s ync hronous with SCLK’s fa lling e d g e .
Transitions at DIN and SCLK have no effect when CS is
high, and DOUT holds the last bit in the shift register.
P o w e r-Up S t a t e
The MAX4548/MAX4549 feature a preset power-up state.
Refer to Tables 2, 3, and 4 to determine the power-up
state of the devices.
Da is y-Ch a in in g
To program several MAX4549s, “daisy-chain” the devices
by connecting DOUT of the first device to DIN of the sec-
ond, and so on. The CS pins of all devices are connected
together, and data is shifted through the MAX4549 in
series. Twenty-four bits of data per device are required
for proper programming of all devices. When CS is
brought high, all devices are updated simultaneously.
Byp a s s Ca p a c it o rs
The MAX4548/MAX4549 have five bypass pins for the
internal bias resistor networks (MID_). The equivalent AC
impedance at these pins is 10kΩ. To improve crosstalk
performance, bypass MID_ pins with 10µF. For lowest
cost, standard aluminum electrolytic capacitors in parallel
with 0.1µF ceramic chip capacitors perform well in audio
applications. For computer audio applications, a single
1µF capacitor is sufficient. For telecom voice applica-
tions, a 0.1µF capacitor is adequate. For video applica-
tions, bypass MID_ with 0.1µF in parallel with 1000pF.
This provides a low impedance across the entire video
bandwidth.
Ad d re s s a b le S e ria l In t e rfa c e
To program several MAX4549s individually using a sin-
gle processor, connect the DIN pins of each MAX4549
together and control CS on each MAX4549 separately.
To select a particular device, drive the corresponding
CS low, clock in the 24-bit command, then drive CS high
to execute the command. Typically only one MAX4549
is addressed at a time.
16 ______________________________________________________________________________________
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
8/MAX549
Fu n c t io n a l Dia g ra m
31
COM1A
COM2A
7
10
13
9
NO1A
NO2A
NO3A
SA
27
MAX4548
MAX4549
SWITCH MATRIX A
SWITCH MATRIX B
29
25
COM1B
COM2B
8
11
14
12
NO1B
NO2B
NO3B
SB
35
33
1
3
5
4
COM1C
COM2C
NO1C
NO2C
NO3C
SC
19
20
18
17
A1 (DOUT)
A0 (CS)
SWITCH MATRIX C
CONTROL LOGIC
6, 21
V+
SCL (SCLK)
SDA (DIN)
15, 16, 32
GND
23
2
22
36
ABIASH
ABIASL
CBIASL
CBIASH
BIAS RESISTOR NETWORK
30
28
26
34
24
MID5
MID4
MID1
MID2
MID3
( ) ARE FOR MAX4549
______________________________________________________________________________________ 17
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
________________________________________________________P a c k a g e In fo rm a t io n
8/MAX549
Ch ip In fo rm a t io n
TRANSISTOR COUNT: 7700
SUBSTRATE IS INTERNALLY CONNECTED TO V+.
18 ______________________________________________________________________________________
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
8/MAX549
NOTES
______________________________________________________________________________________ 19
S e ria lly Co n t ro lle d , Trip le 3 x 2 Au d io /Vid e o
Cro s s p o in t S w it c h e s
NOTES
8/MAX549
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
20 ____________________Ma x im In t e g ra t e d P ro d u c t s , 1 2 0 S a n Ga b rie l Drive , S u n n yva le , CA 9 4 0 8 6 4 0 8 -7 3 7 -7 6 0 0
© 1999 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
相关型号：
MAX4549EAX-T
Cross Point Switch, 1 Func, 3 Channel, PDSO36, 0.300 INCH, 0.80 MM PITCH, SSOP-36
MAXIM
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