MAX4532EWP [MAXIM]
Low-Voltage, CMOS Analog Multiplexers/Switches with Enable Inputs and Address Latching; 低电压， CMOS模拟多路复用器/开关，带有使能输入和地址锁存
| 型号： | MAX4532EWP |
| 厂家： | 
MAXIM INTEGRATED PRODUCTS |
| 描述： | Low-Voltage, CMOS Analog Multiplexers/Switches with Enable Inputs and Address Latching |
| 文件： | 总16页 (文件大小：149K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
19-1162; Rev 0; 12/96
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
01/MAX4532
_______________Ge n e ra l De s c rip t io n
____________________________Fe a t u re s
The MAX4530/MAX4531/MAX4532 a re low-volta g e ,
CMOS analog ICs configured as an 8-channel multi-
p le xe r (mux) (MAX4530), two 4-c ha nne l muxe s
(MAX4531), a nd thre e s ing le -p ole /d oub le -throw
switches (MAX4532). These devices are pin compatible
with the ind us try-s ta nd a rd 74HC4351/74HC4352/
74HC4353. All d e vic e s ha ve two c omp le me nta ry
switch-enable inputs and address latching.
♦ Pin Compatible with
74HC4351/74HC4352/74HC4353
♦ ±2.0V to ±6V Dual Supplies
+2.0V to +12V Single Supply
♦ 75ΩSignal Paths with ±5V Supplies
150ΩSignal Paths with +5V Supply
♦ Rail-to-Rail Signal Handling
The MAX4530/MAX4531/MAX4532 operate from a sin-
gle supply of +2V to +12V, or from dual supplies of
±2V to ±6V. On-resistance (150Ω max) is matched
between switches to 8Ω max. Each switch can handle
rail-to-rail analog signals. Off-leakage current is only
♦ t
and t
= 150ns and 120ns at ±4.5V
ON
OFF
♦ <1µW Power Consumption
♦ >2kV ESD Protection per Method 3015.7
♦ TTL/CMOS-Compatible Inputs
1nA at T = +25°C and 50nA at T = +85°C.
A
A
All digital inputs have 0.8V and 2.4V logic thresholds,
ensuring both TTL- and CMOS-logic compatibility when
using ±5V or a single +5V supply.
♦ Small, 20-Pin SSOP/SO/DIP Packages
______________Ord e rin g In fo rm a t io n
________________________Ap p lic a t io n s
Battery-Operated Equipment
Data Acquisition
Test Equipment
Avionics
PART
TEMP. RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
PIN-PACKAGE
20 Plastic DIP
20 SO
MAX4530CPP
MAX4530CWP
MAX4530CAP
MAX4530C/D
20 SSOP
Dice*
Networking
Ordering Information continued on last page.
ATE Equipment
Audio-Signal Routing
*Contact factory for availability.
__________________________________________________________P in Co n fig u ra t io n s
TOP VIEW
NO1
NO3
N.C.
COM
NO7
NO5
EN1
EN2
V-
1
2
3
4
5
6
7
8
9
20 V+
NO0B
NO1B
N.C.
1
2
3
4
5
6
7
8
9
20 V+
NOB
NCB
N.C.
1
2
3
4
5
6
7
8
9
20 V+
19 NO2
18 NO4
19 NO1A
18 NO2A
19 COMB
18 COMC
NO0
COMA
NOC
17
16 NO6
COMB
NO3B
NO2B
EN1
17
16 NO0A
NO3A
NOA
COMA
NCA
EN1
17
16 NCC
ADDC
ADDC
15
15
15
14 N.C.
13 ADDB
12 ADDA
11 LE
14 N.C.
13 ADDB
12 ADDA
11 LE
14 N.C.
13 ADDB
12 ADDA
11 LE
LOGIC
LOGIC
LOGIC
EN2
EN2
V-
V-
GND 10
GND 10
GND 10
MAX4530
MAX4531
MAX4532
NARROW DIP/WIDE SO
NARROW DIP/WIDE SO
NARROW DIP/WIDE SO
N.C. = NOT CONNECTED
Truth Table appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
1
For free samples & the latest literature: http://www.maxim-ic.com, or phone 1-800-998-8800
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
ABSOLUTE MAXIMUM RATINGS
Voltages Referenced to V-
Continuous Power Dissipation (T = +70°C)
A
V+ .............................................................................-0.3 to +13V
Voltage into Any Terminal (Note 1)
or ±20mA (whichever occurs first) ..............-0.3 to (V+ + 0.3V)
Continuous Current into Any Terminal..............................±20mA
Peak Current, NO, NC, or COM_
Plastic DIP (derate 11.11mW/°C above +70°C) ...........889mW
SO (derate 10.00mW/°C above +70°C)........................800mW
SSOP (derate 8.00mW/°C above +70°C) .....................640mW
Operating Temperature Ranges
MAX453_C_P .......................................................0°C to +70°C
MAX453_E_P ....................................................-40°C to +85°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10sec) .............................+300°C
(pulsed at 1ms, 10% duty cycle)...................................±40mA
ESD per Method 3015.7 ..................................................>2000V
Note 1: Voltages exceeding V+ or V- on any signal terminal are clamped by internal diodes. Limit forward-diode current to
maximum current rating.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS—Dual Supplies
(V+ = +5V ±10%, V- = -5V ±10%, GND = 0V, V
otherwise noted.)
= V
= V = 2.4V, V
= V
= 0.8V, T = T
to T , unless
MAX
ADD_H
EN_H
LE
ADD_L
EN_L
A
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
SWITCH
SYMBOL
CONDITIONS
UNITS
V
, V
NC_
,
COM NO
V
Analog-Signal Range
(Note 3)
V-
V+
V
Ω
T
= +25°C
45
1
75
100
8
A
I
NO
= 2mA, V
= ±3.5V,
COM
Channel On-Resistance
R
ON
V+ = +4.5V, V- = -4.5V
T
A
= T
to T
MIN
MAX
MAX
MAX
MAX
T
A
= +25°C
On-Resistance Matching
Between Channels (Note 4)
I
NO
= 2mA, V = ±4.5V,
COM
01/MAX4532
∆R
Ω
ON
V+ = +4.5V, V- = -4.5V
T
A
= T
to T
12
10
13
1
MIN
T
A
= +25°C
4
On-Resistance Flatness
(Note 5)
I
NO
= 2mA; V
= -3V, 0V, +3V;
COM
R
Ω
FLAT(ON)
V+ = 5V; V- = -5V
T
A
= T
to T
MIN
±
T
A
= +25°C
-1
0.01
NO-Off Leakage Current
(Note 6)
V
NO
= ±4.5V, V
=
COM
4.5V,
I
nA
NO(OFF)
V+ = 5.5V, V- = -5.5V
T
A
= T
to T
-10
10
MIN
V
= ±4.5V,
±
T
= +25°C
-2
-100
-1
0.01
0.01
2
100
1
COM
A
V
=
4.5V,
MAX4530
NO
V+ = 5.5V, V- = -5.5V
T
A
= T
to T
MIN
MAX
MAX
COM-Off Leakage Current
(Note 6)
I
nA
nA
COM(OFF)
V
= ±4.5V,
T = +25°C
A
COM
MAX4531/
MAX4532
±
V
=
4.5V,
NO
V+ = 5.5V, V- = -5.5V
T
A
= T
to T
-50
50
MIN
T
= +25°C
-2
-100
-1
0.01
0.01
2
100
1
A
V
= ±4.5V,
COM
MAX4530
T
A
= T
to T
MIN
MAX
MAX
COM-On Leakage Current
(Note 6)
V+ = 5.5V,
V- = -5.5V
I
COM(ON)
T = +25°C
A
MAX4531/
MAX4532
T
A
= T
to T
-50
50
MIN
2
_______________________________________________________________________________________
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
01/MAX4532
ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)
(V+ = +5V ±10%, V- = -5V ±10%, GND = 0V, V
otherwise noted.)
= V
= V = 2.4V, V
= V
= 0.8V, T = T
to T , unless
MAX
ADD_H
EN_H
LE
ADD_L
EN_L
A
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
DIGITAL LOGIC INPUT
V
, V
LE
,
ADD_H EN_H
Logic High Threshold
Logic Low Threshold
T
= T
= T
to T
1.5
2.4
V
V
A
MIN
MAX
V
V
, V
,
ADD_L EN_L
T
A
to T
0.8
1.5
MIN
MAX
V
LE
Input Current with
Input Voltage High
I
, I
LE
,
ADD_H EN_H
V
= 2.4V, V
= 2.4V, V
= 0.8V
= 0.8V
-0.1
-0.1
0.01
0.1
0.1
µA
µA
ADD_H
ADD_L
I
Input Current with
Input Voltage Low
I
, I
,
ADD_L EN_L
V
ADD_H
ADD_L
I
LE
SUPPLY
Power-Supply Range
V+, V-
I+
±2.0
-1
±6
1
V
T
= +25°C
0.001
0.001
A
V
= V
= V = 0V/V+,
LE
ADD_
EN_
Positive Supply Current
µA
V+ = 5.5V, V- = -5.5V
V = V = V = 0V/V+,
EN_
T
A
= T
to T
-10
-1
10
1
MIN
MAX
MAX
MAX
T
A
= +25°C
Negative Supply
Current
LE
ADD_
I-
µA
µA
V+ = 5.5V, V- = -5.5V
T
A
= T
to T
-10
-1
10
1
MIN
T
A
= +25°C
V
= V = V = 0V/V+,
LE
EN_
ADD_
I
Supply Current
I
GND
GND
V+ = 5.5V, V- = -5.5V
T
A
= T
to T
-10
10
MIN
DYNAMIC
T
= +25°C
60
150
250
A
Transition Time
t
Figure 1
Figure 3
Figure 2
Figure 2
Figure 4
Figure 6
Figure 5
ns
ns
ns
ns
ns
ns
ns
pC
dB
TRANS
T
A
= T to T
MIN MAX
Break-Before-Make
Interval
t
T
A
= +25°C
= +25°C
4
10
10
BBM
T
A
150
250
100
150
Enable Turn-On Time
Enable Turn-Off Time
t
ON(EN)
T
A
= T
to T
MIN
MAX
MAX
MAX
MAX
MAX
T
A
= +25°C
40
t
OFF(EN)
T
A
= T
to T
MIN
T
A
= +25°C
50
60
0
Setup Time, Channel
Select to Latch Enable
t
S
T
A
= T
to T
MIN
T
A
= +25°C
Hold Time, Latch Enable
to Channel Select
t
H
T
A
= T
to T
0
MIN
T
A
= +25°C
60
70
Pulse Width,
Latch Enable
t
MPW
T
A
= T
to T
MIN
Charge Injection
(Note 3)
Q
C
= 1nF, V = 0V, Figure 6
T
A
= +25°C
= +25°C
1.5
-65
5
L
NO
V
EN2
= 0V, R = 1kΩ,
L
Off Isolation (Note 7)
V
ISO
T
A
f = 1MHz
V
= 0V, V
= 2.4V,
EN2
EN1
Crosstalk Between
Channels
V
CT
f = 1MHz, V
R = 1kΩ
L
= 1V
,
T = +25°C
A
-92
dB
GEN
p-p
_______________________________________________________________________________________
3
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
ELECTRICAL CHARACTERISTICS—Dual Supplies (continued)
(V+ = +5V ±10%, V- = -5V ±10%, GND = 0V, V
otherwise noted.)
= V
= V = 2.4V, V
= V
= 0.8V, T = T
A
to T , unless
MAX
ADD_H
EN_H
LE
ADD_L
EN_L
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
Distortion, THD
T
= +25°C
= +25°C
= +25°C
0.025
A
Logic Input
Capacitance
C
f = 1MHz
f = 1MHz, V = V = 0V
COM
T
A
3
pF
pF
IN
NO-Off Capacitance
COM-Off Capacitance
C
C
T
A
3
NO(OFF)
EN
MAX4530
MAX4531
MAX4532
MAX4530
MAX4531
MAX4532
15
9
f = 1MHz,
= V
T
A
= +25°C
= +25°C
pF
pF
COM(OFF)
COM(ON)
V
EN2
= 0V
COM
6
26
20
17
f = 1MHz,
= V
COM-On Capacitance
C
V
EN1
= 0V,
COM
T
A
V
EN2
= 2.4V
ELECTRICAL CHARACTERISTICS—Single +5V Supply
(V+ = +5V ±10%, V- = 0V, GND = 0V, V
otherwise noted.)
= V
= V = 2.4V, V
= V
= 0.8V, T = T
to T , unless
MAX
ADD_H
EN_H
LE
ADD_L
EN_L
A
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
SWITCH
SYMBOL
CONDITIONS
UNITS
01/MAX4532
Analog Signal Range
V
, V
(Note 3)
= 1mA, V
0
V+
V
COM NO
T
= +25°C
80
2
150
200
A
I
NO
= 3.5V,
COM
Ω
On-Resistance
R
ON
V+ = 4.5V
T
A
= T
to T
MIN
MAX
MAX
On-Resistance
Matching Between
Channels (Notes 3, 4)
T
A
= +25°C
15
20
I
NO
= 1mA, V = 3.5V,
COM
Ω
∆R
ON
V+ = 4.5V
T
A
= T
to T
MIN
I
= 1mA; V
= 3V, 2V, 1V;
COM
NO
Ω
On-Resistance Flatness
R
T
= +25°C
= +25°C
10
FLAT
A
V+ = 5V
T
A
-1
-10
-2
1
10
2
NO-Off Leakage
Current (Note 8)
V
= 4.5V; V
= 4.5V, 1V;
COM
NO
I
nA
NO(OFF)
V+ = 5.5V
T
A
= T
to T
MIN
MAX
MAX
MAX
MAX
MAX
T
A
= +25°C
MAX4530
V
V
= 4.5V, 1V;
= 1V, 4.5V;
COM
T
A
= T
to T
-100
-1
100
1
MIN
COM-Off Leakage
Current (Note 8)
I
nA
nA
NO
COM(OFF)
T
A
= +25°C
MAX4531/
MAX4532
V+ = 5.5V
T
A
= T
to T
-50
-2
50
2
MIN
T
A
= +25°C
MAX4530
T
A
= T
to T
-100
-1
100
1
MIN
COM-On Leakage
Current (Note 8)
I
COM(ON)
MAX4531/
MAX4532
T = +25°C
A
T
A
= T
to T
-50
50
MIN
4
_______________________________________________________________________________________
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
01/MAX4532
ELECTRICAL CHARACTERISTICS—Single +5V Supply (continued)
(V+ = +5V ±10%, V- = 0V, GND = 0V, V
otherwise noted.)
= V
= V = 2.4V, V
= V
= 0.8V, T = T
to T , unless
MAX
ADD_H
EN_H
LE
ADD_L
EN_L
A
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
DIGITAL LOGIC INPUT
Logic-High Threshold
V
,
ADD_H
T
= T
= T
to T
1.5
1.5
2.4
V
V
MIN
MAX
A
V
, V
EN_H LE
V
ADD_L
,
Logic-Low Threshold
T
A
to T
0.8
-0.1
-0.1
MIN
MAX
V
, V
EN_L LE
Input Current with
Input Voltage High
I
,
ADD_H
V
= 2.4V, V = 0.8V
0.1
0.1
µA
µA
H
L
I
, I
EN_H LE
Input Current with
Input Voltage Low
I
,
ADD_L
V
H
= 2.4V, V = 0.8V
L
I
, I
EN_L LE
SUPPLY
Power-Supply Range
2.0
-1.0
-10
-1.0
-10
-1.0
-10
12
1.0
10
V
T
= +25°C
A
V
= V
= V = 0V, V+;
LE
ADD
EN_
Positive Supply Current
I+
I-
µA
V+ = 5.5V; V- = 0V
T
A
= T
to T
MIN
MAX
MAX
MAX
T
A
= +25°C
1.0
10
Negative Supply
Current
V
EN_
V+ = 5.5V; V- = 0V
= V = V = 0V, V+;
LE
ADD
µA
µA
T
A
= T
to T
MIN
T
A
= +25°C
1.0
10
V
= V = V = 0V, V+;
LE
EN_
ADD
I
Supply Current
I
GND
GND
V+ = 5.5V; V- = 0V
T
A
= T
to T
MIN
DYNAMIC
T
= +25°C
90
200
A
Transition Time
t
Figure 1, V = 3V
NO
ns
ns
ns
ns
ns
ns
ns
pC
TRANS
T
A
= T
to T
250
MIN
MAX
Break-Before-Make
Interval
t
Figure 3 (Note 3)
Figure 2
T
A
= +25°C
= +25°C
10
20
BBM
T
A
100
200
250
100
125
Enable Turn-On Time
(Note 3)
t
ON(EN)
T
A
= T
to T
MIN
MAX
MAX
MAX
MAX
MAX
T
A
= +25°C
40
Enable Turn-Off Time
(Note 3)
t
Figure 3
OFF(EN)
T
A
= T
to T
MIN
T
A
= +25°C
50
60
0
Set-Up Time, Channel
Select to Latch Enable
t
S
Figure 7
T
A
= T
to T
MIN
T
A
= +25°C
Hold Time, Latch Enable
to Channel Select
t
Figure 7
H
T
A
= T
to T
0
MIN
T
A
= +25°C
60
70
Pulse Width, Latch
Enable
t
Figure 7
MPW
Q
T
A
= T
to T
MIN
Charge Injection
(Note 3)
Figure 7, C = 1nF, V = 0V
T = +25°C
A
1.5
5
L
NO
_______________________________________________________________________________________
5
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
ELECTRICAL CHARACTERISTICS—Single +3V Supply
(V+ = +2.7V to 3.6V, V- = 0V, GND = 0V, V
otherwise noted.)
= V
= V = 2.4V, V
= V
= 0.5V, T = T
A
to T , unless
MAX
ADD_H
EN_H
LE
ADD_L
EN_L
MIN
MIN
TYP
(Note 2)
MAX
PARAMETER
SYMBOL
CONDITIONS
UNITS
SWITCH
Analog Signal Range
On-Resistance
V
(Note 3)
= 1mA, V
0
V+
V
ANALOG
T
= +25°C
220
500
600
A
I
= 1.5V,
COM
NO
R
Ω
ON
V+ = 2.7V
T
A
= T to T
MIN MAX
DYNAMIC
Figure 1, V = 2.4V,
IN
Transition Time (Note 3)
t
T
= +25°C
= +25°C
= +25°C
= +25°C
150
150
60
350
350
150
ns
ns
ns
ns
TRANS
A
V
NO1
= 1.5V, V
= 0V
NO8
Enable Turn-On Time
(Note 3)
Figure 3, V
= 2.4V,
INH
t
T
A
ON(EN)
V
INL
= 0V, V
= 1.5V
NO1
Enable Turn-Off Time
(Note 3)
Figure 3, V
= 2.4V,
INH
t
T
A
OFF(EN)
V
INL
= 0V, V
= 1.5V
NO1
Set-Up Time, Channel
Select to Latch Enable)
t
S
Note 3
T
A
100
Hold Time, Latch Enable to
Channel Select
t
Note 3
Note 3
T
= +25°C
= +25°C
A
0
ns
ns
H
A
Pulse Width, Latch Enable
t
T
120
MPW
Note 2: The algebraic convention, where the most negative value is a minimum and the most positive value a maximum, is used in
this data sheet.
Note 3: Guaranteed by design.
01/MAX4532
Note 4: ∆R
= R (max) - R (min).
ON ON
ON
Note 5: Flatness is defined as the difference between the maximum and minimum value of on-resistance as measured over the
specified analog signal ranges, i.e., V = 3V to 0V and 0V to -3V.
NO
Note 6: Leakage parameters are 100% tested at maximum rated hot operating temperature, and guaranteed by correlation at
T
A
= +25°C.
Note 7: Worst-case isolation is on channel 4 because of its proximity to the COM pin. Off isolation = 20log V
/ V
NO
,
COM
V
COM
= output, V = input to off switch.
NO
Note 8: Leakage testing at single supply is guaranteed by correlation testing with dual supplies.
6
_______________________________________________________________________________________
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
01/MAX4532
__________________________________________Typ ic a l Op e ra t in g Ch a ra c t e ris t ic s
(T = +25°C, unless otherwise noted.)
A
ON-RESISTANCE vs. V
COM
ON-RESISTANCE vs. V
ON-RESISTANCE vs. V
COM
COM
AND TEMPERATURE
(DUAL SUPPLIES)
(SINGLE SUPPLY)
(DUAL SUPPLIES)
250
200
150
100
50
100
90
80
70
60
50
40
30
20
10
0
110
100
90
V+ = 5V
V- = -5V
V- = 0V
V+ = 2.4V
V± = ±2.4V
V± = ±3V
V+ = 3V
T = +125°C
A
80
T = +85°C
A
70
V+ = 5V
V± = ±5V
V± = ±6V
60
50
T = +25°C
A
V+ = 10V
T = -55°C
A
40
30
V+ = 12V
0
-2
-6
-4
0
2
4
6
0
2
4
6
8
10 12 14 16
-5 -4 -3 -2 -1
0
1
2
3
4
5
V
COM
(V)
V
COM
(V)
V
COM
(V)
ON-RESISTANCE vs. V
COM
OFF-LEAKAGE vs.
TEMPERATURE
AND TEMPERATURE
(SINGLE SUPPLY)
CHARGE INJECTION vs. V
COM
1000
100
180
160
5
0
V+ = 5V
V- = 0V
V+ = 5.5V
V- = -5.5V
T = +125°C
A
140
120
100
80
T = +85°C
A
T = +25°C
A
10
1
V+ = 5V
V- = 0V
V+ = 5V
V- = -5V
T = -55°C
A
60
40
-5
0.1
-5 -4 -3 -2 -1
0
1
2
3
4
5
0
1
2
3
4
5
-50 -25
0
25 50
75 100 125
V
COM
(V)
TEMPERATURE (°C)
V
COM
(V)
SUPPLY CURRENT vs.
TEMPERATURE
FREQUENCY RESPONSE
MAX4530/1/2-08
180
140
100
60
0
10
V+ = 5V
V- = -5V
-10
INSERTION LOSS
OFF ISOLATION
V
= V = 0V, 5V
A
EN
-20
-30
-40
I+
I-
ON PHASE
20
1
-20
-50
-60
-70
-80
-90
-60
-100
-140
-180
50Ω IN/OUT
0.1
0.1
1
10
100
1000
-50 -25
0
25 50
75 100 125
FREQUENCY (MHz)
TEMPERATURE (°C)
_______________________________________________________________________________________
7
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
______________________________________________________________P in De s c rip t io n
PIN
NAME
FUNCTION
MAX4530
MAX4531
MAX4532
17, 1, 19, 2,
18, 6, 16, 5
—
—
NO0–NO7
Analog Switch Inputs 0–7
—
—
—
3, 14
4
1, 2, 6, 5
—
1
NO0B–NO3B
NOB
Analog Switch “B” Inputs 0–3
—
—
3, 14
—
4
Analog Switch “B” Normally Open Input
Analog Switch “B” Normally Closed Input
Not Internally Connected
2
NCB
3, 14
—
19
4
N.C.
COM
COMB
NOA
Analog Switch Common
—
—
—
—
7
Analog Switch “B” Common
—
17
—
7
Analog Switch “A” Normally Open Input
Analog Switch “A” Common
5
COMA
NCA
6
Analog Switch “A” Normally Closed Input
Enable Logic Input #1 (see Truth Table).
Enable Logic Input #2 (see Truth Table).
7
EN1
8
8
8
EN2
Negative Analog Supply Voltage Input. Connect
to GND for single supply operation.
9
9
9
V-
Negative Digital Supply Voltage Input. Connect
to digital ground. (Analog signals have no
ground
10
10
10
GND
01/MAX4532
11
12
13
15
—
—
—
—
11
11
12
13
15
—
16
17
18
LE
ADDA
Address Latch Logic Input (see Truth Table).
Address “A” Logic Input (see Truth Table).
Address “B” Logic Input (see Truth Table).
Address “C” Logic Input (see Truth Table).
Analog Switch “A” Inputs 0–3
12
13
ADDB
—
ADDC
16, 19, 18, 15
NO0A–NO3A
NCC
—
—
—
Analog Switch “C” Normally Closed Input
Analog Switch “C” Normally Open Input
Analog Switch “C” Common
NOC
COMC
Positive Analog and Digital Supply-Voltage
Input
20
20
20
V+
NO_, NC_ and COM_ pins are identical and interchangeable. Either may be considered as an input or output; signals pass equally
well in both directions.
8
_______________________________________________________________________________________
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
01/MAX4532
The logic-level thresholds are TTL/CMOS compatible
when V+ = +5V. As V+ rises, the threshold increases
slightly, so when V+ reaches +12V, the threshold is
about 3.1V—above the TTL guaranteed, high-level min-
imum of 2.8V, but still compatible with CMOS outputs.
__________Ap p lic a t io n s In fo rm a t io n
P o w e r-S u p p ly Co n s id e ra t io n s
Overview
The MAX4530/MAX4531/MAX4532 construction is typi-
cal of most CMOS analog switches. They have three
supply pins: V+, V-, and GND. V+ and V- drive the
internal CMOS switches and set the limits of the analog
voltage on any switch. Reverse ESD-protection diodes
are internally connected between each analog-signal
pin and both V+ and V-. One of these diodes conducts
if any analog signal exceeds V+ or V-. During normal
operation, these and other reverse-biased ESD diodes
leak, forming the only current drawn from V+ or V-.
Bipolar Supplies
The MAX4530/MAX4531/MAX4532 operate with bipolar
supplies between ±2.0V and ±6V. The V+ and V- sup-
plies need not be symmetrical, but their sum cannot
exceed the +13V absolute maximum rating.
Single Supply
The MAX4530/MAX4531/MAX4532 operate from a sin-
gle supply between +2V and +12V when V- is connect-
e d to GND. All of the b ip ola r p re c a utions mus t b e
observed. At room temperature, they actually work with
a single supply at, near, or below +1.7V, although as
supply voltage decreases, switch on-resistance and
switching times become very high.
Virtually all of the analog leakage current comes from
the ESD diodes. Although the ESD diodes on a given
signal pin are identical and therefore fairly well bal-
anced, they are reverse biased differently. Each is
biased by either V+ or V- and the analog signal. This
means their leakages vary as the signal varies. The
difference in the two diode leakages to the V+ and V-
pins constitutes the analog-signal-path leakage current.
All analog leakage current flows between each pin and
one of the supply terminals, not to the other switch ter-
minal. For this reason, both sides of a given switch can
show leakage currents of either the same or opposite
polarity.
Hig h -Fre q u e n c y P e rfo rm a n c e
In 50Ωsystems, signal response is reasonably flat up to
50MHz (see Typical Operating Characteristics). Above
20MHz, the on response has several minor peaks that
are highly layout dependent. The problem is not in turn-
ing the switch on, but in turning it off. The off-state
switch acts like a capacitor and passes higher frequen-
cies with less attenuation. At 10MHz, off isolation is
about -65dB in 50Ωsystems, becoming worse (approxi-
ma te ly 20d B p e r d e c a d e ) a s fre q ue nc y inc re a s e s .
Hig he r c irc uit imp e d a nc e s a ls o ma ke off is ola tion
wors e . Ad ja c e nt c ha nne l a tte nua tion is a b out 3d B
above that of a bare IC socket, and is due entirely to
capacitive coupling.
The analog-signal paths and GND are not connected.
V+ and GND power the internal logic and logic-level
translators, and set both the input and output logic lim-
its. The logic-level translators convert the logic levels
into switched V+ and V- signals to drive the analog sig-
nals’ gates. This drive signal is the only connection
between the logic supplies and signals and the analog
supplies. V+ and V- have ESD-protection diodes to
GND.
_______________________________________________________________________________________
9
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
______________________________________________Te s t Circ u it s /Tim in g Dia g ra m s
V+
V+
0V
V
LE V+
ADD_
50%
+3V
-3V
NO0
NO1–NO6
NO7
ADDC
ADDB
ADDA
V
ADD_
50Ω
V
NO0
COM
V
OUT
90%
MAX4530
GND
V+
35pF
300Ω
EN2
EN1
0V
V
OUT
90%
V-
V-
V
NO7
t
t
TRANS
TRANS
V+
V+
0V
V
LE V+
ADD_
50%
+3V
-3V
NO0
ADDA
ADDB
V
ADD_
NO1_, NO2_
NO3_
50Ω
V
NO0
COM
V
OUT
MAX4531
90%
V+
35pF
300Ω
EN2
EN1
0V
V
OUT
01/MAX4532
90%
GND
V+
V-
V-
V
NO3
t
t
TRANS
TRANS
V+
0V
V
ADD_
LE V+
50%
+3V
-3V
NO_
V
ADD_
ADD_
50Ω
NC_
V
NC_
COM
V
OUT
MAX4532
GND
90%
V+
35pF
300Ω
EN2
EN1
0V
V
OUT
90%
V-
V-
V
NO_
t
t
TRANS
TRANS
Figure 1. Address Transition Time
10 ______________________________________________________________________________________
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
01/MAX4532
_________________________________Te s t Circ u it s /Tim in g Dia g ra m s (c o n t in u e d )
V+
V+
V+
0V
LE
50%
+3V
NO0
ADDC
ADDB
ADDA
V
EN1
NO1–NO7
V
NO0
COM
V
OUT
MAX4530
GND
90%
V
EN1
300Ω
35pF
EN1
EN2
V
OUT
V+
90%
V-
V-
50Ω
0V
t
ON
t
OFF
V+
V+
0V
V+
LE
50%
+3V
NO0_
ADDA
ADDB
V
EN1
NO1_, N02_, NO3_
V
NO0
COM_
V
OUT
MAX4531
90%
V
EN1
300Ω
35pF
EN1
EN2
V
OUT
V+
90%
50Ω
GND
V+
V-
V-
0V
t
ON
t
OFF
LE V+
V+
0V
50%
NO_
ADD_
V
EN1
+3V
NC_
V
NC_
COM_
V
OUT
MAX4532
GND
90%
V
EN1
300Ω
35pF
EN1
EN2
V
OUT
V+
90%
V-
V-
50Ω
0V
t
ON
t
OFF
V- = 0V FOR SINGLE-SUPPLY OPERATION.
REPEAT TEST FOR EACH SECTION.
REPEAT TEST FOR EN2, WITH PULSE INVERTED
AND EN1 CONNECTED TO GND.
Figure 2. Enable Switching Time
______________________________________________________________________________________ 11
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
_________________________________Te s t Circ u it s /Tim in g Dia g ra m s (c o n t in u e d )
V+
V
ADD_
V+
LE
ADDC
ADDB
ADDA
+3V
NO0–NO7
COM
50Ω
V
OUT
MAX4530
GND
V+
300Ω
35pF
EN2
EN1
V-
V-
V+
t
t
< 20ns
< 20ns
F
R
V+
0V
V
LE V+
ADD_
V
50%
ADD_
ADDA
ADDB
+3V
NO0_–NO3_
COM_
50Ω
V
NO_
V
OUT
MAX4531
90%
V
OUT
V+
35pF
300Ω
EN2
EN1
01/MAX4532
GND
V-
V-
0V
t
BBM
V+
V+
V
LE
ADD_
+3V
NO_, NC_
COM
ADD_
50Ω
V
OUT
MAX4532
GND
V+
35pF
300Ω
EN2
EN1
V-
V-
V- = 0V FOR SINGLE-SUPPLY OPERATION.
REPEAT TEST FOR EACH SECTION.
Figure 3. Break-Before-Make Interval
12 ______________________________________________________________________________________
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
01/MAX4532
_________________________________Te s t Circ u it s /Tim in g Dia g ra m s (c o n t in u e d )
V+
V+
LE V+
V
EN1
NO_
ADDC
ADDB
ADDA
V
NO
= 0V
0V
CHANNEL
SELECT
MAX4530
MAX4531
MAX4532
V
COM
OUT
V
EN1
∆V
OUT
C = 1000pF
L
EN1
EN2
V
OUT
V+
V-
V-
GND
50Ω
∆V IS THE MEASURED VOLTAGE DUE TO CHARGE-TRANSFER
OUT
ERROR Q WHEN THE CHANNEL TURNS OFF.
V- = 0V FOR SINGLE-SUPPLY OPERATION.
REPEAT TEST FOR EACH SECTION.
Q = ∆V x C
OUT
L
Figure 4. Charge Injection
V+
V+
NETWORK
ANALYZER
V
V
OUT
OFF ISOLATION = 20log
ON LOSS = 20log
V
LE
IN
IN
NO_
ADDC
50Ω
50Ω
50Ω
CHANNEL
ADDB
V
OUT
SELECT
V
IN
ADDA
MAX4530
MAX4531
MAX4532
V
OUT
MEASUREMENT
REF
COM_
V-
V+
EN2
EN1
V
OUT
CROSSTALK = 20log
V
IN
50Ω
GND
10nF
V-
MEASUREMENTS ARE STANDARDIZED AGAINST SHORT AT SOCKET TERMINALS.
OFF ISOLATION IS MEASURED BETWEEN COM_ AND OFF NO_ TERMINAL ON EACH SWITCH.
ON LOSS IS MEASURED BETWEEN COM_ AND ON TERMINAL ON EACH SWITCH.
CROSSTALK (MAX4531/MAX4532 IS MEASURED FROM ONE CHANNEL (A, B, C) TO ALL OTHER CHANNELS.
SIGNAL DIRECTION THROUGH SWITCH IS REVERSED; WORST VALUES ARE RECORDED.
Figure 5. Off Isolation, On Loss, and Crosstalk
V+
LE V+
NO_
ADDC
CHANNEL
SELECT
ADDB
ADDA
NO_
MAX4530
MAX4531
MAX4532
1MHz
CAPACITANCE
ANALYZER
COM
V+
EN2
EN1
V-
V-
GND
Figure 6. NO/COM Capacitance
______________________________________________________________________________________ 13
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
_________________________________Te s t Circ u it s /Tim in g Dia g ra m s (c o n t in u e d )
V+
V+
EN2
V
ADD_
ADDC
ADDB
ADDA
+3V
NO1–NO7
NO0
50Ω
MAX4530
V
LE
LE
COM
V
OUT
50Ω
300Ω
35pF
V-
V-
EN1
GND
V+
V+
t
MPW
3V
V
LE
EN2
V
ADD_
50%
ADDA
ADDB
0V
3V
+3V
NO1_, NO2_, NO3_
NO0_
t
H
t
H
t
S
50Ω
V
50%
ADD_
MAX4531
V
LE
0V
3V
LE
COM_
V
OUT
t
t
ON, OFF
50Ω
300Ω
35pF
01/MAX4532
90%
V-
V-
EN1
GND
V
OUT
0V
V+
V+
EN2
V
ADD_
ADD_
NO_
NC_
50Ω
+3V
V
LE
MAX4532
GND
LE
COM_
V
OUT
50Ω
300Ω
35pF
V-
V-
EN1
V- = 0V FOR SINGLE-SUPPLY OPERATION.
REPEAT TEST FOR EACH SECTION.
Figure 7. Setup and Hold Times, Minimum LE Width
14 ______________________________________________________________________________________
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
01/MAX4532
___________________________________________Tru t h Ta b le /S w it c h P ro g ra m m in g
ADDRESS BITS
ON SWITCHES
MAX4531
LE
EN2 EN1
ADDC*
ADDB
ADDA
MAX4530
Last address
MAX4532
Last address
0
1
0
X
X
X
X
X
X
X
X
X
Last address
X
X
0
X
1
All switches open
All switches open
All switches open
All switches open
All switches open
All switches open
X
COMA–NCA,
COMB–NCB,
COMC–NCC
COMA–NO0A,
COMB–NO0B
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
COM–NO0
COM–NO1
COM–NO2
COM–NO3
COM–NO4
COM–NO5
COM–NO6
COM–NO7
COMA–NOA,
COMB–NCB,
COMC–NCC
COMA–NO1A,
COMB–NO1B
COMA–NCA,
COMB–NOB,
COMC–NCC
COMA–NO2A,
COMB–NO2B
COMA–NOA,
COMB–NOB,
COMC–NCC
COMA–NO3A,
COMB–NO3B
COMA–NCA,
COMB–NCB,
COMC–NOC
COMA–NO0A,
COMB–NO0B
COMA–NOA,
COMB–NCB,
COMC–NOC
COMA–NO1A,
COMB–NO1B
COMA–NCA,
COMB–NOB,
COMC–NOC
COMA–NO2A,
COMB–NO2B
COMA–NOA,
COMB–NOB,
COMC–NOC
COMA–NO3A,
COMB–NO3B
X = Don’t Care
*ADDC not present on MAX4531.
Note: NO_ and COM_ pins are identical and interchangeable. Either may be considered an input or an output; signals pass equally
well in either direction. LE is independent of EN1 and EN2.
______________________________________________________________________________________ 15
Low -Volta ge , CMOS Ana log Multiple xe rs /Sw itc he s
w ith Ena ble Inputs a nd Addre s s La tc hing
___________________________________________Ord e rin g In fo rm a t io n (c o n t in u e d )
PART
TEMP. RANGE
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
20 Plastic DIP
20 SO
PART
TEMP. RANGE
0°C to +70°C
0°C to +70°C
0°C to +70°C
0°C to +70°C
-40°C to +85°C
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
20 Plastic DIP
20 SO
MAX4530EPP
MAX4530EWP
MAX4530EAP
MAX4531CPP
MAX4531CWP
MAX4531CAP
MAX4531C/D
MAX4531EPP
MAX4531EWP
MAX4531EAP
MAX4532CPP
MAX4532CWP
MAX4532CAP
MAX4532C/D
MAX4532EPP
MAX4532EWP
MAX4532EAP
20 SSOP
20 SSOP
20 Plastic DIP
20 SO
Dice*
20 Plastic DIP
20 SO
20 SSOP
Dice*
20 SSOP
20 Plastic DIP
20 SO
20 SSOP
*Contact factory for availability.
__________________________________________________________Ch ip To p o g ra p h ie s
MAX4530/MAX4532
MAX4531
V+
V+
NO3 (NCB)
NO2B
NO2 (COMB)
NO2A
NO1 (NOB)
NO0B
NO4 (COMC)
N.C.
NO1A
COMA
COM
(NOA)
COMB
NO3B
NO1B
01/MAX4532
NO7
(COMA)
NO0 (NOC)
NO6 (NCC)
NO0A
NO3A
NO5
(NCA)
0.081"
(2.06mm)
0.081"
(2.06mm)
ADDC
ADDB
ADDB
N.C.
EN1
EN2
EN1
EN2
V- GND
ADDA
V- GND
ADDA
LE
LE
0.053"
0.053"
(1.35mm)
(1.35mm)
( ) ARE FOR MAX4532
TRANSISTOR COUNT: 255
SUBSTRATE CONNECTED TO V+
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 __________________Ma x im In t e g ra t e d P ro d u c t s , 1 2 0 S a n Ga b rie l Drive , S u n n yva le , CA 9 4 0 8 6 (4 0 8 ) 7 3 7 -7 6 0 0
© 1996 Maxim Integrated Products
Printed USA
is a registered trademark of Maxim Integrated Products.
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